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From: <ilialin@codeaurora.org>
To: 'Sudeep Holla' <sudeep.holla@arm.com>,
	mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
	mark.rutland@arm.com, viresh.kumar@linaro.org, nm@ti.com,
	lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org,
	david.brown@linaro.org, catalin.marinas@arm.com,
	will.deacon@arm.com, rjw@rjwysocki.net,
	linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	rnayak@codeaurora.org, amit.kucheria@linaro.org,
	nicolas.dechesne@linaro.org, celster@codeaurora.org,
	tfinkel@codeaurora.org
Subject: RE: [PATCH] cpufreq: Add Kryo CPU scaling driver
Date: Mon, 21 May 2018 15:57:10 +0300	[thread overview]
Message-ID: <000f01d3f103$3ff78ba0$bfe6a2e0$@codeaurora.org> (raw)
In-Reply-To: <153cc316-dcb5-972f-5a2f-c91fe0f6348b@arm.com>



> -----Original Message-----
> From: Sudeep Holla <sudeep.holla@arm.com>
> Sent: Monday, May 21, 2018 15:50
> To: Ilia Lin <ilialin@codeaurora.org>; mturquette@baylibre.com;
> sboyd@kernel.org; robh@kernel.org; mark.rutland@arm.com;
> viresh.kumar@linaro.org; nm@ti.com; lgirdwood@gmail.com;
> broonie@kernel.org; andy.gross@linaro.org; david.brown@linaro.org;
> catalin.marinas@arm.com; will.deacon@arm.com; rjw@rjwysocki.net; linux-
> clk@vger.kernel.org
> Cc: Sudeep Holla <sudeep.holla@arm.com>; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-pm@vger.kernel.org; linux-arm-
> msm@vger.kernel.org; linux-soc@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; rnayak@codeaurora.org;
> amit.kucheria@linaro.org; nicolas.dechesne@linaro.org;
> celster@codeaurora.org; tfinkel@codeaurora.org
> Subject: Re: [PATCH] cpufreq: Add Kryo CPU scaling driver
> 
> 
> 
> On 19/05/18 12:35, Ilia Lin wrote:
> > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > processors, the CPU frequency subset and voltage value of each OPP
> > varies based on the silicon variant in use. Qualcomm Process Voltage
> > Scaling Tables defines the voltage and frequency value based on the
> > msm-id in SMEM and speedbin blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> > Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> > ---
> >  drivers/cpufreq/Kconfig.arm          |  10 +++
> >  drivers/cpufreq/Makefile             |   1 +
> >  drivers/cpufreq/cpufreq-dt-platdev.c |   3 +
> >  drivers/cpufreq/qcom-cpufreq-kryo.c  | 164
> > +++++++++++++++++++++++++++++++++++
> >  4 files changed, 178 insertions(+)
> >  create mode 100644 drivers/cpufreq/qcom-cpufreq-kryo.c
> >
> 
> [..]
> 
> > +
> > +/*
> > + * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > +processors,
> > + * the CPU frequency subset and voltage value of each OPP varies
> > + * based on the silicon variant in use. Qualcomm Process Voltage
> > +Scaling Tables
> > + * defines the voltage and frequency value based on the msm-id in
> > +SMEM
> > + * and speedbin blown in the efuse combination.
> > + * The qcom-cpufreq-kryo driver reads the msm-id and efuse value from
> > +the SoC
> > + * to provide the OPP framework with required information.
> > + * This is used to determine the voltage and frequency value for each
> > +OPP of
> > + * operating-points-v2 table when it is parsed by the OPP framework.
> > + */
> > +
> > +#include <linux/cpu.h>
> > +#include <linux/err.h>
> > +#include <linux/init.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/nvmem-consumer.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_opp.h>
> > +#include <linux/slab.h>
> > +#include <linux/soc/qcom/smem.h>
> > +
> > +#define MSM_ID_SMEM	137
> > +#define SILVER_LEAD	0
> > +#define GOLD_LEAD	2
> > +
> 
> So I gather form other emails, that these are physical cpu number(not even
> unique identifier like MPIDR). Will this work on parts or platforms that need
> to boot in GOLD LEAD cpus.

The driver is for Kryo CPU, which (and AFAIK all multicore MSMs) always boots on the CPU0.

> 
> [...]
> 
> > +
> > +static int __init qcom_cpufreq_kryo_driver_init(void)
> > +{
> > +	struct device *cpu_dev_silver, *cpu_dev_gold;
> > +	struct opp_table *opp_silver, *opp_gold;
> > +	enum _msm8996_version msm8996_version;
> > +	struct nvmem_cell *speedbin_nvmem;
> > +	struct platform_device *pdev;
> > +	struct device_node *np;
> > +	u8 *speedbin;
> > +	u32 versions;
> > +	size_t len;
> > +	int ret;
> > +
> > +	cpu_dev_silver = get_cpu_device(SILVER_LEAD);
> > +	if (IS_ERR_OR_NULL(cpu_dev_silver))
> > +		return PTR_ERR(cpu_dev_silver);
> > +
> > +	cpu_dev_gold = get_cpu_device(SILVER_LEAD);
> 
> s/SILVER/GOLD/ ?

Yes, you are right. This is already fixed in the respin.

> 
> --
> Regards,
> Sudeep

WARNING: multiple messages have this Message-ID (diff)
From: <ilialin@codeaurora.org>
To: "'Sudeep Holla'" <sudeep.holla@arm.com>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>, <robh@kernel.org>,
	<mark.rutland@arm.com>, <viresh.kumar@linaro.org>, <nm@ti.com>,
	<lgirdwood@gmail.com>, <broonie@kernel.org>,
	<andy.gross@linaro.org>, <david.brown@linaro.org>,
	<catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<rjw@rjwysocki.net>, <linux-clk@vger.kernel.org>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-pm@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<linux-soc@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <rnayak@codeaurora.org>,
	<amit.kucheria@linaro.org>, <nicolas.dechesne@linaro.org>,
	<celster@codeaurora.org>, <tfinkel@codeaurora.org>
Subject: RE: [PATCH] cpufreq: Add Kryo CPU scaling driver
Date: Mon, 21 May 2018 15:57:10 +0300	[thread overview]
Message-ID: <000f01d3f103$3ff78ba0$bfe6a2e0$@codeaurora.org> (raw)
In-Reply-To: <153cc316-dcb5-972f-5a2f-c91fe0f6348b@arm.com>



> -----Original Message-----
> From: Sudeep Holla <sudeep.holla@arm.com>
> Sent: Monday, May 21, 2018 15:50
> To: Ilia Lin <ilialin@codeaurora.org>; mturquette@baylibre.com;
> sboyd@kernel.org; robh@kernel.org; mark.rutland@arm.com;
> viresh.kumar@linaro.org; nm@ti.com; lgirdwood@gmail.com;
> broonie@kernel.org; andy.gross@linaro.org; david.brown@linaro.org;
> catalin.marinas@arm.com; will.deacon@arm.com; rjw@rjwysocki.net; =
linux-
> clk@vger.kernel.org
> Cc: Sudeep Holla <sudeep.holla@arm.com>; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-pm@vger.kernel.org; linux-arm-
> msm@vger.kernel.org; linux-soc@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; rnayak@codeaurora.org;
> amit.kucheria@linaro.org; nicolas.dechesne@linaro.org;
> celster@codeaurora.org; tfinkel@codeaurora.org
> Subject: Re: [PATCH] cpufreq: Add Kryo CPU scaling driver
>=20
>=20
>=20
> On 19/05/18 12:35, Ilia Lin wrote:
> > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > processors, the CPU frequency subset and voltage value of each OPP
> > varies based on the silicon variant in use. Qualcomm Process Voltage
> > Scaling Tables defines the voltage and frequency value based on the
> > msm-id in SMEM and speedbin blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from =
the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each =
OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> > Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> > ---
> >  drivers/cpufreq/Kconfig.arm          |  10 +++
> >  drivers/cpufreq/Makefile             |   1 +
> >  drivers/cpufreq/cpufreq-dt-platdev.c |   3 +
> >  drivers/cpufreq/qcom-cpufreq-kryo.c  | 164
> > +++++++++++++++++++++++++++++++++++
> >  4 files changed, 178 insertions(+)
> >  create mode 100644 drivers/cpufreq/qcom-cpufreq-kryo.c
> >
>=20
> [..]
>=20
> > +
> > +/*
> > + * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > +processors,
> > + * the CPU frequency subset and voltage value of each OPP varies
> > + * based on the silicon variant in use. Qualcomm Process Voltage
> > +Scaling Tables
> > + * defines the voltage and frequency value based on the msm-id in
> > +SMEM
> > + * and speedbin blown in the efuse combination.
> > + * The qcom-cpufreq-kryo driver reads the msm-id and efuse value =
from
> > +the SoC
> > + * to provide the OPP framework with required information.
> > + * This is used to determine the voltage and frequency value for =
each
> > +OPP of
> > + * operating-points-v2 table when it is parsed by the OPP =
framework.
> > + */
> > +
> > +#include <linux/cpu.h>
> > +#include <linux/err.h>
> > +#include <linux/init.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/nvmem-consumer.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_opp.h>
> > +#include <linux/slab.h>
> > +#include <linux/soc/qcom/smem.h>
> > +
> > +#define MSM_ID_SMEM	137
> > +#define SILVER_LEAD	0
> > +#define GOLD_LEAD	2
> > +
>=20
> So I gather form other emails, that these are physical cpu number(not =
even
> unique identifier like MPIDR). Will this work on parts or platforms =
that need
> to boot in GOLD LEAD cpus.

The driver is for Kryo CPU, which (and AFAIK all multicore MSMs) always =
boots on the CPU0.

>=20
> [...]
>=20
> > +
> > +static int __init qcom_cpufreq_kryo_driver_init(void)
> > +{
> > +	struct device *cpu_dev_silver, *cpu_dev_gold;
> > +	struct opp_table *opp_silver, *opp_gold;
> > +	enum _msm8996_version msm8996_version;
> > +	struct nvmem_cell *speedbin_nvmem;
> > +	struct platform_device *pdev;
> > +	struct device_node *np;
> > +	u8 *speedbin;
> > +	u32 versions;
> > +	size_t len;
> > +	int ret;
> > +
> > +	cpu_dev_silver =3D get_cpu_device(SILVER_LEAD);
> > +	if (IS_ERR_OR_NULL(cpu_dev_silver))
> > +		return PTR_ERR(cpu_dev_silver);
> > +
> > +	cpu_dev_gold =3D get_cpu_device(SILVER_LEAD);
>=20
> s/SILVER/GOLD/ ?

Yes, you are right. This is already fixed in the respin.

>=20
> --
> Regards,
> Sudeep

WARNING: multiple messages have this Message-ID (diff)
From: ilialin@codeaurora.org (ilialin at codeaurora.org)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] cpufreq: Add Kryo CPU scaling driver
Date: Mon, 21 May 2018 15:57:10 +0300	[thread overview]
Message-ID: <000f01d3f103$3ff78ba0$bfe6a2e0$@codeaurora.org> (raw)
In-Reply-To: <153cc316-dcb5-972f-5a2f-c91fe0f6348b@arm.com>



> -----Original Message-----
> From: Sudeep Holla <sudeep.holla@arm.com>
> Sent: Monday, May 21, 2018 15:50
> To: Ilia Lin <ilialin@codeaurora.org>; mturquette at baylibre.com;
> sboyd at kernel.org; robh at kernel.org; mark.rutland at arm.com;
> viresh.kumar at linaro.org; nm at ti.com; lgirdwood at gmail.com;
> broonie at kernel.org; andy.gross at linaro.org; david.brown at linaro.org;
> catalin.marinas at arm.com; will.deacon at arm.com; rjw at rjwysocki.net; linux-
> clk at vger.kernel.org
> Cc: Sudeep Holla <sudeep.holla@arm.com>; devicetree at vger.kernel.org;
> linux-kernel at vger.kernel.org; linux-pm at vger.kernel.org; linux-arm-
> msm at vger.kernel.org; linux-soc at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; rnayak at codeaurora.org;
> amit.kucheria at linaro.org; nicolas.dechesne at linaro.org;
> celster at codeaurora.org; tfinkel at codeaurora.org
> Subject: Re: [PATCH] cpufreq: Add Kryo CPU scaling driver
> 
> 
> 
> On 19/05/18 12:35, Ilia Lin wrote:
> > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > processors, the CPU frequency subset and voltage value of each OPP
> > varies based on the silicon variant in use. Qualcomm Process Voltage
> > Scaling Tables defines the voltage and frequency value based on the
> > msm-id in SMEM and speedbin blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> > Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> > ---
> >  drivers/cpufreq/Kconfig.arm          |  10 +++
> >  drivers/cpufreq/Makefile             |   1 +
> >  drivers/cpufreq/cpufreq-dt-platdev.c |   3 +
> >  drivers/cpufreq/qcom-cpufreq-kryo.c  | 164
> > +++++++++++++++++++++++++++++++++++
> >  4 files changed, 178 insertions(+)
> >  create mode 100644 drivers/cpufreq/qcom-cpufreq-kryo.c
> >
> 
> [..]
> 
> > +
> > +/*
> > + * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > +processors,
> > + * the CPU frequency subset and voltage value of each OPP varies
> > + * based on the silicon variant in use. Qualcomm Process Voltage
> > +Scaling Tables
> > + * defines the voltage and frequency value based on the msm-id in
> > +SMEM
> > + * and speedbin blown in the efuse combination.
> > + * The qcom-cpufreq-kryo driver reads the msm-id and efuse value from
> > +the SoC
> > + * to provide the OPP framework with required information.
> > + * This is used to determine the voltage and frequency value for each
> > +OPP of
> > + * operating-points-v2 table when it is parsed by the OPP framework.
> > + */
> > +
> > +#include <linux/cpu.h>
> > +#include <linux/err.h>
> > +#include <linux/init.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/nvmem-consumer.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_opp.h>
> > +#include <linux/slab.h>
> > +#include <linux/soc/qcom/smem.h>
> > +
> > +#define MSM_ID_SMEM	137
> > +#define SILVER_LEAD	0
> > +#define GOLD_LEAD	2
> > +
> 
> So I gather form other emails, that these are physical cpu number(not even
> unique identifier like MPIDR). Will this work on parts or platforms that need
> to boot in GOLD LEAD cpus.

The driver is for Kryo CPU, which (and AFAIK all multicore MSMs) always boots on the CPU0.

> 
> [...]
> 
> > +
> > +static int __init qcom_cpufreq_kryo_driver_init(void)
> > +{
> > +	struct device *cpu_dev_silver, *cpu_dev_gold;
> > +	struct opp_table *opp_silver, *opp_gold;
> > +	enum _msm8996_version msm8996_version;
> > +	struct nvmem_cell *speedbin_nvmem;
> > +	struct platform_device *pdev;
> > +	struct device_node *np;
> > +	u8 *speedbin;
> > +	u32 versions;
> > +	size_t len;
> > +	int ret;
> > +
> > +	cpu_dev_silver = get_cpu_device(SILVER_LEAD);
> > +	if (IS_ERR_OR_NULL(cpu_dev_silver))
> > +		return PTR_ERR(cpu_dev_silver);
> > +
> > +	cpu_dev_gold = get_cpu_device(SILVER_LEAD);
> 
> s/SILVER/GOLD/ ?

Yes, you are right. This is already fixed in the respin.

> 
> --
> Regards,
> Sudeep

WARNING: multiple messages have this Message-ID (diff)
From: <ilialin@codeaurora.org>
To: "'Sudeep Holla'" <sudeep.holla@arm.com>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>, <robh@kernel.org>,
	<mark.rutland@arm.com>, <viresh.kumar@linaro.org>, <nm@ti.com>,
	<lgirdwood@gmail.com>, <broonie@kernel.org>,
	<andy.gross@linaro.org>, <david.brown@linaro.org>,
	<catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<rjw@rjwysocki.net>, <linux-clk@vger.kernel.org>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-pm@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<linux-soc@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <rnayak@codeaurora.org>,
	<amit.kucheria@linaro.org>, <nicolas.dechesne@linaro.org>,
	<celster@codeaurora.org>, <tfinkel@codeaurora.org>
Subject: RE: [PATCH] cpufreq: Add Kryo CPU scaling driver
Date: Mon, 21 May 2018 15:57:10 +0300	[thread overview]
Message-ID: <000f01d3f103$3ff78ba0$bfe6a2e0$@codeaurora.org> (raw)
In-Reply-To: <153cc316-dcb5-972f-5a2f-c91fe0f6348b@arm.com>



> -----Original Message-----
> From: Sudeep Holla <sudeep.holla@arm.com>
> Sent: Monday, May 21, 2018 15:50
> To: Ilia Lin <ilialin@codeaurora.org>; mturquette@baylibre.com;
> sboyd@kernel.org; robh@kernel.org; mark.rutland@arm.com;
> viresh.kumar@linaro.org; nm@ti.com; lgirdwood@gmail.com;
> broonie@kernel.org; andy.gross@linaro.org; david.brown@linaro.org;
> catalin.marinas@arm.com; will.deacon@arm.com; rjw@rjwysocki.net; linux-
> clk@vger.kernel.org
> Cc: Sudeep Holla <sudeep.holla@arm.com>; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-pm@vger.kernel.org; linux-arm-
> msm@vger.kernel.org; linux-soc@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; rnayak@codeaurora.org;
> amit.kucheria@linaro.org; nicolas.dechesne@linaro.org;
> celster@codeaurora.org; tfinkel@codeaurora.org
> Subject: Re: [PATCH] cpufreq: Add Kryo CPU scaling driver
> 
> 
> 
> On 19/05/18 12:35, Ilia Lin wrote:
> > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > processors, the CPU frequency subset and voltage value of each OPP
> > varies based on the silicon variant in use. Qualcomm Process Voltage
> > Scaling Tables defines the voltage and frequency value based on the
> > msm-id in SMEM and speedbin blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> > Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> > ---
> >  drivers/cpufreq/Kconfig.arm          |  10 +++
> >  drivers/cpufreq/Makefile             |   1 +
> >  drivers/cpufreq/cpufreq-dt-platdev.c |   3 +
> >  drivers/cpufreq/qcom-cpufreq-kryo.c  | 164
> > +++++++++++++++++++++++++++++++++++
> >  4 files changed, 178 insertions(+)
> >  create mode 100644 drivers/cpufreq/qcom-cpufreq-kryo.c
> >
> 
> [..]
> 
> > +
> > +/*
> > + * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > +processors,
> > + * the CPU frequency subset and voltage value of each OPP varies
> > + * based on the silicon variant in use. Qualcomm Process Voltage
> > +Scaling Tables
> > + * defines the voltage and frequency value based on the msm-id in
> > +SMEM
> > + * and speedbin blown in the efuse combination.
> > + * The qcom-cpufreq-kryo driver reads the msm-id and efuse value from
> > +the SoC
> > + * to provide the OPP framework with required information.
> > + * This is used to determine the voltage and frequency value for each
> > +OPP of
> > + * operating-points-v2 table when it is parsed by the OPP framework.
> > + */
> > +
> > +#include <linux/cpu.h>
> > +#include <linux/err.h>
> > +#include <linux/init.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/nvmem-consumer.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_opp.h>
> > +#include <linux/slab.h>
> > +#include <linux/soc/qcom/smem.h>
> > +
> > +#define MSM_ID_SMEM	137
> > +#define SILVER_LEAD	0
> > +#define GOLD_LEAD	2
> > +
> 
> So I gather form other emails, that these are physical cpu number(not even
> unique identifier like MPIDR). Will this work on parts or platforms that need
> to boot in GOLD LEAD cpus.

The driver is for Kryo CPU, which (and AFAIK all multicore MSMs) always boots on the CPU0.

> 
> [...]
> 
> > +
> > +static int __init qcom_cpufreq_kryo_driver_init(void)
> > +{
> > +	struct device *cpu_dev_silver, *cpu_dev_gold;
> > +	struct opp_table *opp_silver, *opp_gold;
> > +	enum _msm8996_version msm8996_version;
> > +	struct nvmem_cell *speedbin_nvmem;
> > +	struct platform_device *pdev;
> > +	struct device_node *np;
> > +	u8 *speedbin;
> > +	u32 versions;
> > +	size_t len;
> > +	int ret;
> > +
> > +	cpu_dev_silver = get_cpu_device(SILVER_LEAD);
> > +	if (IS_ERR_OR_NULL(cpu_dev_silver))
> > +		return PTR_ERR(cpu_dev_silver);
> > +
> > +	cpu_dev_gold = get_cpu_device(SILVER_LEAD);
> 
> s/SILVER/GOLD/ ?

Yes, you are right. This is already fixed in the respin.

> 
> --
> Regards,
> Sudeep

  reply	other threads:[~2018-05-21 12:57 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-17 11:19 [PATCH v8 00/15] CPU scaling support for msm8996 Ilia Lin
2018-05-17 11:19 ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 01/15] soc: qcom: Separate kryo l2 accessors from PMU driver Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 02/15] clk: qcom: Make clk_alpha_pll_configure available to modules Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 03/15] clk: Use devm_ in the register fixed factor clock Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 04/15] clk: qcom: Add CPU clock driver for msm8996 Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-22 13:49   ` kbuild test robot
2018-05-22 13:49     ` kbuild test robot
2018-05-22 13:49     ` kbuild test robot
2018-05-17 11:19 ` [PATCH v8 05/15] dt-bindings: clk: qcom: Add bindings for CPU clock " Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 06/15] clk: qcom: cpu-8996: Add support to switch to alternate PLL Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 07/15] clk: qcom: cpu-8996: Add support to switch below 600Mhz Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 08/15] clk: qcom: Add ACD path to CPU clock driver for msm8996 Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 09/15] dt: qcom: Add opp and thermal to the msm8996 Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 10/15] cpufreq: Add Kryo CPU scaling driver Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-18  1:45   ` Viresh Kumar
2018-05-18  1:45     ` Viresh Kumar
2018-05-19 11:09     ` ilialin
2018-05-19 11:09       ` ilialin at codeaurora.org
2018-05-19 11:09       ` ilialin
2018-05-19 11:54       ` Russell King - ARM Linux
2018-05-19 11:54         ` Russell King - ARM Linux
2018-05-19 11:41     ` ilialin
2018-05-19 11:41       ` ilialin at codeaurora.org
2018-05-19 11:41       ` ilialin
2018-05-19 11:45     ` ilialin
2018-05-19 11:45       ` ilialin at codeaurora.org
2018-05-19 11:45       ` ilialin
2018-05-21  4:49       ` Viresh Kumar
2018-05-21  4:49         ` Viresh Kumar
2018-05-21  9:00         ` ilialin
2018-05-21  9:00           ` ilialin at codeaurora.org
2018-05-21  9:00           ` ilialin
2018-05-21  9:05           ` Viresh Kumar
2018-05-21  9:05             ` Viresh Kumar
2018-05-19 11:35   ` [PATCH] " Ilia Lin
2018-05-19 11:35     ` Ilia Lin
2018-05-21  5:04     ` Viresh Kumar
2018-05-21  5:04       ` Viresh Kumar
2018-05-21 12:50     ` Sudeep Holla
2018-05-21 12:50       ` Sudeep Holla
2018-05-21 12:57       ` ilialin [this message]
2018-05-21 12:57         ` ilialin
2018-05-21 12:57         ` ilialin at codeaurora.org
2018-05-21 12:57         ` ilialin
2018-05-21 13:04         ` Sudeep Holla
2018-05-21 13:04           ` Sudeep Holla
2018-05-22  6:56           ` ilialin
2018-05-22  6:56             ` ilialin
2018-05-22  6:56             ` ilialin at codeaurora.org
2018-05-22  6:56             ` ilialin
2018-05-22  9:12             ` Sudeep Holla
2018-05-22  9:12               ` Sudeep Holla
2018-05-22  7:59           ` ilialin
2018-05-22  7:59             ` ilialin
2018-05-22  7:59             ` ilialin at codeaurora.org
2018-05-22  7:59             ` ilialin
2018-05-22  9:18             ` Sudeep Holla
2018-05-22  9:18               ` Sudeep Holla
2018-05-22  9:38             ` Viresh Kumar
2018-05-22  9:38               ` Viresh Kumar
2018-05-22 11:29     ` Ilia Lin
2018-05-22 11:29       ` Ilia Lin
2018-05-22 13:07       ` Sudeep Holla
2018-05-22 13:07         ` Sudeep Holla
2018-05-23  5:44         ` Viresh Kumar
2018-05-23  5:44           ` Viresh Kumar
2018-05-23  9:05     ` Ilia Lin
2018-05-23  9:05       ` Ilia Lin
2018-05-23  9:32       ` Viresh Kumar
2018-05-23  9:32         ` Viresh Kumar
2018-05-23  9:40       ` Russell King - ARM Linux
2018-05-23  9:40         ` Russell King - ARM Linux
2018-05-23  9:59         ` Viresh Kumar
2018-05-23  9:59           ` Viresh Kumar
2018-05-21 10:31   ` Ilia Lin
2018-05-21 10:31     ` Ilia Lin
2018-05-21 10:37     ` Viresh Kumar
2018-05-21 10:37       ` Viresh Kumar
2018-05-21 10:54     ` Russell King - ARM Linux
2018-05-21 10:54       ` Russell King - ARM Linux
2018-05-21 11:05       ` ilialin
2018-05-21 11:05         ` ilialin at codeaurora.org
2018-05-21 11:05         ` ilialin
2018-05-21 12:11         ` Russell King - ARM Linux
2018-05-21 12:11           ` Russell King - ARM Linux
2018-05-21 12:35           ` ilialin
2018-05-21 12:35             ` ilialin at codeaurora.org
2018-05-21 12:35             ` ilialin
2018-05-21 12:41             ` Russell King - ARM Linux
2018-05-21 12:41               ` Russell King - ARM Linux
2018-05-17 11:19 ` [PATCH v8 11/15] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-18 14:26   ` Rob Herring
2018-05-18 14:26     ` Rob Herring
2018-05-17 11:19 ` [PATCH v8 12/15] dt: qcom: Add qcom-cpufreq-kryo driver configuration Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 13/15] regulator: qcom_spmi: Add support for SAW Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 14/15] dt-bindings: qcom_spmi: Document SAW support Ilia Lin
2018-05-17 11:19   ` Ilia Lin
2018-05-17 11:19 ` [PATCH v8 15/15] dt: qcom: Add SAW regulator for 8x96 CPUs Ilia Lin
2018-05-17 11:19   ` Ilia Lin

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