Re: r3000 instruction set

["Kevin D. Kissell" <kevink@mips.com>]

> I'm working with kaffe on a r3912 cpu. I'm getting an illegal instruction
> error. I disassembled the kaffe binary and thought I'd find the offending
> instruction.
> 
> Unfortunately, I found 2 different lists of r3000 assembler instructions at:
> 
> http://www.xs4all.nl/~vhouten/mipsel/r3000-isa.html
> http://www.xs4all.nl/~vhouten/mipsel/appB.html
> 
> and comparing them against the list of disassembled kaffe instructions
> gives 2 different results.
> 
> So, can someone recommend a definitive list of r3000 assembler instructions?

Several things here.  First,. as Mike pointed out, the 3912 is not an R3000.
It's a superset of the original R3000 "MIPS I" instruction set.  Interestingly,
while the "Appendix B" web page you cite above describes itself as listing
the MIPS I instruction, it actually lists some of the MIPS II instructions that
are implemented in the R3912.

There do seem to be some errors on the first page you cite. For example,
it calls out a "subtract unsigned" instruction, which exists, but then gives it
a non-existent opcode (subi), and incorrect semantics ("exception possible").
So I would ignore that page.  You can get an accurate description of the
MIPS32 instruction set from the MIPS Technologies Inc. web pages at
http://www.mips.com/content/Documentation/MIPSDocumentation/ProcessorArchitecture/doclibrary
though you do need to register to get access.  MIPS32 is a superset of MIPS I,
but it's a strict superset, so any instructions you see in your R3912 trace
should be documented in the MIPS32 spec, with the exeptions of RFE,
which was obsoleted by ERET in MIPS III, and the R3912 MADD/MADDU
instructions, which were superset extensions which predated the MIPS32 MADD 
instructions, and which collide with the MIPS32 CLZ instruction decode.

I spend some time working on Kaffe for MIPS a couple of years ago,
and I remember that there were some hooks to try to manage the ISA
level used.  For example, I had to fix some stuff around the use of the
MIPS IV/MIPS32 conditional move instructions where aren't available
in older cores like the R3912 - but I fixed that because I saw that it was
broken, not because I was testing on a true MIPS I/II platform.  So
someone could have screwed up something else somewhere along those lines.
Note also that the JIT3 logic has always been slightly broken for MIPS.
I spent a week or two trying to hunt it down, disassembling the generated
code buffers, and all the errors I saw *seemed* to be due to the generated
code assuming that some data structure was initialized with a pointer value
that in fact was zero.  That may not be what you're seeing, but since everyone
who actually uses Kaffe for MIPS configures it with --set-engine=intrp, 
instructions could be generated by the JIT3 code which are not compatible
with older MIPS designs, and people might not have noticed.

            Regards,

            Kevin K.