Re: [RFC PATCH 08/18] cxl/port: Update switch_port_probe() for CXL cache devices

[Dave Jiang <dave.jiang@intel.com>]

On 8/12/25 2:29 PM, Ben Cheatham wrote:
> CXL switch port probe currently assumes there are only CXL.mem-capable
> devices below the switch with preconfigured HDM decoders. Now that
> CXL.cache devices can be added below a switch port, it's possible that
> they either have no HDM decoders (type 1) or the CXL.mem capabilities of
> the endpoint haven't been set up yet (type 2).
> 
> The HDM decoders being disabled (if present) is no longer a gauranteed
> failure condition when only cache devices are present below the port.
> Knowing what kind of devices are under the switch port isn't possible
> until the endpoints are probed, so delay HDM setup and validation until
> endpoint port probe.
> 
> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>
> ---
>  drivers/cxl/core/hdm.c | 31 +++++++++++++++++++++++++++++++
>  drivers/cxl/cxl.h      |  1 +
>  drivers/cxl/port.c     | 23 +++++++++++++----------
>  3 files changed, 45 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 865a71bce251..6e04f1f4c166 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -205,6 +205,37 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
>  }
>  EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_hdm, "CXL");
>  
> +int cxl_validate_endpoint_hdm_setup(struct cxl_port *endpoint)
> +{
> +	struct cxl_port *sp = parent_port_of(endpoint);
> +	struct cxl_hdm *cxlhdm;
> +	int rc;
> +
> +	for (; sp && !is_cxl_root(sp); sp = parent_port_of(sp)) {
> +		cxlhdm = dev_get_drvdata(&sp->dev);
> +		if (cxlhdm && cxlhdm->decoder_count > 0)
> +			continue;
> +
> +		if (!sp->reg_map.component_map.hdm_decoder.valid || !cxlhdm) {
> +			dev_err(&sp->dev, "Missing HDM decoder capability\n");
> +			return -ENXIO;
> +		}
> +
> +		if (sp->total_dports == 1) {
> +			dev_dbg(&sp->dev, "Fallback to passthrough decoder\n");
> +			rc = devm_cxl_add_passthrough_decoder(sp);

This doesn't match the function name. We are no longer just validating. Although this whole patch may change if you take a look at my delayed dport series for v9. Just heads up.

DJ
 
> +			if (rc)
> +				return rc;
> +		}
> +	}
> +
> +	if (is_cxl_root(sp))
> +		return 0;
> +
> +	return -ENODEV;
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_validate_endpoint_hdm_setup, "CXL");
> +
>  static void __cxl_dpa_debug(struct seq_file *file, struct resource *r, int depth)
>  {
>  	unsigned long long start = r->start, end = r->end;
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index c857c112772f..0dc4e5c96459 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -932,6 +932,7 @@ struct cxl_endpoint_dvsec_info {
>  struct cxl_hdm;
>  struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
>  				   struct cxl_endpoint_dvsec_info *info);
> +int cxl_validate_endpoint_hdm_setup(struct cxl_port *endpoint);
>  int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
>  				struct cxl_endpoint_dvsec_info *info);
>  int devm_cxl_add_passthrough_decoder(struct cxl_port *port);
> diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> index fbff4900c69d..56030066a652 100644
> --- a/drivers/cxl/port.c
> +++ b/drivers/cxl/port.c
> @@ -75,18 +75,17 @@ static int cxl_switch_port_probe(struct cxl_port *port)
>  	if (!IS_ERR(cxlhdm))
>  		return devm_cxl_enumerate_decoders(cxlhdm, NULL);
>  
> -	if (PTR_ERR(cxlhdm) != -ENODEV) {
> -		dev_err(&port->dev, "Failed to map HDM decoder capability\n");
> -		return PTR_ERR(cxlhdm);
> -	}
> -
> -	if (port->total_dports == 1) {
> -		dev_dbg(&port->dev, "Fallback to passthrough decoder\n");
> -		return devm_cxl_add_passthrough_decoder(port);
> +	/*
> +	 * This isn't an error if only CXL.cache devices are below the port or
> +	 * a passthrough is possible. Finish set up in
> +	 * cxl_validate_endpoint_hdm_setup() during CXL.mem endpoint probe.
> +	 */
> +	if (PTR_ERR(cxlhdm) == -ENODEV) {
> +		dev_dbg(&port->dev, "HDM decoder capability not found\n");
> +		return 0;
>  	}
>  
> -	dev_err(&port->dev, "HDM decoder capability not found\n");
> -	return -ENXIO;
> +	return PTR_ERR(cxlhdm);
>  }
>  
>  static int cxl_cache_endpoint_port_probe(struct cxl_port *port)
> @@ -116,6 +115,10 @@ static int cxl_mem_endpoint_port_probe(struct cxl_port *port)
>  		return PTR_ERR(cxlhdm);
>  	}
>  
> +	rc = cxl_validate_endpoint_hdm_setup(port);
> +	if (rc)
> +		return rc;
> +
>  	/* Cache the data early to ensure is_visible() works */
>  	read_cdat_data(port);
>  	cxl_endpoint_parse_cdat(port);