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From: "Cheatham, Benjamin" <benjamin.cheatham@amd.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: <linux-cxl@vger.kernel.org>
Subject: Re: [RFC PATCH 08/18] cxl/port: Update switch_port_probe() for CXL cache devices
Date: Fri, 22 Aug 2025 13:01:12 -0500	[thread overview]
Message-ID: <7fa7bc20-42ef-4582-a586-4b9fed289671@amd.com> (raw)
In-Reply-To: <20250819130353.0000659e@huawei.com>



On 8/19/2025 7:03 AM, Jonathan Cameron wrote:
> On Tue, 12 Aug 2025 16:29:11 -0500
> Ben Cheatham <Benjamin.Cheatham@amd.com> wrote:
> 
>> CXL switch port probe currently assumes there are only CXL.mem-capable
>> devices below the switch with preconfigured HDM decoders. Now that
>> CXL.cache devices can be added below a switch port, it's possible that
>> they either have no HDM decoders (type 1) or the CXL.mem capabilities of
>> the endpoint haven't been set up yet (type 2).
>>
>> The HDM decoders being disabled (if present) is no longer a gauranteed
>> failure condition when only cache devices are present below the port.
>> Knowing what kind of devices are under the switch port isn't possible
>> until the endpoints are probed, so delay HDM setup and validation until
>> endpoint port probe.
>>
>> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>
>> ---
>>  drivers/cxl/core/hdm.c | 31 +++++++++++++++++++++++++++++++
>>  drivers/cxl/cxl.h      |  1 +
>>  drivers/cxl/port.c     | 23 +++++++++++++----------
>>  3 files changed, 45 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
>> index 865a71bce251..6e04f1f4c166 100644
>> --- a/drivers/cxl/core/hdm.c
>> +++ b/drivers/cxl/core/hdm.c
>> @@ -205,6 +205,37 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
>>  }
>>  EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_hdm, "CXL");
>>  
>> +int cxl_validate_endpoint_hdm_setup(struct cxl_port *endpoint)
>> +{
>> +	struct cxl_port *sp = parent_port_of(endpoint);
>> +	struct cxl_hdm *cxlhdm;
>> +	int rc;
>> +
>> +	for (; sp && !is_cxl_root(sp); sp = parent_port_of(sp)) {
> 
> Might as well set sp as loop init rather than earlier.
> 

Yep, will do.

>> +		cxlhdm = dev_get_drvdata(&sp->dev);
>> +		if (cxlhdm && cxlhdm->decoder_count > 0)
>> +			continue;
>> +
>> +		if (!sp->reg_map.component_map.hdm_decoder.valid || !cxlhdm) {
>> +			dev_err(&sp->dev, "Missing HDM decoder capability\n");
>> +			return -ENXIO;
>> +		}
>> +
>> +		if (sp->total_dports == 1) {
>> +			dev_dbg(&sp->dev, "Fallback to passthrough decoder\n");
>> +			rc = devm_cxl_add_passthrough_decoder(sp);
>> +			if (rc)
>> +				return rc;
>> +		}
>> +	}
>> +
>> +	if (is_cxl_root(sp))
>> +		return 0;
> 
> Could move this test into the loop, alowing the loop condition to be simplified
> to just sp;
> 

Sure!

>> +
>> +	return -ENODEV;
>> +}
>> +EXPORT_SYMBOL_NS_GPL(cxl_validate_endpoint_hdm_setup, "CXL");
>> +
> 


  reply	other threads:[~2025-08-22 18:01 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-12 21:29 [RFC PATCH 00/18] Initial CXL.cache device support Ben Cheatham
2025-08-12 21:29 ` [RFC PATCH 01/18] cxl/mem: Change cxl_memdev_ops to cxl_dev_ops Ben Cheatham
2025-08-12 21:29 ` [RFC PATCH 02/18] cxl: Move struct cxl_dev_state definition Ben Cheatham
2025-08-19 11:33   ` Jonathan Cameron
2025-08-22 18:00     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 03/18] cxl/core: Add CXL.cache device struct Ben Cheatham
2025-08-19 11:48   ` Jonathan Cameron
2025-08-22 18:00     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 04/18] cxl: Replace cxl_mem_find_port() with cxl_dev_find_port() Ben Cheatham
2025-08-12 21:29 ` [RFC PATCH 05/18] cxl: Change cxl_ep_load() to use struct device * parameter Ben Cheatham
2025-08-12 21:29 ` [RFC PATCH 06/18] cxl/port, mem: Make adding an endpoint device type agnostic Ben Cheatham
2025-08-19 11:53   ` Jonathan Cameron
2025-08-22 18:00     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 07/18] cxl/port: Split endpoint port probe on device type Ben Cheatham
2025-08-19 11:57   ` Jonathan Cameron
2025-08-22 18:01     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 08/18] cxl/port: Update switch_port_probe() for CXL cache devices Ben Cheatham
2025-08-19 12:03   ` Jonathan Cameron
2025-08-22 18:01     ` Cheatham, Benjamin [this message]
2025-09-09 16:20   ` Dave Jiang
2025-09-09 16:33     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 09/18] cxl/core: Add function for getting CXL cache info Ben Cheatham
2025-09-09 20:58   ` Dave Jiang
2025-09-10 15:55     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 10/18] cxl/cache: Add cxl_cache driver Ben Cheatham
2025-08-19 12:11   ` Jonathan Cameron
2025-08-22 18:01     ` Cheatham, Benjamin
2025-09-09 21:29   ` Dave Jiang
2025-09-10 15:52     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 11/18] cxl/core: Add CXL snoop filter setup and checking Ben Cheatham
2025-08-19 14:18   ` Jonathan Cameron
2025-08-22 18:01     ` Cheatham, Benjamin
2025-09-10 20:36   ` Dave Jiang
2025-09-18 20:15     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 12/18] cxl/cache: Add CXL Cache ID Route Table mapping Ben Cheatham
2025-08-19 15:09   ` Jonathan Cameron
2025-08-22 18:01     ` Cheatham, Benjamin
2025-09-10 21:22   ` Dave Jiang
2025-09-18 20:15     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 13/18] cxl/cache: Implement Cache ID Route Table programming Ben Cheatham
2025-08-19 15:07   ` Jonathan Cameron
2025-08-22 18:01     ` Cheatham, Benjamin
2025-09-10 21:37   ` Dave Jiang
2025-09-18 20:15     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 14/18] cxl/cache: Add Cache ID Decoder capability mapping Ben Cheatham
2025-08-19 14:12   ` Alireza Sanaee
2025-08-22 18:01     ` Cheatham, Benjamin
2025-09-10 21:56       ` Dave Jiang
2025-08-12 21:29 ` [RFC PATCH 15/18] cxl/cache: Implement Cache ID Decoder programming Ben Cheatham
2025-08-19 13:44   ` Alireza Sanaee
2025-08-20  8:55     ` Alireza Sanaee
2025-08-19 15:26   ` Jonathan Cameron
2025-08-22 18:01     ` Cheatham, Benjamin
2025-09-10 22:29   ` Dave Jiang
2025-09-18 20:16     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 16/18] cxl/cache: Add cache device counting for CXL ports Ben Cheatham
2025-08-19 15:30   ` Jonathan Cameron
2025-08-22 18:02     ` Cheatham, Benjamin
2025-09-10 22:51   ` Dave Jiang
2025-09-18 20:16     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 17/18] cxl/core: Add cache device attributes Ben Cheatham
2025-08-19 15:38   ` Jonathan Cameron
2025-08-22 18:02     ` Cheatham, Benjamin
2025-08-12 21:29 ` [RFC PATCH 18/18] cxl/core: Add cache device cache management attributes Ben Cheatham
2025-08-19 15:53   ` Jonathan Cameron
2025-08-22 18:02     ` Cheatham, Benjamin
2025-09-10 23:02   ` Dave Jiang
2025-09-18 20:16     ` Cheatham, Benjamin
2025-09-18 21:45       ` Dave Jiang
2025-09-19 13:42         ` Cheatham, Benjamin
2025-08-13 11:25 ` [RFC PATCH 00/18] Initial CXL.cache device support Alejandro Lucero Palau
2025-08-19 15:57   ` Jonathan Cameron
2025-08-19 16:05     ` Jonathan Cameron
2025-08-26 10:42       ` Alejandro Lucero Palau
2025-08-22 18:02   ` Cheatham, Benjamin
2025-08-26 10:44     ` Alejandro Lucero Palau
2025-09-10 23:12 ` Dave Jiang
2025-09-18 20:16   ` Cheatham, Benjamin

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