* unclear code in vega10 pp
@ 2017-09-05 16:18 Tom St Denis
[not found] ` <04aae9c8-9d67-e3d7-e2b4-a6d14b58b3ed-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Tom St Denis @ 2017-09-05 16:18 UTC (permalink / raw)
To: amd-gfx mailing list
In vega10_populate_smc_link_levels(): there's this bit
j = i - 1;
while (i < NUM_LINK_LEVELS) {
pp_table->PcieGenSpeed[i] = pcie_table->pcie_gen[j];
pp_table->PcieLaneCount[i] = pcie_table->pcie_lane[j];
result = vega10_populate_single_lclk_level(hwmgr,
pcie_table->lclk[j], &(pp_table->LclkDid[i]));
if (result) {
pr_info("Populate LClock Level %d Failed!\n", i);
return result;
}
i++;
}
It seems 'j' isn't changing so it's spamming multiple entries in the
lclkdid[] array based on the same entries from the pcie_table->pcie*[j].
Is that intentional or is a ++ or -- to j missing?
Cheers,
Tom
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^ permalink raw reply [flat|nested] 3+ messages in thread[parent not found: <04aae9c8-9d67-e3d7-e2b4-a6d14b58b3ed-5C7GfCeVMHo@public.gmane.org>]
* Re: unclear code in vega10 pp [not found] ` <04aae9c8-9d67-e3d7-e2b4-a6d14b58b3ed-5C7GfCeVMHo@public.gmane.org> @ 2017-09-05 16:22 ` Tom St Denis [not found] ` <1bd6c44f-87cc-4dbc-50f6-b2dbd822e0c8-5C7GfCeVMHo@public.gmane.org> 0 siblings, 1 reply; 3+ messages in thread From: Tom St Denis @ 2017-09-05 16:22 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW After seeing this style a few other places in the same file are they just padding out the rest of the array with the highest setting? Tom On 05/09/17 12:18 PM, Tom St Denis wrote: > In vega10_populate_smc_link_levels(): there's this bit > > j = i - 1; > while (i < NUM_LINK_LEVELS) { > pp_table->PcieGenSpeed[i] = pcie_table->pcie_gen[j]; > pp_table->PcieLaneCount[i] = pcie_table->pcie_lane[j]; > > result = vega10_populate_single_lclk_level(hwmgr, > pcie_table->lclk[j], &(pp_table->LclkDid[i])); > if (result) { > pr_info("Populate LClock Level %d Failed!\n", i); > return result; > } > i++; > } > > It seems 'j' isn't changing so it's spamming multiple entries in the > lclkdid[] array based on the same entries from the pcie_table->pcie*[j]. > > Is that intentional or is a ++ or -- to j missing? > > Cheers, > Tom > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 3+ messages in thread
[parent not found: <1bd6c44f-87cc-4dbc-50f6-b2dbd822e0c8-5C7GfCeVMHo@public.gmane.org>]
* RE: unclear code in vega10 pp [not found] ` <1bd6c44f-87cc-4dbc-50f6-b2dbd822e0c8-5C7GfCeVMHo@public.gmane.org> @ 2017-09-06 1:12 ` Zhu, Rex 0 siblings, 0 replies; 3+ messages in thread From: Zhu, Rex @ 2017-09-06 1:12 UTC (permalink / raw) To: StDenis, Tom, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Yes. Best Regards Rex -----Original Message----- From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of Tom St Denis Sent: Wednesday, September 06, 2017 12:23 AM To: amd-gfx@lists.freedesktop.org Subject: Re: unclear code in vega10 pp After seeing this style a few other places in the same file are they just padding out the rest of the array with the highest setting? Tom On 05/09/17 12:18 PM, Tom St Denis wrote: > In vega10_populate_smc_link_levels(): there's this bit > > j = i - 1; > while (i < NUM_LINK_LEVELS) { > pp_table->PcieGenSpeed[i] = pcie_table->pcie_gen[j]; > pp_table->PcieLaneCount[i] = pcie_table->pcie_lane[j]; > > result = vega10_populate_single_lclk_level(hwmgr, > pcie_table->lclk[j], &(pp_table->LclkDid[i])); > if (result) { > pr_info("Populate LClock Level %d Failed!\n", i); > return result; > } > i++; > } > > It seems 'j' isn't changing so it's spamming multiple entries in the > lclkdid[] array based on the same entries from the pcie_table->pcie*[j]. > > Is that intentional or is a ++ or -- to j missing? > > Cheers, > Tom > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-09-05 16:18 unclear code in vega10 pp Tom St Denis
[not found] ` <04aae9c8-9d67-e3d7-e2b4-a6d14b58b3ed-5C7GfCeVMHo@public.gmane.org>
2017-09-05 16:22 ` Tom St Denis
[not found] ` <1bd6c44f-87cc-4dbc-50f6-b2dbd822e0c8-5C7GfCeVMHo@public.gmane.org>
2017-09-06 1:12 ` Zhu, Rex
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