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From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-arm-msm@vger.kernel.org,
	Coresight ML <coresight@lists.linaro.org>,
	Stephen Boyd <swboyd@chromium.org>
Subject: Re: [PATCH 1/2] coresight: tmc: Add enable flag to indicate the status of ETR/ETF
Date: Mon, 01 Jun 2020 22:43:00 +0530	[thread overview]
Message-ID: <0b1ce383d9df84af3c23efad7eae21ae@codeaurora.org> (raw)
In-Reply-To: <CAJ9a7Vh=GPKdYcX3aiJfaAVQ3j8rEmoSvP0CDeF-mfPpV4DMaw@mail.gmail.com>

Hi Mike,

Thanks for the review.

On 2020-06-01 18:57, Mike Leach wrote:
> Hi,
> 
> On Mon, 1 Jun 2020 at 09:02, Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>> 
>> Add a flag to check whether TMC ETR/ETF is enabled or not.
>> This is later used in shutdown callback to determine if
>> we require to disable ETR/ETF.
>> 
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>>  drivers/hwtracing/coresight/coresight-tmc.c | 2 ++
>>  drivers/hwtracing/coresight/coresight-tmc.h | 2 ++
>>  2 files changed, 4 insertions(+)
>> 
>> diff --git a/drivers/hwtracing/coresight/coresight-tmc.c 
>> b/drivers/hwtracing/coresight/coresight-tmc.c
>> index 39fba1d16e6e..5a271ebc4585 100644
>> --- a/drivers/hwtracing/coresight/coresight-tmc.c
>> +++ b/drivers/hwtracing/coresight/coresight-tmc.c
>> @@ -62,11 +62,13 @@ void tmc_flush_and_stop(struct tmc_drvdata 
>> *drvdata)
>> 
>>  void tmc_enable_hw(struct tmc_drvdata *drvdata)
>>  {
>> +       drvdata->enable = true;
>>         writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL);
>>  }
>> 
>>  void tmc_disable_hw(struct tmc_drvdata *drvdata)
>>  {
>> +       drvdata->enable = false;
>>         writel_relaxed(0x0, drvdata->base + TMC_CTL);
>>  }
>> 
>> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h 
>> b/drivers/hwtracing/coresight/coresight-tmc.h
>> index 71de978575f3..d156860495c7 100644
>> --- a/drivers/hwtracing/coresight/coresight-tmc.h
>> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
>> @@ -184,6 +184,7 @@ struct etr_buf {
>>   * @idr_mutex: Access serialisation for idr.
>>   * @sysfs_buf: SYSFS buffer for ETR.
>>   * @perf_buf:  PERF buffer for ETR.
>> + * @enable:    Indicates whether ETR/ETF is enabled.
>>   */
>>  struct tmc_drvdata {
>>         void __iomem            *base;
>> @@ -207,6 +208,7 @@ struct tmc_drvdata {
>>         struct mutex            idr_mutex;
>>         struct etr_buf          *sysfs_buf;
>>         struct etr_buf          *perf_buf;
>> +       bool                    enable;
> 
> Is this flag needed?
> For TMC, drvdata->mode indicates if the device is in use.
> 

Yes we can use mode flag, will make this change in the next version.

Thanks,
Sai
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-arm-msm@vger.kernel.org,
	Coresight ML <coresight@lists.linaro.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Stephen Boyd <swboyd@chromium.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] coresight: tmc: Add enable flag to indicate the status of ETR/ETF
Date: Mon, 01 Jun 2020 22:43:00 +0530	[thread overview]
Message-ID: <0b1ce383d9df84af3c23efad7eae21ae@codeaurora.org> (raw)
In-Reply-To: <CAJ9a7Vh=GPKdYcX3aiJfaAVQ3j8rEmoSvP0CDeF-mfPpV4DMaw@mail.gmail.com>

Hi Mike,

Thanks for the review.

On 2020-06-01 18:57, Mike Leach wrote:
> Hi,
> 
> On Mon, 1 Jun 2020 at 09:02, Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>> 
>> Add a flag to check whether TMC ETR/ETF is enabled or not.
>> This is later used in shutdown callback to determine if
>> we require to disable ETR/ETF.
>> 
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>>  drivers/hwtracing/coresight/coresight-tmc.c | 2 ++
>>  drivers/hwtracing/coresight/coresight-tmc.h | 2 ++
>>  2 files changed, 4 insertions(+)
>> 
>> diff --git a/drivers/hwtracing/coresight/coresight-tmc.c 
>> b/drivers/hwtracing/coresight/coresight-tmc.c
>> index 39fba1d16e6e..5a271ebc4585 100644
>> --- a/drivers/hwtracing/coresight/coresight-tmc.c
>> +++ b/drivers/hwtracing/coresight/coresight-tmc.c
>> @@ -62,11 +62,13 @@ void tmc_flush_and_stop(struct tmc_drvdata 
>> *drvdata)
>> 
>>  void tmc_enable_hw(struct tmc_drvdata *drvdata)
>>  {
>> +       drvdata->enable = true;
>>         writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL);
>>  }
>> 
>>  void tmc_disable_hw(struct tmc_drvdata *drvdata)
>>  {
>> +       drvdata->enable = false;
>>         writel_relaxed(0x0, drvdata->base + TMC_CTL);
>>  }
>> 
>> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h 
>> b/drivers/hwtracing/coresight/coresight-tmc.h
>> index 71de978575f3..d156860495c7 100644
>> --- a/drivers/hwtracing/coresight/coresight-tmc.h
>> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
>> @@ -184,6 +184,7 @@ struct etr_buf {
>>   * @idr_mutex: Access serialisation for idr.
>>   * @sysfs_buf: SYSFS buffer for ETR.
>>   * @perf_buf:  PERF buffer for ETR.
>> + * @enable:    Indicates whether ETR/ETF is enabled.
>>   */
>>  struct tmc_drvdata {
>>         void __iomem            *base;
>> @@ -207,6 +208,7 @@ struct tmc_drvdata {
>>         struct mutex            idr_mutex;
>>         struct etr_buf          *sysfs_buf;
>>         struct etr_buf          *perf_buf;
>> +       bool                    enable;
> 
> Is this flag needed?
> For TMC, drvdata->mode indicates if the device is in use.
> 

Yes we can use mode flag, will make this change in the next version.

Thanks,
Sai
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-06-01 17:13 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-01  8:02 [PATCH 0/2] coresight: tmc: Add shutdown callback for TMC ETR/ETF Sai Prakash Ranjan
2020-06-01  8:02 ` Sai Prakash Ranjan
2020-06-01  8:02 ` [PATCH 1/2] coresight: tmc: Add enable flag to indicate the status of ETR/ETF Sai Prakash Ranjan
2020-06-01  8:02   ` Sai Prakash Ranjan
2020-06-01 13:27   ` Mike Leach
2020-06-01 13:27     ` Mike Leach
2020-06-01 17:13     ` Sai Prakash Ranjan [this message]
2020-06-01 17:13       ` Sai Prakash Ranjan
2020-06-01  8:02 ` [PATCH 2/2] coresight: tmc: Add shutdown callback for TMC ETR/ETF Sai Prakash Ranjan
2020-06-01  8:02   ` Sai Prakash Ranjan
2020-06-01 13:35   ` Mike Leach
2020-06-01 13:35     ` Mike Leach
2020-06-01 17:15     ` Sai Prakash Ranjan
2020-06-01 17:15       ` Sai Prakash Ranjan
2020-06-01 21:28   ` Mathieu Poirier
2020-06-01 21:28     ` Mathieu Poirier
2020-06-02  7:30     ` Sai Prakash Ranjan
2020-06-02  7:30       ` Sai Prakash Ranjan
2020-06-02 22:12       ` Mike Leach
2020-06-02 22:12         ` Mike Leach
2020-06-03 10:24         ` Sai Prakash Ranjan
2020-06-03 10:24           ` Sai Prakash Ranjan
2020-06-03 11:27           ` Mike Leach
2020-06-03 11:27             ` Mike Leach
2020-06-03 12:14             ` Sai Prakash Ranjan
2020-06-03 12:14               ` Sai Prakash Ranjan
2020-06-03 13:22               ` Mike Leach
2020-06-03 13:22                 ` Mike Leach
2020-06-03 13:34                 ` Robin Murphy
2020-06-03 13:34                   ` Robin Murphy
2020-06-03 13:43                   ` Sai Prakash Ranjan
2020-06-03 13:43                     ` Sai Prakash Ranjan
2020-06-03 13:51                   ` Mike Leach
2020-06-03 13:51                     ` Mike Leach
2020-06-03 14:02                     ` Sai Prakash Ranjan
2020-06-03 14:02                       ` Sai Prakash Ranjan
2020-06-03 17:44                   ` Mathieu Poirier
2020-06-03 17:44                     ` Mathieu Poirier
2020-06-04  7:27                     ` Sai Prakash Ranjan
2020-06-04  7:27                       ` Sai Prakash Ranjan
2020-06-08 14:07                       ` Sai Prakash Ranjan
2020-06-08 14:07                         ` Sai Prakash Ranjan
2020-06-09 15:27                         ` Mathieu Poirier
2020-06-09 15:27                           ` Mathieu Poirier
2020-06-09 15:37                           ` Sai Prakash Ranjan
2020-06-09 15:37                             ` Sai Prakash Ranjan
2020-06-03 11:37     ` Robin Murphy
2020-06-03 11:37       ` Robin Murphy
2020-06-03 12:00       ` Sai Prakash Ranjan
2020-06-03 12:00         ` Sai Prakash Ranjan
2020-06-03 12:21         ` Robin Murphy
2020-06-03 12:21           ` Robin Murphy
2020-06-03 12:26           ` Sai Prakash Ranjan
2020-06-03 12:26             ` Sai Prakash Ranjan
2020-06-03 13:40             ` Robin Murphy
2020-06-03 13:40               ` Robin Murphy
2020-06-03 13:51               ` Sai Prakash Ranjan
2020-06-03 13:51                 ` Sai Prakash Ranjan

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