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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Teddy Astie" <teddy.astie@vates.tech>,
	"Roger Pau Monné" <roger@xenproject.org>
Subject: [PATCH v5 06/19] x86emul/test: drop cpu_has_avx512vl
Date: Wed, 11 Nov 2026 14:44:03 +0100	[thread overview]
Message-ID: <0c0d9f0c-ec78-47cb-97f0-e060cefc23b7@suse.com> (raw)
In-Reply-To: <1be43887-4494-4ff5-a801-0c6bab90c80d@suse.com>

AVX512VL not being a standalone feature anyway, but always needing
to be combined with some other AVX512*, replace uses of
cpu_has_avx512vl by just the feature bit check.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Re-base over dropping of Xeon Phi support.

--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -1025,7 +1025,8 @@ static void test_group(const struct test
     {
         for ( j = 0; j < nr_vl; ++j )
         {
-            if ( vl[0] == VL_512 && vl[j] != VL_512 && !cpu_has_avx512vl )
+            if ( vl[0] == VL_512 && vl[j] != VL_512 &&
+                 !cpu_policy.feat.avx512vl )
                 continue;
 
             switch ( tests[i].esz )
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -131,7 +131,7 @@ static bool simd_check_avx512f(void)
 
 static bool simd_check_avx512f_vl(void)
 {
-    return cpu_has_avx512f && cpu_has_avx512vl;
+    return cpu_has_avx512f && cpu_policy.feat.avx512vl;
 }
 #define simd_check_avx512vl_sg simd_check_avx512f_vl
 
@@ -143,7 +143,7 @@ static bool simd_check_avx512dq(void)
 
 static bool simd_check_avx512dq_vl(void)
 {
-    return cpu_has_avx512dq && cpu_has_avx512vl;
+    return cpu_has_avx512dq && cpu_policy.feat.avx512vl;
 }
 
 static bool simd_check_avx512bw(void)
@@ -154,7 +154,7 @@ static bool simd_check_avx512bw(void)
 
 static bool simd_check_avx512bw_vl(void)
 {
-    return cpu_has_avx512bw && cpu_has_avx512vl;
+    return cpu_has_avx512bw && cpu_policy.feat.avx512vl;
 }
 
 static bool simd_check_avx512vbmi(void)
@@ -164,7 +164,7 @@ static bool simd_check_avx512vbmi(void)
 
 static bool simd_check_avx512vbmi_vl(void)
 {
-    return cpu_has_avx512_vbmi && cpu_has_avx512vl;
+    return cpu_has_avx512_vbmi && cpu_policy.feat.avx512vl;
 }
 
 static bool simd_check_avx512vbmi2(void)
@@ -260,7 +260,7 @@ static bool simd_check_avx512fp16(void)
 
 static bool simd_check_avx512fp16_vl(void)
 {
-    return cpu_has_avx512_fp16 && cpu_has_avx512vl;
+    return cpu_has_avx512_fp16 && cpu_policy.feat.avx512vl;
 }
 
 static void simd_set_regs(struct cpu_user_regs *regs)
--- a/tools/tests/x86_emulator/x86-emulate.h
+++ b/tools/tests/x86_emulator/x86-emulate.h
@@ -181,8 +181,6 @@ void wrpkru(unsigned int val);
 #define cpu_has_sha                  cpu_policy.feat.sha
 #define cpu_has_avx512bw            (cpu_policy.feat.avx512bw && \
                                      xcr0_mask(0xe6))
-#define cpu_has_avx512vl            (cpu_policy.feat.avx512vl && \
-                                     xcr0_mask(0xe6))
 #define cpu_has_avx512_vbmi         (cpu_policy.feat.avx512_vbmi && \
                                      xcr0_mask(0xe6))
 #define cpu_has_avx512_vbmi2        (cpu_policy.feat.avx512_vbmi2 && \



  parent reply	other threads:[~2026-11-11 13:44 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-11 13:40 [PATCH v5 00/19] x86: support AVX10 Jan Beulich
2026-11-11 13:41 ` [PATCH v5 01/19] x86/CPUID: enable AVX10 leaf Jan Beulich
2026-11-11 13:42 ` [PATCH v5 02/19] x86emul: support SIMD MOVRS Jan Beulich
2026-11-11 13:42 ` [PATCH v5 03/19] x86emul: support AVX10 forms of SM4 insns Jan Beulich
2026-11-11 13:42 ` [PATCH v5 04/19] x86emul: support AVX10.1 Jan Beulich
2026-11-11 13:43 ` [PATCH v5 05/19] x86emul/test: use simd_check_avx512*() in main() Jan Beulich
2026-11-11 13:44 ` Jan Beulich [this message]
2026-11-11 13:44 ` [PATCH v5 07/19] x86emul: AVX10.1 testing Jan Beulich
2026-11-11 13:45 ` [PATCH v5 08/19] x86emul/test: engage AVX512VL via command line option Jan Beulich
2026-11-11 13:45 ` [PATCH v5 09/19] x86/CPUID: enable AVX10.2 sub-leaf Jan Beulich
2026-11-11 13:46 ` [PATCH v5 10/19] x86emul: support AVX10.2 scalar compare insns Jan Beulich
2026-11-11 13:46 ` [PATCH v5 11/19] x86emul: support AVX10.2 partial copy insns Jan Beulich
2026-11-11 13:47 ` [PATCH v5 12/19] x86emul: support AVX10.2 media insns Jan Beulich
2026-11-11 13:47 ` [PATCH v5 13/19] x86emul: support AVX10.2 minmax insns Jan Beulich
2026-11-11 13:47 ` [PATCH v5 14/19] x86emul: support AVX10.2 BFloat16 insns Jan Beulich
2026-11-11 13:48 ` [PATCH v5 15/19] x86emul: support AVX10.2 saturating convert insns Jan Beulich
2026-11-11 13:48 ` [PATCH v5 16/19] x86emul: support other AVX10.2 " Jan Beulich
2026-11-11 13:48 ` [PATCH v5 17/19] x86emul: support AVX10.2-aux misc insns Jan Beulich
2026-11-11 13:49 ` [PATCH v5 18/19] x86emul: support AVX10.2-aux {B,H}F{4,6} <-> {B,H}F8 converts Jan Beulich
2026-11-11 13:49 ` [PATCH v5 19/19] x86emul: support AVX10.2-aux PS <-> {B,H}F8{,S} converts Jan Beulich

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