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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Teddy Astie" <teddy.astie@vates.tech>,
	"Roger Pau Monné" <roger@xenproject.org>
Subject: [PATCH v5 08/19] x86emul/test: engage AVX512VL via command line option
Date: Wed, 11 Nov 2026 14:45:31 +0100	[thread overview]
Message-ID: <48f08f75-e2ea-4122-abef-7971c3e23e36@suse.com> (raw)
In-Reply-To: <1be43887-4494-4ff5-a801-0c6bab90c80d@suse.com>

Now that we have machinery in testcase.mk to set vector length dependent
flags for AVX512 tests, let's avoid using a pragma to enable AVX512VL
insns for the compiler. This way, correct settings are in place from the
very beginning of compilation.

No change to the generated test blobs, and hence no functional change.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/tools/tests/x86_emulator/simd.h
+++ b/tools/tests/x86_emulator/simd.h
@@ -215,10 +215,6 @@ DECL_OCTET(half);
 # define __builtin_ia32_shuf_i32x4_512_mask __builtin_ia32_shuf_i32x4_mask
 # define __builtin_ia32_shuf_i64x2_512_mask __builtin_ia32_shuf_i64x2_mask
 
-# if VEC_SIZE > ELEM_SIZE && (defined(VEC_MAX) ? VEC_MAX : VEC_SIZE) < 64
-#  pragma GCC target ( "avx512vl" )
-# endif
-
 # define REN(insn, old, new)                     \
     asm ( ".macro v" #insn #old " o:vararg \n\t" \
           "v" #insn #new " \\o             \n\t" \
--- a/tools/tests/x86_emulator/testcase.mk
+++ b/tools/tests/x86_emulator/testcase.mk
@@ -10,8 +10,8 @@ CFLAGS += -fno-stack-protector -g0 $($(T
 ifneq ($(filter -mavx512%,$($(TESTCASE)-cflags)),)
 
 cflags-vsz64 :=
-cflags-vsz32 := -mprefer-vector-width=256
-cflags-vsz16 := -mprefer-vector-width=128
+cflags-vsz32 := -mavx512vl -mprefer-vector-width=256
+cflags-vsz16 := -mavx512vl -mprefer-vector-width=128
 # Scalar tests don't set VEC_SIZE (and VEC_MAX is used by S/G ones only)
 cflags-vsz   := -mprefer-vector-width=128
 



  parent reply	other threads:[~2026-11-11 13:45 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-11 13:40 [PATCH v5 00/19] x86: support AVX10 Jan Beulich
2026-11-11 13:41 ` [PATCH v5 01/19] x86/CPUID: enable AVX10 leaf Jan Beulich
2026-11-11 13:42 ` [PATCH v5 02/19] x86emul: support SIMD MOVRS Jan Beulich
2026-11-11 13:42 ` [PATCH v5 03/19] x86emul: support AVX10 forms of SM4 insns Jan Beulich
2026-11-11 13:42 ` [PATCH v5 04/19] x86emul: support AVX10.1 Jan Beulich
2026-11-11 13:43 ` [PATCH v5 05/19] x86emul/test: use simd_check_avx512*() in main() Jan Beulich
2026-11-11 13:44 ` [PATCH v5 06/19] x86emul/test: drop cpu_has_avx512vl Jan Beulich
2026-11-11 13:44 ` [PATCH v5 07/19] x86emul: AVX10.1 testing Jan Beulich
2026-11-11 13:45 ` Jan Beulich [this message]
2026-11-11 13:45 ` [PATCH v5 09/19] x86/CPUID: enable AVX10.2 sub-leaf Jan Beulich
2026-11-11 13:46 ` [PATCH v5 10/19] x86emul: support AVX10.2 scalar compare insns Jan Beulich
2026-11-11 13:46 ` [PATCH v5 11/19] x86emul: support AVX10.2 partial copy insns Jan Beulich
2026-11-11 13:47 ` [PATCH v5 12/19] x86emul: support AVX10.2 media insns Jan Beulich
2026-11-11 13:47 ` [PATCH v5 13/19] x86emul: support AVX10.2 minmax insns Jan Beulich
2026-11-11 13:47 ` [PATCH v5 14/19] x86emul: support AVX10.2 BFloat16 insns Jan Beulich
2026-11-11 13:48 ` [PATCH v5 15/19] x86emul: support AVX10.2 saturating convert insns Jan Beulich
2026-11-11 13:48 ` [PATCH v5 16/19] x86emul: support other AVX10.2 " Jan Beulich
2026-11-11 13:48 ` [PATCH v5 17/19] x86emul: support AVX10.2-aux misc insns Jan Beulich
2026-11-11 13:49 ` [PATCH v5 18/19] x86emul: support AVX10.2-aux {B,H}F{4,6} <-> {B,H}F8 converts Jan Beulich
2026-11-11 13:49 ` [PATCH v5 19/19] x86emul: support AVX10.2-aux PS <-> {B,H}F8{,S} converts Jan Beulich

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