[PATCH v5 17/19] x86emul: support AVX10.2-aux misc insns

[Jan Beulich <jbeulich@suse.com>]

VPMOVSSDB is a counterpart to VPMOVSDB, so handle it the same.

VUNPACKB otoh is regular (without fault suppression or broadcast) as to
its memory operand, and hence straightforward to handle.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
SDE: ???
---
v5: New.

--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -821,6 +821,11 @@ static const struct test avx10_2_128[] =
     INSN(movw, f3, map5, 7e, el, fp16, el),
 };
 
+static const struct test avx10_2_aux_all[] = {
+    INSN(pmovssdb,       f3, 0f38, 41, vl_4,    b, vl),
+    INSN(unpackb,          , 0f3a, 3d,   vl,    b, vl),
+};
+
 static const struct test movrs_all[] = {
     INSN(movrsb, f2, map5, 6f, vl,    b, vl),
     INSN(movrsd, f3, map5, 6f, vl, d_nb, vl),
@@ -1258,4 +1263,6 @@ void evex_disp8_test(void *instr, struct
 
     run(cpu_has_avx10_2, avx10_2, all);
     run(cpu_has_avx10_2, avx10_2, 128);
+
+    run(cpu_has_avx10_2_aux, avx10_2_aux, all);
 }
--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -1917,6 +1917,7 @@ static const struct evex {
     { { 0x3e }, 2, T, R, pfx_66, WIG, Ln }, /* vpmaxuw */
     { { 0x3f }, 2, T, R, pfx_66, Wn, Ln }, /* vpmaxu{d,q} */
     { { 0x40 }, 2, T, R, pfx_66, Wn, Ln }, /* vpmull{d,q} */
+    { { 0x41 }, 2, T, W, pfx_f3, W0, Ln }, /* vpmovssdb */
     { { 0x42 }, 2, T, R, pfx_66, Wn, Ln }, /* vgetexpp{s,d} */
     { { 0x43 }, 2, T, R, pfx_66, Wn, LIG }, /* vgetexps{s,d} */
     { { 0x44 }, 2, T, R, pfx_66, Wn, Ln }, /* vlzcnt{d,q} */
@@ -2091,6 +2092,7 @@ static const struct evex {
     { { 0x39 }, 3, T, W, pfx_66, Wn, L1|L2 }, /* vextracti{32x4,64x2} */
     { { 0x3a }, 3, T, R, pfx_66, Wn, L2 }, /* vinserti{32x8,64x4} */
     { { 0x3b }, 3, T, W, pfx_66, Wn, L2 }, /* vextracti{32x8,64x4} */
+    { { 0x3d }, 3, T, R, pfx_no, W0, Ln }, /* vunpackb */
     { { 0x3e }, 3, T, R, pfx_66, Wn, Ln }, /* vpcmpu{b,w} */
     { { 0x3f }, 3, T, R, pfx_66, Wn, Ln }, /* vpcmp{b,w} */
     { { 0x42 }, 3, T, R, pfx_66, W0, Ln }, /* vdbpsadbw */
--- a/tools/tests/x86_emulator/x86-emulate.h
+++ b/tools/tests/x86_emulator/x86-emulate.h
@@ -219,6 +219,8 @@ void wrpkru(unsigned int val);
 #define cpu_has_avx10               (cpu_policy.feat.avx10 && xcr0_mask(0xe6))
 #define cpu_has_avx10_2             (cpu_policy.avx10.version >= 2 && \
                                      xcr0_mask(0xe6))
+#define cpu_has_avx10_2_aux         (cpu_policy.avx10.avx10_v2_aux && \
+                                     xcr0_mask(0xe6))
 
 #define cpu_has_xgetbv1             (cpu_has_xsave && cpu_policy.xstate.xgetbv1)
 
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -492,6 +492,7 @@ static const struct ext0f3a_table {
     [0x3a] = { .simd_size = simd_256, .d8s = d8s_vl_by_2 },
     [0x39] = { .simd_size = simd_128, .to_mem = 1, .two_op = 1, .d8s = 4 },
     [0x3b] = { .simd_size = simd_256, .to_mem = 1, .two_op = 1, .d8s = d8s_vl_by_2 },
+    [0x3d] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl },
     [0x3e ... 0x3f] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
     [0x40 ... 0x41] = { .simd_size = simd_packed_fp },
     [0x42 ... 0x43] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
@@ -1456,14 +1457,20 @@ int x86emul_decode(struct x86_emulate_st
                  * insns with the same base opcodes. Rather than adding new
                  * columns to the table, handle this here for now.
                  */
-                if ( s->evex.pfx != vex_f3 || (b & 0xf8) != 0x10 )
-                    disp8scale = decode_disp8scale(ext0f38_table[b].d8s, s);
-                else
+                if ( s->evex.pfx == vex_f3 && (b & 0xf8) == 0x10 )
                 {
                     disp8scale = decode_disp8scale(ext0f38_table[b ^ 0x30].d8s,
                                                    s);
                     s->simd_size = simd_other;
                 }
+                /* Same for VPMOVSSDB vs VPMOVSDB. */
+                else if ( s->evex.pfx == vex_f3 && b == 0x41 )
+                {
+                    disp8scale = decode_disp8scale(ext0f38_table[0x21].d8s, s);
+                    s->simd_size = simd_other;
+                }
+                else
+                    disp8scale = decode_disp8scale(ext0f38_table[b].d8s, s);
             }
             break;
 
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -610,6 +610,7 @@ amd_like(const struct x86_emulate_ctxt *
 #define vcpu_has_user_msr()    (ctxt->cpuid->feat.user_msr)
 
 #define vcpu_has_avx10(minor)  (ctxt->cpuid->avx10.version >= (minor))
+#define vcpu_has_avx10_2_aux() (ctxt->cpuid->avx10.avx10_v2_aux)
 
 #define vcpu_must_have(feat, ...) \
     generate_exception_if(!vcpu_has_##feat(__VA_ARGS__), X86_EXC_UD)
--- a/xen/arch/x86/x86_emulate/util.c
+++ b/xen/arch/x86/x86_emulate/util.c
@@ -150,6 +150,7 @@ bool cf_check x86_insn_is_mem_write(cons
              X86EMUL_OPC_EVEX_F3(0x0f38, 0x25): /* VPMOVS* */
         case X86EMUL_OPC_EVEX_F3(0x0f38, 0x30) ...
              X86EMUL_OPC_EVEX_F3(0x0f38, 0x35): /* VPMOV{D,Q,W}* */
+        case X86EMUL_OPC_EVEX_F3(0x0f38, 0x41): /* VPMOVSSDB */
             return s->modrm_mod != 3;
         }
 
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5840,6 +5840,9 @@ x86_emulate(
         elem_bytes = 2;
         goto avx512f_no_sae;
 
+    case X86EMUL_OPC_EVEX_F3(0x0f38, 0x41): /* vpmovssdb [xyz]mm,xmm/mem{k} */
+        vcpu_must_have(avx10_2_aux);
+        fallthrough;
     case X86EMUL_OPC_EVEX_F3(0x0f38, 0x10): /* vpmovuswb [xyz]mm,{x,y}mm/mem{k} */
     case X86EMUL_OPC_EVEX_66(0x0f38, 0x20): /* vpmovsxbw {x,y}mm/mem,[xyz]mm{k} */
     case X86EMUL_OPC_EVEX_F3(0x0f38, 0x20): /* vpmovswb [xyz]mm,{x,y}mm/mem{k} */
@@ -7747,6 +7750,13 @@ x86_emulate(
         visa_check(bw);
         goto opmask_shift_imm;
 
+    case X86EMUL_OPC_EVEX(0x0f3a, 0x3d): /* vunpackb $imm8,[xyz]mm/mem,[xyz]mm{k} */
+        generate_exception_if(evex.w || evex.brs, X86_EXC_UD);
+        vcpu_must_have(avx10_2_aux);
+        avx512_vlen_check(false);
+        fault_suppression = false;
+        goto simd_imm8_zmm;
+
     case X86EMUL_OPC_EVEX_F3(0x0f3a, 0x42): /* vmpsadbw $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */
         generate_exception_if(evex.w || evex.brs, X86_EXC_UD);
         vcpu_must_have(avx10, 2);