From: Florian Fainelli <florian.fainelli@broadcom.com>
To: Jim Quinlan <james.quinlan@broadcom.com>,
linux-pci@vger.kernel.org,
Nicolas Saenz Julienne <nsaenz@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Cyril Brulebois <kibi@debian.org>,
Stanimir Varbanov <svarbanov@suse.de>,
bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Andrew Murray" <amurray@thegoodpenguin.co.uk>,
"Jeremy Linton" <jeremy.linton@arm.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 2/8] PCI: brcmstb: Write to internal register to change link cap
Date: Thu, 20 Feb 2025 09:28:29 -0800 [thread overview]
Message-ID: <110d6471-d7a5-43bb-b768-dcbfb0f029eb@broadcom.com> (raw)
In-Reply-To: <20250214173944.47506-3-james.quinlan@broadcom.com>
On 2/14/2025 9:39 AM, Jim Quinlan wrote:
> The driver was mistakenly writing to a RO config-space register
> (PCI_EXP_LNKCAP). Although harmless in this case, the proper destination
> is an internal RW register that is reflected by PCI_EXP_LNKCAP.
>
> Fixes: c0452137034bda8f686dd9a2e167949bfffd6776 ("PCI: brcmstb: Add Broadcom STB PCIe host controller driver")
Likewise this needs to be shortened to 12 digits, with that fixed:
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
--
Florian
next prev parent reply other threads:[~2025-02-20 17:28 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-14 17:39 [PATCH v2 0/8] PCI: brcmstb: Misc small tweaks and fixes Jim Quinlan
2025-02-14 17:39 ` [PATCH v2 1/8] PCI: brcmstb: Set gen limitation before link, not after Jim Quinlan
2025-02-20 17:27 ` Florian Fainelli
2025-03-04 14:51 ` Manivannan Sadhasivam
2025-02-14 17:39 ` [PATCH v2 2/8] PCI: brcmstb: Write to internal register to change link cap Jim Quinlan
2025-02-20 17:28 ` Florian Fainelli [this message]
2025-03-04 14:54 ` Manivannan Sadhasivam
2025-02-14 17:39 ` [PATCH v2 3/8] PCI: brcmstb: Do not assume that reg field starts at LSB Jim Quinlan
2025-02-20 17:29 ` Florian Fainelli
2025-03-04 14:57 ` Manivannan Sadhasivam
2025-02-14 17:39 ` [PATCH v2 4/8] PCI: brcmstb: Fix error path upon call of regulator_bulk_get() Jim Quinlan
2025-02-20 17:29 ` Florian Fainelli
2025-03-03 18:40 ` Bjorn Helgaas
2025-03-04 14:49 ` Jim Quinlan
2025-03-06 15:24 ` Jim Quinlan
2025-03-06 16:24 ` Bjorn Helgaas
2025-03-04 15:03 ` Manivannan Sadhasivam
2025-03-04 16:55 ` Jim Quinlan
2025-03-04 17:07 ` Manivannan Sadhasivam
2025-03-04 17:24 ` Jim Quinlan
2025-03-04 17:32 ` Manivannan Sadhasivam
2025-03-04 17:54 ` Krzysztof Wilczyński
2025-02-14 17:39 ` [PATCH v2 5/8] PCI: brcmstb: Fix potential premature regulator disabling Jim Quinlan
2025-02-20 17:30 ` Florian Fainelli
2025-03-04 15:04 ` Manivannan Sadhasivam
2025-02-14 17:39 ` [PATCH v2 6/8] PCI: brcmstb: Use same constant table for config space access Jim Quinlan
2025-02-20 18:14 ` Florian Fainelli
2025-03-04 15:08 ` Manivannan Sadhasivam
2025-03-04 16:37 ` Jim Quinlan
2025-03-04 16:58 ` Manivannan Sadhasivam
2025-03-04 17:37 ` Jim Quinlan
2025-03-05 5:47 ` Manivannan Sadhasivam
2025-02-14 17:39 ` [PATCH v2 7/8] PCI: brcmstb: Make two changes in MDIO register fields Jim Quinlan
2025-02-20 18:15 ` Florian Fainelli
2025-03-04 15:09 ` Manivannan Sadhasivam
2025-02-14 17:39 ` [PATCH v2 8/8] PCI: brcmstb: Clarify conversion of irq_domain_set_info() param Jim Quinlan
2025-02-20 18:15 ` Florian Fainelli
2025-03-04 15:10 ` Manivannan Sadhasivam
2025-03-01 14:48 ` [PATCH v2 0/8] PCI: brcmstb: Misc small tweaks and fixes Krzysztof Wilczyński
2025-03-04 16:10 ` Krzysztof Wilczyński
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