Re: [kvm-ppc-devel] Bamboo PCI interrupt issues

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

On Tue, 2008-03-04 at 21:39 +0100, Segher Boessenkool wrote:
> >> Using '8' is correct. PCI interrupts are *always* level sensitive and
> >> active
> >> low.
> >
> > Unless you use one of those strange bridges that stick not gates on the
> > PCI IRQ inputs :-) But I don't think that's the case on the 440EP.
> 
> More generally, the target interrupt descriptors (sense values, in
> particular) in a device tree interrupt map describe the interrupts as
> seen on the target interrupt controller, *not* as seen on this (source)
> interrupt domain.  This should be obvious, but since the source 
> interrupt
> descriptor for PCI doesn't have a sense value (it's always level low,
> after all), it can be confusing.  Well, interrupts always are confusing 
> :-)

Sure. But if your stupid bridge sticks a not gate between the PIRQ input
and the UIC (interrupt controller), effectively, the UIC sees a reversed
polarity. Thus you need to put in your interrupt map a reversed polarity
information for the UIC interrupt specifiers.

Ben.



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