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* [PATCH v6 0/2] Add GEM_CHANGE_HANDLE test
@ 2026-09-02  1:03 vitaly.prosyak
  2026-09-02  1:03 ` [PATCH v6 1/2] tests/intel: Add gem_change_handle_race test suite vitaly.prosyak
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: vitaly.prosyak @ 2026-09-02  1:03 UTC (permalink / raw)
  To: igt-dev
  Cc: simona, kamil.konieczny, christian.koenig, alexander.deucher,
	sebastian.brzezinka, Vitaly Prosyak

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

This series adds concurrency, edge-case, and functional coverage so
GEM_CHANGE_HANDLE behavior can be validated across lifetime races,
address-space diversity, and boundary inputs before kernel-side enablement.

The ioctl is disabled for security reasons, but it also lacked a systematic
IGT testing process for corner cases and races.

To re-enable it:

1. Land working IGT tests for the corner cases and races; this series
   addresses that request.
2. Handle `idr_preload` in the kernel and kernel-internal tests; this does
   not belong in IGT.
3. Define and validate `handle == 0` semantics; this series adds the
   corresponding IGT coverage.
4. Define and validate `handle == new_handle` semantics; this series adds
   the corresponding IGT coverage.

Requirement-to-subtest mapping:

* Requirement 1 (corner cases and races): race-change-vs-close,
  race-change-vs-change, race-change-vs-prime,
  race-aggressive-change-vs-close, race-exploit-single-thread,
  race-exploit-random-handles, race-close-before-lock, object invalid race
  to random offsets, set/get race for random handles, all vmas race to
  random offsets, all ppgtt race to random offsets, and all objects race to
  random offsets.
* Requirement 2 (`idr_preload`): this is kernel/internal work and has no IGT
  subtest in this series.
* Requirement 3 (`handle == 0` semantics): invalid-object/invalid-input
  coverage in this series, including object invalid race to random offsets.
* Requirement 4 (`handle == new_handle` semantics): same-handle/no-op and
  functional rename coverage in this series, including set/get race for
  random handles.

Review feedback addressed:

* Kamil feedback: patch-by-patch buildability is maintained.
* Sebastian feedback: GEM_CHANGE_HANDLE is currently wired to
  drm_invalid_op; prerequisite IGT coverage is provided before kernel-side
  enablement.
* dmesg precondition: require_dmesg_access() prevents dmesg-based validation
  without access.
* arm64 portability: the sched_yield path avoids the x86-only pause mnemonic
  issue.
* checkpatch cleanup status: style cleanups were applied; known
  volatile-related warnings remain.

-- 
2.54.0


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2026-09-08 17:35 UTC | newest]

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2026-09-02  1:03 [PATCH v6 0/2] Add GEM_CHANGE_HANDLE test vitaly.prosyak
2026-09-02  1:03 ` [PATCH v6 1/2] tests/intel: Add gem_change_handle_race test suite vitaly.prosyak
2026-09-02  1:03 ` [PATCH v6 2/2] tests/intel/gem_change_handle_race: Add edge-case and functional subtests vitaly.prosyak
2026-09-08 17:34 ` [PATCH v6 0/2] Add GEM_CHANGE_HANDLE test vitaly prosyak

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