From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Leon Woestenberg <leon.woestenberg@gmail.com>
Cc: u-boot@lists.denx.de, Linux PPC <linuxppc-dev@ozlabs.org>
Subject: Re: ppc4xx: u-boot sees PCIe endpoint, linux does not.
Date: Mon, 01 Dec 2008 19:12:32 +1100 [thread overview]
Message-ID: <1228119152.7356.118.camel@pasglop> (raw)
In-Reply-To: <c384c5ea0811280450t3e199da6s1fcdf903f63f9622@mail.gmail.com>
On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote:
> Hello,
>
> AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
>
> u-boot sees the end point, but Linux does not:
>
> U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51)
> CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz)
> <...>
> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 16
> <...>
> PCIE1: successfully set as root-complex
> 02 00 2071 2071 00ff 00
>
>
> Now, if I re-program the end-point FPGA during the u-boot boot
> time-out, Linux will recognize the end-point.
>
> Any takers on what I should start looking for?
It's possible that either the reset in between goes bonkers or something
else causes your FPGA to stop responding. It looks like a programming
problem with the FPGA to me.
Ben.
WARNING: multiple messages have this Message-ID (diff)
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] ppc4xx: u-boot sees PCIe endpoint, linux does not.
Date: Mon, 01 Dec 2008 19:12:32 +1100 [thread overview]
Message-ID: <1228119152.7356.118.camel@pasglop> (raw)
In-Reply-To: <c384c5ea0811280450t3e199da6s1fcdf903f63f9622@mail.gmail.com>
On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote:
> Hello,
>
> AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
>
> u-boot sees the end point, but Linux does not:
>
> U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51)
> CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz)
> <...>
> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 16
> <...>
> PCIE1: successfully set as root-complex
> 02 00 2071 2071 00ff 00
>
>
> Now, if I re-program the end-point FPGA during the u-boot boot
> time-out, Linux will recognize the end-point.
>
> Any takers on what I should start looking for?
It's possible that either the reset in between goes bonkers or something
else causes your FPGA to stop responding. It looks like a programming
problem with the FPGA to me.
Ben.
next prev parent reply other threads:[~2008-12-01 8:12 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-11-28 12:50 ppc4xx: u-boot sees PCIe endpoint, linux does not Leon Woestenberg
2008-11-28 12:50 ` [U-Boot] " Leon Woestenberg
2008-12-01 8:12 ` Benjamin Herrenschmidt [this message]
2008-12-01 8:12 ` Benjamin Herrenschmidt
2008-12-01 19:19 ` Leon Woestenberg
2008-12-01 19:19 ` [U-Boot] " Leon Woestenberg
2008-12-01 19:46 ` Stefan Roese
2008-12-01 19:46 ` Stefan Roese
2009-03-09 14:23 ` Leon Woestenberg
2009-03-09 14:23 ` Leon Woestenberg
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