From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Cc: Linux PPC <linuxppc-dev@ozlabs.org>
Subject: Re: [U-Boot] ppc4xx: u-boot sees PCIe endpoint, linux does not.
Date: Mon, 1 Dec 2008 20:46:22 +0100 [thread overview]
Message-ID: <200812012046.22247.sr@denx.de> (raw)
In-Reply-To: <c384c5ea0812011119o97adf68l1546c96d5a6696a8@mail.gmail.com>
On Monday 01 December 2008, Leon Woestenberg wrote:
> >> Now, if I re-program the end-point FPGA during the u-boot boot
> >> time-out, Linux will recognize the end-point.
> >
> > It's possible that either the reset in between goes bonkers or something
> > else causes your FPGA to stop responding. It looks like a programming
> > problem with the FPGA to me.
>
> I have verified that the end point does not receive any kind of reset.
>
> Also, this problem only happens on the Canyonlands board; on x86 and
> powerpc MPC8315E it remains properly working after soft/hard resets,
> u-boot init etc.
This could be because only the 4xx Linux PCI(e) driver really resets the
endpoint (PHY reset). But you seem to have analyzed this already.
> Could it be u-boot overwrites a too large payload into the config
> space or something similar, which makes subsequent accesses fail?
Not sure. I suggest that you disable the PCI(e) support in U-Boot to see if
Linux behaves differently on a non-pre-initialized endpoint.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
=====================================================================
WARNING: multiple messages have this Message-ID (diff)
From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] ppc4xx: u-boot sees PCIe endpoint, linux does not.
Date: Mon, 1 Dec 2008 20:46:22 +0100 [thread overview]
Message-ID: <200812012046.22247.sr@denx.de> (raw)
In-Reply-To: <c384c5ea0812011119o97adf68l1546c96d5a6696a8@mail.gmail.com>
On Monday 01 December 2008, Leon Woestenberg wrote:
> >> Now, if I re-program the end-point FPGA during the u-boot boot
> >> time-out, Linux will recognize the end-point.
> >
> > It's possible that either the reset in between goes bonkers or something
> > else causes your FPGA to stop responding. It looks like a programming
> > problem with the FPGA to me.
>
> I have verified that the end point does not receive any kind of reset.
>
> Also, this problem only happens on the Canyonlands board; on x86 and
> powerpc MPC8315E it remains properly working after soft/hard resets,
> u-boot init etc.
This could be because only the 4xx Linux PCI(e) driver really resets the
endpoint (PHY reset). But you seem to have analyzed this already.
> Could it be u-boot overwrites a too large payload into the config
> space or something similar, which makes subsequent accesses fail?
Not sure. I suggest that you disable the PCI(e) support in U-Boot to see if
Linux behaves differently on a non-pre-initialized endpoint.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
next prev parent reply other threads:[~2008-12-01 19:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-11-28 12:50 ppc4xx: u-boot sees PCIe endpoint, linux does not Leon Woestenberg
2008-11-28 12:50 ` [U-Boot] " Leon Woestenberg
2008-12-01 8:12 ` Benjamin Herrenschmidt
2008-12-01 8:12 ` [U-Boot] " Benjamin Herrenschmidt
2008-12-01 19:19 ` Leon Woestenberg
2008-12-01 19:19 ` [U-Boot] " Leon Woestenberg
2008-12-01 19:46 ` Stefan Roese [this message]
2008-12-01 19:46 ` Stefan Roese
2009-03-09 14:23 ` Leon Woestenberg
2009-03-09 14:23 ` Leon Woestenberg
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