From: robherring2@gmail.com (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 2/3] ARM: gic: allow irq_start to be 0
Date: Tue, 9 Aug 2011 15:16:59 -0500 [thread overview]
Message-ID: <1312921020-6820-3-git-send-email-robherring2@gmail.com> (raw)
In-Reply-To: <1312921020-6820-1-git-send-email-robherring2@gmail.com>
From: Rob Herring <rob.herring@calxeda.com>
There's really no need to set irq_start per platform for the primary gic.
The SGIs and PPIs are not handled as normal irqs, so how irqs 0-31 are
setup doesn't really matter. So allow irq_start to be set to 0 to match
the linux irq numbering.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/common/gic.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 3227ca9..f13298e 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -353,7 +353,7 @@ void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
gic = &gic_data[gic_nr];
gic->dist_base = dist_base;
gic->cpu_base = cpu_base;
- gic->irq_offset = (irq_start - 1) & ~31;
+ gic->irq_offset = irq_start ? (irq_start - 1) & ~31 : 0;
if (gic_nr == 0)
gic_cpu_base_addr = cpu_base;
--
1.7.4.1
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [RFC PATCH 2/3] ARM: gic: allow irq_start to be 0
Date: Tue, 9 Aug 2011 15:16:59 -0500 [thread overview]
Message-ID: <1312921020-6820-3-git-send-email-robherring2@gmail.com> (raw)
In-Reply-To: <1312921020-6820-1-git-send-email-robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
There's really no need to set irq_start per platform for the primary gic.
The SGIs and PPIs are not handled as normal irqs, so how irqs 0-31 are
setup doesn't really matter. So allow irq_start to be set to 0 to match
the linux irq numbering.
Signed-off-by: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/common/gic.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 3227ca9..f13298e 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -353,7 +353,7 @@ void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
gic = &gic_data[gic_nr];
gic->dist_base = dist_base;
gic->cpu_base = cpu_base;
- gic->irq_offset = (irq_start - 1) & ~31;
+ gic->irq_offset = irq_start ? (irq_start - 1) & ~31 : 0;
if (gic_nr == 0)
gic_cpu_base_addr = cpu_base;
--
1.7.4.1
next prev parent reply other threads:[~2011-08-09 20:16 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-09 20:16 [RFC PATCH 0/3] Yet another GIC OF binding series Rob Herring
2011-08-09 20:16 ` Rob Herring
2011-08-09 20:16 ` [RFC PATCH 1/3] dt: irq: add interrupt controller descriptor struct Rob Herring
2011-08-09 20:16 ` Rob Herring
2011-08-10 13:14 ` Jamie Iles
2011-08-10 13:14 ` Jamie Iles
2011-08-10 13:23 ` Rob Herring
2011-08-10 13:23 ` Rob Herring
2011-08-09 20:16 ` Rob Herring [this message]
2011-08-09 20:16 ` [RFC PATCH 2/3] ARM: gic: allow irq_start to be 0 Rob Herring
2011-08-09 20:17 ` [RFC PATCH 3/3] ARM: gic: add OF based initialization Rob Herring
2011-08-09 20:17 ` Rob Herring
2011-08-10 8:08 ` Marc Zyngier
2011-08-10 8:08 ` Marc Zyngier
2011-08-10 18:30 ` Rob Herring
2011-08-10 18:30 ` Rob Herring
2011-08-25 21:49 ` [PATCH v2] " Rob Herring
2011-08-25 21:49 ` Rob Herring
2011-08-26 2:37 ` Rob Herring
2011-08-26 2:37 ` Rob Herring
2011-08-30 3:26 ` [RFC PATCH 0/3] Yet another GIC OF binding series Shawn Guo
2011-08-30 3:26 ` Shawn Guo
2011-09-03 13:34 ` Thomas Abraham
2011-09-03 13:34 ` Thomas Abraham
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