* [PATCH v8 01/11] dt-bindings: soc: renesas: Add various SolidRun RZ/G2 based boards
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-23 13:42 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 02/11] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow input-/output-disable Josua Mayer
` (10 subsequent siblings)
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer,
Conor Dooley
Add bindings for various SolidRun boards and System on Module built
around Renesas RZ/G2 family of SoCs:
- RZ/G2L SoM [1]
- RZ/V2L SoM [2]
(shares PCB with G2L and has very similar programming model)
- RZ/G2LC SoM [3]
- RZ/G2UL SoM [4]
(shares PCB with G2LC but programming model differs largely)
- HummingBoard IIoT [5] (RZ/G2L, RZ/V2L, RZ/G2LC)
- HummingBoard Pro [6] (RZ/G2L, RZ/V2L)
- HummingBoard Base (Ripple) [7] (RZ/G2L, RZ/V2L, RZ/G2LC, RZ/G2UL)
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
[3] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
[4] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2ul-som/
[5] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
[6] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-sbc/
[7] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
.../devicetree/bindings/soc/renesas/renesas.yaml | 37 ++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
index eeef34e3d7d07..1673005a3d930 100644
--- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
@@ -508,6 +508,14 @@ properties:
- renesas,r9a07g043u12 # RZ/G2UL Type-2
- const: renesas,r9a07g043
+ - description: SolidRun RZ/G2UL based boards
+ items:
+ - enum:
+ - solidrun,rzg2ul-hummingboard-ripple # SolidRun RZ/G2UL HummingBoard Ripple
+ - const: solidrun,rzg2ul-sr-som
+ - const: renesas,r9a07g043u12 # RZ/G2UL Type-2
+ - const: renesas,r9a07g043
+
- description: RZ/G2{L,LC} (R9A07G044)
items:
- enum:
@@ -519,6 +527,25 @@ properties:
- renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L
- const: renesas,r9a07g044
+ - description: SolidRun RZ/G2L based boards
+ items:
+ - enum:
+ - solidrun,rzg2l-hummingboard-iiot # SolidRun RZ/G2L HummingBoard IIoT
+ - solidrun,rzg2l-hummingboard-pro # SolidRun RZ/G2L HummingBoard Pro
+ - solidrun,rzg2l-hummingboard-ripple # SolidRun RZ/G2L HummingBoard Ripple
+ - const: solidrun,rzg2l-sr-som
+ - const: renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L
+ - const: renesas,r9a07g044
+
+ - description: SolidRun RZ/G2LC based boards
+ items:
+ - enum:
+ - solidrun,rzg2lc-hummingboard-iiot # SolidRun RZ/G2LC HummingBoard IIoT
+ - solidrun,rzg2lc-hummingboard-ripple # SolidRun RZ/G2LC HummingBoard Ripple
+ - const: solidrun,rzg2lc-sr-som
+ - const: renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC
+ - const: renesas,r9a07g044
+
- items:
- enum:
# MYIR Remi Pi SBC (MYB-YG2LX-REMI)
@@ -535,6 +562,16 @@ properties:
- renesas,r9a07g054l2 # Dual Cortex-A55 RZ/V2L
- const: renesas,r9a07g054
+ - description: SolidRun RZ/V2L based boards
+ items:
+ - enum:
+ - solidrun,rzv2l-hummingboard-iiot # SolidRun RZ/V2L HummingBoard IIoT
+ - solidrun,rzv2l-hummingboard-pro # SolidRun RZ/V2L HummingBoard Pro
+ - solidrun,rzv2l-hummingboard-ripple # SolidRun RZ/V2L HummingBoard Ripple
+ - const: solidrun,rzv2l-sr-som
+ - const: renesas,r9a07g054l2 # Dual Cortex-A55 RZ/V2L
+ - const: renesas,r9a07g054
+
- description: RZ/G3S (R9A08G045)
items:
- enum:
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 01/11] dt-bindings: soc: renesas: Add various SolidRun RZ/G2 based boards
2026-09-04 11:56 ` [PATCH v8 01/11] dt-bindings: soc: " Josua Mayer
@ 2026-09-23 13:42 ` Geert Uytterhoeven
2026-09-25 8:28 ` Josua Mayer
0 siblings, 1 reply; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 13:42 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Conor Dooley
Hi Joshua,
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add bindings for various SolidRun boards and System on Module built
> around Renesas RZ/G2 family of SoCs:
>
> - RZ/G2L SoM [1]
> - RZ/V2L SoM [2]
> (shares PCB with G2L and has very similar programming model)
> - RZ/G2LC SoM [3]
> - RZ/G2UL SoM [4]
> (shares PCB with G2LC but programming model differs largely)
> - HummingBoard IIoT [5] (RZ/G2L, RZ/V2L, RZ/G2LC)
> - HummingBoard Pro [6] (RZ/G2L, RZ/V2L)
> - HummingBoard Base (Ripple) [7] (RZ/G2L, RZ/V2L, RZ/G2LC, RZ/G2UL)
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
> [3] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
> [4] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2ul-som/
> [5] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
> [6] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-sbc/
> [7] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
> +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
> @@ -508,6 +508,14 @@ properties:
> - renesas,r9a07g043u12 # RZ/G2UL Type-2
> - const: renesas,r9a07g043
>
> + - description: SolidRun RZ/G2UL based boards
> + items:
> + - enum:
> + - solidrun,rzg2ul-hummingboard-ripple # SolidRun RZ/G2UL HummingBoard Ripple
As RZ/G2UL is pin-compatible with RZ/G2LC, I guess you could have an
RZ/G2UL-based HummingBoard IIoT, too?
> + - const: solidrun,rzg2ul-sr-som
Is there any special meaning of the "sr" in the middle of this and all
other SoM compatible values?
If it just means "SolidRun", I think it can be dropped. However,
you already have that for various SoMs with non-Renesas SoCs.
> + - const: renesas,r9a07g043u12 # RZ/G2UL Type-2
> + - const: renesas,r9a07g043
The rest LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v8 01/11] dt-bindings: soc: renesas: Add various SolidRun RZ/G2 based boards
2026-09-23 13:42 ` Geert Uytterhoeven
@ 2026-09-25 8:28 ` Josua Mayer
2026-09-25 8:36 ` Geert Uytterhoeven
0 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-25 8:28 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-gpio@vger.kernel.org, Conor Dooley
Hi Geert,
On 9/23/2026 3:42 PM, Geert Uytterhoeven wrote:
> Hi Joshua,
>
> On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
>> Add bindings for various SolidRun boards and System on Module built
>> around Renesas RZ/G2 family of SoCs:
>>
>> - RZ/G2L SoM [1]
>> - RZ/V2L SoM [2]
>> (shares PCB with G2L and has very similar programming model)
>> - RZ/G2LC SoM [3]
>> - RZ/G2UL SoM [4]
>> (shares PCB with G2LC but programming model differs largely)
>> - HummingBoard IIoT [5] (RZ/G2L, RZ/V2L, RZ/G2LC)
>> - HummingBoard Pro [6] (RZ/G2L, RZ/V2L)
>> - HummingBoard Base (Ripple) [7] (RZ/G2L, RZ/V2L, RZ/G2LC, RZ/G2UL)
>>
>> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
>> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
>> [3] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
>> [4] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2ul-som/
>> [5] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
>> [6] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-sbc/
>> [7] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
>>
>> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>> Signed-off-by: Josua Mayer <josua@solid-run.com>
> Thanks for your patch!
>
>> --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
>> +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
>> @@ -508,6 +508,14 @@ properties:
>> - renesas,r9a07g043u12 # RZ/G2UL Type-2
>> - const: renesas,r9a07g043
>>
>> + - description: SolidRun RZ/G2UL based boards
>> + items:
>> + - enum:
>> + - solidrun,rzg2ul-hummingboard-ripple # SolidRun RZ/G2UL HummingBoard Ripple
> As RZ/G2UL is pin-compatible with RZ/G2LC,
The SoM is, the SoC is more complex.
SolidRun uses the G2L/G2LC package 15x15mm while G2UL is 13x13.
You are correct to expect HB-IIoT, however due to the reduced pin count
and feature set it is not useful and will likely never get supported by SR.
> I guess you could have an
> RZ/G2UL-based HummingBoard IIoT, too?
>
>> + - const: solidrun,rzg2ul-sr-som
> Is there any special meaning of the "sr" in the middle of this and all
> other SoM compatible values?
> If it just means "SolidRun",
It does.
> I think it can be dropped.
The "sr" is merely to avoid name collision with other SoM vendors.
> However,
> you already have that for various SoMs with non-Renesas SoCs.
Correct.
>
>> + - const: renesas,r9a07g043u12 # RZ/G2UL Type-2
>> + - const: renesas,r9a07g043
> The rest LGTM, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks!
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v8 01/11] dt-bindings: soc: renesas: Add various SolidRun RZ/G2 based boards
2026-09-25 8:28 ` Josua Mayer
@ 2026-09-25 8:36 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-25 8:36 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-gpio@vger.kernel.org, Conor Dooley
Hi Josua,
On Fri, 25 Sept 2026 at 10:29, Josua Mayer <josua@solid-run.com> wrote:
> On 9/23/2026 3:42 PM, Geert Uytterhoeven wrote:
> > On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> >> Add bindings for various SolidRun boards and System on Module built
> >> around Renesas RZ/G2 family of SoCs:
> >>
> >> - RZ/G2L SoM [1]
> >> - RZ/V2L SoM [2]
> >> (shares PCB with G2L and has very similar programming model)
> >> - RZ/G2LC SoM [3]
> >> - RZ/G2UL SoM [4]
> >> (shares PCB with G2LC but programming model differs largely)
> >> - HummingBoard IIoT [5] (RZ/G2L, RZ/V2L, RZ/G2LC)
> >> - HummingBoard Pro [6] (RZ/G2L, RZ/V2L)
> >> - HummingBoard Base (Ripple) [7] (RZ/G2L, RZ/V2L, RZ/G2LC, RZ/G2UL)
> >>
> >> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
> >> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
> >> [3] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
> >> [4] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2ul-som/
> >> [5] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
> >> [6] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-sbc/
> >> [7] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
> >>
> >> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> >> Signed-off-by: Josua Mayer <josua@solid-run.com>
> > Thanks for your patch!
> >
> >> --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
> >> +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
> >> @@ -508,6 +508,14 @@ properties:
> >> - renesas,r9a07g043u12 # RZ/G2UL Type-2
> >> - const: renesas,r9a07g043
> >>
> >> + - description: SolidRun RZ/G2UL based boards
> >> + items:
> >> + - enum:
> >> + - solidrun,rzg2ul-hummingboard-ripple # SolidRun RZ/G2UL HummingBoard Ripple
> > As RZ/G2UL is pin-compatible with RZ/G2LC,
> The SoM is, the SoC is more complex.
> SolidRun uses the G2L/G2LC package 15x15mm while G2UL is 13x13.
IC.
> You are correct to expect HB-IIoT, however due to the reduced pin count
> and feature set it is not useful and will likely never get supported by SR.
OK (same for RZ/Five ;-)
> > I guess you could have an
> > RZ/G2UL-based HummingBoard IIoT, too?
> >
> >> + - const: solidrun,rzg2ul-sr-som
> > Is there any special meaning of the "sr" in the middle of this and all
> > other SoM compatible values?
> > If it just means "SolidRun",
>
> It does.
>
> > I think it can be dropped.
>
> The "sr" is merely to avoid name collision with other SoM vendors.
OK, for non-DT situations where there is no vendor-prefix.
> > However,
> > you already have that for various SoMs with non-Renesas SoCs.
>
> Correct.
OK, so keep it for consistency.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 02/11] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow input-/output-disable
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
2026-09-04 11:56 ` [PATCH v8 01/11] dt-bindings: soc: " Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-04 12:22 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 03/11] dt-bindings: usb: cypress,hx3: make peer-hub property optional Josua Mayer
` (9 subsequent siblings)
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
The list of allowed pinconf properties already includes input-enable and
output-enable, but omits their -disable counterparts.
Each pair controls the same bit. Where enable (set) is supported so is
disable (clear).
Add input-disable and output-disable to the list.
Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
index fb1fe1ea759fc..a551996623c04 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
@@ -135,7 +135,9 @@ additionalProperties:
gpios: true
input: true
input-enable: true
+ input-disable: true
output-enable: true
+ output-disable: true
output-high: true
output-low: true
line-name: true
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 02/11] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow input-/output-disable
2026-09-04 11:56 ` [PATCH v8 02/11] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow input-/output-disable Josua Mayer
@ 2026-09-04 12:22 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-04 12:22 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> The list of allowed pinconf properties already includes input-enable and
> output-enable, but omits their -disable counterparts.
>
> Each pair controls the same bit. Where enable (set) is supported so is
> disable (clear).
>
> Add input-disable and output-disable to the list.
>
> Reviewed-by: Linus Walleij <linusw@kernel.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-pinctrl for v7.4.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 03/11] dt-bindings: usb: cypress,hx3: make peer-hub property optional
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
2026-09-04 11:56 ` [PATCH v8 01/11] dt-bindings: soc: " Josua Mayer
2026-09-04 11:56 ` [PATCH v8 02/11] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow input-/output-disable Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-04 11:56 ` [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb Josua Mayer
` (8 subsequent siblings)
11 siblings, 0 replies; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer,
Krzysztof Kozlowski
Cypress HX3 Hubs are combined USB-2.0 and USB-3.0 devices, and should be
described by one node per speed and linked by peer-hub property.
It is however possible to install this Hub to a USB-2.0-only host, in
which case the USB-3.0 peer has no place in device-tree.
Remove peer-hub from required properties.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
Documentation/devicetree/bindings/usb/cypress,hx3.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/usb/cypress,hx3.yaml b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml
index d6eac1213228d..aca2fe796240f 100644
--- a/Documentation/devicetree/bindings/usb/cypress,hx3.yaml
+++ b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml
@@ -53,7 +53,6 @@ properties:
required:
- compatible
- reg
- - peer-hub
- vdd-supply
- vdd2-supply
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (2 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 03/11] dt-bindings: usb: cypress,hx3: make peer-hub property optional Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-23 14:37 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 05/11] arm64: dts: renesas: add support for solidrun rzv2l " Josua Mayer
` (7 subsequent siblings)
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
Add support for the SolidRun RZ/G2L SoM [1] on HummingBoard IIoT [2].
The SoM features:
- 2x 1Gbps Ethernet with PHY
- eMMC
- 1/2GB DDR
- WiFi + Bluetooth
- SDHI Mux switching between eMMC and Carrier Board
The HummingBoard IIoT features:
- 3x USB-2.0 Type A connector
- 2x 1Gbps RJ45 Ethernet
- USB Type-C Console Port
- microSD connector
- RTC with backup battery
- RGB Status LED
- 1x M.2 B-Key connector with USB-2.0 + SIM card holder
- 1x DSI Display Connector
- GPIO header
- 2x RS232/RS485 ports (configurable)
- 2x CAN
Descriptions for eMMC, microSD and RS485 are provided as overlays due to
their dependency on configurable mux states.
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 13 +
.../dts/renesas/r9a07g044l2-hummingboard-iiot.dts | 16 +
.../renesas/rzg2l-hummingboard-iiot-common.dtsi | 564 +++++++++++++++++++++
.../renesas/rzg2l-hummingboard-iiot-microsd.dtso | 26 +
.../renesas/rzg2l-hummingboard-iiot-rs485-a.dtso | 17 +
.../renesas/rzg2l-hummingboard-iiot-rs485-b.dtso | 17 +
.../boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi | 49 ++
arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso | 44 ++
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi | 480 ++++++++++++++++++
9 files changed, 1226 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 8bf155badd111..e2af196e18bf6 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -170,6 +170,19 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtbo
r9a07g044c2-smarc-cru-csi-ov5645-dtbs := r9a07g044c2-smarc.dtb r9a07g044c2-smarc-cru-csi-ov5645.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-sr-som-emmc.dtbo
+r9a07g044l2-hummingboard-iiot-emmc-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-sr-som-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-emmc.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-microsd.dtbo
+r9a07g044l2-hummingboard-iiot-microsd-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-microsd.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-rs485-a.dtbo
+r9a07g044l2-hummingboard-iiot-rs485-a-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-a.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-rs485-a.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-rs485-b.dtbo
+r9a07g044l2-hummingboard-iiot-rs485-b-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-rs485-b.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-remi-pi.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-iiot.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-iiot.dts
new file mode 100644
index 0000000000000..eba4f423c8f05
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-iiot.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include "r9a07g044l2.dtsi"
+#include "rzg2l-sr-som.dtsi"
+#include "rzg2l-hummingboard-iiot.dtsi"
+
+/ {
+ compatible = "solidrun,rzg2l-hummingboard-iiot", "solidrun,rzg2l-sr-som",
+ "renesas,r9a07g044l2", "renesas,r9a07g044";
+ model = "SolidRun RZ/G2L HummingBoard IIoT";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi
new file mode 100644
index 0000000000000..b7ea4cfe4aa61
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi
@@ -0,0 +1,564 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+/ {
+ /* power for M.2 B-Key connector (J6) */
+ regulator-m2-b {
+ compatible = "regulator-fixed";
+ regulator-name = "m2-b";
+ gpios = <&tca6416_u20 5 GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ enable-active-high;
+ };
+
+ /* power for M.2 M-Key connector (J4) */
+ regulator-m2-m {
+ compatible = "regulator-fixed";
+ regulator-name = "m2-m";
+ gpios = <&tca6416_u20 6 GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ enable-active-high;
+ };
+
+ /* power for USB-A J27 behind USB Hub Port 3 */
+ regulator-vbus-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus2";
+ regulator-always-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ gpios = <&tca6416_u20 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ /* power for USB-A J27 behind USB Hub Port 4 */
+ regulator-vbus-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus3";
+ regulator-always-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ gpios = <&tca6416_u20 13 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ aliases {
+ gpio1 = &tca6408_u48;
+ gpio2 = &tca6408_u37;
+ gpio3 = &tca6416_u20;
+ gpio4 = &tca6416_u21;
+ i2c3 = &i2c_exp;
+ i2c4 = &i2c_csi;
+ i2c5 = &i2c_dsi;
+ i2c6 = &i2c_lvds;
+ rtc0 = &carrier_rtc;
+ rtc1 = &pmic;
+ serial3 = &scif3;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ wakeup-event {
+ interrupts-extended = <&tca6416_u21 11 IRQ_TYPE_EDGE_FALLING>;
+ label = "m2-m-wakeup";
+ wakeup-source;
+ linux,code = <KEY_WAKEUP>;
+ };
+ };
+
+ can_mux: mux-controller-1 {
+ compatible = "gpio-mux";
+ /* default J9-55/57/59/61 to on-board transceivers */
+ idle-state = <0>;
+ #mux-control-cells = <0>;
+ /*
+ * Mux routes CAN bus signals between SoM connector pins,
+ * expansion connector (J22) and on-board transceivers using
+ * two GPIO:
+ * - IO3: 0 = on-board transceivers, 1 = expansion connector
+ * - IO4: 0 = J9-55/57/59/61, 1 = J7-12/16 & J9-54/56
+ */
+ mux-gpios = <&tca6416_u20 3 GPIO_ACTIVE_HIGH>,
+ <&tca6416_u20 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ spi_mux: mux-controller-2 {
+ compatible = "gpio-mux";
+ /* default on-board */
+ idle-state = <0>;
+ /*
+ * Mux switches spi bus between on-board tpm
+ * and expansion connector (J22).
+ */
+ mux-gpios = <&tca6416_u21 0 GPIO_ACTIVE_HIGH>;
+ #mux-control-cells = <0>;
+ };
+
+ scif1_scif3_b2b_mux: mux-controller-3 {
+ compatible = "gpio-mux";
+ /* default on-board */
+ idle-state = <0>;
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches both scif1 and scif3 tx/rx between expansion
+ * connector (J22) and on-board rs232/rs485 transceivers
+ * using one GPIO: 0 = on-board, 1 = connector.
+ */
+ mux-gpios = <&tca6416_u20 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ scif1_rs_232_485_mux: mux-controller-4 {
+ compatible = "gpio-mux";
+ /* default rs232 */
+ idle-state = <0>;
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches scif1 tx/rx between rs232 and rs485
+ * transceivers. using one GPIO: 0 = rs232, 1 = rs485.
+ */
+ mux-gpios = <&tca6416_u20 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ scif3_rs_232_485_mux: mux-controller-5 {
+ compatible = "gpio-mux";
+ /* default rs232 */
+ idle-state = <0>;
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches scif3 tx/rx between rs232 and rs485
+ * transceivers. using one GPIO: 0 = rs232, 1 = rs485.
+ */
+ mux-gpios = <&tca6416_u20 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ v_1_2: regulator-1-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "1v2";
+ regulator-max-microvolt = <1200000>;
+ regulator-min-microvolt = <1200000>;
+ };
+
+ v_3_3: regulator-3-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3v3";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ };
+
+ reg_dsi_panel: regulator-dsi-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "dsi-panel";
+ gpios = <&tca6416_u20 15 GPIO_ACTIVE_HIGH>;
+ regulator-max-microvolt = <11200000>;
+ regulator-min-microvolt = <11200000>;
+ enable-active-high;
+ };
+
+ vmmc: regulator-mmc {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmc";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ startup-delay-us = <250>;
+ vin-supply = <&v_3_3>;
+ gpios = <&pinctrl RZG2L_GPIO(4, 1) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ /* power for USB-A J5003 */
+ vbus1: regulator-vbus-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus1";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ gpios = <&tca6416_u20 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ rfkill-m2-b-gnss {
+ compatible = "rfkill-gpio";
+ /* rfkill-gpio inverts internally */
+ shutdown-gpios = <&tca6416_u20 10 GPIO_ACTIVE_LOW>;
+ label = "m2-b gnss";
+ radio-type = "gps";
+ };
+
+ rfkill-m2-b-wwan {
+ compatible = "rfkill-gpio";
+ /* rfkill-gpio inverts internally */
+ shutdown-gpios = <&tca6416_u20 9 GPIO_ACTIVE_HIGH>;
+ label = "m2-b radio";
+ radio-type = "wwan";
+ };
+};
+
+&ehci1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub_2_0: hub@1 {
+ compatible = "usb4b4,6502", "usb4b4,6506";
+ reg = <1>;
+ reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>;
+ vdd2-supply = <&v_3_3>;
+ vdd-supply = <&v_1_2>;
+ };
+};
+
+&i2c0 {
+ /* highest i2c clock supported by all peripherals is 400kHz */
+
+ tca6416_u20: gpio@20 {
+ compatible = "ti,tcal6416";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-line-names = "TCA_INT/EXT_UART", "TCA_UARTA_232/485",
+ "TCA_UARTB_232/485", "TCA_INT/EXT_CAN",
+ "TCA_NXP/REN", "TCA_M.2B_3V3_EN",
+ "TCA_M.2M_3V3_EN", "TCA_M.2M_RESET#",
+ "TCA_M.2B_RESET#", "TCA_M.2B_W_DIS#",
+ "TCA_M.2B_GPS_EN#", "TCA_USB-HUB_RST#",
+ "TCA_USB_HUB3_PWR_EN", "TCA_USB_HUB4_PWR_EN",
+ "TCA_USB1_PWR_EN", "TCA_VIDEO_PWR_EN";
+
+ m2-b-reset-hog {
+ gpios = <8 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ line-name = "m2-b-reset";
+ output-low;
+ };
+
+ m2-m-reset-hog {
+ gpios = <7 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ line-name = "m2-m-reset";
+ /*
+ * M.2 Key-M connector only supports PCI,
+ * but RZ/G2L(C) has no pci controller.
+ * Keep any card in reset.
+ */
+ output-high;
+ };
+ };
+
+ tca6416_u21: gpio@21 {
+ compatible = "ti,tcal6416";
+ reg = <0x21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-line-names = "TCA_SPI_TPM/EXT", "TCA_TPM_RST#",
+ "TCA_I2C_RST", "TCA_RS232_SHTD#",
+ "TCA_LCD_I2C_RST", "TCA_DIG_OUT1",
+ "TCA_bDIG_IN1", "TCA_SENS_INT",
+ "TCA_ALERT#", "TCA_TPM_PIRQ#",
+ "TCA_RTC_INT", "TCA_M.2M_WAKW_ON_LAN",
+ "TCA_M.2M_CLKREQ#", "TCA_LVDS_INT#",
+ "", "TCA_POE_AT";
+ /*
+ * Level interrupts are typical for gpio expander but not supported on rz/g2l
+ * gpios. However since TCAL6416 latches interrupts and clears only on reading
+ * port register, falling edge trigger doesn't lose events.
+ */
+ interrupts-extended = <&pinctrl RZG2L_GPIO(4, 0) IRQ_TYPE_EDGE_FALLING>;
+
+ lcd-i2c-reset-hog {
+ gpios = <4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+ line-name = "lcd-i2c-reset";
+ output-low;
+ /*
+ * reset shared between U37 and U48, to be
+ * supported once gpio-pca953x switches to
+ * reset framework.
+ */
+ gpio-hog;
+ };
+
+ lvds-irq-hog {
+ gpios = <13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ gpio-hog;
+ input;
+ line-name = "lvds-irq";
+ };
+
+ m2-m-clkreq-hog {
+ gpios = <12 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "m2-m-clkreq";
+ };
+
+ rs232_shutdown: rs232-shutdown-hog {
+ gpios = <3 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ line-name = "rs232-shutdown";
+ output-low;
+ };
+
+ sensor-irq-hog {
+ gpios = <7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ gpio-hog;
+ input;
+ line-name = "sensor-irq";
+ };
+
+ tpm-irq-hog {
+ gpios = <9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ gpio-hog;
+ input;
+ line-name = "tpm-irq";
+ };
+ };
+
+ led-controller@30 {
+ compatible = "ti,lp5562";
+ reg = <0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ /* use internal clock, could use external generated by rtc */
+ clock-mode = /bits/ 8 <1>;
+
+ multi-led@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ color = <LED_COLOR_ID_RGB>;
+ label = "D7";
+
+ led@0 {
+ reg = <0x0>;
+ color = <LED_COLOR_ID_RED>;
+ led-cur = /bits/ 8 <0x32>;
+ max-cur = /bits/ 8 <0x64>;
+ };
+
+ led@1 {
+ reg = <0x1>;
+ color = <LED_COLOR_ID_GREEN>;
+ led-cur = /bits/ 8 <0x19>;
+ max-cur = /bits/ 8 <0x32>;
+ };
+
+ led@2 {
+ reg = <0x2>;
+ color = <LED_COLOR_ID_BLUE>;
+ led-cur = /bits/ 8 <0x19>;
+ max-cur = /bits/ 8 <0x32>;
+ };
+ };
+
+ led@3 {
+ reg = <0x3>;
+ chan-name = "D8";
+ color = <LED_COLOR_ID_GREEN>;
+ label = "D8";
+ led-cur = /bits/ 8 <0x19>;
+ max-cur = /bits/ 8 <0x64>;
+ };
+ };
+
+ light-sensor@44 {
+ compatible = "isil,isl29023";
+ reg = <0x44>;
+ /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
+ interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ accelerometer@53 {
+ compatible = "adi,adxl345";
+ reg = <0x53>;
+ interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_LEVEL_LOW>;
+ /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
+ interrupt-names = "INT1";
+ };
+
+ carrier_eeprom: eeprom@57 {
+ compatible = "atmel,24c02";
+ reg = <0x57>;
+ pagesize = <8>;
+ };
+
+ carrier_rtc: rtc@69 {
+ compatible = "abracon,ab1805";
+ reg = <0x69>;
+ /*
+ * AM1805 RTC used on this board has only nTIRQ pins wired,
+ * which is for countdown timer irqs only.
+ * Driver does not support this, disable for now.
+ *
+ * interrupts-extended = <&tca6416_u21 10 IRQ_TYPE_LEVEL_LOW>;
+ */
+ abracon,tc-diode = "schottky";
+ abracon,tc-resistor = <3>;
+ };
+};
+
+&i2c1 {
+ /* highest i2c clock supported by all peripherals is 400kHz */
+
+ i2c-mux@70 {
+ compatible = "nxp,pca9546";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ /*
+ * This reset is open drain with HW 10k pull-up resistor,
+ * but reset core does not support GPIO_OPEN_DRAIN flag.
+ * The pull-up and GPIO voltages match, push-pull is safe.
+ */
+ reset-gpios = <&tca6416_u21 2 GPIO_ACTIVE_LOW>;
+
+ /* channel 0 routed to expansion connector (J22) */
+ i2c_exp: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ /* channel 1 routed to mipi-csi connector (J23) */
+ i2c_csi: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ /* channel 2 routed to mipi-dsi connector (J25) */
+ i2c_dsi: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tca6408_u48: gpio@21 {
+ compatible = "ti,tca6408";
+ reg = <0x21>;
+ #gpio-cells = <2>;
+ gpio-line-names = "CAM_RST#", "DSI_RESET",
+ "DSI_STBYB", "DSI_PWM_BL",
+ "DSI_L/R", "DSI_U/D",
+ "DSI_CTP_/RST", "CAM_TRIG";
+ /*
+ * reset shared between U37 and U48, to be
+ * supported once gpio-pca953x switches to
+ * reset framework.
+ *
+ * reset-gpios = <&tca6416_u21 4
+ * (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+ */
+ gpio-controller;
+ };
+ };
+
+ /* channel 3 routed to lvds connector (J24) */
+ i2c_lvds: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tca6408_u37: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-line-names = "SELB", "LVDS_RESET",
+ "LVDS_STBYB", "LVDS_PWM_BL",
+ "LVDS_L/R", "LVDS_U/D",
+ "LVDS_CTP_/RST", "";
+ /*
+ * reset shared between U37 and U48, to be
+ * supported once gpio-pca953x switches to
+ * reset framework.
+ *
+ * reset-gpios = <&tca6416_u21 4
+ * (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+ */
+ gpio-controller;
+ };
+ };
+ };
+};
+
+&ohci0 {
+ dr_mode = "host";
+};
+
+&phy0 {
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* LED_0 pin */
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "keep";
+ function = LED_FUNCTION_LAN;
+ };
+ };
+};
+
+&pinctrl {
+ /* UARTA */
+ scif1_pins: scif1 {
+ pinmux = <RZG2L_PORT_PINMUX(40, 1, 1)>, /* SCIF1_RXD */
+ <RZG2L_PORT_PINMUX(40, 0, 1)>; /* SCIF1_TXD */
+ };
+
+ /* UARTB */
+ scif3_pins: scif3 {
+ pinmux = <RZG2L_PORT_PINMUX(0, 1, 5)>, /* SCIF3_RXD */
+ <RZG2L_PORT_PINMUX(0, 0, 5)>; /* SCIF3_TXD */
+ };
+};
+
+&scif1 {
+ pinctrl-0 = <&scif1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&scif3 {
+ pinctrl-0 = <&scif3_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&spi1 {
+ /* native cs does not support cs persistence required for tpm */
+ cs-gpios = <&pinctrl RZG2L_GPIO(44, 3) GPIO_ACTIVE_LOW>;
+ num-cs = <1>;
+ pinctrl-0 = <&spi1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ spi1_muxed: spi@0 {
+ compatible = "spi-mux";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mux-controls = <&spi_mux>;
+ /* mux bandwidth is 2GHz, soc max. spi clock is P0/2 = 50MHz */
+ spi-max-frequency = <50000000>;
+
+ tpm@0 {
+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+ reg = <0>;
+ interrupts-extended = <&tca6416_u21 9 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&tca6416_u21 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+ spi-max-frequency = <43000000>;
+ };
+ };
+};
+
+&usb2_phy0 {
+ vbus-supply = <&vbus1>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-microsd.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-microsd.dtso
new file mode 100644
index 0000000000000..0f92a9d2ccd98
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-microsd.dtso
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Overlay for the RZ/G2L(C) Solidrun SOM SD
+ *
+ * Copyright (C) 2024 SolidRun Ltd.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&sdhi0 {
+ bus-width = <4>;
+ full-pwr-cycle;
+ mux-states = <&sdhi0_mux 1>;
+ pinctrl-0 = <&sdhi0_4bit_pins>, <&sdhi0_cd_pins>;
+ pinctrl-1 = <&sdhi0_4bit_uhs_pins>, <&sdhi0_cd_pins>;
+ pinctrl-names = "default", "state_uhs";
+ sd-uhs-sdr104;
+ sd-uhs-sdr50;
+ vmmc-supply = <&vmmc>;
+ vqmmc-supply = <®_pmic_ldo1>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-a.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-a.dtso
new file mode 100644
index 0000000000000..4bcb22d518f05
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-a.dtso
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ *
+ * Overlay for enabling HummingBoard IIoT on-board RS485 Port A on connector J5004.
+ *
+ * Because Renesas uart driver does not support rs485,
+ * users must manually toggle P41_1 between RX & TX.
+ */
+
+/dts-v1/;
+/plugin/;
+
+&scif1_rs_232_485_mux {
+ /* select rs485 */
+ idle-state = <1>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-b.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-b.dtso
new file mode 100644
index 0000000000000..6f460b3e0b256
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-b.dtso
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ *
+ * Overlay for enabling HummingBoard IIoT on-board RS485 Port B on connector J5004.
+ *
+ * Because Renesas uart driver does not support rs485,
+ * users must manually toggle P41_0 between RX & TX.
+ */
+
+/dts-v1/;
+/plugin/;
+
+&scif3_rs_232_485_mux {
+ /* select rs485 */
+ idle-state = <1>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi
new file mode 100644
index 0000000000000..22f066079e69a
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+#include "rzg2l-hummingboard-iiot-common.dtsi"
+
+&canfd {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can0_pins>, <&can1_pins>;
+ status = "okay";
+
+ channel0 {
+ status = "okay";
+ };
+
+ channel1 {
+ status = "okay";
+ };
+};
+
+&phy1 {
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* LED_0 pin */
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+};
+
+&pinctrl {
+ /* CANA */
+ can0_pins: can0 {
+ pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* CAN0_TX */
+ <RZG2L_PORT_PINMUX(11, 0, 2)>; /* CAN0_RX */
+ };
+
+ /* CANB */
+ can1_pins: can1 {
+ pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* CAN1_TX */
+ <RZG2L_PORT_PINMUX(13, 0, 2)>; /* CAN1_RX */
+ };
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso b/arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso
new file mode 100644
index 0000000000000..92e3406be7dfc
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Overlay for the RZ/G2L(C) Solidrun SOM eMMC
+ *
+ * Copyright (C) 2024 SolidRun Ltd.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+®_pmic_ldo1 {
+ /*
+ * This ldo can switch mmc host controller io voltage between
+ * 1.8V and 3.3V. The eMMC IO voltage however is supplied from
+ * reg_pmic_buck3 which is fixed at 1.8V.
+ * Lower this ldo maximum voltage to 1.8V to prevent setting 3.3V.
+ */
+ regulator-max-microvolt = <1800000>;
+};
+
+&sdhi0 {
+ /*
+ * Host controller and eMMC have separate io voltage regulators:
+ * reg_pmic_ldo1 (1.8V/3.3V); reg_pmic_buck3 (1.8V only).
+ * Link to the switchable regulator ensuring that it gets configured.
+ */
+ vqmmc-supply = <®_pmic_ldo1>;
+ bus-width = <8>;
+ cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
+ mux-states = <&sdhi0_mux 0>;
+ non-removable;
+ no-sdio;
+ pinctrl-0 = <&sdhi0_8bit_uhs_pins>, <&sdhi0_rst_pins>;
+ pinctrl-1 = <&sdhi0_8bit_uhs_pins>, <&sdhi0_rst_pins>;
+ pinctrl-names = "default", "state_uhs";
+ vmmc-supply = <®_pmic_buck4>;
+ /* emmc io voltage is hard-wired for 1.8V, disable sd modes */
+ no-sd;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi
new file mode 100644
index 0000000000000..810feeef832ef
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi
@@ -0,0 +1,480 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2L Solidrun SoM
+ *
+ * Copyright 2023 SolidRun Ltd.
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+/ {
+ aliases {
+ ethernet0 = ð0;
+ ethernet1 = ð1;
+ gpio0 = &pinctrl;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c3;
+ mmc0 = &sdhi0;
+ mmc1 = &sdhi1;
+ rtc0 = &pmic;
+ serial0 = &scif0;
+ serial1 = &scif1;
+ serial2 = &scif2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ /*
+ * Physical RAM starts at 0x40000000, but Renesas RZ/G2 BSPs
+ * reserve and hide the first 128MB for TrustZone by default.
+ *
+ * Minimum size for this SoM is 1GB, and the bootloader patches
+ * the dtb according to the actual RAM size and reservations.
+ */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ device_type = "memory";
+ };
+
+ sdhi0_mux: mux-controller-0 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ #mux-state-cells = <1>;
+ /*
+ * Mux switches SD0_DATA[0-3], SD0_CMD & SD0_CLK between
+ * on-SoM eMMC and board-to-board connector using one gpio:
+ * Low = connector, High = eMMC.
+ * Define active-low for logical mux state 0 = eMMC, 1 = connector.
+ */
+ mux-gpios = <&pinctrl RZG2L_GPIO(22, 1) GPIO_ACTIVE_LOW>;
+ };
+
+ reg_pmic_buck1: regulator-pmic-buck1 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ };
+
+ reg_pmic_buck3: regulator-pmic-buck3 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ };
+
+ reg_pmic_buck4: regulator-pmic-buck4 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck4";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ };
+
+ reg_pmic_ldo1: regulator-pmic-ldo1 {
+ compatible = "regulator-gpio";
+ regulator-name = "pmic-ldo1";
+ gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ states = <3300000 1>, <1800000 0>;
+ };
+
+ reg_pmic_ldo2: regulator-pmic-ldo2 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-ldo2";
+ /*
+ * This ldo can switch mmc host controller io voltage between
+ * 1.8V and 3.3V by assembly option of pull-up / pull-dow.
+ * Default assembly is 3.3V.
+ */
+ regulator-min-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reserved-memory {
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ global_cma: linux,cma@58000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x58000000 0x0 0x10000000>;
+ reusable;
+ linux,cma-default;
+ };
+
+ mmp_reserved: linux,multimedia@68000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x68000000 0x0 0x8000000>;
+ reusable;
+ };
+ };
+
+ sdhi1_pwrseq: sdhi1-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pinctrl RZG2L_GPIO(23, 1) GPIO_ACTIVE_LOW>;
+ };
+
+ /* 32.768kHz crystal */
+ x2: x2-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+ð0 {
+ phy-handle = <&phy0>;
+ pinctrl-0 = <ð0_pins>;
+ pinctrl-names = "default";
+ /*
+ * ravb driver does not configure mac internal delays for RZ/G2L(C),
+ * instead delays are added by the MxL86110 phy driver.
+ */
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ /* Level interrupts are typical for phy but not supported on rz/g2l gpios. */
+ interrupts-extended = <&pinctrl RZG2L_GPIO(27, 0) IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+ð1 {
+ phy-handle = <&phy1>;
+ pinctrl-0 = <ð1_pins>;
+ pinctrl-names = "default";
+ /*
+ * ravb driver does not configure mac internal delays for RZ/G2L(C),
+ * instead delays are added by the MxL86110 phy driver.
+ */
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ phy1: ethernet-phy@4 {
+ reg = <4>;
+ /* Level interrupts are typical for phy but not supported on rz/g2l gpios. */
+ interrupts-extended = <&pinctrl RZG2L_GPIO(42, 4) IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <24000000>;
+};
+
+&gpu {
+ mali-supply = <®_pmic_buck1>;
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c01";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&i2c3 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ pmic: pmic@12 {
+ compatible = "renesas,raa215300";
+ reg = <0x12>, <0x6f>;
+ reg-names = "main", "rtc";
+ clocks = <&x2>;
+ clock-names = "xin";
+ };
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ostm1 {
+ status = "okay";
+};
+
+&ostm2 {
+ status = "okay";
+};
+
+&phyrst {
+ status = "okay";
+};
+
+&pinctrl {
+ eth0_pins: eth0 {
+ pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
+ <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
+ <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
+ <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
+ <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
+ <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
+ <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
+ <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
+ <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
+ <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */
+ <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */
+ <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
+ <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
+ <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
+ <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
+ };
+
+ eth1_pins: eth1 {
+ pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */
+ <RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */
+ <RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */
+ <RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */
+ <RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */
+ <RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */
+ <RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */
+ <RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */
+ <RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */
+ <RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */
+ <RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */
+ <RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */
+ <RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */
+ <RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */
+ <RZG2L_PORT_PINMUX(36, 0, 1)>; /* ET1_RXD3 */
+ };
+
+ i2c0_pins: i2c0 {
+ input-enable;
+ pins = "RIIC0_SDA", "RIIC0_SCL";
+ };
+
+ i2c1_pins: i2c1 {
+ input-enable;
+ pins = "RIIC1_SDA", "RIIC1_SCL";
+ };
+
+ i2c3_pins: i2c3 {
+ pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* RIIC3_SDA */
+ <RZG2L_PORT_PINMUX(18, 1, 3)>; /* RIIC3_SCL */
+ };
+
+ qspi0_pins: qspi0 {
+ pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3",
+ "QSPI0_SPCLK", "QSPI0_SSL";
+ power-source = <1800>;
+ };
+
+ scif0_pins: scif0 {
+ pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* SCIF0_TXD */
+ <RZG2L_PORT_PINMUX(38, 1, 1)>; /* SCIF0_RXD */
+ };
+
+ scif2_pins: scif2 {
+ pinmux = <RZG2L_PORT_PINMUX(48, 0, 1)>, /* SCIF2_TXD */
+ <RZG2L_PORT_PINMUX(48, 1, 1)>, /* SCIF2_RXD */
+ <RZG2L_PORT_PINMUX(48, 3, 1)>, /* SCIF2_CTS# */
+ <RZG2L_PORT_PINMUX(48, 4, 1)>; /* SCIF2_RTS# */
+ };
+
+ sdhi0_4bit_pins: sdhi0-4bit {
+ sd0_ctrl_dat03 {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_CLK", "SD0_CMD";
+ power-source = <3300>;
+ };
+
+ /*
+ * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage,
+ * with all pins sharing a single voltage domain.
+ *
+ * These pins are fixed-function lacking independently configurable
+ * pull-up, pull-down or output-disable.
+ *
+ * While unused, disable the input buffers to avoid sampling the still
+ * physically connected but unused eMMC lines.
+ * For output direction rely on correct controller bus-width configuration
+ * to avoid over-voltage to eMMC e.g. when operating at 3.3V for a 4-bit microSD.
+ */
+ sd0_dat47 {
+ input-disable;
+ pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_4bit_uhs_pins: sdhi0-4bit-uhs {
+ sd0_ctrl_dat03 {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ /*
+ * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage,
+ * with all pins sharing a single voltage domain.
+ *
+ * These pins are fixed-function, lacking configurable pull-up, pull-down or
+ * output-disable, while sharing the voltage domain with all SD0_* pins.
+ *
+ * While unused, disable the input buffers to avoid sampling the still
+ * physically connected but unused eMMC lines.
+ * For output direction rely on correct controller bus-width configuration
+ * to avoid over-voltage to eMMC e.g. when operating at 3.3V for a 4-bit microSD.
+ */
+ sd0_dat47 {
+ input-disable;
+ pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_8bit_uhs_pins: sdhi0-8bit-uhs {
+ sd0_ctrl {
+ pins = "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ sd0_dat {
+ input-enable;
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_cd_pins: sdhi0-cd {
+ pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
+ };
+
+ /* SD0_RST is only routed to eMMC which uses fixed 1.8V IO voltage */
+ sdhi0_rst_pins: sdhi0-rst {
+ pins = "SD0_RST#";
+ power-source = <1800>;
+ };
+
+ sdhi1_pins: sdhi1 {
+ pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3",
+ "SD1_CLK", "SD1_CMD";
+ power-source = <3300>;
+ };
+
+ spi1_pins: spi1 {
+ pinmux = <RZG2L_PORT_PINMUX(44, 2, 1)>, /* RSPI1_MISO */
+ <RZG2L_PORT_PINMUX(44, 1, 1)>, /* RSPI1_MOSI */
+ <RZG2L_PORT_PINMUX(44, 0, 1)>; /* RSPI1_CK */
+ };
+
+ spi1_cs_pins: spi1-cs {
+ pinmux = <RZG2L_PORT_PINMUX(44, 3, 1)>; /* RSPI1_SSL */
+ };
+};
+
+&sbc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "winbond,w25q80bl", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ };
+};
+
+&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ /*
+ * The BT is based on BCM4345C0. Murata 1MW variant seems to
+ * require driving RTS on open.
+ * Use compatible bcm43438 to accomplish this.
+ */
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <115200>;
+ shutdown-gpios = <&pinctrl RZG2L_GPIO(23, 0) GPIO_ACTIVE_HIGH>;
+ vbat-supply = <®_pmic_buck4>;
+ vddio-supply = <®_pmic_buck4>;
+ };
+};
+
+/* WiFi */
+&sdhi1 {
+ /* Murata 1MW max rate is 50MHz */
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ cap-sdio-irq;
+ mmc-pwrseq = <&sdhi1_pwrseq>;
+ non-removable;
+ no-1-8-v;
+ no-sd;
+ pinctrl-0 = <&sdhi1_pins>;
+ pinctrl-names = "default";
+ vmmc-supply = <®_pmic_buck4>;
+ /*
+ * Host controller IO voltage is provided from reg_pmic_ldo2,
+ * WiFi module IO voltage from reg_pmic_buck4.
+ * Neither is configurable at run-time so either can be set here.
+ */
+ vqmmc-supply = <®_pmic_ldo2>;
+ status = "okay";
+};
+
+&usb2_phy0 {
+ vbus-supply = <&usb0_vbus_otg>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ status = "okay";
+};
+
+&wdt0 {
+ status = "okay";
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb
2026-09-04 11:56 ` [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb Josua Mayer
@ 2026-09-23 14:37 ` Geert Uytterhoeven
2026-09-28 14:10 ` Josua Mayer
0 siblings, 1 reply; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 14:37 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
Hi Josua,
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add support for the SolidRun RZ/G2L SoM [1] on HummingBoard IIoT [2].
>
> The SoM features:
> - 2x 1Gbps Ethernet with PHY
> - eMMC
> - 1/2GB DDR
> - WiFi + Bluetooth
> - SDHI Mux switching between eMMC and Carrier Board
>
> The HummingBoard IIoT features:
> - 3x USB-2.0 Type A connector
> - 2x 1Gbps RJ45 Ethernet
> - USB Type-C Console Port
> - microSD connector
> - RTC with backup battery
> - RGB Status LED
> - 1x M.2 B-Key connector with USB-2.0 + SIM card holder
> - 1x DSI Display Connector
> - GPIO header
> - 2x RS232/RS485 ports (configurable)
> - 2x CAN
>
> Descriptions for eMMC, microSD and RS485 are provided as overlays due to
> their dependency on configurable mux states.
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi
> + aliases {
> + gpio1 = &tca6408_u48;
> + gpio2 = &tca6408_u37;
> + gpio3 = &tca6416_u20;
> + gpio4 = &tca6416_u21;
The TCA64xx driver does not seem to support gpio aliases, so please
drop these.
> + i2c3 = &i2c_exp;
> + i2c4 = &i2c_csi;
> + i2c5 = &i2c_dsi;
> + i2c6 = &i2c_lvds;
> + rtc0 = &carrier_rtc;
> + rtc1 = &pmic;
> + serial3 = &scif3;
> + };
> + v_1_2: regulator-1-2 {
Preferred node name is "regulator-1v2"...
> + compatible = "regulator-fixed";
> + regulator-name = "1v2";
> + regulator-max-microvolt = <1200000>;
> + regulator-min-microvolt = <1200000>;
> + };
> +
> + v_3_3: regulator-3-3 {
... "regulator-3v3".
> + compatible = "regulator-fixed";
> + regulator-name = "3v3";
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + };
> +&i2c0 {
> + /* highest i2c clock supported by all peripherals is 400kHz */
We have a DT propery for that ;-)
clock-frequency = <400000>;
Same for i2c1.
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi
> @@ -0,0 +1,480 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +/*
> + * Device Tree Source for the RZ/G2L Solidrun SoM
> + *
> + * Copyright 2023 SolidRun Ltd.
> + * Copyright 2025 Josua Mayer <josua@solid-run.com>
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> +
> +/ {
> + aliases {
> + ethernet0 = ð0;
> + ethernet1 = ð1;
> + gpio0 = &pinctrl;
The pin control driver does not support gpio aliases, so please
drop this.
> + i2c0 = &i2c0;
> + i2c1 = &i2c1;
> + i2c2 = &i2c3;
> + mmc0 = &sdhi0;
> + mmc1 = &sdhi1;
> + rtc0 = &pmic;
> + serial0 = &scif0;
> + serial1 = &scif1;
> + serial2 = &scif2;
> + };
I didn't compare with the board schematics, but the rest LGTM.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb
2026-09-23 14:37 ` Geert Uytterhoeven
@ 2026-09-28 14:10 ` Josua Mayer
2026-09-28 14:31 ` Geert Uytterhoeven
0 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-28 14:10 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-gpio@vger.kernel.org
Hi Geert,
Am 23.09.26 um 16:37 schrieb Geert Uytterhoeven:
> On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
>> Add support for the SolidRun RZ/G2L SoM [1] on HummingBoard IIoT [2].
>>
>> The SoM features:
>> - 2x 1Gbps Ethernet with PHY
>> - eMMC
>> - 1/2GB DDR
>> - WiFi + Bluetooth
>> - SDHI Mux switching between eMMC and Carrier Board
>>
>> The HummingBoard IIoT features:
>> - 3x USB-2.0 Type A connector
>> - 2x 1Gbps RJ45 Ethernet
>> - USB Type-C Console Port
>> - microSD connector
>> - RTC with backup battery
>> - RGB Status LED
>> - 1x M.2 B-Key connector with USB-2.0 + SIM card holder
>> - 1x DSI Display Connector
>> - GPIO header
>> - 2x RS232/RS485 ports (configurable)
>> - 2x CAN
>>
>> Descriptions for eMMC, microSD and RS485 are provided as overlays due to
>> their dependency on configurable mux states.
>>
>> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
>> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
>>
>> Signed-off-by: Josua Mayer <josua@solid-run.com>
> Thanks for your patch!
>
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi
>> + aliases {
>> + gpio1 = &tca6408_u48;
>> + gpio2 = &tca6408_u37;
>> + gpio3 = &tca6416_u20;
>> + gpio4 = &tca6416_u21;
> The TCA64xx driver does not seem to support gpio aliases,
I have confirmed this now. My expectation was that setting gpio aliases
helps make /dev/gpiochip numbering predictable, however this does
not currently work.
> so please
> drop these.
Is this a good reason to drop the aliases, or better to define them
regardless?
>
>> + i2c3 = &i2c_exp;
>> + i2c4 = &i2c_csi;
>> + i2c5 = &i2c_dsi;
>> + i2c6 = &i2c_lvds;
>> + rtc0 = &carrier_rtc;
>> + rtc1 = &pmic;
>> + serial3 = &scif3;
>> + };
>> + v_1_2: regulator-1-2 {
> Preferred node name is "regulator-1v2"...
Ack, will change with v9, same for rzg2l-hummingboard-pulse-common.dtsi.
>
>> + compatible = "regulator-fixed";
>> + regulator-name = "1v2";
>> + regulator-max-microvolt = <1200000>;
>> + regulator-min-microvolt = <1200000>;
>> + };
>> +
>> + v_3_3: regulator-3-3 {
> ... "regulator-3v3".
Ack, will change with v9.
>
>> + compatible = "regulator-fixed";
>> + regulator-name = "3v3";
>> + regulator-max-microvolt = <3300000>;
>> + regulator-min-microvolt = <3300000>;
>> + };
>> +&i2c0 {
>> + /* highest i2c clock supported by all peripherals is 400kHz */
> We have a DT propery for that ;-)
>
> clock-frequency = <400000>;
>
> Same for i2c1.
Indeed:
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-&i2c0 {
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi:clock-frequency = <400000>;
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-pinctrl-0 = <&i2c0_pins>;
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-&i2c1 {
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi:clock-frequency = <400000>;
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-pinctrl-0 = <&i2c1_pins>;
The bus is described in SoM dtsi, where G2LC has an eeprom on i2c0, and
G2L has one on i2c1.
The carrier dtsi then extends each bus with additional devices.
I found it worth restating the conclusive rate in carrier as a comment.
So I will keep clock-frequency in the som dtsi.
>
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi
>> @@ -0,0 +1,480 @@
>> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +/*
>> + * Device Tree Source for the RZ/G2L Solidrun SoM
>> + *
>> + * Copyright 2023 SolidRun Ltd.
>> + * Copyright 2025 Josua Mayer <josua@solid-run.com>
>> + */
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
>> +
>> +/ {
>> + aliases {
>> + ethernet0 = ð0;
>> + ethernet1 = ð1;
>> + gpio0 = &pinctrl;
> The pin control driver does not support gpio aliases, so please
> drop this.
>
>> + i2c0 = &i2c0;
>> + i2c1 = &i2c1;
>> + i2c2 = &i2c3;
>> + mmc0 = &sdhi0;
>> + mmc1 = &sdhi1;
>> + rtc0 = &pmic;
>> + serial0 = &scif0;
>> + serial1 = &scif1;
>> + serial2 = &scif2;
>> + };
> I didn't compare with the board schematics, but the rest LGTM.
Thanks!
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb
2026-09-28 14:10 ` Josua Mayer
@ 2026-09-28 14:31 ` Geert Uytterhoeven
2026-09-28 14:39 ` Josua Mayer
0 siblings, 1 reply; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-28 14:31 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-gpio@vger.kernel.org
Hi Josua,
On Mon, 28 Sept 2026 at 16:11, Josua Mayer <josua@solid-run.com> wrote:
> Am 23.09.26 um 16:37 schrieb Geert Uytterhoeven:
> > On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> >> Add support for the SolidRun RZ/G2L SoM [1] on HummingBoard IIoT [2].
> >>
> >> The SoM features:
> >> - 2x 1Gbps Ethernet with PHY
> >> - eMMC
> >> - 1/2GB DDR
> >> - WiFi + Bluetooth
> >> - SDHI Mux switching between eMMC and Carrier Board
> >>
> >> The HummingBoard IIoT features:
> >> - 3x USB-2.0 Type A connector
> >> - 2x 1Gbps RJ45 Ethernet
> >> - USB Type-C Console Port
> >> - microSD connector
> >> - RTC with backup battery
> >> - RGB Status LED
> >> - 1x M.2 B-Key connector with USB-2.0 + SIM card holder
> >> - 1x DSI Display Connector
> >> - GPIO header
> >> - 2x RS232/RS485 ports (configurable)
> >> - 2x CAN
> >>
> >> Descriptions for eMMC, microSD and RS485 are provided as overlays due to
> >> their dependency on configurable mux states.
> >>
> >> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
> >> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
> >>
> >> Signed-off-by: Josua Mayer <josua@solid-run.com>
> > Thanks for your patch!
> >
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi
> >> + aliases {
> >> + gpio1 = &tca6408_u48;
> >> + gpio2 = &tca6408_u37;
> >> + gpio3 = &tca6416_u20;
> >> + gpio4 = &tca6416_u21;
> > The TCA64xx driver does not seem to support gpio aliases,
> I have confirmed this now. My expectation was that setting gpio aliases
> helps make /dev/gpiochip numbering predictable, however this does
> not currently work.
> > so please
> > drop these.
> Is this a good reason to drop the aliases, or better to define them
> regardless?
Yes please. Aliases are meant to identify labeled (numbered) connectors
on a device, e.g. first serial port is serial0.
A GPIO expander usually doesn't have such a connector, and the various
GPIOs are typically routed to a variety of places.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb
2026-09-28 14:31 ` Geert Uytterhoeven
@ 2026-09-28 14:39 ` Josua Mayer
0 siblings, 0 replies; 30+ messages in thread
From: Josua Mayer @ 2026-09-28 14:39 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-gpio@vger.kernel.org
Am 28.09.26 um 16:31 schrieb Geert Uytterhoeven:
> Hi Josua,
>
> On Mon, 28 Sept 2026 at 16:11, Josua Mayer <josua@solid-run.com> wrote:
>> Am 23.09.26 um 16:37 schrieb Geert Uytterhoeven:
>>> On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
>>>> Add support for the SolidRun RZ/G2L SoM [1] on HummingBoard IIoT [2].
>>>>
>>>> The SoM features:
>>>> - 2x 1Gbps Ethernet with PHY
>>>> - eMMC
>>>> - 1/2GB DDR
>>>> - WiFi + Bluetooth
>>>> - SDHI Mux switching between eMMC and Carrier Board
>>>>
>>>> The HummingBoard IIoT features:
>>>> - 3x USB-2.0 Type A connector
>>>> - 2x 1Gbps RJ45 Ethernet
>>>> - USB Type-C Console Port
>>>> - microSD connector
>>>> - RTC with backup battery
>>>> - RGB Status LED
>>>> - 1x M.2 B-Key connector with USB-2.0 + SIM card holder
>>>> - 1x DSI Display Connector
>>>> - GPIO header
>>>> - 2x RS232/RS485 ports (configurable)
>>>> - 2x CAN
>>>>
>>>> Descriptions for eMMC, microSD and RS485 are provided as overlays due to
>>>> their dependency on configurable mux states.
>>>>
>>>> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
>>>> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
>>>>
>>>> Signed-off-by: Josua Mayer <josua@solid-run.com>
>>> Thanks for your patch!
>>>
>>>> --- /dev/null
>>>> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi
>>>> + aliases {
>>>> + gpio1 = &tca6408_u48;
>>>> + gpio2 = &tca6408_u37;
>>>> + gpio3 = &tca6416_u20;
>>>> + gpio4 = &tca6416_u21;
>>> The TCA64xx driver does not seem to support gpio aliases,
>> I have confirmed this now. My expectation was that setting gpio aliases
>> helps make /dev/gpiochip numbering predictable, however this does
>> not currently work.
>>> so please
>>> drop these.
>> Is this a good reason to drop the aliases, or better to define them
>> regardless?
> Yes please. Aliases are meant to identify labeled (numbered) connectors
> on a device, e.g. first serial port is serial0.
> A GPIO expander usually doesn't have such a connector, and the various
> GPIOs are typically routed to a variety of places.
Acknowledged, thanks for clarification!
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 05/11] arm64: dts: renesas: add support for solidrun rzv2l som and hb-iiot evb
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (3 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-23 14:46 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 06/11] arm64: dts: renesas: add support for solidrun rzg2lc " Josua Mayer
` (6 subsequent siblings)
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
Add support for the SolidRun RZ/V2L [1] SoM on HummingBoard IIoT [2].
The SoM features:
- 2x 1Gbps Ethernet with PHY
- eMMC
- 1/2GB DDR
- WiFi + Bluetooth
- SDHI Mux switching between eMMC and Carrier Board
The HummingBoard IIoT features:
- 3x USB-2.0 Type A connector
- 2x 1Gbps RJ45 Ethernet
- USB Type-C Console Port
- microSD connector
- RTC with backup battery
- RGB Status LED
- 1x M.2 B-Key connector with USB-2.0 + SIM card holder
- 1x DSI Display Connector
- GPIO header
- 2x RS232/RS485 ports (configurable)
- 2x CAN
The RZ/V2L SoM shares PCB with RZ/G2L, differing only in the SoC itself.
RZ/V2L is adding a powerful DRP-AI NPU which G2L lacks.
Due to the similarities most code is shared, including DT overlays for
eMMC, microSD, and RS485.
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 13 +++++++++++++
.../boot/dts/renesas/r9a07g054l2-hummingboard-iiot.dts | 16 ++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index e2af196e18bf6..4a0cde8cc3b7d 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -189,6 +189,19 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
r9a07g044l2-smarc-cru-csi-ov5645-dtbs := r9a07g044l2-smarc.dtb r9a07g044l2-smarc-cru-csi-ov5645.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-sr-som-emmc.dtbo
+r9a07g054l2-hummingboard-iiot-emmc-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-sr-som-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-emmc.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-hummingboard-iiot-microsd.dtbo
+r9a07g054l2-hummingboard-iiot-microsd-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-microsd.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-hummingboard-iiot-rs485-a.dtbo
+r9a07g054l2-hummingboard-iiot-rs485-a-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-a.dtbo
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-rs485-a.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-hummingboard-iiot-rs485-b.dtbo
+r9a07g054l2-hummingboard-iiot-rs485-b-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-rs485-b.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc-cru-csi-ov5645.dtbo
r9a07g054l2-smarc-cru-csi-ov5645-dtbs := r9a07g054l2-smarc.dtb r9a07g054l2-smarc-cru-csi-ov5645.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054l2-hummingboard-iiot.dts b/arch/arm64/boot/dts/renesas/r9a07g054l2-hummingboard-iiot.dts
new file mode 100644
index 0000000000000..d77a6ff163bea
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g054l2-hummingboard-iiot.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include "r9a07g054l2.dtsi"
+#include "rzg2l-sr-som.dtsi"
+#include "rzg2l-hummingboard-iiot.dtsi"
+
+/ {
+ compatible = "solidrun,rzv2l-hummingboard-iiot", "solidrun,rzv2l-sr-som",
+ "renesas,r9a07g054l2", "renesas,r9a07g054";
+ model = "SolidRun RZ/V2L HummingBoard IIoT";
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 05/11] arm64: dts: renesas: add support for solidrun rzv2l som and hb-iiot evb
2026-09-04 11:56 ` [PATCH v8 05/11] arm64: dts: renesas: add support for solidrun rzv2l " Josua Mayer
@ 2026-09-23 14:46 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 14:46 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add support for the SolidRun RZ/V2L [1] SoM on HummingBoard IIoT [2].
>
> The SoM features:
> - 2x 1Gbps Ethernet with PHY
> - eMMC
> - 1/2GB DDR
> - WiFi + Bluetooth
> - SDHI Mux switching between eMMC and Carrier Board
>
> The HummingBoard IIoT features:
> - 3x USB-2.0 Type A connector
> - 2x 1Gbps RJ45 Ethernet
> - USB Type-C Console Port
> - microSD connector
> - RTC with backup battery
> - RGB Status LED
> - 1x M.2 B-Key connector with USB-2.0 + SIM card holder
> - 1x DSI Display Connector
> - GPIO header
> - 2x RS232/RS485 ports (configurable)
> - 2x CAN
>
> The RZ/V2L SoM shares PCB with RZ/G2L, differing only in the SoC itself.
> RZ/V2L is adding a powerful DRP-AI NPU which G2L lacks.
>
> Due to the similarities most code is shared, including DT overlays for
> eMMC, microSD, and RS485.
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 06/11] arm64: dts: renesas: add support for solidrun rzg2lc som and hb-iiot evb
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (4 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 05/11] arm64: dts: renesas: add support for solidrun rzv2l " Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-23 14:51 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 07/11] arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay Josua Mayer
` (5 subsequent siblings)
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
Add support for the SolidRun RZ/G2LC SoM [1] on HummingBoard IIoT [2].
The SoM features:
- 100Mbps Ethernet with PHY
- eMMC
- 1/2GB DDR
- WiFi + Bluetooth
- SDHI Mux switching between eMMC and Carrier Board
The HummingBoard IIoT features:
- 3x USB-2.0 Type A connector
- 1x 100Mbps RJ45 Ethernet
- USB Type-C Console Port
- microSD connector
- RTC with backup battery
- RGB Status LED
- 1x M.2 B-Key connector with USB-2.0 + SIM card holder
- 1x DSI Display Connector
- GPIO header
- 2x RS232/RS485 ports (configurable)
The RZ/G2LC SoM was designed to be pin compatible to G2L SoM, with
slightly reduced feature set.
Descriptions for eMMC, microSD, and RS485 are shared with G2L.
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 9 +
.../dts/renesas/r9a07g044c2-hummingboard-iiot.dts | 20 +
arch/arm64/boot/dts/renesas/rzg2lc-sr-som.dtsi | 442 +++++++++++++++++++++
3 files changed, 471 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 4a0cde8cc3b7d..69b1f75156016 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -165,6 +165,15 @@ dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc-du-adv7513.dtb
r9a07g043u11-smarc-pmod-dtbs := r9a07g043u11-smarc.dtb r9a07g043-smarc-pmod.dtbo
dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc-pmod.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot.dtb
+r9a07g044c2-hummingboard-iiot-emmc-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-sr-som-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-emmc.dtb
+r9a07g044c2-hummingboard-iiot-microsd-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-microsd.dtb
+r9a07g044c2-hummingboard-iiot-rs485-a-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-a.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-rs485-a.dtb
+r9a07g044c2-hummingboard-iiot-rs485-b-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-rs485-b.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtbo
r9a07g044c2-smarc-cru-csi-ov5645-dtbs := r9a07g044c2-smarc.dtb r9a07g044c2-smarc-cru-csi-ov5645.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044c2-hummingboard-iiot.dts b/arch/arm64/boot/dts/renesas/r9a07g044c2-hummingboard-iiot.dts
new file mode 100644
index 0000000000000..9cc21ae32ed4d
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g044c2-hummingboard-iiot.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include "r9a07g044c2.dtsi"
+#include "rzg2lc-sr-som.dtsi"
+#include "rzg2l-hummingboard-iiot-common.dtsi"
+
+/ {
+ compatible = "solidrun,rzg2lc-hummingboard-iiot", "solidrun,rzg2lc-sr-som",
+ "renesas,r9a07g044c2", "renesas,r9a07g044";
+ model = "SolidRun RZ/G2LC HummingBoard IIoT";
+};
+
+&vmmc {
+ gpios = <&pinctrl RZG2L_GPIO(18, 1) GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-sr-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-sr-som.dtsi
new file mode 100644
index 0000000000000..18dfdeeb1d663
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-sr-som.dtsi
@@ -0,0 +1,442 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2LC Solidrun SOM
+ *
+ * Copyright 2023 SolidRun Ltd.
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+/ {
+ aliases {
+ ethernet0 = ð0;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ mmc0 = &sdhi0;
+ mmc1 = &sdhi1;
+ rtc0 = &pmic;
+ serial0 = &scif0;
+ serial1 = &scif1;
+ serial2 = &scif2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ /*
+ * Physical RAM starts at 0x40000000, but Renesas RZ/G2 BSPs
+ * reserve and hide the first 128MB for TrustZone by default.
+ *
+ * Minimum size for this SoM is 1GB, and the bootloader patches
+ * the dtb according to the actual RAM size and reservations.
+ */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ device_type = "memory";
+ };
+
+ sdhi0_mux: mux-controller-0 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ #mux-state-cells = <1>;
+ /*
+ * Mux switches SD0_DATA[0-3], SD0_CMD & SD0_CLK between
+ * on-SoM eMMC and board-to-board connector using one gpio:
+ * High = connector, Low = eMMC.
+ * Define active-high for logical mux state 0 = eMMC, 1 = connector.
+ */
+ mux-gpios = <&pinctrl RZG2L_GPIO(22, 1) GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_pmic_buck1: regulator-pmic-buck1 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ };
+
+ reg_pmic_buck3: regulator-pmic-buck3 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ };
+
+ reg_pmic_buck4: regulator-pmic-buck4 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck4";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ };
+
+ reg_pmic_ldo1: regulator-pmic-ldo1 {
+ compatible = "regulator-gpio";
+ regulator-name = "pmic-ldo1";
+ gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ states = <3300000 1>, <1800000 0>;
+ };
+
+ reg_pmic_ldo2: regulator-pmic-ldo2 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-ldo2";
+ /*
+ * This ldo can switch mmc host controller io voltage between
+ * 1.8V and 3.3V by assembly option of pull-up / pull-dow.
+ * Default assembly is 3.3V.
+ */
+ regulator-min-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reserved-memory {
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ global_cma: linux,cma@58000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x58000000 0x0 0x10000000>;
+ reusable;
+ linux,cma-default;
+ };
+
+ mmp_reserved: linux,multimedia@68000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x68000000 0x0 0x8000000>;
+ reusable;
+ };
+ };
+
+ sdhi1_pwrseq: sdhi1-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pinctrl RZG2L_GPIO(23, 0) GPIO_ACTIVE_LOW>;
+ };
+
+ /* 32.768kHz crystal */
+ x2: x2-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+ð0 {
+ phy-handle = <&phy0>;
+ pinctrl-0 = <ð0_pins>;
+ pinctrl-names = "default";
+ /*
+ * ravb driver does not configure mac internal delays for RZ/G2L(C),
+ * instead delays are added by the ADIN1200 phy driver.
+ */
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ /* Level interrupts are typical for phy but not supported on rz/g2l gpios. */
+ interrupts-extended = <&pinctrl RZG2L_GPIO(27, 0) IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <24000000>;
+};
+
+&gpu {
+ mali-supply = <®_pmic_buck1>;
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c01";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ pmic: pmic@12 {
+ compatible = "renesas,raa215300";
+ reg = <0x12>, <0x6f>;
+ reg-names = "main", "rtc";
+ clocks = <&x2>;
+ clock-names = "xin";
+ };
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ostm1 {
+ status = "okay";
+};
+
+&ostm2 {
+ status = "okay";
+};
+
+&phyrst {
+ status = "okay";
+};
+
+&pinctrl {
+ eth0_pins: eth0 {
+ pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
+ <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
+ <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
+ <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
+ <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
+ <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
+ <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
+ <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
+ <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
+ <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */
+ <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */
+ <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
+ <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
+ <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
+ <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
+ };
+
+ i2c0_pins: i2c0 {
+ input-enable;
+ pins = "RIIC0_SDA", "RIIC0_SCL";
+ };
+
+ i2c1_pins: i2c1 {
+ input-enable;
+ pins = "RIIC1_SDA", "RIIC1_SCL";
+ };
+
+ i2c2_pins: i2c2 {
+ pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* RIIC2_SDA */
+ <RZG2L_PORT_PINMUX(42, 4, 1)>; /* RIIC2_SCL */
+ };
+
+ qspi0_pins: qspi0 {
+ pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3",
+ "QSPI0_SPCLK", "QSPI0_SSL";
+ power-source = <1800>;
+ };
+
+ scif0_pins: scif0 {
+ pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* SCIF0_TXD */
+ <RZG2L_PORT_PINMUX(38, 1, 1)>; /* SCIF0_RXD */
+ };
+
+ scif2_pins: scif2 {
+ pinmux = <RZG2L_PORT_PINMUX(42, 0, 4)>, /* SCIF2_TXD */
+ <RZG2L_PORT_PINMUX(42, 1, 4)>, /* SCIF2_RXD */
+ <RZG2L_PORT_PINMUX(5, 1, 2)>, /* SCIF2_CTS# */
+ <RZG2L_PORT_PINMUX(5, 2, 2)>; /* SCIF2_RTS# */
+ };
+
+ sdhi0_4bit_pins: sdhi0-4bit {
+ sd0_ctrl_dat03 {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_CLK", "SD0_CMD";
+ power-source = <3300>;
+ };
+
+ /*
+ * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage,
+ * with all pins sharing a single voltage domain.
+ *
+ * These pins are fixed-function lacking independently configurable
+ * pull-up, pull-down or output-disable.
+ *
+ * While unused, disable the input buffers to avoid sampling the still
+ * physically connected but unused eMMC lines.
+ * For output direction rely on correct controller bus-width configuration
+ * to avoid over-voltage to eMMC e.g. when operating at 3.3V for a 4-bit microSD.
+ */
+ sd0_dat47 {
+ input-disable;
+ pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_4bit_uhs_pins: sdhi0-4bit-uhs {
+ sd0_ctrl_dat03 {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ /*
+ * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage,
+ * with all pins sharing a single voltage domain.
+ *
+ * These pins are fixed-function, lacking configurable pull-up, pull-down or
+ * output-disable, while sharing the voltage domain with all SD0_* pins.
+ *
+ * While unused, disable the input buffers to avoid sampling the still
+ * physically connected but unused eMMC lines.
+ * For output direction rely on correct controller bus-width configuration
+ * to avoid over-voltage to eMMC e.g. when operating at 3.3V for a 4-bit microSD.
+ */
+ sd0_dat47 {
+ input-disable;
+ pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_8bit_uhs_pins: sdhi0-8bit-uhs {
+ sd0_ctrl {
+ pins = "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ sd0_dat {
+ input-enable;
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_cd_pins: sdhi0-cd {
+ pinmux = <RZG2L_PORT_PINMUX(18, 0, 1)>; /* SD0_CD */
+ };
+
+ /* SD0_RST is only routed to eMMC which uses fixed 1.8V IO voltage */
+ sdhi0_rst_pins: sdhi0-rst {
+ pins = "SD0_RST#";
+ power-source = <1800>;
+ };
+
+ sdhi1_pins: sdhi1 {
+ pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3",
+ "SD1_CLK", "SD1_CMD";
+ power-source = <3300>;
+ };
+
+ spi1_pins: spi1 {
+ pinmux = <RZG2L_PORT_PINMUX(44, 2, 1)>, /* RSPI1_MISO */
+ <RZG2L_PORT_PINMUX(44, 1, 1)>, /* RSPI1_MOSI */
+ <RZG2L_PORT_PINMUX(44, 0, 1)>; /* RSPI1_CK */
+ };
+
+ spi1_cs_pins: spi1-cs {
+ pinmux = <RZG2L_PORT_PINMUX(44, 3, 1)>; /* RSPI1_SSL */
+ };
+};
+
+&sbc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "winbond,w25q80bl", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ };
+};
+
+&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ /*
+ * The BT is based on BCM4343A2. Murata 1YN variant seems to
+ * require driving RTS on open.
+ * Use compatible bcm43438 to accomplish this.
+ */
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <115200>;
+ shutdown-gpios = <&pinctrl RZG2L_GPIO(23, 1) GPIO_ACTIVE_HIGH>;
+ vbat-supply = <®_pmic_buck4>;
+ vddio-supply = <®_pmic_buck4>;
+ };
+};
+
+/* WiFi */
+&sdhi1 {
+ /* Murata 1YN max rate is 50MHz */
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ cap-sdio-irq;
+ mmc-pwrseq = <&sdhi1_pwrseq>;
+ non-removable;
+ no-1-8-v;
+ no-sd;
+ pinctrl-0 = <&sdhi1_pins>;
+ pinctrl-names = "default";
+ vmmc-supply = <®_pmic_buck4>;
+ /*
+ * Host controller IO voltage is provided from reg_pmic_ldo2,
+ * WiFi module IO voltage from reg_pmic_buck4.
+ * Neither is configurable at run-time so either can be set here.
+ */
+ vqmmc-supply = <®_pmic_ldo2>;
+ status = "okay";
+};
+
+&usb2_phy0 {
+ vbus-supply = <&usb0_vbus_otg>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ status = "okay";
+};
+
+&wdt0 {
+ status = "okay";
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 06/11] arm64: dts: renesas: add support for solidrun rzg2lc som and hb-iiot evb
2026-09-04 11:56 ` [PATCH v8 06/11] arm64: dts: renesas: add support for solidrun rzg2lc " Josua Mayer
@ 2026-09-23 14:51 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 14:51 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
Hi Josua,
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add support for the SolidRun RZ/G2LC SoM [1] on HummingBoard IIoT [2].
>
> The SoM features:
> - 100Mbps Ethernet with PHY
> - eMMC
> - 1/2GB DDR
> - WiFi + Bluetooth
> - SDHI Mux switching between eMMC and Carrier Board
>
> The HummingBoard IIoT features:
> - 3x USB-2.0 Type A connector
> - 1x 100Mbps RJ45 Ethernet
> - USB Type-C Console Port
> - microSD connector
> - RTC with backup battery
> - RGB Status LED
> - 1x M.2 B-Key connector with USB-2.0 + SIM card holder
> - 1x DSI Display Connector
> - GPIO header
> - 2x RS232/RS485 ports (configurable)
>
> The RZ/G2LC SoM was designed to be pin compatible to G2L SoM, with
> slightly reduced feature set.
>
> Descriptions for eMMC, microSD, and RS485 are shared with G2L.
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r9a07g044c2-hummingboard-iiot.dts
> +ð0 {
> + phy-handle = <&phy0>;
> + pinctrl-0 = <ð0_pins>;
> + pinctrl-names = "default";
> + /*
> + * ravb driver does not configure mac internal delays for RZ/G2L(C),
> + * instead delays are added by the ADIN1200 phy driver.
> + */
> + phy-mode = "rgmii-id";
> + status = "okay";
> +
> + phy0: ethernet-phy@0 {
> + reg = <0>;
> + /* Level interrupts are typical for phy but not supported on rz/g2l gpios. */
Nit: "RZ/G2L" (in all patches)
> + interrupts-extended = <&pinctrl RZG2L_GPIO(27, 0) IRQ_TYPE_EDGE_FALLING>;
> + };
> +};
I didn't compare with the board schematics, but the rest LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 07/11] arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (5 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 06/11] arm64: dts: renesas: add support for solidrun rzg2lc " Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-04 12:06 ` sashiko-bot
2026-09-23 14:56 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 08/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som Josua Mayer
` (4 subsequent siblings)
11 siblings, 2 replies; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
The SolidRun HummingBoard IIoT features a DSI connector supporting
touch-screen displays and is usable with RZ/G2L, RZ/G2LC and RZ/V2L
SoMs.
Provide addon for the Winstar WJ70N3TYJHMNG0 1024x600 dsi panel.
Add the addon in Makefile for all supported SoMs SoC targets.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 8 +++
...hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso | 79 ++++++++++++++++++++++
2 files changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 69b1f75156016..0bc2bbff9370f 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -170,6 +170,8 @@ r9a07g044c2-hummingboard-iiot-emmc-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-emmc.dtb
r9a07g044c2-hummingboard-iiot-microsd-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-microsd.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-microsd.dtb
+r9a07g044c2-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtb
r9a07g044c2-hummingboard-iiot-rs485-a-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-a.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-rs485-a.dtb
r9a07g044c2-hummingboard-iiot-rs485-b-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo
@@ -186,6 +188,9 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-emmc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-microsd.dtbo
r9a07g044l2-hummingboard-iiot-microsd-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-microsd.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-microsd.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtbo
+r9a07g044l2-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-rs485-a.dtbo
r9a07g044l2-hummingboard-iiot-rs485-a-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-a.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-rs485-a.dtb
@@ -205,6 +210,9 @@ dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-emmc.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-hummingboard-iiot-microsd.dtbo
r9a07g054l2-hummingboard-iiot-microsd-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-microsd.dtbo
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-microsd.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtbo
+r9a07g054l2-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtbo
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-hummingboard-iiot-rs485-a.dtbo
r9a07g054l2-hummingboard-iiot-rs485-a-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-a.dtbo
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-rs485-a.dtb
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso
new file mode 100644
index 0000000000000..f8584c473fafe
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ *
+ * Overlay for enabling HummingBoard IIoT MIPI-DSI connector
+ * with Winstar WJ70N3TYJHMNG0 panel.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&{/} {
+ dsi_backlight: dsi-backlight {
+ compatible = "gpio-backlight";
+ gpios = <&tca6408_u48 3 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&i2c_dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touchscreen@41 {
+ compatible = "ilitek,ili2130";
+ reg = <0x41>;
+ /*
+ * Touchscreen fires short active-low pulses which level trigger
+ * on i2c gpio expander can miss. Trigger on falling edge instead.
+ */
+ interrupts-extended = <&tca6416_u21 13 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&tca6408_u48 6 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ panel@0 {
+ /* This is a Winstar panel, but the ronbo panel uses same controls. */
+ compatible = "ronbo,rb070d30";
+ reg = <0>;
+ /* reset is active-low but driver inverts it internally */
+ reset-gpios = <&tca6408_u48 1 GPIO_ACTIVE_HIGH>;
+ backlight = <&dsi_backlight>;
+ power-gpios = <&tca6408_u48 2 GPIO_ACTIVE_HIGH>;
+ shlr-gpios = <&tca6408_u48 4 GPIO_ACTIVE_LOW>;
+ updn-gpios = <&tca6408_u48 5 GPIO_ACTIVE_HIGH>;
+ vcc-lcd-supply = <®_dsi_panel>;
+
+ port {
+ dsi_in_panel: endpoint {
+ remote-endpoint = <&mipi_dsi_out>;
+ };
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ mipi_dsi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&dsi_in_panel>;
+ };
+ };
+ };
+};
+
+&du {
+ status = "okay";
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 07/11] arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay
2026-09-04 11:56 ` [PATCH v8 07/11] arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay Josua Mayer
@ 2026-09-04 12:06 ` sashiko-bot
2026-09-23 14:56 ` Geert Uytterhoeven
1 sibling, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-04 12:06 UTC (permalink / raw)
To: Josua Mayer; +Cc: conor+dt, wsa+renesas, devicetree, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Device Tree overlay encodes a software workaround for a driver bug by specifying incorrect GPIO polarity.
--
commit 5ed903b02819c317254f3303f8a8204c435744da
Author: Josua Mayer <josua@solid-run.com>
arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay
This commit adds a Device Tree overlay for the Winstar WJ70N3TYJHMNG0 DSI
panel on SolidRun HummingBoard IIoT boards. It includes the new dtso file
and updates the Makefile for supported SoC targets.
> diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso
> new file mode 100644
> index 0000000000000..f8584c473fafe
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso
[ ... ]
> +&dsi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + panel@0 {
> + /* This is a Winstar panel, but the ronbo panel uses same controls. */
> + compatible = "ronbo,rb070d30";
> + reg = <0>;
> + /* reset is active-low but driver inverts it internally */
> + reset-gpios = <&tca6408_u48 1 GPIO_ACTIVE_HIGH>;
[Severity: Low]
Does this encode a software workaround directly into the hardware description?
Device trees are meant to describe the physical hardware. If the reset line
is physically active-low, shouldn't the device tree describe it as
GPIO_ACTIVE_LOW?
If the 'ronbo,rb070d30' panel driver incorrectly inverts this internally,
that appears to be a driver bug. Could this be fixed in the driver code
rather than compensated for with incorrect polarity in the bindings?
> + backlight = <&dsi_backlight>;
> + power-gpios = <&tca6408_u48 2 GPIO_ACTIVE_HIGH>;
> + shlr-gpios = <&tca6408_u48 4 GPIO_ACTIVE_LOW>;
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260904-rzg2-sr-boards-v8-0-94c4674927e8@solid-run.com?part=7
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v8 07/11] arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay
2026-09-04 11:56 ` [PATCH v8 07/11] arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay Josua Mayer
2026-09-04 12:06 ` sashiko-bot
@ 2026-09-23 14:56 ` Geert Uytterhoeven
1 sibling, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 14:56 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
On Fri, 4 Sept 2026 at 13:57, Josua Mayer <josua@solid-run.com> wrote:
> The SolidRun HummingBoard IIoT features a DSI connector supporting
> touch-screen displays and is usable with RZ/G2L, RZ/G2LC and RZ/V2L
> SoMs.
>
> Provide addon for the Winstar WJ70N3TYJHMNG0 1024x600 dsi panel.
>
> Add the addon in Makefile for all supported SoMs SoC targets.
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 08/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (6 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 07/11] arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-04 12:10 ` sashiko-bot
2026-09-23 15:09 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 09/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzv2l som Josua Mayer
` (3 subsequent siblings)
11 siblings, 2 replies; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
Add support for the SolidRun HummingBoard Ripple [2] with RZ/G2L
SoM [1].
The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
featuring:
- 2x USB-2.0 Type-A connector
- 1x 1Gbps RJ45 Ethernet
- micro-HDMI connector
- microSD connector
- mini-PCI-E connector with SIM slot supporting USB-2.0 interface
- MIPI-CSI Camera Connector (not described without specific camera)
- RTC with backup battery
The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
While the variant being supported here is named "Ripple", shared include
files are still named according to the full board for consistency with
schematics, silk screen labels and other SoMs on same board.
Description for microSD is shared with HummingBoard IIoT.
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 5 +
.../renesas/r9a07g044l2-hummingboard-ripple.dts | 16 +++
.../renesas/rzg2l-hummingboard-pulse-common.dtsi | 114 ++++++++++++++++++
.../rzg2l-hummingboard-pulse-micro-hdmi.dtsi | 79 +++++++++++++
.../dts/renesas/rzg2l-hummingboard-ripple.dtsi | 127 +++++++++++++++++++++
5 files changed, 341 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 0bc2bbff9370f..077e8ebea0cff 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -197,6 +197,11 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-rs485-a.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-rs485-b.dtbo
r9a07g044l2-hummingboard-iiot-rs485-b-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-rs485-b.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-ripple.dtb
+r9a07g044l2-hummingboard-ripple-emmc-dtbs := r9a07g044l2-hummingboard-ripple.dtb rzg2l-sr-som-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-ripple-emmc.dtb
+r9a07g044l2-hummingboard-ripple-microsd-dtbs := r9a07g044l2-hummingboard-ripple.dtb rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-ripple-microsd.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-remi-pi.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-ripple.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-ripple.dts
new file mode 100644
index 0000000000000..22fea75d0ec25
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-ripple.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include "r9a07g044l2.dtsi"
+#include "rzg2l-sr-som.dtsi"
+#include "rzg2l-hummingboard-ripple.dtsi"
+
+/ {
+ compatible = "solidrun,rzg2l-hummingboard-ripple", "solidrun,rzg2l-sr-som",
+ "renesas,r9a07g044l2", "renesas,r9a07g044";
+ model = "SolidRun RZ/G2L HummingBoard Ripple";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-common.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-common.dtsi
new file mode 100644
index 0000000000000..b0ddd426241ab
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-common.dtsi
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/ {
+ aliases {
+ rtc0 = &carrier_rtc;
+ rtc1 = &pmic;
+ };
+
+ v_1_2: regulator-1-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "1v2";
+ regulator-max-microvolt = <1200000>;
+ regulator-min-microvolt = <1200000>;
+ vin-supply = <®_pmic_buck4>;
+ };
+
+ vmmc: regulator-mmc {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmc";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ startup-delay-us = <250>;
+ vin-supply = <®_pmic_buck4>;
+ };
+
+ vmpcie: regulator-mpcie {
+ /* supplies mpcie and m2 connectors */
+ regulator-name = "vmpcie";
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ enable-active-high;
+ };
+};
+
+&ehci1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub_2_0: hub@1 {
+ compatible = "usb4b4,6502", "usb4b4,6506";
+ reg = <1>;
+ vdd2-supply = <®_pmic_buck4>;
+ vdd-supply = <&v_1_2>;
+ };
+};
+
+&i2c0 {
+ carrier_eeprom: eeprom@57 {
+ compatible = "st,24c02", "atmel,24c02";
+ reg = <0x57>;
+ pagesize = <16>;
+ };
+
+ carrier_rtc: rtc@69 {
+ compatible = "abracon,ab1805";
+ reg = <0x69>;
+ abracon,tc-diode = "schottky";
+ abracon,tc-resistor = <3>;
+ };
+};
+
+&ohci0 {
+ dr_mode = "host";
+};
+
+&ohci1 {
+ dr_mode = "host";
+};
+
+&phy0 {
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_ORANGE>;
+ default-state = "keep";
+ function = LED_FUNCTION_LAN;
+ };
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "keep";
+ function = LED_FUNCTION_LAN;
+ };
+ };
+};
+
+/* mikrobus uart */
+&scif1 {
+ pinctrl-0 = <&mikro_uart_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+/* mikrobus spi */
+&spi1 {
+ num-cs = <1>;
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_vbus_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-micro-hdmi.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-micro-hdmi.dtsi
new file mode 100644
index 0000000000000..80e43510142ab
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-micro-hdmi.dtsi
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/ {
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "d";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&adv7535_out>;
+ };
+ };
+ };
+
+ vmipi: regulator-mipi-1-8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vmipi";
+ regulator-always-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ vin-supply = <®_pmic_buck4>;
+ };
+};
+
+&dsi {
+ status = "okay";
+
+ ports {
+ port@1 {
+ mipi_dsi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&adv7535_from_dsim>;
+ };
+ };
+ };
+};
+
+&du {
+ status = "okay";
+};
+
+&i2c0 {
+ hdmi: hdmi@3d {
+ compatible = "adi,adv7535";
+ reg = <0x3d>, <0x3f>, <0x3c>, <0x38>;
+ reg-names = "main", "edid", "cec", "packet";
+ a2vdd-supply = <&vmipi>;
+ avdd-supply = <&vmipi>;
+ dvdd-supply = <&vmipi>;
+ pvdd-supply = <&vmipi>;
+ v3p3-supply = <®_pmic_buck4>;
+ adi,dsi-lanes = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adv7535_from_dsim: endpoint {
+ remote-endpoint = <&mipi_dsi_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ adv7535_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-ripple.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-ripple.dtsi
new file mode 100644
index 0000000000000..5e043e40641a6
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-ripple.dtsi
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+#include <dt-bindings/leds/common.h>
+
+#include "rzg2l-hummingboard-pulse-common.dtsi"
+#include "rzg2l-hummingboard-pulse-micro-hdmi.dtsi"
+
+/ {
+ aliases {
+ /* this board does not use second phy / ethernet on SoM */
+ /delete-property/ ethernet1;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ gpios = <&pinctrl RZG2L_GPIO(0, 1) GPIO_ACTIVE_LOW>;
+ label = "D30";
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ gpios = <&pinctrl RZG2L_GPIO(47, 2) GPIO_ACTIVE_LOW>;
+ label = "D31";
+ };
+
+ led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ gpios = <&pinctrl RZG2L_GPIO(47, 1) GPIO_ACTIVE_LOW>;
+ label = "D32";
+ };
+
+ led-3 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ gpios = <&pinctrl RZG2L_GPIO(48, 2) GPIO_ACTIVE_LOW>;
+ label = "D33";
+ };
+
+ led-4 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ gpios = <&pinctrl RZG2L_GPIO(7, 2) GPIO_ACTIVE_LOW>;
+ label = "D34";
+ };
+ };
+
+ rfkill-mpcie {
+ /* rfkill-gpio inverts internally */
+ shutdown-gpios = <&pinctrl RZG2L_GPIO(14, 1) GPIO_ACTIVE_HIGH>;
+ label = "mpcie radio";
+ /*
+ * The mpcie connector only has USB,
+ * therefore this rfkill is for cellular radios only.
+ */
+ radio-type = "wwan";
+ compatible = "rfkill-gpio";
+ };
+};
+
+ð1 {
+ /* this board does not use second phy / ethernet on SoM */
+ status = "disabled";
+};
+
+&gpt {
+ /* mikrobus header pwm pin is pwm channel 6 */
+ pinctrl-0 = <&mikro_pwm_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&hdmi {
+ interrupts-extended = <&pinctrl RZG2L_GPIO(9, 1) IRQ_TYPE_EDGE_FALLING>;
+ pd-gpios = <&pinctrl RZG2L_GPIO(3, 0) GPIO_ACTIVE_LOW>;
+};
+
+&hub_2_0 {
+ reset-gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ mpcie_rst_hog: mpcie-reset-hog {
+ gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ line-name = "mpcie-reset";
+ output-low;
+ };
+
+ mikro_pwm_pins: pinctrl-mikro-pwm-grp {
+ pinmux = <RZG2L_PORT_PINMUX(41, 0, 4)>; /* GTIOC3A */
+ };
+
+ mikro_uart_pins: pinctrl-mikro-uart-grp {
+ pinmux = <RZG2L_PORT_PINMUX(40, 1, 1)>, /* SCIF1_RXD */
+ <RZG2L_PORT_PINMUX(40, 0, 1)>; /* SCIF1_TXD */
+ };
+
+ usb0_vbus_pins: usb0-vbus {
+ pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>; /* USB0_VBUSEN */
+ };
+
+ usb1_vbus_pins: usb1-vbus {
+ pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>; /* USB1_VBUSEN */
+ };
+};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_vbus_pins>;
+ pinctrl-names = "default";
+};
+
+&vmmc {
+ gpios = <&pinctrl RZG2L_GPIO(4, 1) GPIO_ACTIVE_LOW>;
+};
+
+&vmpcie {
+ gpios = <&pinctrl RZG2L_GPIO(17, 0) GPIO_ACTIVE_HIGH>;
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 08/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som
2026-09-04 11:56 ` [PATCH v8 08/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som Josua Mayer
@ 2026-09-04 12:10 ` sashiko-bot
2026-09-23 15:09 ` Geert Uytterhoeven
1 sibling, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-04 12:10 UTC (permalink / raw)
To: Josua Mayer; +Cc: wsa+renesas, robh, conor+dt, devicetree
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The shared device tree include file `rzg2l-hummingboard-pulse-common.dtsi` uses LED subsystem macros without including the required header, breaking self-containment.
--
commit d997057daebf169901ade156154724f6370de654
Author: Josua Mayer <josua@solid-run.com>
arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som
Add support for the SolidRun HummingBoard Ripple with RZ/G2L SoM, which is a
reduced version of HummingBoard Pulse featuring various connectors like USB,
Ethernet, micro-HDMI, and microSD.
> diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-common.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-common.dtsi
> new file mode 100644
> index 0000000000000..b0ddd426241ab
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-pulse-common.dtsi
[ ... ]
> +&phy0 {
> + leds {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + led@0 {
> + reg = <0>;
> + color = <LED_COLOR_ID_ORANGE>;
> + default-state = "keep";
> + function = LED_FUNCTION_LAN;
> + };
> +
> + led@1 {
> + reg = <1>;
> + color = <LED_COLOR_ID_GREEN>;
> + default-state = "keep";
> + function = LED_FUNCTION_LAN;
> + };
> + };
> +};
[Severity: Low]
Should this file include dt-bindings/leds/common.h directly to remain
self-contained? The led@0 and led@1 nodes use LED_COLOR_ID_ORANGE,
LED_COLOR_ID_GREEN, and LED_FUNCTION_LAN, but the header defining these
macros is not included here.
[ ... ]
> diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-ripple.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-ripple.dtsi
> new file mode 100644
> index 0000000000000..5e043e40641a6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-ripple.dtsi
> @@ -0,0 +1,127 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +/*
> + * Copyright 2025 Josua Mayer <josua@solid-run.com>
> + */
> +
> +#include <dt-bindings/leds/common.h>
> +
> +#include "rzg2l-hummingboard-pulse-common.dtsi"
[Severity: Low]
Does rzg2l-hummingboard-pulse-common.dtsi rely on this include being placed
before it? If a future device tree includes
rzg2l-hummingboard-pulse-common.dtsi without also including
dt-bindings/leds/common.h beforehand, the build will fail due to the
undefined LED subsystem macros.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260904-rzg2-sr-boards-v8-0-94c4674927e8@solid-run.com?part=8
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v8 08/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som
2026-09-04 11:56 ` [PATCH v8 08/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som Josua Mayer
2026-09-04 12:10 ` sashiko-bot
@ 2026-09-23 15:09 ` Geert Uytterhoeven
1 sibling, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 15:09 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add support for the SolidRun HummingBoard Ripple [2] with RZ/G2L
> SoM [1].
>
> The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
> featuring:
> - 2x USB-2.0 Type-A connector
> - 1x 1Gbps RJ45 Ethernet
> - micro-HDMI connector
> - microSD connector
> - mini-PCI-E connector with SIM slot supporting USB-2.0 interface
> - MIPI-CSI Camera Connector (not described without specific camera)
> - RTC with backup battery
>
> The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
> RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
>
> While the variant being supported here is named "Ripple", shared include
> files are still named according to the full board for consistency with
> schematics, silk screen labels and other SoMs on same board.
>
> Description for microSD is shared with HummingBoard IIoT.
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
I didn't compare with the board schematics, but the rest LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 09/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzv2l som
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (7 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 08/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-23 15:10 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 10/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2lc som Josua Mayer
` (2 subsequent siblings)
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
Add support for the SolidRun HummingBoard Ripple [2] with RZ/V2L
SoM [1].
The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
featuring:
- 2x USB-2.0 Type-A connector
- 1x 1Gbps RJ45 Ethernet
- micro-HDMI connector
- microSD connector
- mini-PCI-E connector with SIM slot supporting USB-2.0 interface
- MIPI-CSI Camera Connector (not described without specific camera)
- RTC with backup battery
The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
The RZ/V2L SoM shares PCB with RZ/G2L, differing only in the SoC itself.
RZ/V2L is adding a powerful DRP-AI NPU which G2L lacks.
Due to the similarities, all descriptions except SoC are shared with
RZ/G2L.
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 5 +++++
.../boot/dts/renesas/r9a07g054l2-hummingboard-ripple.dts | 16 ++++++++++++++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 077e8ebea0cff..625093995c521 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -224,6 +224,11 @@ dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-rs485-a.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-hummingboard-iiot-rs485-b.dtbo
r9a07g054l2-hummingboard-iiot-rs485-b-dtbs := r9a07g054l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-iiot-rs485-b.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-ripple.dtb
+r9a07g054l2-hummingboard-ripple-emmc-dtbs := r9a07g054l2-hummingboard-ripple.dtb rzg2l-sr-som-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-ripple-emmc.dtb
+r9a07g054l2-hummingboard-ripple-microsd-dtbs := r9a07g054l2-hummingboard-ripple.dtb rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-hummingboard-ripple-microsd.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc-cru-csi-ov5645.dtbo
r9a07g054l2-smarc-cru-csi-ov5645-dtbs := r9a07g054l2-smarc.dtb r9a07g054l2-smarc-cru-csi-ov5645.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054l2-hummingboard-ripple.dts b/arch/arm64/boot/dts/renesas/r9a07g054l2-hummingboard-ripple.dts
new file mode 100644
index 0000000000000..2c0d3f8b96b76
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g054l2-hummingboard-ripple.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include "r9a07g054l2.dtsi"
+#include "rzg2l-sr-som.dtsi"
+#include "rzg2l-hummingboard-ripple.dtsi"
+
+/ {
+ compatible = "solidrun,rzv2l-hummingboard-ripple", "solidrun,rzv2l-sr-som",
+ "renesas,r9a07g054l2", "renesas,r9a07g054";
+ model = "SolidRun RZ/V2L HummingBoard Ripple";
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 09/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzv2l som
2026-09-04 11:56 ` [PATCH v8 09/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzv2l som Josua Mayer
@ 2026-09-23 15:10 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 15:10 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add support for the SolidRun HummingBoard Ripple [2] with RZ/V2L
> SoM [1].
>
> The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
> featuring:
> - 2x USB-2.0 Type-A connector
> - 1x 1Gbps RJ45 Ethernet
> - micro-HDMI connector
> - microSD connector
> - mini-PCI-E connector with SIM slot supporting USB-2.0 interface
> - MIPI-CSI Camera Connector (not described without specific camera)
> - RTC with backup battery
>
> The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
> RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
>
> The RZ/V2L SoM shares PCB with RZ/G2L, differing only in the SoC itself.
> RZ/V2L is adding a powerful DRP-AI NPU which G2L lacks.
>
> Due to the similarities, all descriptions except SoC are shared with
> RZ/G2L.
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
I didn't compare with the board schematics, but it LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 10/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2lc som
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (8 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 09/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzv2l som Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-23 15:10 ` Geert Uytterhoeven
2026-09-04 11:56 ` [PATCH v8 11/11] arm64: dts: renesas: add support for solidrun rzg2ul som on hb-ripple Josua Mayer
2026-09-18 10:08 ` [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
Add support for the SolidRun HummingBoard Ripple [2] with RZ/G2LC
SoM [1].
The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
featuring:
- 2x USB-2.0 Type-A connector
- 1x 100Mbps RJ45 Ethernet
- micro-HDMI connector
- microSD connector
- mini-PCI-E connector with SIM slot supporting USB-2.0 interface
- MIPI-CSI Camera Connector (not described without specific camera)
- RTC with backup battery
The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
RZ/G2LC SoM shares SCIF2 pins between on-SoM Bluetooth and carrier
board. Provide dt overlay changing pin function from uart to gpio led
control.
While the variant being supported here is named "Ripple", the overlay
still carries the "pulse" suffix as it would fit all its variants.
Descriptions for eMMC and microSD are shared with G2L SoM and
HummingBoard IIoT.
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 8 ++
.../renesas/r9a07g044c2-hummingboard-ripple.dts | 95 ++++++++++++++++++++++
.../renesas/rzg2lc-hummingboard-pulse-leds.dtso | 48 +++++++++++
3 files changed, 151 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 625093995c521..83519d459ae80 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -176,6 +176,14 @@ r9a07g044c2-hummingboard-iiot-rs485-a-dtbs := r9a07g044c2-hummingboard-iiot.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-rs485-a.dtb
r9a07g044c2-hummingboard-iiot-rs485-b-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot-rs485-b.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-ripple.dtb
+r9a07g044c2-hummingboard-ripple-emmc-dtbs := r9a07g044c2-hummingboard-ripple.dtb rzg2l-sr-som-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-ripple-emmc.dtb
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2lc-hummingboard-pulse-leds.dtbo
+r9a07g044c2-hummingboard-ripple-leds-dtbs := r9a07g044c2-hummingboard-ripple.dtb rzg2lc-hummingboard-pulse-leds.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-ripple-leds.dtb
+r9a07g044c2-hummingboard-ripple-microsd-dtbs := r9a07g044c2-hummingboard-ripple.dtb rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-ripple-microsd.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtbo
r9a07g044c2-smarc-cru-csi-ov5645-dtbs := r9a07g044c2-smarc.dtb r9a07g044c2-smarc-cru-csi-ov5645.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044c2-hummingboard-ripple.dts b/arch/arm64/boot/dts/renesas/r9a07g044c2-hummingboard-ripple.dts
new file mode 100644
index 0000000000000..accc17212adb1
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g044c2-hummingboard-ripple.dts
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+
+#include "r9a07g044c2.dtsi"
+#include "rzg2lc-sr-som.dtsi"
+#include "rzg2l-hummingboard-pulse-common.dtsi"
+#include "rzg2l-hummingboard-pulse-micro-hdmi.dtsi"
+
+/ {
+ compatible = "solidrun,rzg2lc-hummingboard-ripple", "solidrun,rzg2lc-sr-som",
+ "renesas,r9a07g044c2", "renesas,r9a07g044";
+ model = "SolidRun RZ/G2LC HummingBoard Ripple";
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ gpios = <&pinctrl RZG2L_GPIO(0, 1) GPIO_ACTIVE_LOW>;
+ label = "D30";
+ };
+ };
+
+ vbus1: regulator-vbus-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus1";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ gpios = <&pinctrl RZG2L_GPIO(5, 0) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&gpt {
+ /* mikrobus header pwm pin is pwm channel 6 */
+ pinctrl-0 = <&mikro_pwm_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&hdmi {
+ interrupts-extended = <&pinctrl RZG2L_GPIO(42, 2) IRQ_TYPE_EDGE_FALLING>;
+ pd-gpios = <&pinctrl RZG2L_GPIO(40, 2) GPIO_ACTIVE_LOW>;
+};
+
+&hub_2_0 {
+ reset-gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ mpcie_rst_hog: mpcie-reset-hog {
+ gpios = <RZG2L_GPIO(19, 1) GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ line-name = "mpcie-reset";
+ output-low;
+ };
+
+ mikro_pwm_pins: pinctrl-mikro-pwm-grp {
+ pinmux = <RZG2L_PORT_PINMUX(41, 0, 4)>; /* GTIOC3A */
+ };
+
+ mikro_uart_pins: pinctrl-mikro-uart-grp {
+ pinmux = <RZG2L_PORT_PINMUX(40, 1, 1)>, /* SCIF1_RXD */
+ <RZG2L_PORT_PINMUX(40, 0, 1)>; /* SCIF1_TXD */
+ };
+
+ usb0_vbus_pins: usb0-vbus {
+ pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>; /* USB0_VBUSEN */
+ };
+};
+
+&usb2_phy1 {
+ vbus-supply = <&vbus1>;
+};
+
+&vmmc {
+ gpios = <&pinctrl RZG2L_GPIO(18, 1) GPIO_ACTIVE_LOW>;
+};
+
+&vmpcie {
+ /*
+ * G2LC SoM v1.2 moved this IO from J7-28 (CON4-12)
+ * to J7-18 (this regulator).
+ * There are no known users of CON4-12 and thus no need
+ * to differentiate here between SoM v1.1 and v1.2.
+ */
+ gpios = <&pinctrl RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-hummingboard-pulse-leds.dtso b/arch/arm64/boot/dts/renesas/rzg2lc-hummingboard-pulse-leds.dtso
new file mode 100644
index 0000000000000..a2572718fa87c
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-hummingboard-pulse-leds.dtso
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Overlay for SolidRun RZ/G2LC HummingBoard Pulse
+ * enabling LEDs D31-34 in exchange for on-SoM Bluetooth.
+ *
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&leds {
+ led-1 {
+ label = "D31";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(5, 2) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-2 {
+ label = "D32";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(5, 1) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-3 {
+ label = "D33";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(42, 0) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-4 {
+ label = "D34";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(42, 1) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+};
+
+&scif2 {
+ status = "disabled";
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 10/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2lc som
2026-09-04 11:56 ` [PATCH v8 10/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2lc som Josua Mayer
@ 2026-09-23 15:10 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 15:10 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add support for the SolidRun HummingBoard Ripple [2] with RZ/G2LC
> SoM [1].
>
> The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
> featuring:
> - 2x USB-2.0 Type-A connector
> - 1x 100Mbps RJ45 Ethernet
> - micro-HDMI connector
> - microSD connector
> - mini-PCI-E connector with SIM slot supporting USB-2.0 interface
> - MIPI-CSI Camera Connector (not described without specific camera)
> - RTC with backup battery
>
> The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
> RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
>
> RZ/G2LC SoM shares SCIF2 pins between on-SoM Bluetooth and carrier
> board. Provide dt overlay changing pin function from uart to gpio led
> control.
>
> While the variant being supported here is named "Ripple", the overlay
> still carries the "pulse" suffix as it would fit all its variants.
>
> Descriptions for eMMC and microSD are shared with G2L SoM and
> HummingBoard IIoT.
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
I didn't compare with the board schematics, but it LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8 11/11] arm64: dts: renesas: add support for solidrun rzg2ul som on hb-ripple
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (9 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 10/11] arm64: dts: renesas: add support for solidrun hb-ripple with rzg2lc som Josua Mayer
@ 2026-09-04 11:56 ` Josua Mayer
2026-09-23 15:11 ` Geert Uytterhoeven
2026-09-18 10:08 ` [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
11 siblings, 1 reply; 30+ messages in thread
From: Josua Mayer @ 2026-09-04 11:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio, Josua Mayer
Add support for the SolidRun RZ/G2UL SoM [1] on HummingBoard Ripple [2].
The SoM features:
- 100Mbps Ethernet with PHY
- eMMC
- 512MB/1GB DDR
- WiFi + Bluetooth
- SDHI Mux switching between eMMC and Carrier Board
The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
featuring:
- 2x USB-2.0 Type-A connector
- 1x 100Mbps RJ45 Ethernet
- micro-HDMI connector (not usable with RZ/G2UL SoM)
- microSD connector
- mini-PCI-E connector with SIM slot supporting USB-2.0 interface
- MIPI-CSI Camera Connector (not described without specific camera)
- RTC with backup battery
The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
RZ/G2UL SoM shares SCIF2 pins between on-SoM Bluetooth and carrier
board. Provide dt overlay changing pin function from uart to gpio led
control.
While the variant being supported here is named "Ripple", the overlay
still carries the "pulse" suffix as it would fit all its variants.
Descriptions for eMMC and microSD are shared with G2L SoM and
HummingBoard IIoT.
[1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2ul-som/
[2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/renesas/Makefile | 10 +
.../renesas/r9a07g043u12-hummingboard-ripple.dts | 91 +++++
.../renesas/rzg2ul-hummingboard-pulse-leds.dtso | 48 +++
arch/arm64/boot/dts/renesas/rzg2ul-sr-som.dtsi | 437 +++++++++++++++++++++
4 files changed, 586 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 83519d459ae80..2b6c7f63c44cd 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -164,6 +164,16 @@ r9a07g043u11-smarc-du-adv7513-dtbs := r9a07g043u11-smarc.dtb r9a07g043u11-smarc-
dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc-du-adv7513.dtb
r9a07g043u11-smarc-pmod-dtbs := r9a07g043u11-smarc.dtb r9a07g043-smarc-pmod.dtbo
dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc-pmod.dtb
+dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u12-hummingboard-ripple.dtb
+dtb-$(CONFIG_ARCH_R9A07G043) += rzg2l-sr-som-emmc.dtbo
+r9a07g043u12-hummingboard-ripple-emmc-dtbs := r9a07g043u12-hummingboard-ripple.dtb rzg2l-sr-som-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u12-hummingboard-ripple-emmc.dtb
+dtb-$(CONFIG_ARCH_R9A07G043) += rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G043) += rzg2ul-hummingboard-pulse-leds.dtbo
+r9a07g043u12-hummingboard-ripple-leds-dtbs := r9a07g043u12-hummingboard-ripple.dtb rzg2ul-hummingboard-pulse-leds.dtbo
+dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u12-hummingboard-ripple-leds.dtb
+r9a07g043u12-hummingboard-ripple-microsd-dtbs := r9a07g043u12-hummingboard-ripple.dtb rzg2l-hummingboard-iiot-microsd.dtbo
+dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u12-hummingboard-ripple-microsd.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-hummingboard-iiot.dtb
r9a07g044c2-hummingboard-iiot-emmc-dtbs := r9a07g044c2-hummingboard-iiot.dtb rzg2l-sr-som-emmc.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u12-hummingboard-ripple.dts b/arch/arm64/boot/dts/renesas/r9a07g043u12-hummingboard-ripple.dts
new file mode 100644
index 0000000000000..df78ddcc8258f
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u12-hummingboard-ripple.dts
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Description for SolidRun RZ/G2UL Type-2 HummingBoard Ripple.
+ *
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+
+#include "r9a07g043u.dtsi"
+#include "rzg2ul-sr-som.dtsi"
+#include "rzg2l-hummingboard-pulse-common.dtsi"
+
+/ {
+ compatible = "solidrun,rzg2ul-hummingboard-ripple", "solidrun,rzg2ul-sr-som",
+ "renesas,r9a07g043u12", "renesas,r9a07g043";
+ model = "SolidRun RZ/G2UL HummingBoard Ripple";
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ gpios = <&pinctrl RZG2L_GPIO(12, 1) GPIO_ACTIVE_LOW>;
+ label = "D30";
+ };
+ };
+
+ vbus1: regulator-vbus-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus1";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ gpios = <&pinctrl RZG2L_GPIO(5, 2) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&hub_2_0 {
+ reset-gpios = <&pinctrl RZG2L_GPIO(13, 3) GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ hdmi_pd_hog: hdmi-pd-hog {
+ /*
+ * RZ/G2UL does not have DSI output to feed DSI-to-HDMI
+ * bridge. Keep its shutdown signal asserted.
+ */
+ gpio-hog;
+ gpios = <RZG2L_GPIO(14, 2) GPIO_ACTIVE_LOW>;
+ line-name = "hdmi-pd";
+ output-high;
+ };
+
+ mpcie_rst_hog: mpcie-reset-hog {
+ gpio-hog;
+ gpios = <RZG2L_GPIO(0, 3) GPIO_ACTIVE_LOW>;
+ line-name = "mpcie-reset";
+ output-low;
+ };
+
+ mikro_uart_pins: pinctrl-mikro-uart-grp {
+ pinmux = <RZG2L_PORT_PINMUX(14, 1, 1)>, /* SCIF1_RXD */
+ <RZG2L_PORT_PINMUX(14, 0, 1)>; /* SCIF1_TXD */
+ };
+
+ usb0_vbus_pins: usb0-vbus {
+ pinmux = <RZG2L_PORT_PINMUX(5, 0, 1)>; /* USB0_VBUSEN */
+ };
+};
+
+&usb2_phy1 {
+ vbus-supply = <&vbus1>;
+};
+
+&vmmc {
+ gpios = <&pinctrl RZG2L_GPIO(0, 1) GPIO_ACTIVE_LOW>;
+};
+
+&vmpcie {
+ /*
+ * G2UL SoM v1.2 moved this IO from J7-28 (CON4-12)
+ * to J7-18 (this regulator).
+ * There are no known users of CON4-12 and thus no need
+ * to differentiate here between SoM v1.1 and v1.2.
+ */
+ gpios = <&pinctrl RZG2L_GPIO(13, 4) GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-hummingboard-pulse-leds.dtso b/arch/arm64/boot/dts/renesas/rzg2ul-hummingboard-pulse-leds.dtso
new file mode 100644
index 0000000000000..ab7f826c6e039
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-hummingboard-pulse-leds.dtso
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Overlay for SolidRun RZ/G2UL HummingBoard Pulse
+ * enabling LEDs D31-34 in exchange for on-SoM Bluetooth.
+ *
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&leds {
+ led-1 {
+ label = "D31";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(5, 4) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-2 {
+ label = "D32";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(5, 3) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-3 {
+ label = "D33";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(6, 0) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-4 {
+ label = "D34";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+};
+
+&scif2 {
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-sr-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-sr-som.dtsi
new file mode 100644
index 0000000000000..c629688189270
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-sr-som.dtsi
@@ -0,0 +1,437 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2UL Solidrun SOM
+ *
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+/ {
+ aliases {
+ ethernet0 = ð0;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ mmc0 = &sdhi0;
+ mmc1 = &sdhi1;
+ rtc0 = &pmic;
+ serial0 = &scif0;
+ serial1 = &scif1;
+ serial2 = &scif2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ /*
+ * Physical RAM starts at 0x40000000, but Renesas RZ/G2 BSPs
+ * reserve and hide the first 128MB for TrustZone by default.
+ *
+ * Minimum size for this SoM is 512MB, and the bootloader patches
+ * the dtb according to the actual RAM size and reservations.
+ */
+ reg = <0x0 0x48000000 0x0 0x18000000>;
+ device_type = "memory";
+ };
+
+ sdhi0_mux: mux-controller-0 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ #mux-state-cells = <1>;
+ /*
+ * Mux switches SD0_DATA[0-3], SD0_CMD & SD0_CLK between
+ * on-SoM eMMC and board-to-board connector using one gpio:
+ * High = connector, Low = eMMC.
+ * Define active-high for logical mux state 0 = eMMC, 1 = connector.
+ */
+ mux-gpios = <&pinctrl RZG2L_GPIO(2, 1) GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_pmic_buck1: regulator-pmic-buck1 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ };
+
+ reg_pmic_buck3: regulator-pmic-buck3 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ };
+
+ reg_pmic_buck4: regulator-pmic-buck4 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-buck4";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ };
+
+ reg_pmic_ldo1: regulator-pmic-ldo1 {
+ compatible = "regulator-gpio";
+ regulator-name = "pmic-ldo1";
+ gpios = <&pinctrl RZG2L_GPIO(13, 2) GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ states = <3300000 1>, <1800000 0>;
+ };
+
+ reg_pmic_ldo2: regulator-pmic-ldo2 {
+ compatible = "regulator-fixed";
+ regulator-name = "pmic-ldo2";
+ /*
+ * This ldo can switch mmc host controller io voltage between
+ * 1.8V and 3.3V by assembly option of pull-up / pull-dow.
+ * Default assembly is 3.3V.
+ */
+ regulator-min-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reserved-memory {
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ global_cma: linux,cma@58000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x58000000 0x0 0x10000000>;
+ reusable;
+ linux,cma-default;
+ };
+
+ mmp_reserved: linux,multimedia@68000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x68000000 0x0 0x8000000>;
+ reusable;
+ };
+ };
+
+ sdhi1_pwrseq: sdhi1-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pinctrl RZG2L_GPIO(2, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ /* 32.768kHz crystal */
+ x2: x2-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+ð0 {
+ phy-handle = <&phy0>;
+ pinctrl-0 = <ð0_pins>;
+ pinctrl-names = "default";
+ /*
+ * ravb driver does not configure mac internal delays for RZ/G2(UL/L/C),
+ * instead delays are added by the ADIN1200 phy driver.
+ */
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ /* Level interrupts are typical for phy but not supported on rz/g2l gpios. */
+ interrupts-extended = <&pinctrl RZG2L_GPIO(4, 2) IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <24000000>;
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c01";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ pmic: pmic@12 {
+ compatible = "renesas,raa215300";
+ reg = <0x12>, <0x6f>;
+ reg-names = "main", "rtc";
+ clocks = <&x2>;
+ clock-names = "xin";
+ };
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ostm1 {
+ status = "okay";
+};
+
+&ostm2 {
+ status = "okay";
+};
+
+&phyrst {
+ status = "okay";
+};
+
+&pinctrl {
+ eth0_pins: eth0 {
+ pinmux = <RZG2L_PORT_PINMUX(4, 5, 1)>, /* ET0_LINKSTA */
+ <RZG2L_PORT_PINMUX(4, 3, 1)>, /* ET0_MDC */
+ <RZG2L_PORT_PINMUX(4, 4, 1)>, /* ET0_MDIO */
+ <RZG2L_PORT_PINMUX(1, 0, 1)>, /* ET0_TXC */
+ <RZG2L_PORT_PINMUX(1, 1, 1)>, /* ET0_TX_CTL */
+ <RZG2L_PORT_PINMUX(1, 2, 1)>, /* ET0_TXD0 */
+ <RZG2L_PORT_PINMUX(1, 3, 1)>, /* ET0_TXD1 */
+ <RZG2L_PORT_PINMUX(1, 4, 1)>, /* ET0_TXD2 */
+ <RZG2L_PORT_PINMUX(2, 0, 1)>, /* ET0_TXD3 */
+ <RZG2L_PORT_PINMUX(3, 0, 1)>, /* ET0_RXC */
+ <RZG2L_PORT_PINMUX(3, 1, 1)>, /* ET0_RX_CTL */
+ <RZG2L_PORT_PINMUX(3, 2, 1)>, /* ET0_RXD0 */
+ <RZG2L_PORT_PINMUX(3, 3, 1)>, /* ET0_RXD1 */
+ <RZG2L_PORT_PINMUX(4, 0, 1)>, /* ET0_RXD2 */
+ <RZG2L_PORT_PINMUX(4, 1, 1)>; /* ET0_RXD3 */
+ };
+
+ i2c0_pins: i2c0 {
+ input-enable;
+ pins = "RIIC0_SDA", "RIIC0_SCL";
+ };
+
+ i2c1_pins: i2c1 {
+ input-enable;
+ pins = "RIIC1_SDA", "RIIC1_SCL";
+ };
+
+ i2c2_pins: i2c2 {
+ pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RIIC2_SDA */
+ <RZG2L_PORT_PINMUX(6, 4, 1)>; /* RIIC2_SCL */
+ };
+
+ qspi0_pins: qspi0 {
+ pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3",
+ "QSPI0_SPCLK", "QSPI0_SSL";
+ power-source = <1800>;
+ };
+
+ scif0_pins: scif0 {
+ pinmux = <RZG2L_PORT_PINMUX(13, 0, 1)>, /* SCIF0_TXD */
+ <RZG2L_PORT_PINMUX(13, 1, 1)>; /* SCIF0_RXD */
+ };
+
+ scif2_pins: scif2 {
+ pinmux = <RZG2L_PORT_PINMUX(6, 0, 4)>, /* SCIF2_TXD */
+ <RZG2L_PORT_PINMUX(6, 1, 4)>, /* SCIF2_RXD */
+ <RZG2L_PORT_PINMUX(5, 3, 2)>, /* SCIF2_CTS# */
+ <RZG2L_PORT_PINMUX(5, 4, 2)>; /* SCIF2_RTS# */
+ };
+
+ sdhi0_4bit_pins: sdhi0-4bit {
+ sd0_ctrl_dat03 {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_CLK", "SD0_CMD";
+ power-source = <3300>;
+ };
+
+ /*
+ * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage,
+ * with all pins sharing a single voltage domain.
+ *
+ * These pins are fixed-function lacking independently configurable
+ * pull-up, pull-down or output-disable.
+ *
+ * While unused, disable the input buffers to avoid sampling the still
+ * physically connected but unused eMMC lines.
+ * For output direction rely on correct controller bus-width configuration
+ * to avoid over-voltage to eMMC e.g. when operating at 3.3V for a 4-bit microSD.
+ */
+ sd0_dat47 {
+ input-disable;
+ pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_4bit_uhs_pins: sdhi0-4bit-uhs {
+ sd0_ctrl_dat03 {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ /*
+ * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage,
+ * with all pins sharing a single voltage domain.
+ *
+ * These pins are fixed-function, lacking configurable pull-up, pull-down or
+ * output-disable, while sharing the voltage domain with all SD0_* pins.
+ *
+ * While unused, disable the input buffers to avoid sampling the still
+ * physically connected but unused eMMC lines.
+ * For output direction rely on correct controller bus-width configuration
+ * to avoid over-voltage to eMMC e.g. when operating at 3.3V for a 4-bit microSD.
+ */
+ sd0_dat47 {
+ input-disable;
+ pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_8bit_uhs_pins: sdhi0-8bit-uhs {
+ sd0_ctrl {
+ pins = "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ sd0_dat {
+ input-enable;
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ };
+ };
+
+ sdhi0_cd_pins: sdhi0-cd {
+ pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>; /* SD0_CD */
+ };
+
+ /* SD0_RST is only routed to eMMC which uses fixed 1.8V IO voltage */
+ sdhi0_rst_pins: sdhi0-rst {
+ pins = "SD0_RST#";
+ power-source = <1800>;
+ };
+
+ sdhi1_pins: sdhi1 {
+ pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3",
+ "SD1_CLK", "SD1_CMD";
+ power-source = <3300>;
+ };
+
+ spi1_pins: spi1 {
+ pinmux = <RZG2L_PORT_PINMUX(17, 2, 1)>, /* RSPI1_MISO */
+ <RZG2L_PORT_PINMUX(17, 1, 1)>, /* RSPI1_MOSI */
+ <RZG2L_PORT_PINMUX(17, 0, 1)>; /* RSPI1_CK */
+ };
+
+ spi1_cs_pins: spi1-cs {
+ pinmux = <RZG2L_PORT_PINMUX(17, 3, 1)>; /* RSPI1_SSL */
+ };
+};
+
+&sbc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "winbond,w25q80bl", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ };
+};
+
+&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ /*
+ * The BT is based on BCM4343A2. Murata 1YN variant seems to
+ * require driving RTS on open.
+ * Use compatible bcm43438 to accomplish this.
+ */
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <115200>;
+ shutdown-gpios = <&pinctrl RZG2L_GPIO(2, 3) GPIO_ACTIVE_HIGH>;
+ vbat-supply = <®_pmic_buck4>;
+ vddio-supply = <®_pmic_buck4>;
+ };
+};
+
+/* WiFi */
+&sdhi1 {
+ /* Murata 1YN max rate is 50MHz */
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ cap-sdio-irq;
+ mmc-pwrseq = <&sdhi1_pwrseq>;
+ non-removable;
+ no-1-8-v;
+ no-sd;
+ pinctrl-0 = <&sdhi1_pins>;
+ pinctrl-names = "default";
+ vmmc-supply = <®_pmic_buck4>;
+ /*
+ * Host controller IO voltage is provided from reg_pmic_ldo2,
+ * WiFi module IO voltage from reg_pmic_buck4.
+ * Neither is configurable at run-time so either can be set here.
+ */
+ vqmmc-supply = <®_pmic_ldo2>;
+ status = "okay";
+};
+
+&usb2_phy0 {
+ vbus-supply = <&usb0_vbus_otg>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ status = "okay";
+};
+
+&wdt0 {
+ status = "okay";
+};
--
2.51.0
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v8 11/11] arm64: dts: renesas: add support for solidrun rzg2ul som on hb-ripple
2026-09-04 11:56 ` [PATCH v8 11/11] arm64: dts: renesas: add support for solidrun rzg2ul som on hb-ripple Josua Mayer
@ 2026-09-23 15:11 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2026-09-23 15:11 UTC (permalink / raw)
To: Josua Mayer
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Benjamin Bara, Linus Walleij, Lad Prabhakar,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, linux-renesas-soc,
devicetree, linux-kernel, linux-usb, linux-gpio
On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@solid-run.com> wrote:
> Add support for the SolidRun RZ/G2UL SoM [1] on HummingBoard Ripple [2].
>
> The SoM features:
> - 100Mbps Ethernet with PHY
> - eMMC
> - 512MB/1GB DDR
> - WiFi + Bluetooth
> - SDHI Mux switching between eMMC and Carrier Board
>
> The HummingBoard Ripple is a reduced version of HummingBoard Pulse,
> featuring:
> - 2x USB-2.0 Type-A connector
> - 1x 100Mbps RJ45 Ethernet
> - micro-HDMI connector (not usable with RZ/G2UL SoM)
> - microSD connector
> - mini-PCI-E connector with SIM slot supporting USB-2.0 interface
> - MIPI-CSI Camera Connector (not described without specific camera)
> - RTC with backup battery
>
> The carrier board is identical between RZ/G2L, RZ/G2LC, RZ/G2UL and
> RZ/V2L SoMs, yet only the RZ/G2LC combination has a product page [2].
>
> RZ/G2UL SoM shares SCIF2 pins between on-SoM Bluetooth and carrier
> board. Provide dt overlay changing pin function from uart to gpio led
> control.
>
> While the variant being supported here is named "Ripple", the overlay
> still carries the "pulse" suffix as it would fit all its variants.
>
> Descriptions for eMMC and microSD are shared with G2L SoM and
> HummingBoard IIoT.
>
> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2ul-som/
> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
I didn't compare with the board schematics, but it LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards
2026-09-04 11:56 [PATCH v8 00/11] arm64: dts: renesas: Add various SolidRun RZ/G2 based boards Josua Mayer
` (10 preceding siblings ...)
2026-09-04 11:56 ` [PATCH v8 11/11] arm64: dts: renesas: add support for solidrun rzg2ul som on hb-ripple Josua Mayer
@ 2026-09-18 10:08 ` Josua Mayer
11 siblings, 0 replies; 30+ messages in thread
From: Josua Mayer @ 2026-09-18 10:08 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Greg Kroah-Hartman, Benjamin Bara, Linus Walleij,
Lad Prabhakar
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-gpio@vger.kernel.org, Conor Dooley, Krzysztof Kozlowski
Am 04.09.26 um 13:56 schrieb Josua Mayer:
> Add support for a variety of SolidRun RZ/G2 based SoMs and both
> HummingBoard IIoT and HummingBoard Ripple Evaluation boards.
>
> Bindings are added for all SolidRun RZ/G2 SoMs:
>
> - RZ/G2L SYSTEM ON MODULE
> https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
> - RZ/V2L SYSTEM ON MODULE
> https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-v2l-som/
> - RZ/G2LC SYSTEM ON MODULE
> https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2lc-som/
> - RZ/G2UL SYSTEM ON MODULE
> https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2ul-som/
>
> And each supported carrier board:
>
> - HUMMINGBOARD RZ/G2L IIOT
> https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
> - HUMMINGBOARD RZ/G2L PRO
> https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-sbc/
> - HUMMINGBOARD RZ/G2LC BASE (Ripple)
> https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2lc-base/
>
> Device-tree are only added for the IIOT and BASE boards to reduce
> initial effort.
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
> Changes in v8:
> - Added RZ/G2UL SoM.
> - Added HummingBoard Ripple.
> - Added SoM Bluetooth nodes.
> - Fixed renesas pinctrl binding commit message logical inversion.
> (Reported-by: Linus Walleij <linusw@kernel.org>)
> - Changed memory start address as suggested by sashiko,
> and clarified reasoning with comments.
> - Dropped invalid fixed-clock from g2l som.
> - Sorted reserved-mem nodes by address.
> - Split eMMC pinconf nodes supporting input-enable only on data pins,
> not on clk. Tested both microSD and eMMC overlays (v7 only tested
> microSD).
> - Made capitalisation of "HummingBoard" consistent in commit messages.
> - Clarified G2LC SoM has 100Mbps ethernet only.
> - Added reg property to dsi panel overlay port node, reported by
> sashiko.
> - Collected review tags.
> - Extended rzg2l-pinctrl to allow both input-enable and output-enable as
> requested by Geert, kept Linus' Reviewed-by from previous version.
> - v7 was sent with "v4" subject by mistake, resolved with v8.
> - Link to v7: https://lore.kernel.org/r/20260902-rzg2-sr-boards-v4-0-4a456a422fee@solid-run.com
>
> Changes in v7:
> - rebased and tested on v7.3-rc1
> - updated explanation for edge-triggered interrupt between SoC and gpio
> expander.
> - set interrupt for ethernet phys to falling-edge because SoC does not
> support level interrupts on its gpios, only on dedicated irq pins.
> - Fixed sd data4-7 pinconf nodes trying to avoid cross 1.8V/3.3V domain
> conflicts when data0-3 are muxed to SD and 4-7 still hard-wired to
> eMMC. RZ/G2 family does not support bias-disable property, and
> power-source property applies to all pins of SD0 as a group.
> Instead added input-disable as the only feasible measure on
> fixed-function pins.
> - Update dt-binding for rzg2l pinctrl to allow setting input-disable
> property.
>
> Changes in v6:
> - Drop currently unused usb-vbus pinctrl nodes from som dtsi, reported
> by sashiko.
> - Fix duplicate pin config mistakes in split dat0-3/dat4-7, reported by
> sashiko.
> - Link to v5: https://patch.msgid.link/20260809-rzg2-sr-boards-v5-0-19c662358e36@solid-run.com
>
> Changes in v5:
> - Clarified sdhi mux dt comment on mux and gpio states.
> - Added microsd & emmc dtbos to Makefile targets explicitly for V2L SoC
> too. Reported by Sashiko.
> - split 8-bit and 4-bit sdhi pinctrl to avoid theoretical overvoltage on
> hardwired eMMC DAT4-7 pins. Reported by sashiko.
> - Moved dr_mode from usb phy to controller. Reported by sashiko.
> - Collected acks.
> - Link to v4: https://patch.msgid.link/20260730-rzg2-sr-boards-v4-0-08bc459578dc@solid-run.com
>
> Changes in v4:
> - Rebased on v7.2-rc1.
> - Addresed sashiko comments for g2l som & hb-iiot:
> gpio dt property -> plural, irq levels, memory size, usb-3.0 hub.
> The usb hub ids however are correct, 6502 and 6506 are usb-2.0.
> - Addressed sashiko comments for g2lc som & hb-iiot:
> gpio dt property -> plural, vmmc gpio polarity.
> - Link to v3: https://patch.msgid.link/20260512-rzg2-sr-boards-v3-0-f033fc96c906@solid-run.com
>
> Changes in v3:
> - Added explanatory comments on won't-fix sashiko findings.
> - Added cap-sdio-irq to sdhi controllers used for WiFi.
> - Drop redundant addition of common device-tree overlays to install
> targets of G2L(C) SoC.
> - Add common device-tree overlays to install targets of both G2L and V2L
> SoCs.
> - Assign kbuild composie variables with := operator.
> - Link to v2: https://lore.kernel.org/r/20260511-rzg2-sr-boards-v2-0-82aebbd27891@solid-run.com
>
> Changes in v2:
> - Added relevant product page links to each commit description.
> - Added product page links to cover letter, thanks Geert.
> - Link to v1: https://lore.kernel.org/r/20260503-rzg2-sr-boards-v1-0-8545677f93ca@solid-run.com
>
> ---
> Josua Mayer (11):
> dt-bindings: soc: renesas: Add various SolidRun RZ/G2 based boards
> dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow input-/output-disable
> dt-bindings: usb: cypress,hx3: make peer-hub property optional
> arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb
> arm64: dts: renesas: add support for solidrun rzv2l som and hb-iiot evb
> arm64: dts: renesas: add support for solidrun rzg2lc som and hb-iiot evb
> arm64: dts: renesas: rzg2l(c)/rzv2l hb-iiot: add dsi panel dt overlay
> arm64: dts: renesas: add support for solidrun hb-ripple with rzg2l som
> arm64: dts: renesas: add support for solidrun hb-ripple with rzv2l som
> arm64: dts: renesas: add support for solidrun hb-ripple with rzg2lc som
> arm64: dts: renesas: add support for solidrun rzg2ul som on hb-ripple
>
> .../bindings/pinctrl/renesas,rzg2l-pinctrl.yaml | 2 +
> .../devicetree/bindings/soc/renesas/renesas.yaml | 37 ++
> .../devicetree/bindings/usb/cypress,hx3.yaml | 1 -
> arch/arm64/boot/dts/renesas/Makefile | 73 ++-
> .../renesas/r9a07g043u12-hummingboard-ripple.dts | 91 ++++
> .../dts/renesas/r9a07g044c2-hummingboard-iiot.dts | 20 +
> .../renesas/r9a07g044c2-hummingboard-ripple.dts | 95 ++++
> .../dts/renesas/r9a07g044l2-hummingboard-iiot.dts | 16 +
> .../renesas/r9a07g044l2-hummingboard-ripple.dts | 16 +
> .../dts/renesas/r9a07g054l2-hummingboard-iiot.dts | 16 +
> .../renesas/r9a07g054l2-hummingboard-ripple.dts | 16 +
> .../renesas/rzg2l-hummingboard-iiot-common.dtsi | 564 +++++++++++++++++++++
> .../renesas/rzg2l-hummingboard-iiot-microsd.dtso | 26 +
> ...hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso | 79 +++
> .../renesas/rzg2l-hummingboard-iiot-rs485-a.dtso | 17 +
> .../renesas/rzg2l-hummingboard-iiot-rs485-b.dtso | 17 +
> .../boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi | 49 ++
> .../renesas/rzg2l-hummingboard-pulse-common.dtsi | 114 +++++
> .../rzg2l-hummingboard-pulse-micro-hdmi.dtsi | 79 +++
> .../dts/renesas/rzg2l-hummingboard-ripple.dtsi | 127 +++++
> arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso | 44 ++
> arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi | 480 ++++++++++++++++++
> .../renesas/rzg2lc-hummingboard-pulse-leds.dtso | 48 ++
> arch/arm64/boot/dts/renesas/rzg2lc-sr-som.dtsi | 442 ++++++++++++++++
> .../renesas/rzg2ul-hummingboard-pulse-leds.dtso | 48 ++
> arch/arm64/boot/dts/renesas/rzg2ul-sr-som.dtsi | 437 ++++++++++++++++
> 26 files changed, 2952 insertions(+), 2 deletions(-)
> ---
> base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
> change-id: 20260502-rzg2-sr-boards-37d556668a2d
>
> Best regards,
This series has undergone many iterations mostly driven by Sashiko alone.
I was hoping for some human review on the dts parts before re-submitting.
Anything holding up this series? Any guidance?
We are planning to submit RZ/V2N based boards too, and the older SoCs
in this series were the testing ground on upstream acceptance.
Sashiko had two minor nits on this series:
Patch 7: using ronbo compatible string when panel vendor is winstar.
The *only* in-tree user of the compatible is:
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso:
/* This is a Winstar panel, but the ronbo panel uses same
controls. */
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso:
compatible = "ronbo,rb070d30";
So I still feel it unnecessary to add a different vendor for name sake only.
Maintainers please correct me if necessary.
Patch 8: which specific dtsi file should include <dt-bindings/leds/common.h>
Minor and easy to fix.
^ permalink raw reply [flat|nested] 30+ messages in thread