From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 0/3] target-i386: add PCLMULQDQ and AES-NI instructions
Date: Thu, 28 Mar 2013 01:00:08 +0100 [thread overview]
Message-ID: <1364428811-8226-1-git-send-email-aurelien@aurel32.net> (raw)
This patch series adds the PCLMULQDQ and AES-NI instructions to the x86
emulation. Along with the SSE4.1 and SSE4.2 series, this brings the
instructions emulation to the level of a Westmere CPU.
It has been tested with the valgrind testsuite and with the kernel
autotest.
Aurelien Jarno (3):
target-i386: add pclmulqdq instruction
target-i386: enable PCLMULQDQ on Westmere CPU
target-i386: add AES-NI instructions
target-i386/cpu.c | 19 ++--
target-i386/ops_sse.h | 212 ++++++++++++++++++++++++++++++++++++++++++
target-i386/ops_sse_header.h | 11 +++
target-i386/translate.c | 10 ++
4 files changed, 242 insertions(+), 10 deletions(-)
--
1.7.10.4
next reply other threads:[~2013-03-28 0:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-28 0:00 Aurelien Jarno [this message]
2013-03-28 0:00 ` [Qemu-devel] [PATCH 1/3] target-i386: add pclmulqdq instruction Aurelien Jarno
2013-03-28 15:45 ` Richard Henderson
2013-03-28 0:00 ` [Qemu-devel] [PATCH 2/3] target-i386: enable PCLMULQDQ on Westmere CPU Aurelien Jarno
2013-03-28 15:47 ` Richard Henderson
2013-03-28 0:00 ` [Qemu-devel] [PATCH 3/3] target-i386: add AES-NI instructions Aurelien Jarno
2013-03-28 15:49 ` Richard Henderson
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