From: Chad Versace <chad.versace@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] intel: Add pci id for Haswell Harris Beach Mobile GT2+
Date: Mon, 15 Apr 2013 17:52:10 -0700 [thread overview]
Message-ID: <1366073530-12098-1-git-send-email-chad.versace@linux.intel.com> (raw)
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
---
intel/intel_chipset.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index b73fa0f..da2fbee 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -82,6 +82,7 @@
#define PCI_CHIP_HASWELL_CRW_S_GT1 0x0D1A /* Server */
#define PCI_CHIP_HASWELL_CRW_S_GT2 0x0D2A
#define PCI_CHIP_HASWELL_CRW_S_GT2_PLUS 0x0D3A
+#define PCI_CHIP_HASWELL_HSB_M_GT2_PLUS 0x0A26 /* Mobile */
#define IS_830(dev) (dev == 0x3577)
#define IS_845(dev) (dev == 0x2562)
@@ -198,7 +199,8 @@
devid == PCI_CHIP_HASWELL_ULT_S_GT2_PLUS || \
devid == PCI_CHIP_HASWELL_CRW_GT2_PLUS || \
devid == PCI_CHIP_HASWELL_CRW_M_GT2_PLUS || \
- devid == PCI_CHIP_HASWELL_CRW_S_GT2_PLUS)
+ devid == PCI_CHIP_HASWELL_CRW_S_GT2_PLUS || \
+ devid == PCI_CHIP_HASWELL_HSB_M_GT2_PLUS)
#define IS_HASWELL(devid) (IS_HSW_GT1(devid) || \
IS_HSW_GT2(devid))
--
1.8.1.4
next reply other threads:[~2013-04-16 0:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-16 0:52 Chad Versace [this message]
2013-04-16 16:29 ` [PATCH] intel: Add pci id for Haswell Harris Beach Mobile GT2+ Kenneth Graunke
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