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From: Bernhard Beschow <shentey@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	qemu-arm@nongnu.org, "Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Subject: Re: [PATCH 09/21] hw/arm/fsl-imx8mp: Add PCIe support
Date: Tue, 28 Jan 2025 22:04:08 +0000	[thread overview]
Message-ID: <137C0579-19AB-4D92-82DC-6CBE2422AD6A@gmail.com> (raw)
In-Reply-To: <CAFEAcA9efWMDxaTCfa6t8MiCgFUEU+nsyurNOqVDxAa9=KS=-Q@mail.gmail.com>



Am 28. Januar 2025 14:33:14 UTC schrieb Peter Maydell <peter.maydell@linaro.org>:
>On Mon, 20 Jan 2025 at 20:38, Bernhard Beschow <shentey@gmail.com> wrote:
>>
>> Linux checks for the PLLs in the PHY to be locked, so implement a model
>> emulating that.
>>
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>
>> diff --git a/docs/system/arm/imx8mp-evk.rst b/docs/system/arm/imx8mp-evk.rst
>> index 1514bc5864..8d48580cb4 100644
>> --- a/docs/system/arm/imx8mp-evk.rst
>> +++ b/docs/system/arm/imx8mp-evk.rst
>> @@ -14,6 +14,7 @@ The ``imx8mp-evk`` machine implements the following devices:
>>   * Generic Interrupt Controller (GICv3)
>>   * 4 UARTs
>>   * 3 USDHC Storage Controllers
>> + * 1 Designware PCI Express Controller
>>   * Secure Non-Volatile Storage (SNVS) including an RTC
>>   * Clock Tree
>>
>> @@ -62,3 +63,15 @@ Now that everything is prepared the newly built image can be run in the QEMU
>>        -dtb imx8mp-evk-patched.dtb \
>>        -append "root=/dev/mmcblk2p2" \
>>        -drive file=sdcard.img,if=sd,bus=2,format=raw,id=mmcblk2
>> +
>> +Using PCI Devices
>> +-----------------
>> +
>> +The PCI Express controller spawns two PCI buses, of which only one can be used.
>> +By default QEMU assigns the wrong bus, so the correct one has to be specified
>> +manually by adding ``bus=dw-pcie``. For example, when adding an Intel e1000
>> +network card, the command line looks like:
>> +
>> +.. code-block:: bash
>> +
>> +  $ qemu-system-aarch64 -M imximp-evk ... -device virtio-net-pci,bus=dw-pcie
>
>Why does this happen? Isn't there some way to make QEMU default to
>using the right bus? Otherwise there's likely to be a lot of
>user confusion because PCI "doesn't work"...

Yeah, this is really confusing and I forget about it myself. I'd appreciate any hints here.

Best regards,
Bernhard

>
>thanks
>-- PMM

  reply	other threads:[~2025-01-28 22:04 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-20 20:37 [PATCH 00/21] Add i.MX 8M Plus EVK machine Bernhard Beschow
2025-01-20 20:37 ` [PATCH 01/21] hw/char/imx_serial: Fix reset value of UFCR register Bernhard Beschow
2025-01-20 20:37 ` [PATCH 02/21] hw/char/imx_serial: Update all state before restarting ageing timer Bernhard Beschow
2025-01-20 20:37 ` [PATCH 03/21] hw/pci-host/designware: Expose MSI IRQ Bernhard Beschow
2025-01-20 20:37 ` [PATCH 04/21] hw/usb/hcd-dwc3: Align global registers size with Linux Bernhard Beschow
2025-01-28 14:21   ` Peter Maydell
2025-01-20 20:37 ` [PATCH 05/21] hw/arm: Add i.MX 8M Plus EVK board Bernhard Beschow
2025-01-28 14:29   ` Peter Maydell
2025-01-28 22:16     ` Bernhard Beschow
2025-01-29 12:17       ` Peter Maydell
2025-01-29 13:04         ` Bernhard Beschow
2025-01-20 20:37 ` [PATCH 06/21] hw/arm/fsl-imx8mp: Implement clock tree Bernhard Beschow
2025-01-28 14:35   ` Peter Maydell
2025-01-28 21:53     ` Bernhard Beschow
2025-01-20 20:37 ` [PATCH 07/21] hw/arm/fsl-imx8mp: Add SNVS Bernhard Beschow
2025-01-28 14:31   ` Peter Maydell
2025-01-20 20:37 ` [PATCH 08/21] hw/arm/fsl-imx8mp: Add USDHC storage controllers Bernhard Beschow
2025-01-21  2:52   ` BALATON Zoltan
2025-02-03 23:01     ` Bernhard Beschow
2025-01-20 20:37 ` [PATCH 09/21] hw/arm/fsl-imx8mp: Add PCIe support Bernhard Beschow
2025-01-28 14:33   ` Peter Maydell
2025-01-28 22:04     ` Bernhard Beschow [this message]
2025-01-29 17:54       ` BALATON Zoltan
2025-02-01 14:45         ` Bernhard Beschow
2025-01-20 20:37 ` [PATCH 10/21] hw/arm/fsl-imx8mp: Add GPIO controllers Bernhard Beschow
2025-01-20 20:37 ` [PATCH 11/21] hw/arm/fsl-imx8mp: Add I2C controllers Bernhard Beschow
2025-01-20 20:37 ` [PATCH 12/21] hw/arm/fsl-imx8mp: Add SPI controllers Bernhard Beschow
2025-01-20 20:37 ` [PATCH 13/21] hw/arm/fsl-imx8mp: Add watchdog support Bernhard Beschow
2025-01-20 20:37 ` [PATCH 14/21] hw/arm/fsl-imx8mp: Implement gneral purpose timers Bernhard Beschow
2025-01-20 20:37 ` [PATCH 15/21] hw/arm/fsl-imx8mp: Add Ethernet controller Bernhard Beschow
2025-01-20 20:37 ` [PATCH 16/21] hw/arm/fsl-imx8mp: Add USB support Bernhard Beschow
2025-01-20 20:37 ` [PATCH 17/21] hw/arm/fsl-imx8mp: Add boot ROM Bernhard Beschow
2025-01-21  3:00   ` BALATON Zoltan
2025-01-21 21:03     ` Bernhard Beschow
2025-01-20 20:37 ` [PATCH 18/21] hw/arm/fsl-imx8mp: Add on-chip RAM Bernhard Beschow
2025-01-20 20:37 ` [PATCH 19/21] hw/rtc: Add Ricoh RS5C372 RTC emulation Bernhard Beschow
2025-01-20 20:37 ` [PATCH 20/21] hw/i2c: Import TCA6416 emulation from Xilinx Bernhard Beschow
2025-01-21  3:07   ` BALATON Zoltan
2025-01-28 22:20     ` Bernhard Beschow
2025-01-30  1:14   ` Corey Minyard
2025-01-30 23:05   ` Philippe Mathieu-Daudé
2025-02-01 15:28     ` Bernhard Beschow
2025-02-02 17:09       ` Philippe Mathieu-Daudé
2025-02-03  5:42         ` Dmitriy Sharikhin
2025-02-04  8:13           ` Bernhard Beschow
2025-02-17 18:06           ` Bernhard Beschow
2025-02-03 22:38         ` Bernhard Beschow
2025-01-20 20:37 ` [PATCH 21/21] hw/gpio/imx_gpio: Don't clear input GPIO values upon reset Bernhard Beschow
2025-01-28 14:33   ` Gustavo Romero
2025-02-03 23:06     ` Bernhard Beschow

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