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From: Alexander Graf <agraf@suse.de>
To: kvm-ppc@vger.kernel.org
Cc: kvm@vger.kernel.org, anton@samba.org
Subject: [PATCH 01/13] KVM: PPC: Book3S PR: Implement LPCR ONE_REG
Date: Thu, 24 Apr 2014 13:12:28 +0000	[thread overview]
Message-ID: <1398345160-4830-2-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1398345160-4830-1-git-send-email-agraf@suse.de>

To control whether we should inject interrupts in little or big endian
mode, user space sets the LPCR.ILE bit accordingly via ONE_REG.

Let's implement it, so we are able to trigger interrupts in LE mode.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 arch/powerpc/include/asm/kvm_book3s.h | 1 +
 arch/powerpc/kvm/book3s_64_mmu.c      | 8 +++++++-
 arch/powerpc/kvm/book3s_pr.c          | 6 ++++++
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index bb1e38a..27b1041 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -106,6 +106,7 @@ struct kvmppc_vcpu_book3s {
 #endif
 	int hpte_cache_count;
 	spinlock_t mmu_lock;
+	ulong lpcr;
 };
 
 #define CONTEXT_HOST		0
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index 83da1f8..4a77725 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -38,7 +38,13 @@
 
 static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
 {
-	kvmppc_set_msr(vcpu, MSR_SF);
+	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
+	ulong new_msr = MSR_SF;
+
+	if (vcpu_book3s->lpcr & LPCR_ILE)
+		new_msr |= MSR_LE;
+
+	kvmppc_set_msr(vcpu, new_msr);
 }
 
 static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index c5c052a..9189ac5 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -1110,6 +1110,9 @@ static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
 	case KVM_REG_PPC_HIOR:
 		*val = get_reg_val(id, to_book3s(vcpu)->hior);
 		break;
+	case KVM_REG_PPC_LPCR:
+		*val = get_reg_val(id, to_book3s(vcpu)->lpcr);
+		break;
 	default:
 		r = -EINVAL;
 		break;
@@ -1128,6 +1131,9 @@ static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
 		to_book3s(vcpu)->hior = set_reg_val(id, *val);
 		to_book3s(vcpu)->hior_explicit = true;
 		break;
+	case KVM_REG_PPC_LPCR:
+		to_book3s(vcpu)->lpcr = set_reg_val(id, *val) & LPCR_ILE;
+		break;
 	default:
 		r = -EINVAL;
 		break;
-- 
1.8.1.4


WARNING: multiple messages have this Message-ID (diff)
From: Alexander Graf <agraf@suse.de>
To: kvm-ppc@vger.kernel.org
Cc: kvm@vger.kernel.org, anton@samba.org
Subject: [PATCH 01/13] KVM: PPC: Book3S PR: Implement LPCR ONE_REG
Date: Thu, 24 Apr 2014 15:12:28 +0200	[thread overview]
Message-ID: <1398345160-4830-2-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1398345160-4830-1-git-send-email-agraf@suse.de>

To control whether we should inject interrupts in little or big endian
mode, user space sets the LPCR.ILE bit accordingly via ONE_REG.

Let's implement it, so we are able to trigger interrupts in LE mode.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 arch/powerpc/include/asm/kvm_book3s.h | 1 +
 arch/powerpc/kvm/book3s_64_mmu.c      | 8 +++++++-
 arch/powerpc/kvm/book3s_pr.c          | 6 ++++++
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index bb1e38a..27b1041 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -106,6 +106,7 @@ struct kvmppc_vcpu_book3s {
 #endif
 	int hpte_cache_count;
 	spinlock_t mmu_lock;
+	ulong lpcr;
 };
 
 #define CONTEXT_HOST		0
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index 83da1f8..4a77725 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -38,7 +38,13 @@
 
 static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
 {
-	kvmppc_set_msr(vcpu, MSR_SF);
+	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
+	ulong new_msr = MSR_SF;
+
+	if (vcpu_book3s->lpcr & LPCR_ILE)
+		new_msr |= MSR_LE;
+
+	kvmppc_set_msr(vcpu, new_msr);
 }
 
 static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index c5c052a..9189ac5 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -1110,6 +1110,9 @@ static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
 	case KVM_REG_PPC_HIOR:
 		*val = get_reg_val(id, to_book3s(vcpu)->hior);
 		break;
+	case KVM_REG_PPC_LPCR:
+		*val = get_reg_val(id, to_book3s(vcpu)->lpcr);
+		break;
 	default:
 		r = -EINVAL;
 		break;
@@ -1128,6 +1131,9 @@ static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
 		to_book3s(vcpu)->hior = set_reg_val(id, *val);
 		to_book3s(vcpu)->hior_explicit = true;
 		break;
+	case KVM_REG_PPC_LPCR:
+		to_book3s(vcpu)->lpcr = set_reg_val(id, *val) & LPCR_ILE;
+		break;
 	default:
 		r = -EINVAL;
 		break;
-- 
1.8.1.4


  reply	other threads:[~2014-04-24 13:12 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-24 13:12 [PATCH 00/13] PPC: KVM: Enable PR KVM on ppc64le Alexander Graf
2014-04-24 13:12 ` Alexander Graf
2014-04-24 13:12 ` Alexander Graf [this message]
2014-04-24 13:12   ` [PATCH 01/13] KVM: PPC: Book3S PR: Implement LPCR ONE_REG Alexander Graf
2014-04-24 13:12 ` [PATCH 02/13] KVM: PPC: Book3S: PR: Fix C/R bit setting Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-05-10  7:11   ` Paul Mackerras
2014-05-10  7:11     ` Paul Mackerras
2014-04-24 13:12 ` [PATCH 03/13] KVM: PPC: Book3S_32: PR: Access HTAB in big endian Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 04/13] KVM: PPC: Book3S_64 " Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 05/13] KVM: PPC: Book3S_64 PR: Access shadow slb " Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 06/13] KVM: PPC: Book3S PR: Give guest control over MSR_LE Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 07/13] KVM: PPC: Book3S PR: Default to big endian guest Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 08/13] KVM: PPC: Book3S PR: PAPR: Access HTAB in big endian Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 09/13] KVM: PPC: Book3S PR: PAPR: Access RTAS " Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 10/13] KVM: PPC: PR: Fill pvinfo hcall instructions " Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 11/13] KVM: PPC: Make shared struct aka magic page guest endian Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 12/13] KVM: PPC: Book3S PR: Do dcbz32 patching with big endian instructions Alexander Graf
2014-04-24 13:12   ` Alexander Graf
2014-04-24 13:12 ` [PATCH 13/13] KVM: PPC: Book3S: Move little endian conflict to HV KVM Alexander Graf
2014-04-24 13:12   ` Alexander Graf

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