From: Mark Salter <msalter-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
To: Ard Biesheuvel <ard.biesheuvel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: linux-efi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
leif.lindholm-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
matt.fleming-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
Subject: Re: [PATCH 1/3] arm64: spin-table: handle unmapped cpu-release-addrs
Date: Tue, 29 Jul 2014 11:15:45 -0400 [thread overview]
Message-ID: <1406646945.753.5.camel@deneb.redhat.com> (raw)
In-Reply-To: <1406630950-32432-2-git-send-email-ard.biesheuvel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
On Tue, 2014-07-29 at 12:49 +0200, Ard Biesheuvel wrote:
> From: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
>
> In certain cases the cpu-release-addr of a CPU may not fall in the
> linear mapping (e.g. when the kernel is loaded above this address due to
> the presence of other images in memory). This is problematic for the
> spin-table code as it assumes that it can trivially convert a
> cpu-release-addr to a valid VA in the linear map.
>
> This patch modifies the spin-table code to use a temporary cached
> mapping to write to a given cpu-release-addr, enabling us to support
> addresses regardless of whether they are covered by the linear mapping.
>
> Signed-off-by: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
> ---
> arch/arm64/kernel/smp_spin_table.c | 21 ++++++++++++++++-----
> 1 file changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c
> index 0347d38eea29..70181c1bf42d 100644
> --- a/arch/arm64/kernel/smp_spin_table.c
> +++ b/arch/arm64/kernel/smp_spin_table.c
> @@ -20,6 +20,7 @@
> #include <linux/init.h>
> #include <linux/of.h>
> #include <linux/smp.h>
> +#include <linux/types.h>
>
> #include <asm/cacheflush.h>
> #include <asm/cpu_ops.h>
> @@ -65,12 +66,21 @@ static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
>
> static int smp_spin_table_cpu_prepare(unsigned int cpu)
> {
> - void **release_addr;
> + __le64 __iomem *release_addr;
>
> if (!cpu_release_addr[cpu])
> return -ENODEV;
>
> - release_addr = __va(cpu_release_addr[cpu]);
> + /*
> + * The cpu-release-addr may or may not be inside the linear mapping.
> + * As ioremap_cache will either give us a new mapping or reuse the
> + * existing linear mapping, we can use it to cover both cases. In
> + * either case the memory will be MT_NORMAL.
> + */
> + release_addr = ioremap_cache(cpu_release_addr[cpu],
> + sizeof(*release_addr));
> + if (!release_addr)
> + return -ENOMEM;
>
> /*
> * We write the release address as LE regardless of the native
> @@ -79,15 +89,16 @@ static int smp_spin_table_cpu_prepare(unsigned int cpu)
> * boot-loader's endianess before jumping. This is mandated by
> * the boot protocol.
> */
> - release_addr[0] = (void *) cpu_to_le64(__pa(secondary_holding_pen));
> -
> - __flush_dcache_area(release_addr, sizeof(release_addr[0]));
> + writeq_relaxed(__pa(secondary_holding_pen), release_addr);
> + __flush_dcache_area(release_addr, sizeof(*release_addr));
__flush_dcache_area((__force void *)release_addr, ...
to avoid sparse warning.
>
> /*
> * Send an event to wake up the secondary CPU.
> */
> sev();
>
> + iounmap(release_addr);
> +
> return 0;
> }
>
WARNING: multiple messages have this Message-ID (diff)
From: msalter@redhat.com (Mark Salter)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: spin-table: handle unmapped cpu-release-addrs
Date: Tue, 29 Jul 2014 11:15:45 -0400 [thread overview]
Message-ID: <1406646945.753.5.camel@deneb.redhat.com> (raw)
In-Reply-To: <1406630950-32432-2-git-send-email-ard.biesheuvel@linaro.org>
On Tue, 2014-07-29 at 12:49 +0200, Ard Biesheuvel wrote:
> From: Mark Rutland <mark.rutland@arm.com>
>
> In certain cases the cpu-release-addr of a CPU may not fall in the
> linear mapping (e.g. when the kernel is loaded above this address due to
> the presence of other images in memory). This is problematic for the
> spin-table code as it assumes that it can trivially convert a
> cpu-release-addr to a valid VA in the linear map.
>
> This patch modifies the spin-table code to use a temporary cached
> mapping to write to a given cpu-release-addr, enabling us to support
> addresses regardless of whether they are covered by the linear mapping.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> ---
> arch/arm64/kernel/smp_spin_table.c | 21 ++++++++++++++++-----
> 1 file changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c
> index 0347d38eea29..70181c1bf42d 100644
> --- a/arch/arm64/kernel/smp_spin_table.c
> +++ b/arch/arm64/kernel/smp_spin_table.c
> @@ -20,6 +20,7 @@
> #include <linux/init.h>
> #include <linux/of.h>
> #include <linux/smp.h>
> +#include <linux/types.h>
>
> #include <asm/cacheflush.h>
> #include <asm/cpu_ops.h>
> @@ -65,12 +66,21 @@ static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
>
> static int smp_spin_table_cpu_prepare(unsigned int cpu)
> {
> - void **release_addr;
> + __le64 __iomem *release_addr;
>
> if (!cpu_release_addr[cpu])
> return -ENODEV;
>
> - release_addr = __va(cpu_release_addr[cpu]);
> + /*
> + * The cpu-release-addr may or may not be inside the linear mapping.
> + * As ioremap_cache will either give us a new mapping or reuse the
> + * existing linear mapping, we can use it to cover both cases. In
> + * either case the memory will be MT_NORMAL.
> + */
> + release_addr = ioremap_cache(cpu_release_addr[cpu],
> + sizeof(*release_addr));
> + if (!release_addr)
> + return -ENOMEM;
>
> /*
> * We write the release address as LE regardless of the native
> @@ -79,15 +89,16 @@ static int smp_spin_table_cpu_prepare(unsigned int cpu)
> * boot-loader's endianess before jumping. This is mandated by
> * the boot protocol.
> */
> - release_addr[0] = (void *) cpu_to_le64(__pa(secondary_holding_pen));
> -
> - __flush_dcache_area(release_addr, sizeof(release_addr[0]));
> + writeq_relaxed(__pa(secondary_holding_pen), release_addr);
> + __flush_dcache_area(release_addr, sizeof(*release_addr));
__flush_dcache_area((__force void *)release_addr, ...
to avoid sparse warning.
>
> /*
> * Send an event to wake up the secondary CPU.
> */
> sev();
>
> + iounmap(release_addr);
> +
> return 0;
> }
>
next prev parent reply other threads:[~2014-07-29 15:15 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-29 10:49 [PATCH 0/3] arm64/efi: improve TEXT_OFFSET handling Ard Biesheuvel
2014-07-29 10:49 ` Ard Biesheuvel
[not found] ` <1406630950-32432-1-git-send-email-ard.biesheuvel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-07-29 10:49 ` [PATCH 1/3] arm64: spin-table: handle unmapped cpu-release-addrs Ard Biesheuvel
2014-07-29 10:49 ` Ard Biesheuvel
[not found] ` <1406630950-32432-2-git-send-email-ard.biesheuvel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-07-29 15:15 ` Mark Salter [this message]
2014-07-29 15:15 ` Mark Salter
[not found] ` <1406646945.753.5.camel-PDpCo7skNiwAicBL8TP8PQ@public.gmane.org>
2014-07-29 15:17 ` Mark Salter
2014-07-29 15:17 ` Mark Salter
2014-07-29 15:20 ` Arnd Bergmann
2014-07-29 15:20 ` Arnd Bergmann
2014-07-29 15:30 ` Mark Salter
2014-07-29 15:30 ` Mark Salter
[not found] ` <1406647824.753.12.camel-PDpCo7skNiwAicBL8TP8PQ@public.gmane.org>
2014-07-29 15:38 ` Arnd Bergmann
2014-07-29 15:38 ` Arnd Bergmann
2014-07-29 16:03 ` Mark Rutland
2014-07-29 16:03 ` Mark Rutland
2014-07-29 16:13 ` Arnd Bergmann
2014-07-29 16:13 ` Arnd Bergmann
2014-07-29 16:18 ` Mark Rutland
2014-07-29 16:18 ` Mark Rutland
2014-07-29 16:24 ` Arnd Bergmann
2014-07-29 16:24 ` Arnd Bergmann
2014-07-29 10:49 ` [PATCH 2/3] arm64/efi: efistub: cover entire static mem footprint in PE/COFF .text Ard Biesheuvel
2014-07-29 10:49 ` Ard Biesheuvel
[not found] ` <1406630950-32432-3-git-send-email-ard.biesheuvel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-07-29 15:36 ` Mark Salter
2014-07-29 15:36 ` Mark Salter
2014-07-29 10:49 ` [PATCH 3/3] arm64/efi: efistub: don't abort if base of DRAM is occupied Ard Biesheuvel
2014-07-29 10:49 ` Ard Biesheuvel
[not found] ` <1406630950-32432-4-git-send-email-ard.biesheuvel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-07-29 15:29 ` Mark Salter
2014-07-29 15:29 ` Mark Salter
[not found] ` <1406647756.753.11.camel-PDpCo7skNiwAicBL8TP8PQ@public.gmane.org>
2014-07-29 18:17 ` Ard Biesheuvel
2014-07-29 18:17 ` Ard Biesheuvel
[not found] ` <CAKv+Gu8Pwi6GuGq9jbGfHyALcJKtAG+KVDcVwpYVCG9ZKrhaPA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-07-29 18:27 ` Mark Salter
2014-07-29 18:27 ` Mark Salter
[not found] ` <1406658428.753.22.camel-PDpCo7skNiwAicBL8TP8PQ@public.gmane.org>
2014-07-29 18:46 ` Ard Biesheuvel
2014-07-29 18:46 ` Ard Biesheuvel
[not found] ` <CAKv+Gu-3J+1u1vcCAOgfq6JRfSc7_pykaV2OwGRNSOORTS1=1A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-07-29 19:20 ` Mark Salter
2014-07-29 19:20 ` Mark Salter
[not found] ` <1406661621.753.34.camel-PDpCo7skNiwAicBL8TP8PQ@public.gmane.org>
2014-07-29 19:33 ` Ard Biesheuvel
2014-07-29 19:33 ` Ard Biesheuvel
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