From: Toshi Kani <toshi.kani@hp.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>,
"H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
akpm@linuxfoundation.org, Arnd Bergmann <arnd@arndb.de>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Juergen Gross <jgross@suse.com>,
Stefan Bader <stefan.bader@canonical.com>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Subject: Re: [PATCH 1/5] x86, mm, pat: Set WT to PA4 slot of PAT MSR
Date: Fri, 05 Sep 2014 08:00:14 -0600 [thread overview]
Message-ID: <1409925614.28990.184.camel@misato.fc.hp.com> (raw)
In-Reply-To: <CALCETrUhbx4hFRAkHfczLkZBYo0E7tRmdFyO7bqPd5e9JEWcMA@mail.gmail.com>
On Thu, 2014-09-04 at 17:51 -0700, Andy Lutomirski wrote:
> On Thu, Sep 4, 2014 at 5:29 PM, Toshi Kani <toshi.kani@hp.com> wrote:
> > On Thu, 2014-09-04 at 16:34 -0700, Andy Lutomirski wrote:
> >> On Thu, Sep 4, 2014 at 4:19 PM, Henrique de Moraes Holschuh
> >> <hmh@hmh.eng.br> wrote:
> >> > On Thu, 04 Sep 2014, H. Peter Anvin wrote:
> >> >> On 09/04/2014 01:11 PM, Henrique de Moraes Holschuh wrote:
> >> >> > I am worried of uncharted territory, here. I'd actually advocate for not
> >> >> > enabling the upper four PAT entries on IA-32 at all, unless Windows 9X / XP
> >> >> > is using them as well. Is this a real concern, or am I being overly
> >> >> > cautious?
> >> >>
> >> >> It is extremely unlikely that we'd have PAT issues in 32-bit mode and
> >> >> not in 64-bit mode on the same CPU.
> >> >
> >> > Sure, but is it really a good idea to enable this on the *old* non-64-bit
> >> > capable processors (note: I don't mean x86-64 processors operating in 32-bit
> >> > mode) ?
> >> >
> >> >> As far as I know, the current blacklist rule is very conservative due to
> >> >> lack of testing more than anything else.
> >> >
> >> > I was told that much in 2009 when I asked why cpuid 0x6d8 was blacklisted
> >> > from using PAT :-)
> >>
> >> At the very least, anyone who plugs an NV-DIMM into a 32-bit machine
> >> is nuts, and not just because I'd be somewhat amazed if it even
> >> physically fits into the slot. :)
> >
> > According to the spec, the upper four entries bug was fixed in Pentium 4
> > model 0x1. So, the remaining Intel 32-bit processors that may enable
> > the upper four entries are Pentium 4 model 0x1-4. Should we disable it
> > for all Pentium 4 models?
>
> Assuming that this is Pentium 4 erratum N46, then there may be another
> option: use slot 7 instead of slot 4 for WT. Then, even if somehow
> the blacklist screws up, the worst that happens is that a WT page gets
> interpreted as UC. I suppose this could cause aliasing issues, but
> can't cause problems for people who don't use the high entries in the
> first place.
That's a fine idea, but as Ingo also suggested, I am going to disable
this feature on all Pentium 4 models. That should give us a safety
margin. Using slot 4 has a benefit that it keeps the PAT setup
consistent with Xen.
Thanks,
-Toshi
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WARNING: multiple messages have this Message-ID (diff)
From: Toshi Kani <toshi.kani@hp.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>,
"H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
akpm@linuxfoundation.org, Arnd Bergmann <arnd@arndb.de>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Juergen Gross <jgross@suse.com>,
Stefan Bader <stefan.bader@canonical.com>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Subject: Re: [PATCH 1/5] x86, mm, pat: Set WT to PA4 slot of PAT MSR
Date: Fri, 05 Sep 2014 08:00:14 -0600 [thread overview]
Message-ID: <1409925614.28990.184.camel@misato.fc.hp.com> (raw)
In-Reply-To: <CALCETrUhbx4hFRAkHfczLkZBYo0E7tRmdFyO7bqPd5e9JEWcMA@mail.gmail.com>
On Thu, 2014-09-04 at 17:51 -0700, Andy Lutomirski wrote:
> On Thu, Sep 4, 2014 at 5:29 PM, Toshi Kani <toshi.kani@hp.com> wrote:
> > On Thu, 2014-09-04 at 16:34 -0700, Andy Lutomirski wrote:
> >> On Thu, Sep 4, 2014 at 4:19 PM, Henrique de Moraes Holschuh
> >> <hmh@hmh.eng.br> wrote:
> >> > On Thu, 04 Sep 2014, H. Peter Anvin wrote:
> >> >> On 09/04/2014 01:11 PM, Henrique de Moraes Holschuh wrote:
> >> >> > I am worried of uncharted territory, here. I'd actually advocate for not
> >> >> > enabling the upper four PAT entries on IA-32 at all, unless Windows 9X / XP
> >> >> > is using them as well. Is this a real concern, or am I being overly
> >> >> > cautious?
> >> >>
> >> >> It is extremely unlikely that we'd have PAT issues in 32-bit mode and
> >> >> not in 64-bit mode on the same CPU.
> >> >
> >> > Sure, but is it really a good idea to enable this on the *old* non-64-bit
> >> > capable processors (note: I don't mean x86-64 processors operating in 32-bit
> >> > mode) ?
> >> >
> >> >> As far as I know, the current blacklist rule is very conservative due to
> >> >> lack of testing more than anything else.
> >> >
> >> > I was told that much in 2009 when I asked why cpuid 0x6d8 was blacklisted
> >> > from using PAT :-)
> >>
> >> At the very least, anyone who plugs an NV-DIMM into a 32-bit machine
> >> is nuts, and not just because I'd be somewhat amazed if it even
> >> physically fits into the slot. :)
> >
> > According to the spec, the upper four entries bug was fixed in Pentium 4
> > model 0x1. So, the remaining Intel 32-bit processors that may enable
> > the upper four entries are Pentium 4 model 0x1-4. Should we disable it
> > for all Pentium 4 models?
>
> Assuming that this is Pentium 4 erratum N46, then there may be another
> option: use slot 7 instead of slot 4 for WT. Then, even if somehow
> the blacklist screws up, the worst that happens is that a WT page gets
> interpreted as UC. I suppose this could cause aliasing issues, but
> can't cause problems for people who don't use the high entries in the
> first place.
That's a fine idea, but as Ingo also suggested, I am going to disable
this feature on all Pentium 4 models. That should give us a safety
margin. Using slot 4 has a benefit that it keeps the PAT setup
consistent with Xen.
Thanks,
-Toshi
next prev parent reply other threads:[~2014-09-05 14:11 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-04 18:35 [PATCH 0/5] Support Write-Through mapping on x86 Toshi Kani
2014-09-04 18:35 ` Toshi Kani
2014-09-04 18:35 ` [PATCH 1/5] x86, mm, pat: Set WT to PA4 slot of PAT MSR Toshi Kani
2014-09-04 18:35 ` Toshi Kani
2014-09-04 20:11 ` Henrique de Moraes Holschuh
2014-09-04 20:11 ` Henrique de Moraes Holschuh
2014-09-04 20:21 ` H. Peter Anvin
2014-09-04 20:21 ` H. Peter Anvin
2014-09-04 23:19 ` Henrique de Moraes Holschuh
2014-09-04 23:19 ` Henrique de Moraes Holschuh
2014-09-04 23:34 ` Andy Lutomirski
2014-09-04 23:34 ` Andy Lutomirski
2014-09-05 0:29 ` Toshi Kani
2014-09-05 0:29 ` Toshi Kani
2014-09-05 0:51 ` Andy Lutomirski
2014-09-05 0:51 ` Andy Lutomirski
2014-09-05 14:00 ` Toshi Kani [this message]
2014-09-05 14:00 ` Toshi Kani
2014-09-05 15:07 ` H. Peter Anvin
2014-09-05 15:07 ` H. Peter Anvin
2014-09-05 15:22 ` Toshi Kani
2014-09-05 15:22 ` Toshi Kani
2014-09-05 15:41 ` H. Peter Anvin
2014-09-05 15:41 ` H. Peter Anvin
2014-09-05 15:42 ` Toshi Kani
2014-09-05 15:42 ` Toshi Kani
2014-09-12 19:25 ` Konrad Rzeszutek Wilk
2014-09-12 19:25 ` Konrad Rzeszutek Wilk
2014-09-12 20:03 ` Andy Lutomirski
2014-09-12 20:03 ` Andy Lutomirski
2014-09-12 20:21 ` Konrad Rzeszutek Wilk
2014-09-12 20:21 ` Konrad Rzeszutek Wilk
2014-09-04 20:31 ` Toshi Kani
2014-09-04 20:31 ` Toshi Kani
2014-09-04 20:50 ` Andy Lutomirski
2014-09-04 20:50 ` Andy Lutomirski
2014-09-04 23:27 ` Toshi Kani
2014-09-04 23:27 ` Toshi Kani
2014-09-05 10:23 ` Ingo Molnar
2014-09-05 10:23 ` Ingo Molnar
2014-09-05 13:50 ` Toshi Kani
2014-09-05 13:50 ` Toshi Kani
2014-09-07 13:58 ` Henrique de Moraes Holschuh
2014-09-07 13:58 ` Henrique de Moraes Holschuh
2014-09-04 18:35 ` [PATCH 2/5] x86, mm, pat: Change reserve_memtype() to handle WT Toshi Kani
2014-09-04 18:35 ` Toshi Kani
2014-09-04 18:35 ` [PATCH 3/5] x86, mm, asm-gen: Add ioremap_wt() for WT Toshi Kani
2014-09-04 18:35 ` Toshi Kani
2014-09-04 18:35 ` [PATCH 4/5] x86, mm: Add set_memory_wt() " Toshi Kani
2014-09-04 18:35 ` Toshi Kani
2014-09-04 18:57 ` Andy Lutomirski
2014-09-04 18:57 ` Andy Lutomirski
2014-09-04 18:57 ` Toshi Kani
2014-09-04 18:57 ` Toshi Kani
2014-09-04 19:14 ` Andy Lutomirski
2014-09-04 19:14 ` Andy Lutomirski
2014-09-04 19:30 ` Toshi Kani
2014-09-07 8:49 ` Yigal Korman
2014-09-07 8:49 ` Yigal Korman
2014-09-07 16:49 ` Andy Lutomirski
2014-09-07 16:49 ` Andy Lutomirski
2014-09-08 15:07 ` Toshi Kani
2014-09-08 15:07 ` Toshi Kani
2014-09-08 17:23 ` Andy Lutomirski
2014-09-08 17:23 ` Andy Lutomirski
2014-09-08 18:42 ` Toshi Kani
2014-09-08 18:42 ` Toshi Kani
2014-09-04 18:35 ` [PATCH 5/5] x86, mm, pat: Add pgprot_writethrough() " Toshi Kani
2014-09-04 18:35 ` Toshi Kani
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