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From: Kevin Wolf <kwolf@redhat.com>
To: qemu-block@nongnu.org
Cc: kwolf@redhat.com, jsnow@redhat.com, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 8/8] fdc-test: Test state for existing cases more thoroughly
Date: Tue, 19 May 2015 17:36:02 +0200	[thread overview]
Message-ID: <1432049762-2184-9-git-send-email-kwolf@redhat.com> (raw)
In-Reply-To: <1432049762-2184-1-git-send-email-kwolf@redhat.com>

This just adds a few additional checks of the MSR and interrupt pin to
the already existing test cases.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
---
 tests/fdc-test.c | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/tests/fdc-test.c b/tests/fdc-test.c
index 3c6c83c..416394f 100644
--- a/tests/fdc-test.c
+++ b/tests/fdc-test.c
@@ -218,6 +218,10 @@ static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
         inb(FLOPPY_BASE + reg_fifo);
     }
 
+    msr = inb(FLOPPY_BASE + reg_msr);
+    assert_bit_set(msr, BUSY | RQM | DIO);
+    g_assert(get_irq(FLOPPY_IRQ));
+
     st0 = floppy_recv();
     if (st0 != expected_st0) {
         ret = 1;
@@ -228,8 +232,15 @@ static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
     floppy_recv();
     floppy_recv();
     floppy_recv();
+    g_assert(get_irq(FLOPPY_IRQ));
     floppy_recv();
 
+    /* Check that we're back in command phase */
+    msr = inb(FLOPPY_BASE + reg_msr);
+    assert_bit_clear(msr, BUSY | DIO);
+    assert_bit_set(msr, RQM);
+    g_assert(!get_irq(FLOPPY_IRQ));
+
     return ret;
 }
 
@@ -403,6 +414,7 @@ static void test_read_id(void)
     uint8_t head = 0;
     uint8_t cyl;
     uint8_t st0;
+    uint8_t msr;
 
     /* Seek to track 0 and check with READ ID */
     send_seek(0);
@@ -411,18 +423,29 @@ static void test_read_id(void)
     g_assert(!get_irq(FLOPPY_IRQ));
     floppy_send(head << 2 | drive);
 
+    msr = inb(FLOPPY_BASE + reg_msr);
+    if (!get_irq(FLOPPY_IRQ)) {
+        assert_bit_set(msr, BUSY);
+        assert_bit_clear(msr, RQM);
+    }
+
     while (!get_irq(FLOPPY_IRQ)) {
         /* qemu involves a timer with READ ID... */
         clock_step(1000000000LL / 50);
     }
 
+    msr = inb(FLOPPY_BASE + reg_msr);
+    assert_bit_set(msr, BUSY | RQM | DIO);
+
     st0 = floppy_recv();
     floppy_recv();
     floppy_recv();
     cyl = floppy_recv();
     head = floppy_recv();
     floppy_recv();
+    g_assert(get_irq(FLOPPY_IRQ));
     floppy_recv();
+    g_assert(!get_irq(FLOPPY_IRQ));
 
     g_assert_cmpint(cyl, ==, 0);
     g_assert_cmpint(head, ==, 0);
@@ -443,18 +466,29 @@ static void test_read_id(void)
     g_assert(!get_irq(FLOPPY_IRQ));
     floppy_send(head << 2 | drive);
 
+    msr = inb(FLOPPY_BASE + reg_msr);
+    if (!get_irq(FLOPPY_IRQ)) {
+        assert_bit_set(msr, BUSY);
+        assert_bit_clear(msr, RQM);
+    }
+
     while (!get_irq(FLOPPY_IRQ)) {
         /* qemu involves a timer with READ ID... */
         clock_step(1000000000LL / 50);
     }
 
+    msr = inb(FLOPPY_BASE + reg_msr);
+    assert_bit_set(msr, BUSY | RQM | DIO);
+
     st0 = floppy_recv();
     floppy_recv();
     floppy_recv();
     cyl = floppy_recv();
     head = floppy_recv();
     floppy_recv();
+    g_assert(get_irq(FLOPPY_IRQ));
     floppy_recv();
+    g_assert(!get_irq(FLOPPY_IRQ));
 
     g_assert_cmpint(cyl, ==, 8);
     g_assert_cmpint(head, ==, 1);
-- 
1.8.3.1

  parent reply	other threads:[~2015-05-19 15:36 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-19 15:35 [Qemu-devel] [PATCH 0/8] fdc: Clean up and fix command processing Kevin Wolf
2015-05-19 15:35 ` [Qemu-devel] [PATCH 1/8] fdc: Rename fdctrl_reset_fifo() to fdctrl_to_command_phase() Kevin Wolf
2015-05-19 20:37   ` John Snow
2015-05-19 15:35 ` [Qemu-devel] [PATCH 2/8] fdc: Rename fdctrl_set_fifo() to fdctrl_to_result_phase() Kevin Wolf
2015-05-19 20:38   ` John Snow
2015-05-19 15:35 ` [Qemu-devel] [PATCH 3/8] fdc: Introduce fdctrl->phase Kevin Wolf
2015-05-19 20:38   ` John Snow
2015-05-19 20:44   ` Peter Maydell
2015-05-19 20:52     ` John Snow
2015-05-19 20:57       ` Peter Maydell
2015-05-20  7:54         ` Kevin Wolf
2015-05-20  8:06           ` Peter Maydell
2015-05-20  8:43             ` Kevin Wolf
2015-05-20  9:24               ` Peter Maydell
2015-05-20 11:55                 ` John Snow
2015-05-20 12:07                   ` Peter Maydell
2015-05-21  9:42                     ` Kevin Wolf
2015-05-21  9:47                       ` Dr. David Alan Gilbert
2015-05-21 10:11                       ` Peter Maydell
2015-05-21 10:31                         ` Kevin Wolf
2015-05-21 11:09                           ` Markus Armbruster
2015-05-21 11:14                             ` Peter Maydell
2015-05-21 11:37                               ` Dr. David Alan Gilbert
2015-05-19 15:35 ` [Qemu-devel] [PATCH 4/8] fdc: Use phase in fdctrl_write_data() Kevin Wolf
2015-05-19 20:39   ` John Snow
2015-05-19 20:52   ` Peter Maydell
2015-05-19 15:35 ` [Qemu-devel] [PATCH 5/8] fdc: Code cleanup " Kevin Wolf
2015-05-19 20:40   ` John Snow
2015-05-20  8:18     ` Kevin Wolf
2015-05-19 15:36 ` [Qemu-devel] [PATCH 6/8] fdc: Disentangle phases in fdctrl_read_data() Kevin Wolf
2015-05-19 20:40   ` John Snow
2015-05-20  8:25     ` Kevin Wolf
2015-05-20 11:59       ` John Snow
2015-05-19 15:36 ` [Qemu-devel] [PATCH 7/8] fdc: Fix MSR.RQM flag Kevin Wolf
2015-05-19 20:40   ` John Snow
2015-05-20  8:14     ` Kevin Wolf
2015-05-20 11:58       ` John Snow
2015-05-19 15:36 ` Kevin Wolf [this message]
2015-05-19 20:41   ` [Qemu-devel] [PATCH 8/8] fdc-test: Test state for existing cases more thoroughly John Snow
2015-05-19 20:37 ` [Qemu-devel] [PATCH 0/8] fdc: Clean up and fix command processing John Snow

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