From: Scott Wood <scottwood@freescale.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org,
Liu Gang <Gang.Liu@freescale.com>,
robh+dt@kernel.org, linus.walleij@linaro.org,
shawnguo@kernel.org, devicetree@vger.kernel.org,
R58472@freescale.com, Shaveta Leekha <shaveta@freescale.com>,
b07421@freescale.com, bhupesh.sharma@freescale.com,
linux-gpio@vger.kernel.org
Subject: Re: [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform
Date: Wed, 4 Nov 2015 03:17:38 -0600 [thread overview]
Message-ID: <1446628658.12676.14.camel@freescale.com> (raw)
In-Reply-To: <4040829.fHtCUjX87j@wuerfel>
On Wed, 2015-11-04 at 09:53 +0100, Arnd Bergmann wrote:
> On Wednesday 04 November 2015 14:48:24 Liu Gang wrote:
> >
> > +static bool gpio_little_endian;
> > +static inline u32 gpio_in32(void __iomem *addr)
> > +{
> > + u32 val;
> > +
> > + if (gpio_little_endian)
> > + val = ioread32(addr);
> > + else
> > + val = ioread32be(addr);
> > +
> > + return val;
> > +}
> > +
> > +static inline void gpio_out32(u32 val, void __iomem *addr)
> > +{
> > + if (gpio_little_endian)
> > + iowrite32(val, addr);
> > + else
> > + iowrite32be(val, addr);
> > +}
>
> I guess this is fixed per architecture, so you could also do this as
>
> static inline void gpio_out32(u32 val, void __iomem *addr)
> {
> if (IS_ENABLED(CONFIG_ARM))
> iowrite32(val, addr);
> else if (IS_ENABLED(CONFIG_PPC)
> iowrite32be(val, addr);
> else
> BUG();
> }
Unfortunately that guess is wrong. Some of our ARM chips have big-endian I/O
and some have little-endian I/O.
-Scott
WARNING: multiple messages have this Message-ID (diff)
From: scottwood@freescale.com (Scott Wood)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform
Date: Wed, 4 Nov 2015 03:17:38 -0600 [thread overview]
Message-ID: <1446628658.12676.14.camel@freescale.com> (raw)
In-Reply-To: <4040829.fHtCUjX87j@wuerfel>
On Wed, 2015-11-04 at 09:53 +0100, Arnd Bergmann wrote:
> On Wednesday 04 November 2015 14:48:24 Liu Gang wrote:
> >
> > +static bool gpio_little_endian;
> > +static inline u32 gpio_in32(void __iomem *addr)
> > +{
> > + u32 val;
> > +
> > + if (gpio_little_endian)
> > + val = ioread32(addr);
> > + else
> > + val = ioread32be(addr);
> > +
> > + return val;
> > +}
> > +
> > +static inline void gpio_out32(u32 val, void __iomem *addr)
> > +{
> > + if (gpio_little_endian)
> > + iowrite32(val, addr);
> > + else
> > + iowrite32be(val, addr);
> > +}
>
> I guess this is fixed per architecture, so you could also do this as
>
> static inline void gpio_out32(u32 val, void __iomem *addr)
> {
> if (IS_ENABLED(CONFIG_ARM))
> iowrite32(val, addr);
> else if (IS_ENABLED(CONFIG_PPC)
> iowrite32be(val, addr);
> else
> BUG();
> }
Unfortunately that guess is wrong. Some of our ARM chips have big-endian I/O
and some have little-endian I/O.
-Scott
next prev parent reply other threads:[~2015-11-04 9:17 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 6:48 [PATCH 1/2] ls2080a/dts: Add little endian property for GPIO IP block Liu Gang
2015-11-04 6:48 ` Liu Gang
2015-11-04 6:48 ` [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform Liu Gang
2015-11-04 6:48 ` Liu Gang
2015-11-04 8:53 ` Arnd Bergmann
2015-11-04 8:53 ` Arnd Bergmann
2015-11-04 9:17 ` Scott Wood [this message]
2015-11-04 9:17 ` Scott Wood
2015-11-04 10:09 ` Arnd Bergmann
2015-11-04 10:09 ` Arnd Bergmann
2015-11-05 13:27 ` [PATCH 1/2] ls2080a/dts: Add little endian property for GPIO IP block Rob Herring
2015-11-05 13:27 ` Rob Herring
2015-11-24 6:57 ` Shawn Guo
2015-11-24 6:57 ` Shawn Guo
[not found] <1446549552-40675-1-git-send-email-Gang.Liu@freescale.com>
[not found] ` <1446549552-40675-2-git-send-email-Gang.Liu@freescale.com>
2015-11-16 15:09 ` [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform Linus Walleij
2015-11-16 15:09 ` Linus Walleij
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