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From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Scott Wood <scottwood@freescale.com>,
	devicetree@vger.kernel.org, R58472@freescale.com,
	b07421@freescale.com, Shaveta Leekha <shaveta@freescale.com>,
	linus.walleij@linaro.org, bhupesh.sharma@freescale.com,
	Liu Gang <Gang.Liu@freescale.com>,
	robh+dt@kernel.org, linux-gpio@vger.kernel.org,
	shawnguo@kernel.org
Subject: Re: [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform
Date: Wed, 04 Nov 2015 11:09:58 +0100	[thread overview]
Message-ID: <20116723.9FINQ9c1Gk@wuerfel> (raw)
In-Reply-To: <1446628658.12676.14.camel@freescale.com>

On Wednesday 04 November 2015 03:17:38 Scott Wood wrote:
> > I guess this is fixed per architecture, so you could also do this as
> > 
> > static inline void gpio_out32(u32 val, void __iomem *addr)
> > {
> >       if (IS_ENABLED(CONFIG_ARM))
> >               iowrite32(val, addr);
> >       else if (IS_ENABLED(CONFIG_PPC))
> >               iowrite32be(val, addr);
> >       else
> >               BUG();
> > }
> 
> Unfortunately that guess is wrong.  Some of our ARM chips have big-endian I/O 
> and some have little-endian I/O.

Ok, I see. In that case, using run-time detection everywhere is
probably best.

	Arnd

WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform
Date: Wed, 04 Nov 2015 11:09:58 +0100	[thread overview]
Message-ID: <20116723.9FINQ9c1Gk@wuerfel> (raw)
In-Reply-To: <1446628658.12676.14.camel@freescale.com>

On Wednesday 04 November 2015 03:17:38 Scott Wood wrote:
> > I guess this is fixed per architecture, so you could also do this as
> > 
> > static inline void gpio_out32(u32 val, void __iomem *addr)
> > {
> >       if (IS_ENABLED(CONFIG_ARM))
> >               iowrite32(val, addr);
> >       else if (IS_ENABLED(CONFIG_PPC))
> >               iowrite32be(val, addr);
> >       else
> >               BUG();
> > }
> 
> Unfortunately that guess is wrong.  Some of our ARM chips have big-endian I/O 
> and some have little-endian I/O.

Ok, I see. In that case, using run-time detection everywhere is
probably best.

	Arnd

  reply	other threads:[~2015-11-04 10:10 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-04  6:48 [PATCH 1/2] ls2080a/dts: Add little endian property for GPIO IP block Liu Gang
2015-11-04  6:48 ` Liu Gang
2015-11-04  6:48 ` [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform Liu Gang
2015-11-04  6:48   ` Liu Gang
2015-11-04  8:53   ` Arnd Bergmann
2015-11-04  8:53     ` Arnd Bergmann
2015-11-04  9:17     ` Scott Wood
2015-11-04  9:17       ` Scott Wood
2015-11-04 10:09       ` Arnd Bergmann [this message]
2015-11-04 10:09         ` Arnd Bergmann
2015-11-05 13:27 ` [PATCH 1/2] ls2080a/dts: Add little endian property for GPIO IP block Rob Herring
2015-11-05 13:27   ` Rob Herring
2015-11-24  6:57 ` Shawn Guo
2015-11-24  6:57   ` Shawn Guo
     [not found] <1446549552-40675-1-git-send-email-Gang.Liu@freescale.com>
     [not found] ` <1446549552-40675-2-git-send-email-Gang.Liu@freescale.com>
2015-11-16 15:09   ` [PATCH 2/2] drivers/gpio: Port gpio driver to layerscape platform Linus Walleij
2015-11-16 15:09     ` Linus Walleij

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