From: tthayer@opensource.altera.com (tthayer at opensource.altera.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 01/11] EDAC: Altera L2 Kconfig change from select to depends upon.
Date: Mon, 7 Mar 2016 13:42:57 -0600 [thread overview]
Message-ID: <1457379787-8327-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1457379787-8327-1-git-send-email-tthayer@opensource.altera.com>
From: Thor Thayer <tthayer@opensource.altera.com>
Force L2 cache dependency instead of forcing selection of
L2 cache.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
v2 No change
---
drivers/edac/Kconfig | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 37755e6..6ca7474 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -378,12 +378,11 @@ config EDAC_ALTERA
config EDAC_ALTERA_L2C
bool "Altera L2 Cache ECC"
- depends on EDAC_ALTERA=y
- select CACHE_L2X0
+ depends on EDAC_ALTERA=y && CACHE_L2X0
help
Support for error detection and correction on the
Altera L2 cache Memory for Altera SoCs. This option
- requires L2 cache so it will force that selection.
+ requires L2 cache.
config EDAC_ALTERA_OCRAM
bool "Altera On-Chip RAM ECC"
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: <tthayer@opensource.altera.com>
To: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, dinguyen@opensource.altera.com,
grant.likely@linaro.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com,
tthayer@opensource.altera.com
Subject: [PATCHv2 01/11] EDAC: Altera L2 Kconfig change from select to depends upon.
Date: Mon, 7 Mar 2016 13:42:57 -0600 [thread overview]
Message-ID: <1457379787-8327-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1457379787-8327-1-git-send-email-tthayer@opensource.altera.com>
From: Thor Thayer <tthayer@opensource.altera.com>
Force L2 cache dependency instead of forcing selection of
L2 cache.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
v2 No change
---
drivers/edac/Kconfig | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 37755e6..6ca7474 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -378,12 +378,11 @@ config EDAC_ALTERA
config EDAC_ALTERA_L2C
bool "Altera L2 Cache ECC"
- depends on EDAC_ALTERA=y
- select CACHE_L2X0
+ depends on EDAC_ALTERA=y && CACHE_L2X0
help
Support for error detection and correction on the
Altera L2 cache Memory for Altera SoCs. This option
- requires L2 cache so it will force that selection.
+ requires L2 cache.
config EDAC_ALTERA_OCRAM
bool "Altera On-Chip RAM ECC"
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: <tthayer@opensource.altera.com>
To: <bp@alien8.de>, <dougthompson@xmission.com>,
<m.chehab@samsung.com>, <robh+dt@kernel.org>,
<pawel.moll@arm.com>, <mark.rutland@arm.com>,
<ijc+devicetree@hellion.org.uk>, <galak@codeaurora.org>,
<linux@arm.linux.org.uk>, <dinguyen@opensource.altera.com>,
<grant.likely@linaro.org>
Cc: <devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <tthayer.linux@gmail.com>,
<tthayer@opensource.altera.com>
Subject: [PATCHv2 01/11] EDAC: Altera L2 Kconfig change from select to depends upon.
Date: Mon, 7 Mar 2016 13:42:57 -0600 [thread overview]
Message-ID: <1457379787-8327-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1457379787-8327-1-git-send-email-tthayer@opensource.altera.com>
From: Thor Thayer <tthayer@opensource.altera.com>
Force L2 cache dependency instead of forcing selection of
L2 cache.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
v2 No change
---
drivers/edac/Kconfig | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 37755e6..6ca7474 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -378,12 +378,11 @@ config EDAC_ALTERA
config EDAC_ALTERA_L2C
bool "Altera L2 Cache ECC"
- depends on EDAC_ALTERA=y
- select CACHE_L2X0
+ depends on EDAC_ALTERA=y && CACHE_L2X0
help
Support for error detection and correction on the
Altera L2 cache Memory for Altera SoCs. This option
- requires L2 cache so it will force that selection.
+ requires L2 cache.
config EDAC_ALTERA_OCRAM
bool "Altera On-Chip RAM ECC"
--
1.7.9.5
next prev parent reply other threads:[~2016-03-07 19:42 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-07 19:42 [PATCHv2 0/11] Series adding Altera Arria10 L2 Cache EDAC tthayer at opensource.altera.com
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer at opensource.altera.com [this message]
2016-03-07 19:42 ` [PATCHv2 01/11] EDAC: Altera L2 Kconfig change from select to depends upon tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` [PATCHv2 02/11] EDAC, altera: Move Device structs and defines to header file tthayer at opensource.altera.com
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` [PATCHv2 03/11] EDAC, altera: Add register offset for ECC Enable tthayer at opensource.altera.com
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:43 ` [PATCHv2 04/11] EDAC, altera: Add register offset for ECC Error Inject tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 05/11] EDAC, altera: Add register offset for ECC Error Clear tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 06/11] EDAC, altera: Add IRQ flags to private data struct tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 07/11] EDAC, altera: Add status offset & masks tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-08 15:52 ` Thor Thayer
2016-03-08 15:52 ` Thor Thayer
2016-03-08 15:52 ` Thor Thayer
2016-03-07 19:43 ` [PATCHv2 08/11] Documentation: dt: socfpga: Add Altera Arria10 L2 cache binding tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 09/11] EDAC, altera: Addition of Arria10 L2 Cache ECC tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 10/11] ARM: socfpga: Enable Arria10 L2 cache ECC on startup tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-08 14:45 ` Dinh Nguyen
2016-03-08 14:45 ` Dinh Nguyen
2016-03-08 14:45 ` Dinh Nguyen
2016-03-07 19:43 ` [PATCHv2 11/11] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-08 14:50 ` Dinh Nguyen
2016-03-08 14:50 ` Dinh Nguyen
2016-03-08 14:50 ` Dinh Nguyen
2016-03-08 15:59 ` Thor Thayer
2016-03-08 15:59 ` Thor Thayer
2016-03-08 15:59 ` Thor Thayer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1457379787-8327-2-git-send-email-tthayer@opensource.altera.com \
--to=tthayer@opensource.altera.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.