From: dinguyen@opensource.altera.com (Dinh Nguyen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 10/11] ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Date: Tue, 8 Mar 2016 08:45:26 -0600 [thread overview]
Message-ID: <56DEE586.8010102@opensource.altera.com> (raw)
In-Reply-To: <1457379787-8327-11-git-send-email-tthayer@opensource.altera.com>
On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
> enabled before data is stored in memory otherwise the ECC will fail
> on reads.
> Use DT_MACHINE to select Arria10 L2 cache function.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2: Split into 2 separate functions selected with DT_MACHINE.
> ---
> arch/arm/mach-socfpga/core.h | 1 +
> arch/arm/mach-socfpga/l2_cache.c | 49 ++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-socfpga/socfpga.c | 10 +++++++-
> 3 files changed, 59 insertions(+), 1 deletion(-)
>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Thanks,
Dinh
WARNING: multiple messages have this Message-ID (diff)
From: Dinh Nguyen <dinguyen@opensource.altera.com>
To: tthayer@opensource.altera.com, bp@alien8.de,
dougthompson@xmission.com, m.chehab@samsung.com,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, grant.likely@linaro.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com
Subject: Re: [PATCHv2 10/11] ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Date: Tue, 8 Mar 2016 08:45:26 -0600 [thread overview]
Message-ID: <56DEE586.8010102@opensource.altera.com> (raw)
In-Reply-To: <1457379787-8327-11-git-send-email-tthayer@opensource.altera.com>
On 03/07/2016 01:43 PM, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
> enabled before data is stored in memory otherwise the ECC will fail
> on reads.
> Use DT_MACHINE to select Arria10 L2 cache function.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2: Split into 2 separate functions selected with DT_MACHINE.
> ---
> arch/arm/mach-socfpga/core.h | 1 +
> arch/arm/mach-socfpga/l2_cache.c | 49 ++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-socfpga/socfpga.c | 10 +++++++-
> 3 files changed, 59 insertions(+), 1 deletion(-)
>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Thanks,
Dinh
WARNING: multiple messages have this Message-ID (diff)
From: Dinh Nguyen <dinguyen@opensource.altera.com>
To: <tthayer@opensource.altera.com>, <bp@alien8.de>,
<dougthompson@xmission.com>, <m.chehab@samsung.com>,
<robh+dt@kernel.org>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>, <linux@arm.linux.org.uk>,
<grant.likely@linaro.org>
Cc: <devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <tthayer.linux@gmail.com>
Subject: Re: [PATCHv2 10/11] ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Date: Tue, 8 Mar 2016 08:45:26 -0600 [thread overview]
Message-ID: <56DEE586.8010102@opensource.altera.com> (raw)
In-Reply-To: <1457379787-8327-11-git-send-email-tthayer@opensource.altera.com>
On 03/07/2016 01:43 PM, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
> enabled before data is stored in memory otherwise the ECC will fail
> on reads.
> Use DT_MACHINE to select Arria10 L2 cache function.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2: Split into 2 separate functions selected with DT_MACHINE.
> ---
> arch/arm/mach-socfpga/core.h | 1 +
> arch/arm/mach-socfpga/l2_cache.c | 49 ++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-socfpga/socfpga.c | 10 +++++++-
> 3 files changed, 59 insertions(+), 1 deletion(-)
>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Thanks,
Dinh
next prev parent reply other threads:[~2016-03-08 14:45 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-07 19:42 [PATCHv2 0/11] Series adding Altera Arria10 L2 Cache EDAC tthayer at opensource.altera.com
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` [PATCHv2 01/11] EDAC: Altera L2 Kconfig change from select to depends upon tthayer at opensource.altera.com
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` [PATCHv2 02/11] EDAC, altera: Move Device structs and defines to header file tthayer at opensource.altera.com
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` [PATCHv2 03/11] EDAC, altera: Add register offset for ECC Enable tthayer at opensource.altera.com
2016-03-07 19:42 ` tthayer
2016-03-07 19:42 ` tthayer
2016-03-07 19:43 ` [PATCHv2 04/11] EDAC, altera: Add register offset for ECC Error Inject tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 05/11] EDAC, altera: Add register offset for ECC Error Clear tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 06/11] EDAC, altera: Add IRQ flags to private data struct tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 07/11] EDAC, altera: Add status offset & masks tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-08 15:52 ` Thor Thayer
2016-03-08 15:52 ` Thor Thayer
2016-03-08 15:52 ` Thor Thayer
2016-03-07 19:43 ` [PATCHv2 08/11] Documentation: dt: socfpga: Add Altera Arria10 L2 cache binding tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 09/11] EDAC, altera: Addition of Arria10 L2 Cache ECC tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` [PATCHv2 10/11] ARM: socfpga: Enable Arria10 L2 cache ECC on startup tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-08 14:45 ` Dinh Nguyen [this message]
2016-03-08 14:45 ` Dinh Nguyen
2016-03-08 14:45 ` Dinh Nguyen
2016-03-07 19:43 ` [PATCHv2 11/11] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry tthayer at opensource.altera.com
2016-03-07 19:43 ` tthayer
2016-03-07 19:43 ` tthayer
2016-03-08 14:50 ` Dinh Nguyen
2016-03-08 14:50 ` Dinh Nguyen
2016-03-08 14:50 ` Dinh Nguyen
2016-03-08 15:59 ` Thor Thayer
2016-03-08 15:59 ` Thor Thayer
2016-03-08 15:59 ` Thor Thayer
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