[PATCH 00/10] shadow page table support V4

[PATCH 00/10] shadow page table support V4

[Chunming Zhou]

Since we cannot ensure VRAM is consistent after a GPU reset, page
table shadowing is necessary. Shadowed page tables are, in a sense, a
method to recover the consistent state of the page tables before the
reset occurred.

We need to allocate GTT bo as the shadow of VRAM bo when creating page table,
and make them the same. After gpu reset, we will need to use SDMA to copy GTT bo
content to VRAM bo, then page table will be recoveried.


V2:
Shadow bo uses a shadow entity running on normal run queue, after gpu reset,
we need to wait for all shadow jobs finished first, then recovery page table from shadow.

V3:
Addressed Christian comments for shadow bo part.

V4:
Switch back to update page table twice (one of two is for shadow)

Chunming Zhou (10):
  drm/amdgpu: add direct submision option for copy_buffer
  drm/amdgpu: sync bo and shadow V2
  drm/amdgpu: implement vm recovery function from shadow V2
  drm/amdgpu: update pd shadow while updating pd
  drm/amdgpu: update pt shadow while updating pt
  drm/amdgpu: link all vm clients
  drm/amdgpu: add vm_list_lock
  drm/amdgpu: recover page tables after gpu reset
  drm/amdgpu: add need backup function
  drm/amdgpu: add backup condition for vm

 drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  14 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c |   3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c        |   6 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |  38 +++++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    |  43 +++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h    |   5 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c      |   4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       |  21 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c        | 163 +++++++++++++++++++++-----
 9 files changed, 257 insertions(+), 40 deletions(-)

-- 
1.9.1

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[PATCH 01/10] drm/amdgpu: add direct submision option for copy_buffer

[Chunming Zhou]

Change-Id: I3acdcf24b0ccb86d5f2b0593ffcf3dad8b6ad29f
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c |  3 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c      |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 21 +++++++++++++++------
 4 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a996f4d..229bb32 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -437,7 +437,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring,
 		       uint64_t dst_offset,
 		       uint32_t byte_count,
 		       struct reservation_object *resv,
-		       struct fence **fence);
+		       struct fence **fence, bool direct_submit);
 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 			uint32_t src_data,
 			struct reservation_object *resv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
index 33e47a4..3453052 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
@@ -39,7 +39,8 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size,
 	start_jiffies = jiffies;
 	for (i = 0; i < n; i++) {
 		struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
-		r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence);
+		r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence,
+				       false);
 		if (r)
 			goto exit_do_move;
 		r = fence_wait(fence, false);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
index 05a53f4..b827c75 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
@@ -111,7 +111,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
 		amdgpu_bo_kunmap(gtt_obj[i]);
 
 		r = amdgpu_copy_buffer(ring, gtt_addr, vram_addr,
-				       size, NULL, &fence);
+				       size, NULL, &fence, false);
 
 		if (r) {
 			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
@@ -156,7 +156,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
 		amdgpu_bo_kunmap(vram_obj);
 
 		r = amdgpu_copy_buffer(ring, vram_addr, gtt_addr,
-				       size, NULL, &fence);
+				       size, NULL, &fence, false);
 
 		if (r) {
 			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 105bd22..536911c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -286,7 +286,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
 
 	r = amdgpu_copy_buffer(ring, old_start, new_start,
 			       new_mem->num_pages * PAGE_SIZE, /* bytes */
-			       bo->resv, &fence);
+			       bo->resv, &fence, false);
 	if (r)
 		return r;
 
@@ -1148,7 +1148,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring,
 		       uint64_t dst_offset,
 		       uint32_t byte_count,
 		       struct reservation_object *resv,
-		       struct fence **fence)
+		       struct fence **fence, bool direct_submit)
 {
 	struct amdgpu_device *adev = ring->adev;
 	struct amdgpu_job *job;
@@ -1192,10 +1192,19 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring,
 
 	amdgpu_ring_pad_ib(ring, &job->ibs[0]);
 	WARN_ON(job->ibs[0].length_dw > num_dw);
-	r = amdgpu_job_submit(job, ring, &adev->mman.entity,
-			      AMDGPU_FENCE_OWNER_UNDEFINED, fence);
-	if (r)
-		goto error_free;
+	if (direct_submit) {
+		r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs,
+				       NULL, NULL, fence);
+		job->fence = fence_get(*fence);
+		if (r)
+			DRM_ERROR("Error scheduling IBs (%d)\n", r);
+		amdgpu_job_free(job);
+	} else {
+		r = amdgpu_job_submit(job, ring, &adev->mman.entity,
+				      AMDGPU_FENCE_OWNER_UNDEFINED, fence);
+		if (r)
+			goto error_free;
+	}
 
 	return 0;
 
-- 
1.9.1

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[PATCH 02/10] drm/amdgpu: sync bo and shadow V2

[Chunming Zhou]

Use shadow flag to judge which direction to sync.
V2:
Don't need bo pin, so remove it.

Change-Id: I9b540970d3a24c6aebeaa94c99f66a89134c663d
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 43 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |  5 ++++
 2 files changed, 48 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 278017d..b517848 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -443,6 +443,49 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
 	return r;
 }
 
+int amdgpu_bo_backup_shadow(struct amdgpu_device *adev,
+			    struct amdgpu_ring *ring,
+			    struct amdgpu_bo *bo,
+			    struct reservation_object *resv,
+			    struct fence **fence,
+			    bool direct)
+
+{
+	struct amdgpu_bo *shadow = bo->shadow;
+	uint64_t bo_addr, shadow_addr;
+	int r;
+
+	if (!shadow)
+		return -EINVAL;
+
+	if (bo->backup_shadow == AMDGPU_BO_SHADOW_TO_NONE) {
+		DRM_INFO("No need to backup bo and shadow\n");
+		return 0;
+	}
+	bo_addr = amdgpu_bo_gpu_offset(bo);
+	shadow_addr = amdgpu_bo_gpu_offset(bo->shadow);
+
+	r = reservation_object_reserve_shared(bo->tbo.resv);
+	if (r)
+		goto err;
+
+	if (bo->backup_shadow & AMDGPU_BO_SHADOW_TO_PARENT)
+		r = amdgpu_copy_buffer(ring, shadow_addr, bo_addr,
+				       amdgpu_bo_size(bo), resv, fence,
+				       direct);
+	else
+		r = amdgpu_copy_buffer(ring, bo_addr, shadow_addr,
+				       amdgpu_bo_size(bo), resv, fence,
+				       direct);
+	if (!r) {
+		amdgpu_bo_fence(bo, *fence, true);
+		bo->backup_shadow = AMDGPU_BO_SHADOW_TO_NONE;
+	}
+err:
+
+	return r;
+}
+
 int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
 {
 	bool is_iomem;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index d650b42..bb076d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -155,6 +155,11 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
 void amdgpu_bo_fence(struct amdgpu_bo *bo, struct fence *fence,
 		     bool shared);
 u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
+int amdgpu_bo_backup_shadow(struct amdgpu_device *adev,
+			    struct amdgpu_ring *ring,
+			    struct amdgpu_bo *bo,
+			    struct reservation_object *resv,
+			    struct fence **fence, bool direct);
 
 /*
  * sub allocation
-- 
1.9.1

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[PATCH 03/10] drm/amdgpu: implement vm recovery function from shadow V2

[Chunming Zhou]

V2:
a. check the pt/pd if evicted, no need to recover for evicted pt/pd bo.
b. return fence to caller.

Change-Id: I46783043eecbe9fc9c2ce9230be1085aca3731bd
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  3 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 59 ++++++++++++++++++++++++++++++++++
 2 files changed, 62 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 229bb32..50fd971 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1010,6 +1010,9 @@ int amdgpu_vm_bo_unmap(struct amdgpu_device *adev,
 		       uint64_t addr);
 void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
 		      struct amdgpu_bo_va *bo_va);
+int amdgpu_vm_recover_page_table_from_shadow(struct amdgpu_device *adev,
+					     struct amdgpu_vm *vm,
+					     struct fence **fence);
 
 /*
  * context related structures
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 2843132..915a41a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -700,6 +700,65 @@ error_free:
 	return r;
 }
 
+int amdgpu_vm_recover_page_table_from_shadow(struct amdgpu_device *adev,
+					     struct amdgpu_vm *vm,
+					     struct fence **fence)
+{
+	struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
+	struct fence *f;
+	uint64_t pt_idx;
+	uint32_t domain;
+	int r;
+
+	if (!vm->page_directory->shadow)
+		return 0;
+
+	r = amdgpu_bo_reserve(vm->page_directory, false);
+	if (r)
+		return r;
+	domain = amdgpu_mem_type_to_domain(vm->page_directory->tbo.mem.mem_type);
+	/* if bo has been evicted, then no need to recover */
+	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
+		vm->page_directory->backup_shadow = AMDGPU_BO_SHADOW_TO_PARENT;
+		r = amdgpu_bo_backup_shadow(adev, ring,
+					    vm->page_directory,
+					    NULL, &f, true);
+		if (r) {
+			DRM_ERROR("recover page table failed!\n");
+			goto err;
+		}
+		if (fence) {
+			fence_put(*fence);
+			*fence = fence_get(f);
+		}
+	}
+	for (pt_idx = 0; pt_idx <= vm->max_pde_used; ++pt_idx) {
+		struct amdgpu_bo *bo = vm->page_tables[pt_idx].entry.robj;
+
+		if (!bo)
+			continue;
+		domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
+		/* if bo has been evicted, then no need to recover */
+		if (domain != AMDGPU_GEM_DOMAIN_VRAM)
+			continue;
+
+		bo->backup_shadow = AMDGPU_BO_SHADOW_TO_PARENT;
+		r = amdgpu_bo_backup_shadow(adev, ring, bo,
+					    NULL, &f, true);
+		if (r) {
+			DRM_ERROR("recover page table failed!\n");
+			goto err;
+			if (fence) {
+				fence_put(*fence);
+				*fence = fence_get(f);
+			}
+		}
+	}
+
+err:
+	amdgpu_bo_unreserve(vm->page_directory);
+	return r;
+}
 /**
  * amdgpu_vm_update_ptes - make sure that page tables are valid
  *
-- 
1.9.1

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[PATCH 04/10] drm/amdgpu: update pd shadow while updating pd

[Chunming Zhou]

Change-Id: Ief33f9539c24e1ab696935e2bfedd3630c07fc67
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 55 +++++++++++++++++++++++-----------
 2 files changed, 38 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 50fd971..f555477 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -882,6 +882,7 @@ struct amdgpu_ring {
 struct amdgpu_vm_pt {
 	struct amdgpu_bo_list_entry	entry;
 	uint64_t			addr;
+	uint64_t			shadow_addr;
 };
 
 struct amdgpu_vm {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 915a41a..215debb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -596,23 +596,13 @@ uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr)
 	return result;
 }
 
-/**
- * amdgpu_vm_update_pdes - make sure that page directory is valid
- *
- * @adev: amdgpu_device pointer
- * @vm: requested vm
- * @start: start of GPU address range
- * @end: end of GPU address range
- *
- * Allocates new page tables if necessary
- * and updates the page directory.
- * Returns 0 for success, error for failure.
- */
-int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
-				    struct amdgpu_vm *vm)
+static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
+					 struct amdgpu_vm *vm,
+					 bool shadow)
 {
 	struct amdgpu_ring *ring;
-	struct amdgpu_bo *pd = vm->page_directory;
+	struct amdgpu_bo *pd = shadow ? vm->page_directory->shadow :
+		vm->page_directory;
 	uint64_t pd_addr = amdgpu_bo_gpu_offset(pd);
 	uint32_t incr = AMDGPU_VM_PTE_COUNT * 8;
 	uint64_t last_pde = ~0, last_pt = ~0;
@@ -648,9 +638,15 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
 			continue;
 
 		pt = amdgpu_bo_gpu_offset(bo);
-		if (vm->page_tables[pt_idx].addr == pt)
-			continue;
-		vm->page_tables[pt_idx].addr = pt;
+		if (!shadow) {
+			if (vm->page_tables[pt_idx].addr == pt)
+				continue;
+			vm->page_tables[pt_idx].addr = pt;
+		} else {
+			if (vm->page_tables[pt_idx].shadow_addr == pt)
+				continue;
+			vm->page_tables[pt_idx].shadow_addr = pt;
+		}
 
 		pde = pd_addr + pt_idx * 8;
 		if (((last_pde + 8 * count) != pde) ||
@@ -700,6 +696,29 @@ error_free:
 	return r;
 }
 
+/*
+ * amdgpu_vm_update_pdes - make sure that page directory is valid
+ *
+ * @adev: amdgpu_device pointer
+ * @vm: requested vm
+ * @start: start of GPU address range
+ * @end: end of GPU address range
+ *
+ * Allocates new page tables if necessary
+ * and updates the page directory.
+ * Returns 0 for success, error for failure.
+ */
+int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
+                                   struct amdgpu_vm *vm)
+{
+	int r;
+
+	r = amdgpu_vm_update_pd_or_shadow(adev, vm, true);
+	if (r)
+		return r;
+	return amdgpu_vm_update_pd_or_shadow(adev, vm, false);
+}
+
 int amdgpu_vm_recover_page_table_from_shadow(struct amdgpu_device *adev,
 					     struct amdgpu_vm *vm,
 					     struct fence **fence)
-- 
1.9.1

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[PATCH 05/10] drm/amdgpu: update pt shadow while updating pt

[Chunming Zhou]

Change-Id: Ibc8fb4c5c9be38934ebd6d56f1cbd49cb82d53af
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 30 +++++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 215debb..30a1dcc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -787,13 +787,15 @@ err:
  * @end: end of GPU address range
  * @dst: destination address to map to, the next dst inside the function
  * @flags: mapping flags
+ * @shadow: update shadow or not
  *
  * Update the page tables in the range @start - @end.
  */
 static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
 				  struct amdgpu_vm *vm,
 				  uint64_t start, uint64_t end,
-				  uint64_t dst, uint32_t flags)
+				  uint64_t dst, uint32_t flags,
+				  bool shadow)
 {
 	const uint64_t mask = AMDGPU_VM_PTE_COUNT - 1;
 
@@ -807,7 +809,8 @@ static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
 	/* initialize the variables */
 	addr = start;
 	pt_idx = addr >> amdgpu_vm_block_size;
-	pt = vm->page_tables[pt_idx].entry.robj;
+	pt = shadow ? vm->page_tables[pt_idx].entry.robj->shadow :
+		vm->page_tables[pt_idx].entry.robj;
 
 	if ((addr & ~mask) == (end & ~mask))
 		nptes = end - addr;
@@ -826,7 +829,8 @@ static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
 	/* walk over the address space and update the page tables */
 	while (addr < end) {
 		pt_idx = addr >> amdgpu_vm_block_size;
-		pt = vm->page_tables[pt_idx].entry.robj;
+		pt = shadow ? vm->page_tables[pt_idx].entry.robj->shadow :
+			vm->page_tables[pt_idx].entry.robj;
 
 		if ((addr & ~mask) == (end & ~mask))
 			nptes = end - addr;
@@ -870,11 +874,13 @@ static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
  * @end: last PTE to handle
  * @dst: addr those PTEs should point to
  * @flags: hw mapping flags
+ * @shadow: update shaow or not
  */
 static void amdgpu_vm_frag_ptes(struct amdgpu_pte_update_params	*params,
 				struct amdgpu_vm *vm,
 				uint64_t start, uint64_t end,
-				uint64_t dst, uint32_t flags)
+				uint64_t dst, uint32_t flags,
+				bool shadow)
 {
 	/**
 	 * The MC L1 TLB supports variable sized pages, based on a fragment
@@ -906,7 +912,8 @@ static void amdgpu_vm_frag_ptes(struct amdgpu_pte_update_params	*params,
 	if (params->src || params->pages_addr || !(flags & AMDGPU_PTE_VALID) ||
 	    (frag_start >= frag_end)) {
 
-		amdgpu_vm_update_ptes(params, vm, start, end, dst, flags);
+		amdgpu_vm_update_ptes(params, vm, start, end, dst,
+				      flags, shadow);
 		return;
 	}
 
@@ -917,18 +924,19 @@ static void amdgpu_vm_frag_ptes(struct amdgpu_pte_update_params	*params,
 	/* handle the 4K area at the beginning */
 	if (start != frag_start) {
 		amdgpu_vm_update_ptes(params, vm, start, frag_start,
-				      dst, flags);
+				      dst, flags, shadow);
 		dst += (frag_start - start) * AMDGPU_GPU_PAGE_SIZE;
 	}
 
 	/* handle the area in the middle */
 	amdgpu_vm_update_ptes(params, vm, frag_start, frag_end, dst,
-			      flags | AMDGPU_PTE_FRAG(frag));
+			      flags | AMDGPU_PTE_FRAG(frag), shadow);
 
 	/* handle the 4K area at the end */
 	if (frag_end != end) {
 		dst += (frag_end - frag_start) * AMDGPU_GPU_PAGE_SIZE;
-		amdgpu_vm_update_ptes(params, vm, frag_end, end, dst, flags);
+		amdgpu_vm_update_ptes(params, vm, frag_end, end, dst,
+				      flags, shadow);
 	}
 }
 
@@ -1007,6 +1015,9 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
 		ndw += 2 * 10;
 	}
 
+	/* double ndw, since need to update shadow pt bo as well */
+	ndw *= 2;
+
 	r = amdgpu_job_alloc_with_ib(adev, ndw * 4, &job);
 	if (r)
 		return r;
@@ -1026,7 +1037,8 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
 	if (r)
 		goto error_free;
 
-	amdgpu_vm_frag_ptes(&params, vm, start, last + 1, addr, flags);
+	amdgpu_vm_frag_ptes(&params, vm, start, last + 1, addr, flags, true);
+	amdgpu_vm_frag_ptes(&params, vm, start, last + 1, addr, flags, false);
 
 	amdgpu_ring_pad_ib(ring, params.ib);
 	WARN_ON(params.ib->length_dw > ndw);
-- 
1.9.1

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[PATCH 06/10] drm/amdgpu: link all vm clients

[Chunming Zhou]

Add vm client to list tail when creating it, move to head while submit to scheduler.

Change-Id: I0625092f918853303a5ee97ea2eac87fb790ed69
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 6 ++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c     | 4 ++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     | 3 +++
 4 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f555477..cb18e7d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -901,6 +901,9 @@ struct amdgpu_vm {
 	/* BO mappings freed, but not yet updated in the PT */
 	struct list_head	freed;
 
+	/* vm itself list */
+	struct list_head	list;
+
 	/* contains the page directory */
 	struct amdgpu_bo	*page_directory;
 	unsigned		max_pde_used;
@@ -2174,6 +2177,9 @@ struct amdgpu_device {
 	struct kfd_dev          *kfd;
 
 	struct amdgpu_virtualization virtualization;
+
+	/* link all vm clients */
+	struct list_head		vm_list;
 };
 
 bool amdgpu_device_is_px(struct drm_device *dev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 3434098..8310853 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -860,7 +860,10 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev,
 static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 			    union drm_amdgpu_cs *cs)
 {
+	struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
+	struct amdgpu_vm *vm = &fpriv->vm;
 	struct amdgpu_ring *ring = p->job->ring;
+	struct amdgpu_device *adev = ring->adev;
 	struct amd_sched_entity *entity = &p->ctx->rings[ring->idx].entity;
 	struct amdgpu_job *job;
 	int r;
@@ -883,6 +886,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 
 	trace_amdgpu_cs_ioctl(job);
 	amd_sched_entity_push_job(&job->base);
+	list_move(&vm->list, &adev->vm_list);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 5376361..9cc7ae4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1588,6 +1588,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 	spin_lock_init(&adev->gc_cac_idx_lock);
 	spin_lock_init(&adev->audio_endpt_idx_lock);
 
+	INIT_LIST_HEAD(&adev->vm_list);
+
 	adev->rmmio_base = pci_resource_start(adev->pdev, 5);
 	adev->rmmio_size = pci_resource_len(adev->pdev, 5);
 	adev->rmmio = ioremap(adev->rmmio_base, adev->rmmio_size);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 30a1dcc..ec4619e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1591,6 +1591,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
 	INIT_LIST_HEAD(&vm->invalidated);
 	INIT_LIST_HEAD(&vm->cleared);
 	INIT_LIST_HEAD(&vm->freed);
+	INIT_LIST_HEAD(&vm->list);
 
 	pd_size = amdgpu_vm_directory_size(adev);
 	pd_entries = amdgpu_vm_num_pdes(adev);
@@ -1632,6 +1633,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
 	if (r)
 		goto error_free_page_directory;
 	vm->last_eviction_counter = atomic64_read(&adev->num_evictions);
+	list_add_tail(&vm->list, &adev->vm_list);
 
 	return 0;
 
@@ -1662,6 +1664,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
 	struct amdgpu_bo_va_mapping *mapping, *tmp;
 	int i;
 
+	list_del(&vm->list);
 	amd_sched_entity_fini(vm->entity.sched, &vm->entity);
 
 	if (!RB_EMPTY_ROOT(&vm->va)) {
-- 
1.9.1

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[PATCH 07/10] drm/amdgpu: add vm_list_lock

[Chunming Zhou]

To lock adev->vm_list.

Change-Id: I74d309eca9c22d190dd4072c69d26fa7fdea8884
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c     | 2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     | 4 ++++
 4 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index cb18e7d..b800e74 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -2180,6 +2180,7 @@ struct amdgpu_device {
 
 	/* link all vm clients */
 	struct list_head		vm_list;
+	spinlock_t			vm_list_lock;
 };
 
 bool amdgpu_device_is_px(struct drm_device *dev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 8310853..ef73883 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -886,7 +886,9 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 
 	trace_amdgpu_cs_ioctl(job);
 	amd_sched_entity_push_job(&job->base);
+	spin_lock(&adev->vm_list_lock);
 	list_move(&vm->list, &adev->vm_list);
+	spin_unlock(&adev->vm_list_lock);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 9cc7ae4..f1de23b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1589,6 +1589,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 	spin_lock_init(&adev->audio_endpt_idx_lock);
 
 	INIT_LIST_HEAD(&adev->vm_list);
+	spin_lock_init(&adev->vm_list_lock);
 
 	adev->rmmio_base = pci_resource_start(adev->pdev, 5);
 	adev->rmmio_size = pci_resource_len(adev->pdev, 5);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index ec4619e..df10795 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1633,7 +1633,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
 	if (r)
 		goto error_free_page_directory;
 	vm->last_eviction_counter = atomic64_read(&adev->num_evictions);
+	spin_lock(&adev->vm_list_lock);
 	list_add_tail(&vm->list, &adev->vm_list);
+	spin_unlock(&adev->vm_list_lock);
 
 	return 0;
 
@@ -1664,7 +1666,9 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
 	struct amdgpu_bo_va_mapping *mapping, *tmp;
 	int i;
 
+	spin_lock(&adev->vm_list_lock);
 	list_del(&vm->list);
+	spin_unlock(&adev->vm_list_lock);
 	amd_sched_entity_fini(vm->entity.sched, &vm->entity);
 
 	if (!RB_EMPTY_ROOT(&vm->va)) {
-- 
1.9.1

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[PATCH 08/10] drm/amdgpu: recover page tables after gpu reset

[Chunming Zhou]

Change-Id: I963598ba6eb44bc8620d70e026c0175d1a1de120
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index f1de23b..b537667 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2194,13 +2194,38 @@ retry:
 		if (r) {
 			dev_err(adev->dev, "ib ring test failed (%d).\n", r);
 			r = amdgpu_suspend(adev);
+			need_full_reset = true;
 			goto retry;
 		}
-
+		/**
+		 * recovery vm page tables, since we cannot depend on VRAM is
+		 * consistent after gpu full reset.
+		 */
+		if (need_full_reset && !(adev->flags & AMD_IS_APU)) {
+			struct amdgpu_vm *vm, *tmp;
+			struct fence *fence = NULL;
+
+			DRM_INFO("recover page table from shadow\n");
+			spin_lock(&adev->vm_list_lock);
+			list_for_each_entry_safe(vm, tmp, &adev->vm_list, list) {
+				spin_unlock(&adev->vm_list_lock);
+				amdgpu_vm_recover_page_table_from_shadow(adev, vm, &fence);
+				spin_lock(&adev->vm_list_lock);
+			}
+			spin_unlock(&adev->vm_list_lock);
+			if (fence) {
+				r = fence_wait(fence, true);
+				if (r)
+					WARN(r, "pt recovery isn't comleted\n");
+			}
+			fence_put(fence);
+		}
 		for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 			struct amdgpu_ring *ring = adev->rings[i];
 			if (!ring)
 				continue;
+
+			DRM_INFO("ring:%d recover jobs\n", ring->idx);
 			amd_sched_job_recovery(&ring->sched);
 			kthread_unpark(ring->sched.thread);
 		}
-- 
1.9.1

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[PATCH 09/10] drm/amdgpu: add need backup function

[Chunming Zhou]

Change-Id: I76e2552078c9ae11b7f2a1769025230f61733659
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b800e74..02449ac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -2456,6 +2456,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 
 /* Common functions */
 int amdgpu_gpu_reset(struct amdgpu_device *adev);
+bool amdgpu_need_backup(struct amdgpu_device *adev);
 void amdgpu_pci_config_reset(struct amdgpu_device *adev);
 bool amdgpu_card_posted(struct amdgpu_device *adev);
 void amdgpu_update_display_priority(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b537667..2913536 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2112,6 +2112,14 @@ static int amdgpu_post_soft_reset(struct amdgpu_device *adev)
 	return 0;
 }
 
+bool amdgpu_need_backup(struct amdgpu_device *adev)
+{
+	if (adev->flags & AMD_IS_APU)
+		return false;
+
+	return amdgpu_lockup_timeout > 0 ? true : false;
+}
+
 /**
  * amdgpu_gpu_reset - reset the asic
  *
-- 
1.9.1

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[PATCH 10/10] drm/amdgpu: add backup condition for vm

[Chunming Zhou]

Change-Id: I73aa32cda17cd1039232125afa4aad299b264705
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index df10795..3f770ec 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -713,9 +713,11 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
 {
 	int r;
 
-	r = amdgpu_vm_update_pd_or_shadow(adev, vm, true);
-	if (r)
-		return r;
+	if (amdgpu_need_backup(adev)) {
+		r = amdgpu_vm_update_pd_or_shadow(adev, vm, true);
+		if (r)
+			return r;
+	}
 	return amdgpu_vm_update_pd_or_shadow(adev, vm, false);
 }
 
@@ -729,6 +731,9 @@ int amdgpu_vm_recover_page_table_from_shadow(struct amdgpu_device *adev,
 	uint32_t domain;
 	int r;
 
+	if (!amdgpu_need_backup(adev))
+		return 0;
+
 	if (!vm->page_directory->shadow)
 		return 0;
 
@@ -1037,7 +1042,8 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
 	if (r)
 		goto error_free;
 
-	amdgpu_vm_frag_ptes(&params, vm, start, last + 1, addr, flags, true);
+	if (amdgpu_need_backup(adev))
+		amdgpu_vm_frag_ptes(&params, vm, start, last + 1, addr, flags, true);
 	amdgpu_vm_frag_ptes(&params, vm, start, last + 1, addr, flags, false);
 
 	amdgpu_ring_pad_ib(ring, params.ib);
@@ -1418,7 +1424,8 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
 				     AMDGPU_GPU_PAGE_SIZE, true,
 				     AMDGPU_GEM_DOMAIN_VRAM,
 				     AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
-				     AMDGPU_GEM_CREATE_SHADOW,
+				     (amdgpu_need_backup(adev) ?
+				      AMDGPU_GEM_CREATE_SHADOW : 0),
 				     NULL, resv, &pt);
 		if (r)
 			goto error_free;
@@ -1619,7 +1626,8 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
 	r = amdgpu_bo_create(adev, pd_size, align, true,
 			     AMDGPU_GEM_DOMAIN_VRAM,
 			     AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
-			     AMDGPU_GEM_CREATE_SHADOW,
+			     (amdgpu_need_backup(adev) ?
+			      AMDGPU_GEM_CREATE_SHADOW : 0),
 			     NULL, NULL, &vm->page_directory);
 	if (r)
 		goto error_free_sched_entity;
-- 
1.9.1

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RE: [PATCH 00/10] shadow page table support V4

[Zhou, David(ChunMing)]

Ping...

> -----Original Message-----
> From: Chunming Zhou [mailto:David1.Zhou@amd.com]
> Sent: Monday, August 15, 2016 2:07 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou, David(ChunMing) <David1.Zhou@amd.com>
> Subject: [PATCH 00/10] shadow page table support V4
> 
> Since we cannot ensure VRAM is consistent after a GPU reset, page table
> shadowing is necessary. Shadowed page tables are, in a sense, a method to
> recover the consistent state of the page tables before the reset occurred.
> 
> We need to allocate GTT bo as the shadow of VRAM bo when creating page
> table, and make them the same. After gpu reset, we will need to use SDMA
> to copy GTT bo content to VRAM bo, then page table will be recoveried.
> 
> 
> V2:
> Shadow bo uses a shadow entity running on normal run queue, after gpu
> reset, we need to wait for all shadow jobs finished first, then recovery page
> table from shadow.
> 
> V3:
> Addressed Christian comments for shadow bo part.
> 
> V4:
> Switch back to update page table twice (one of two is for shadow)
> 
> Chunming Zhou (10):
>   drm/amdgpu: add direct submision option for copy_buffer
>   drm/amdgpu: sync bo and shadow V2
>   drm/amdgpu: implement vm recovery function from shadow V2
>   drm/amdgpu: update pd shadow while updating pd
>   drm/amdgpu: update pt shadow while updating pt
>   drm/amdgpu: link all vm clients
>   drm/amdgpu: add vm_list_lock
>   drm/amdgpu: recover page tables after gpu reset
>   drm/amdgpu: add need backup function
>   drm/amdgpu: add backup condition for vm
> 
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  14 ++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c |   3 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c        |   6 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |  38 +++++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    |  43 +++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.h    |   5 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_test.c      |   4 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       |  21 +++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c        | 163
> +++++++++++++++++++++-----
>  9 files changed, 257 insertions(+), 40 deletions(-)
> 
> --
> 1.9.1

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Re: [PATCH 00/10] shadow page table support V4

[Christian König]

Patch #1, #2 and #4 are Reviewed-by: Christian König 
<christian.koenig@amd.com>.

For patch #5:
>   static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
>   				  struct amdgpu_vm *vm,
>   				  uint64_t start, uint64_t end,
> -				  uint64_t dst, uint32_t flags)
> +				  uint64_t dst, uint32_t flags,
> +				  bool shadow)
>   {
Just put the new parameter into the amdgpu_pte_update_params structur. 
This way we don't need to change this so much.

Patch #3, #6, #7:

Well first of all you need to squash patch #6 and #7, adding the linked 
list first and then the lock isn't such a good idea when somebody would 
bisect this patchset.

Additional to that I wouldn't link the VMs, instead just link all the 
BOs which have a shadow.

This way we can then later on also use the functionality for user space BOs.

Patch #8: Looks good to me, but need to be rebased on linking the BOs 
instead of the VM.

Patch #9 and #10: Please reorder those to be at the beginning of the 
patchset.

And I would add this directly into amdgpu_bo_create_shadow() and then 
make all other functions depend on if the shadow is allocated or not.

Regards,
Christian.

Am 16.08.2016 um 08:12 schrieb Zhou, David(ChunMing):
> Ping...
>
>> -----Original Message-----
>> From: Chunming Zhou [mailto:David1.Zhou@amd.com]
>> Sent: Monday, August 15, 2016 2:07 PM
>> To: amd-gfx@lists.freedesktop.org
>> Cc: Zhou, David(ChunMing) <David1.Zhou@amd.com>
>> Subject: [PATCH 00/10] shadow page table support V4
>>
>> Since we cannot ensure VRAM is consistent after a GPU reset, page table
>> shadowing is necessary. Shadowed page tables are, in a sense, a method to
>> recover the consistent state of the page tables before the reset occurred.
>>
>> We need to allocate GTT bo as the shadow of VRAM bo when creating page
>> table, and make them the same. After gpu reset, we will need to use SDMA
>> to copy GTT bo content to VRAM bo, then page table will be recoveried.
>>
>>
>> V2:
>> Shadow bo uses a shadow entity running on normal run queue, after gpu
>> reset, we need to wait for all shadow jobs finished first, then recovery page
>> table from shadow.
>>
>> V3:
>> Addressed Christian comments for shadow bo part.
>>
>> V4:
>> Switch back to update page table twice (one of two is for shadow)
>>
>> Chunming Zhou (10):
>>    drm/amdgpu: add direct submision option for copy_buffer
>>    drm/amdgpu: sync bo and shadow V2
>>    drm/amdgpu: implement vm recovery function from shadow V2
>>    drm/amdgpu: update pd shadow while updating pd
>>    drm/amdgpu: update pt shadow while updating pt
>>    drm/amdgpu: link all vm clients
>>    drm/amdgpu: add vm_list_lock
>>    drm/amdgpu: recover page tables after gpu reset
>>    drm/amdgpu: add need backup function
>>    drm/amdgpu: add backup condition for vm
>>
>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  14 ++-
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c |   3 +-
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c        |   6 +
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |  38 +++++-
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    |  43 +++++++
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.h    |   5 +
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_test.c      |   4 +-
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       |  21 +++-
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c        | 163
>> +++++++++++++++++++++-----
>>   9 files changed, 257 insertions(+), 40 deletions(-)
>>
>> --
>> 1.9.1
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