From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: "Alex Bennée" <alex.bennee@linaro.org>,
"David Gibson" <david@gibson.dropbear.id.au>
Cc: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>,
qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH RFC 3/4] target-ppc: use atomic_cmpxchg for ld/st reservation
Date: Mon, 12 Sep 2016 19:15:32 +1000 [thread overview]
Message-ID: <1473671732.8689.243.camel@kernel.crashing.org> (raw)
In-Reply-To: <87zindwlyw.fsf@linaro.org>
On Mon, 2016-09-12 at 09:39 +0100, Alex Bennée wrote:
>
> They are now in Richard's tcg-next queue
>
> Message-Id: <1473282648-23487-1-git-send-email-rth@twiddle.net>
> Subject: [Qemu-devel] [PULL 00/18] tcg queued patches
>
> All the backends support the new fence op, so far only ARM, Alpha and
> x86 emit the fence TCGOps as these are best added by someone who
> understands the frontend well.
Hrm, I should probably have a look ;-)
A bit swamped this week, I'll see what I can do.
Cheers,
Ben.
> >
> > >
> > > >
> > > >
> > > > I think this does matter, IIRC a kernel spin unlock on ppc is a
> > > > barrier + plain store, no load locked or store conditional.
> > > >
> > > > >
> > > > > >
> > > > > > Specifically a racing store which happens to store the same
> > > > > > value
> > > > > > which was already in memory should clobber the reservation,
> > > > > > but won't
> > > > > > with this implementation.
> > > > > >
> > > > > > I had a long discussion at KVM Forum with Emilio Costa
> > > > > > about this, in
> > > > > > which I discovered just how hard it is to strictly
> > > > > > implement
> > > > > > store-conditional semantics in terms of anything else. So,
> > > > > > this is
> > > > > > probably a reasonable substitute, but we should note the
> > > > > > fact that
> > > > > > it's not 100%.
> > > > >
> > > > > I will update the commit log.
> > > > >
> > > > > Regards,
> > > > > Nikunj
> > > > >
> > >
> > >
>
>
> --
> Alex Bennée
next prev parent reply other threads:[~2016-09-12 9:15 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-02 6:32 [Qemu-devel] [PATCH RFC 0/4] Enable MTTCG on PowerPC Nikunj A Dadhania
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 1/4] spapr-hcall: take iothread lock during handler call Nikunj A Dadhania
2016-09-02 8:53 ` Greg Kurz
2016-09-02 9:28 ` Nikunj A Dadhania
2016-09-02 9:57 ` Greg Kurz
2016-09-03 16:31 ` Nikunj A Dadhania
2016-09-02 10:06 ` Thomas Huth
2016-09-03 16:33 ` Nikunj A Dadhania
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 2/4] target-ppc: with MTTCG report more threads Nikunj A Dadhania
2016-09-02 9:28 ` Greg Kurz
2016-09-02 9:34 ` Nikunj A Dadhania
2016-09-02 10:45 ` Greg Kurz
2016-09-03 16:34 ` Nikunj A Dadhania
2016-09-07 3:51 ` David Gibson
2016-09-07 4:41 ` Nikunj A Dadhania
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 3/4] target-ppc: use atomic_cmpxchg for ld/st reservation Nikunj A Dadhania
2016-09-07 4:02 ` David Gibson
2016-09-07 4:47 ` Nikunj A Dadhania
2016-09-07 5:24 ` Benjamin Herrenschmidt
2016-09-07 8:42 ` Nikunj A Dadhania
2016-09-07 5:34 ` David Gibson
2016-09-07 7:13 ` Alex Bennée
2016-09-12 1:19 ` David Gibson
2016-09-12 8:39 ` Alex Bennée
2016-09-12 9:15 ` Benjamin Herrenschmidt [this message]
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 4/4] target-ppc: flush tlb from all the cpu Nikunj A Dadhania
2016-09-02 7:22 ` Benjamin Herrenschmidt
2016-09-02 7:34 ` Nikunj A Dadhania
2016-09-04 17:00 ` Alex Bennée
2016-09-04 22:17 ` Benjamin Herrenschmidt
2016-09-05 0:10 ` Benjamin Herrenschmidt
2016-09-06 1:55 ` Nikunj A Dadhania
2016-09-06 3:05 ` Benjamin Herrenschmidt
2016-09-06 4:53 ` Nikunj A Dadhania
2016-09-06 5:30 ` Benjamin Herrenschmidt
2016-09-06 6:57 ` Nikunj A Dadhania
2016-09-02 6:43 ` [Qemu-devel] [PATCH RFC 0/4] Enable MTTCG on PowerPC Cédric Le Goater
2016-09-02 6:46 ` Nikunj A Dadhania
2016-09-02 7:57 ` Thomas Huth
2016-09-02 11:44 ` Cédric Le Goater
2016-09-02 7:19 ` Benjamin Herrenschmidt
2016-09-02 7:39 ` Nikunj A Dadhania
2016-09-02 12:13 ` Benjamin Herrenschmidt
2016-09-07 4:08 ` David Gibson
2016-09-07 4:48 ` Nikunj A Dadhania
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