From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH 04/18] sim: or1k: add or1k target to sim
Date: Thu, 24 Nov 2016 07:14:18 +0900 [thread overview]
Message-ID: <1479939272-1754-5-git-send-email-shorne@gmail.com> (raw)
In-Reply-To: <1479939272-1754-1-git-send-email-shorne@gmail.com>
From: Peter Gavin <pgavin@gmail.com>
* sim/ChangeLog:
2012-05-13 Peter Gavin <pgavin@gmail.com>
* configure.tgt: add or1k target
* configure: regenerate
* or1k/Makefile.in: new file
* or1k/aclocal.m4: new file
* or1k/arch.h: new file
* or1k/arch32.c: new file
* or1k/arch32.h: new file
* or1k/arch64.c: new file
* or1k/arch64.h: new file
* or1k/config.in: new file
* or1k/configure: new file
* or1k/configure.ac: new file
* or1k/cpu.h: new file
* or1k/cpu32.c: new file
* or1k/cpu32.h: new file
* or1k/cpu64.c: new file
* or1k/cpu64.h: new file
* or1k/cpuall.h: new file
* or1k/cpuall32.h: new file
* or1k/cpuall64.h: new file
* or1k/decode.h: new file
* or1k/decode32.c: new file
* or1k/decode32.h: new file
* or1k/decode64.c: new file
* or1k/decode64.h: new file
* or1k/eng.h: new file
* or1k/mloop.in: new file
* or1k/model32.c: new file
* or1k/model64.c: new file
* or1k/or1k-sim.h: new file
* or1k/or1k.c: new file
* or1k/or1k.h: new file
* or1k/or1k32-opc.h: new file
* or1k/or1k64-opc.h: new file
* or1k/sem32-switch.c: new file
* or1k/sem32.c: new file
* or1k/sem64-switch.c: new file
* or1k/sem64.c: new file
* or1k/sim-if.c: new file
* or1k/sim-main.h: new file
* or1k/tconfig.in: new file
* or1k/traps-linux.c: new file
* or1k/traps.c: new file
---
sim/configure | 9 +
sim/configure.tgt | 4 +
sim/or1k/ChangeLog | 8 +
sim/or1k/Makefile.in | 219 +
sim/or1k/aclocal.m4 | 90 +
sim/or1k/arch.h | 5 +
sim/or1k/arch32.c | 38 +
sim/or1k/arch32.h | 50 +
sim/or1k/arch64.c | 38 +
sim/or1k/arch64.h | 50 +
sim/or1k/config.in | 151 +
sim/or1k/configure | 6715 ++++++++++++++++++++++++++++++
sim/or1k/configure.ac | 42 +
sim/or1k/cpu.h | 5 +
sim/or1k/cpu32.c | 10133 +++++++++++++++++++++++++++++++++++++++++++++
sim/or1k/cpu32.h | 4992 +++++++++++++++++++++++
sim/or1k/cpu64.c | 10149 ++++++++++++++++++++++++++++++++++++++++++++++
sim/or1k/cpu64.h | 5042 +++++++++++++++++++++++
sim/or1k/cpuall.h | 5 +
sim/or1k/cpuall32.h | 66 +
sim/or1k/cpuall64.h | 66 +
sim/or1k/decode.h | 5 +
sim/or1k/decode32.c | 2460 +++++++++++
sim/or1k/decode32.h | 93 +
sim/or1k/decode64.c | 2624 ++++++++++++
sim/or1k/decode64.h | 95 +
sim/or1k/eng.h | 5 +
sim/or1k/mloop.in | 223 +
sim/or1k/model32.c | 3639 +++++++++++++++++
sim/or1k/model64.c | 135 +
sim/or1k/or1k-sim.h | 19 +
sim/or1k/or1k.c | 290 ++
sim/or1k/or1k.h | 29 +
sim/or1k/or1k32-opc.h | 129 +
sim/or1k/or1k64-opc.h | 133 +
sim/or1k/sem32-switch.c | 2594 ++++++++++++
sim/or1k/sem32.c | 2789 +++++++++++++
sim/or1k/sem64-switch.c | 2890 +++++++++++++
sim/or1k/sem64.c | 3115 ++++++++++++++
sim/or1k/sim-if.c | 325 ++
sim/or1k/sim-main.h | 71 +
sim/or1k/tconfig.in | 8 +
sim/or1k/traps-linux.c | 8 +
sim/or1k/traps.c | 8 +
44 files changed, 59564 insertions(+)
create mode 100644 sim/or1k/ChangeLog
create mode 100644 sim/or1k/Makefile.in
create mode 100644 sim/or1k/aclocal.m4
create mode 100644 sim/or1k/arch.h
create mode 100644 sim/or1k/arch32.c
create mode 100644 sim/or1k/arch32.h
create mode 100644 sim/or1k/arch64.c
create mode 100644 sim/or1k/arch64.h
create mode 100644 sim/or1k/config.in
create mode 100644 sim/or1k/configure
create mode 100644 sim/or1k/configure.ac
create mode 100644 sim/or1k/cpu.h
create mode 100644 sim/or1k/cpu32.c
create mode 100644 sim/or1k/cpu32.h
create mode 100644 sim/or1k/cpu64.c
create mode 100644 sim/or1k/cpu64.h
create mode 100644 sim/or1k/cpuall.h
create mode 100644 sim/or1k/cpuall32.h
create mode 100644 sim/or1k/cpuall64.h
create mode 100644 sim/or1k/decode.h
create mode 100644 sim/or1k/decode32.c
create mode 100644 sim/or1k/decode32.h
create mode 100644 sim/or1k/decode64.c
create mode 100644 sim/or1k/decode64.h
create mode 100644 sim/or1k/eng.h
create mode 100644 sim/or1k/mloop.in
create mode 100644 sim/or1k/model32.c
create mode 100644 sim/or1k/model64.c
create mode 100644 sim/or1k/or1k-sim.h
create mode 100644 sim/or1k/or1k.c
create mode 100644 sim/or1k/or1k.h
create mode 100644 sim/or1k/or1k32-opc.h
create mode 100644 sim/or1k/or1k64-opc.h
create mode 100644 sim/or1k/sem32-switch.c
create mode 100644 sim/or1k/sem32.c
create mode 100644 sim/or1k/sem64-switch.c
create mode 100644 sim/or1k/sem64.c
create mode 100644 sim/or1k/sim-if.c
create mode 100644 sim/or1k/sim-main.h
create mode 100644 sim/or1k/tconfig.in
create mode 100644 sim/or1k/traps-linux.c
create mode 100644 sim/or1k/traps.c
diff --git a/sim/configure b/sim/configure
index 2729e69..ae2f6964 100755
--- a/sim/configure
+++ b/sim/configure
@@ -653,6 +653,7 @@ microblaze
mips
mn10300
moxie
+or1k
msp430
rl78
rx
@@ -3768,6 +3769,14 @@ subdirs="$subdirs aarch64"
;;
+ or1k-*-* | or1knd-*-*)
+
+ sim_arch=or1k
+ subdirs="$subdirs or1k"
+
+
+ sim_testsuite=yes
+ ;;
rl78-*-*)
sim_arch=rl78
diff --git a/sim/configure.tgt b/sim/configure.tgt
index c958fb3..82b0e89 100644
--- a/sim/configure.tgt
+++ b/sim/configure.tgt
@@ -76,6 +76,10 @@ case "${target}" in
msp430*-*-*)
SIM_ARCH(msp430)
;;
+ or1k-*-* | or1knd-*-*)
+ SIM_ARCH(or1k)
+ sim_testsuite=yes
+ ;;
rl78-*-*)
SIM_ARCH(rl78)
;;
diff --git a/sim/or1k/ChangeLog b/sim/or1k/ChangeLog
new file mode 100644
index 0000000..3dc053a
--- /dev/null
+++ b/sim/or1k/ChangeLog
@@ -0,0 +1,8 @@
+2012-05-17 Peter Gavin <pgavin@gmail.com>
+
+ * or1k.c (or1k32bf_nop) handle NOP_NOP, NOP_REPORT; warn if
+ unknown l.nop code is unknown
+
+2012-05-13 Peter Gavin <pgavin@gmail.com>
+
+ * initial commit
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in
new file mode 100644
index 0000000..b89c070
--- /dev/null
+++ b/sim/or1k/Makefile.in
@@ -0,0 +1,219 @@
+# Makefile template for Configure for the m32r simulator
+# Copyright (C) 1996-2000, 2003-2004, 2007-2012 Free Software
+# Foundation, Inc.
+# Contributed by Cygnus Support.
+#
+# This file is part of GDB, the GNU debugger.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+## COMMON_PRE_CONFIG_FRAG
+
+OR1K32_OBJS = \
+ or1k32.o \
+ arch32.o \
+ cpu32.o \
+ decode32.o \
+ model32.o \
+ sem32.o \
+ mloop32.o \
+ sim-if32.o
+
+OR1K64_OBJS = \
+ or1k64.o \
+ arch64.o \
+ cpu64.o \
+ decode64.o \
+ model64.o \
+ sem64.o \
+ mloop64.o \
+ sim-if64.o
+
+TRAPS_OBJ = @traps_obj@
+
+SIM_OBJS = \
+ $(SIM_NEW_COMMON_OBJS) \
+ sim-cpu.o \
+ sim-hload.o \
+ sim-hrw.o \
+ sim-reg.o \
+ cgen-utils.o \
+ cgen-trace.o \
+ cgen-scache.o \
+ cgen-run.o \
+ sim-reason.o \
+ sim-engine.o \
+ sim-model.o \
+ sim-stop.o \
+ $(TRAPS_OBJ)
+ifneq (@want_or1k64@,true)
+SIM_OBJS += $(OR1K32_OBJS)
+else
+SIM_OBJS += $(OR1K64_OBJS)
+endif
+
+# Extra headers included by sim-main.h.
+SIM_EXTRA_DEPS = \
+ $(CGEN_INCLUDE_DEPS) \
+ or1k-sim.h \
+ $(srcdir)/../../opcodes/or1k-desc.h \
+ arch32.h \
+ cpuall32.h \
+ decode32.h \
+ arch64.h \
+ cpuall64.h \
+ decode64.h
+
+SIM_EXTRA_CFLAGS = @sim_extra_cflags@
+ifeq (@want_or1k64@,true)
+SIM_EXTRA_CFLAGS += -DWANT_OR1K64
+endif
+ifeq (@want_or1k_nodelay@,true)
+SIM_EXTRA_CFLAGS += -DWANT_OR1K_NODELAY
+endif
+
+SIM_EXTRA_LIBS = -lm
+
+SIM_RUN_OBJS = nrun.o
+SIM_EXTRA_CLEAN =
+
+## COMMON_POST_CONFIG_FRAG
+
+arch = or1k
+
+traps.o: traps.c $(SIM_MAIN_DEPS)
+traps-linux.o: traps-linux.c $(SIM_MAIN_DEPS)
+
+# or1k32bf
+
+OR1K32BF_INCLUDE_DEPS = \
+ $(CGEN_MAIN_CPU_DEPS) \
+ cpu32.h \
+ decode32.h \
+ eng32.h
+
+mloop32.c eng32.h: stamp-mloop32 ; @true
+stamp-mloop32: $(srcdir)/../common/genmloop.sh mloop.in Makefile
+ $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+ -mono -fast -pbb -switch sem32-switch.c \
+ -cpu or1k32bf -infile $(srcdir)/mloop.in
+ $(SHELL) $(srcroot)/move-if-change eng.hin eng32.h
+ $(SHELL) $(srcroot)/move-if-change mloop.cin mloop32.c
+ touch stamp-mloop32
+mloop32.o: mloop32.c sem32-switch.c $(OR1K32BF_INCLUDE_DEPS)
+or1k32.o: or1k.c $(OR1K32BF_INCLUDE_DEPS)
+ $(COMPILE) $<
+ $(POSTCOMPILE)
+arch32.o: arch32.c $(SIM_MAIN_DEPS)
+cpu32.o: cpu32.c $(OR1K32BF_INCLUDE_DEPS)
+decode32.o: decode32.c $(OR1K32BF_INCLUDE_DEPS)
+sem32.o: sem32.c $(OR1K32BF_INCLUDE_DEPS)
+sem32-switch.o: sem32-switch.c $(OR1K32BF_INCLUDE_DEPS)
+model32.o: model32.c $(OR1K32BF_INCLUDE_DEPS)
+
+sim-if32.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng32.h
+ $(COMPILE) $<
+ $(POSTCOMPILE)
+
+# or1k64bf
+
+OR1K64BF_INCLUDE_DEPS = \
+ $(CGEN_MAIN_CPU_DEPS) \
+ cpu64.h \
+ decode64.h \
+ eng64.h
+
+mloop64.c eng64.h: stamp-mloop64 ; @true
+stamp-mloop64: $(srcdir)/../common/genmloop.sh mloop.in Makefile
+ $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+ -mono -fast -pbb -switch sem32-switch.c \
+ -cpu or1k64bf -infile $(srcdir)/mloop.in
+ $(SHELL) $(srcroot)/move-if-change eng64.hin eng64.h
+ $(SHELL) $(srcroot)/move-if-change mloop64.cin mloop64.c
+ touch stamp-mloop64
+mloop64.o: mloop64.c sem64.c $(OR1K64BF_INCLUDE_DEPS)
+or1k64.o: or1k.c $(OR1K64BF_INCLUDE_DEPS)
+ $(COMPILE) $<
+ $(POSTCOMPILE)
+arch64.o: arch64.c $(SIM_MAIN_DEPS)
+cpu64.o: cpu64.c $(OR1K64BF_INCLUDE_DEPS)
+decode64.o: decode64.c $(OR1K64BF_INCLUDE_DEPS)
+sem64.o: sem64.c $(OR1K64BF_INCLUDE_DEPS)
+sem64-switch.o: sem64-switch.c $(OR1K64BF_INCLUDE_DEPS)
+model64.o: model64.c $(OR1K64BF_INCLUDE_DEPS)
+
+sim-if64.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng64.h
+ $(COMPILE) $<
+ $(POSTCOMPILE)
+
+# cgen support, enable with --enable-cgen-maint
+CGEN_MAINT = ; @true
+# The following line is commented in or out depending upon --enable-cgen-maint.
+@CGEN_MAINT@CGEN_MAINT =
+
+# NOTE: Generated source files are specified as full paths,
+# e.g. $(srcdir)/arch.c, because make may decide the files live
+# in objdir otherwise.
+
+OR1K_CGEN_DEPS = \
+ $(CPU_DIR)/or1k.cpu \
+ $(CPU_DIR)/or1k.opc \
+ $(CPU_DIR)/or1kcommon.cpu \
+ $(CPU_DIR)/or1korbis.cpu \
+ $(CPU_DIR)/or1korfpx.cpu \
+ Makefile
+
+stamp-arch32: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
+ $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
+ mach=or32,or32nd \
+ SUFFIX=32 \
+ archfile=$(CPU_DIR)/or1k.cpu \
+ FLAGS="with-scache"
+ touch $@
+$(srcdir)/arch32.h $(srcdir)/arch32.c $(srcdir)/cpuall32.h: $(CGEN_MAINT) stamp-arch32
+ @true
+
+stamp-arch64: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
+ $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
+ mach=or64,or64nd \
+ SUFFIX=64 \
+ archfile=$(CPU_DIR)/or1k.cpu \
+ FLAGS="with-scache"
+ touch $@
+$(srcdir)/arch64.h $(srcdir)/arch64.c $(srcdir)/cpuall64.h: $(CGEN_MAINT) stamp-arch64
+ @true
+
+stamp-cpu32: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
+ $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+ cpu=or1k32bf \
+ mach=or32,or32nd \
+ SUFFIX=32 \
+ archfile=$(CPU_DIR)/or1k.cpu \
+ FLAGS="with-scache" \
+ EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
+ touch $@
+$(srcdir)/cpu32.h $(srcdir)/cpu32.c $(srcdir)/model32.c $(srcdir)/sem32.c $(srcdir)/sem32-switch.c $(srcdir)/decode32.c $(srcdir)/decode32.h: $(CGEN_MAINT) stamp-cpu32
+ @true
+
+stamp-cpu64: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
+ $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+ cpu=or1k64bf \
+ mach=or64,or64nd \
+ SUFFIX=64 \
+ archfile=$(CPU_DIR)/or1k.cpu \
+ FLAGS="with-scache" \
+ EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
+ touch $@
+$(srcdir)/cpu64.h $(srcdir)/cpu64.c $(srcdir)/model64.c $(srcdir)/sem64.c $(srcdir)/sem64-switch.c $(srcdir)/decode64.c $(srcdir)/decode64.h: $(CGEN_MAINT) stamp-cpu64
+ @true
diff --git a/sim/or1k/aclocal.m4 b/sim/or1k/aclocal.m4
new file mode 100644
index 0000000..a3cae8c
--- /dev/null
+++ b/sim/or1k/aclocal.m4
@@ -0,0 +1,90 @@
+# generated automatically by aclocal 1.11.3 -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+# 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation,
+# Inc.
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+# AM_CONDITIONAL -*- Autoconf -*-
+
+# Copyright (C) 1997, 2000, 2001, 2003, 2004, 2005, 2006, 2008
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 9
+
+# AM_CONDITIONAL(NAME, SHELL-CONDITION)
+# -------------------------------------
+# Define a conditional.
+AC_DEFUN([AM_CONDITIONAL],
+[AC_PREREQ(2.52)dnl
+ ifelse([$1], [TRUE], [AC_FATAL([$0: invalid condition: $1])],
+ [$1], [FALSE], [AC_FATAL([$0: invalid condition: $1])])dnl
+AC_SUBST([$1_TRUE])dnl
+AC_SUBST([$1_FALSE])dnl
+_AM_SUBST_NOTMAKE([$1_TRUE])dnl
+_AM_SUBST_NOTMAKE([$1_FALSE])dnl
+m4_define([_AM_COND_VALUE_$1], [$2])dnl
+if $2; then
+ $1_TRUE=
+ $1_FALSE='#'
+else
+ $1_TRUE='#'
+ $1_FALSE=
+fi
+AC_CONFIG_COMMANDS_PRE(
+[if test -z "${$1_TRUE}" && test -z "${$1_FALSE}"; then
+ AC_MSG_ERROR([[conditional "$1" was never defined.
+Usually this means the macro was only invoked conditionally.]])
+fi])])
+
+# Copyright (C) 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 2
+
+# Check whether the underlying file-system supports filenames
+# with a leading dot. For instance MS-DOS doesn't.
+AC_DEFUN([AM_SET_LEADING_DOT],
+[rm -rf .tst 2>/dev/null
+mkdir .tst 2>/dev/null
+if test -d .tst; then
+ am__leading_dot=.
+else
+ am__leading_dot=_
+fi
+rmdir .tst 2>/dev/null
+AC_SUBST([am__leading_dot])])
+
+# Copyright (C) 2006, 2008, 2010 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 3
+
+# _AM_SUBST_NOTMAKE(VARIABLE)
+# ---------------------------
+# Prevent Automake from outputting VARIABLE = @VARIABLE@ in Makefile.in.
+# This macro is traced by Automake.
+AC_DEFUN([_AM_SUBST_NOTMAKE])
+
+# AM_SUBST_NOTMAKE(VARIABLE)
+# --------------------------
+# Public sister of _AM_SUBST_NOTMAKE.
+AC_DEFUN([AM_SUBST_NOTMAKE], [_AM_SUBST_NOTMAKE($@)])
+
diff --git a/sim/or1k/arch.h b/sim/or1k/arch.h
new file mode 100644
index 0000000..88202a2
--- /dev/null
+++ b/sim/or1k/arch.h
@@ -0,0 +1,5 @@
+#ifndef WANT_OR1K64
+#include "arch32.h"
+#else
+#include "arch64.h"
+#endif
diff --git a/sim/or1k/arch32.c b/sim/or1k/arch32.c
new file mode 100644
index 0000000..769f54c
--- /dev/null
+++ b/sim/or1k/arch32.c
@@ -0,0 +1,38 @@
+/* Simulator support for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#include "sim-main.h"
+#include "bfd.h"
+
+const MACH *sim_machs[] =
+{
+#ifdef HAVE_CPU_OR1K32BF
+ & or32_mach,
+#endif
+#ifdef HAVE_CPU_OR1K32BF
+ & or32nd_mach,
+#endif
+ 0
+};
+
diff --git a/sim/or1k/arch32.h b/sim/or1k/arch32.h
new file mode 100644
index 0000000..caea4ca
--- /dev/null
+++ b/sim/or1k/arch32.h
@@ -0,0 +1,50 @@
+/* Simulator header for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K_ARCH_H
+#define OR1K_ARCH_H
+
+#define TARGET_BIG_ENDIAN 1
+
+#define WI SI
+#define UWI USI
+#define AI USI
+
+#define IAI USI
+
+/* Enum declaration for model types. */
+typedef enum model_type {
+ MODEL_OR1200, MODEL_OR1200ND, MODEL_MAX
+} MODEL_TYPE;
+
+#define MAX_MODELS ((int) MODEL_MAX)
+
+/* Enum declaration for unit types. */
+typedef enum unit_type {
+ UNIT_NONE, UNIT_OR1200_U_EXEC, UNIT_OR1200ND_U_EXEC, UNIT_MAX
+} UNIT_TYPE;
+
+#define MAX_UNITS (1)
+
+#endif /* OR1K_ARCH_H */
diff --git a/sim/or1k/arch64.c b/sim/or1k/arch64.c
new file mode 100644
index 0000000..e73f37b
--- /dev/null
+++ b/sim/or1k/arch64.c
@@ -0,0 +1,38 @@
+/* Simulator support for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#include "sim-main.h"
+#include "bfd.h"
+
+const MACH *sim_machs[] =
+{
+#ifdef HAVE_CPU_OR1K64BF
+ & or64_mach,
+#endif
+#ifdef HAVE_CPU_OR1K64BF
+ & or64nd_mach,
+#endif
+ 0
+};
+
diff --git a/sim/or1k/arch64.h b/sim/or1k/arch64.h
new file mode 100644
index 0000000..115439c
--- /dev/null
+++ b/sim/or1k/arch64.h
@@ -0,0 +1,50 @@
+/* Simulator header for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K_ARCH_H
+#define OR1K_ARCH_H
+
+#define TARGET_BIG_ENDIAN 1
+
+#define WI DI
+#define UWI UDI
+#define AI UDI
+
+#define IAI UDI
+
+/* Enum declaration for model types. */
+typedef enum model_type {
+ MODEL_MAX
+} MODEL_TYPE;
+
+#define MAX_MODELS ((int) MODEL_MAX)
+
+/* Enum declaration for unit types. */
+typedef enum unit_type {
+ UNIT_NONE, UNIT_MAX
+} UNIT_TYPE;
+
+#define MAX_UNITS (1)
+
+#endif /* OR1K_ARCH_H */
diff --git a/sim/or1k/config.in b/sim/or1k/config.in
new file mode 100644
index 0000000..2f19ba3
--- /dev/null
+++ b/sim/or1k/config.in
@@ -0,0 +1,151 @@
+/* config.in. Generated from configure.ac by autoheader. */
+
+/* Define if building universal (internal helper macro) */
+#undef AC_APPLE_UNIVERSAL_BUILD
+
+/* Define to 1 if translation of program messages to the user's native
+ language is requested. */
+#undef ENABLE_NLS
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#undef HAVE_DLFCN_H
+
+/* Define to 1 if you have the <errno.h> header file. */
+#undef HAVE_ERRNO_H
+
+/* Define to 1 if you have the <fcntl.h> header file. */
+#undef HAVE_FCNTL_H
+
+/* Define to 1 if you have the <fpu_control.h> header file. */
+#undef HAVE_FPU_CONTROL_H
+
+/* Define to 1 if you have the `getrusage' function. */
+#undef HAVE_GETRUSAGE
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#undef HAVE_INTTYPES_H
+
+/* Define to 1 if you have the `nsl' library (-lnsl). */
+#undef HAVE_LIBNSL
+
+/* Define to 1 if you have the `socket' library (-lsocket). */
+#undef HAVE_LIBSOCKET
+
+/* Define to 1 if you have the <memory.h> header file. */
+#undef HAVE_MEMORY_H
+
+/* Define to 1 if you have the `sigaction' function. */
+#undef HAVE_SIGACTION
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#undef HAVE_STDINT_H
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#undef HAVE_STDLIB_H
+
+/* Define to 1 if you have the <strings.h> header file. */
+#undef HAVE_STRINGS_H
+
+/* Define to 1 if you have the <string.h> header file. */
+#undef HAVE_STRING_H
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#undef HAVE_SYS_RESOURCE_H
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#undef HAVE_SYS_STAT_H
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#undef HAVE_SYS_TIME_H
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#undef HAVE_SYS_TYPES_H
+
+/* Define to 1 if you have the `time' function. */
+#undef HAVE_TIME
+
+/* Define to 1 if you have the <time.h> header file. */
+#undef HAVE_TIME_H
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#undef HAVE_UNISTD_H
+
+/* Define to 1 if you have the <zlib.h> header file. */
+#undef HAVE_ZLIB_H
+
+/* Define to 1 if you have the `__setfpucw' function. */
+#undef HAVE___SETFPUCW
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the home page for this package. */
+#undef PACKAGE_URL
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
+
+/* Additional package description */
+#undef PKGVERSION
+
+/* Bug reporting address */
+#undef REPORT_BUGS_TO
+
+/* Define as the return type of signal handlers (`int' or `void'). */
+#undef RETSIGTYPE
+
+/* Define to 1 if you have the ANSI C header files. */
+#undef STDC_HEADERS
+
+/* Enable extensions on AIX 3, Interix. */
+#ifndef _ALL_SOURCE
+# undef _ALL_SOURCE
+#endif
+/* Enable GNU extensions on systems that have them. */
+#ifndef _GNU_SOURCE
+# undef _GNU_SOURCE
+#endif
+/* Enable threading extensions on Solaris. */
+#ifndef _POSIX_PTHREAD_SEMANTICS
+# undef _POSIX_PTHREAD_SEMANTICS
+#endif
+/* Enable extensions on HP NonStop. */
+#ifndef _TANDEM_SOURCE
+# undef _TANDEM_SOURCE
+#endif
+/* Enable general extensions on Solaris. */
+#ifndef __EXTENSIONS__
+# undef __EXTENSIONS__
+#endif
+
+
+/* Define WORDS_BIGENDIAN to 1 if your processor stores words with the most
+ significant byte first (like Motorola and SPARC, unlike Intel). */
+#if defined AC_APPLE_UNIVERSAL_BUILD
+# if defined __BIG_ENDIAN__
+# define WORDS_BIGENDIAN 1
+# endif
+#else
+# ifndef WORDS_BIGENDIAN
+# undef WORDS_BIGENDIAN
+# endif
+#endif
+
+/* Define to 1 if on MINIX. */
+#undef _MINIX
+
+/* Define to 2 if the system does not provide POSIX.1 features except with
+ this defined. */
+#undef _POSIX_1_SOURCE
+
+/* Define to 1 if you need to in order for `stat' and other things to work. */
+#undef _POSIX_SOURCE
diff --git a/sim/or1k/configure b/sim/or1k/configure
new file mode 100644
index 0000000..ea562d4
--- /dev/null
+++ b/sim/or1k/configure
@@ -0,0 +1,6715 @@
+#! /bin/sh
+# Guess values for system-dependent variables and create Makefiles.
+# Generated by GNU Autoconf 2.64.
+#
+# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
+# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
+# Foundation, Inc.
+#
+# This configure script is free software; the Free Software Foundation
+# gives unlimited permission to copy, distribute and modify it.
+## -------------------- ##
+## M4sh Initialization. ##
+## -------------------- ##
+
+# Be more Bourne compatible
+DUALCASE=1; export DUALCASE # for MKS sh
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then :
+ emulate sh
+ NULLCMD=:
+ # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which
+ # is contrary to our usage. Disable this feature.
+ alias -g '${1+"$@"}'='"$@"'
+ setopt NO_GLOB_SUBST
+else
+ case `(set -o) 2>/dev/null` in #(
+ *posix*) :
+ set -o posix ;; #(
+ *) :
+ ;;
+esac
+fi
+
+
+as_nl='
+'
+export as_nl
+# Printing a long string crashes Solaris 7 /usr/bin/printf.
+as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
+as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo
+as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo
+# Prefer a ksh shell builtin over an external printf program on Solaris,
+# but without wasting forks for bash or zsh.
+if test -z "$BASH_VERSION$ZSH_VERSION" \
+ && (test "X`print -r -- $as_echo`" = "X$as_echo") 2>/dev/null; then
+ as_echo='print -r --'
+ as_echo_n='print -rn --'
+elif (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then
+ as_echo='printf %s\n'
+ as_echo_n='printf %s'
+else
+ if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then
+ as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"'
+ as_echo_n='/usr/ucb/echo -n'
+ else
+ as_echo_body='eval expr "X$1" : "X\\(.*\\)"'
+ as_echo_n_body='eval
+ arg=$1;
+ case $arg in #(
+ *"$as_nl"*)
+ expr "X$arg" : "X\\(.*\\)$as_nl";
+ arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;;
+ esac;
+ expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl"
+ '
+ export as_echo_n_body
+ as_echo_n='sh -c $as_echo_n_body as_echo'
+ fi
+ export as_echo_body
+ as_echo='sh -c $as_echo_body as_echo'
+fi
+
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+ PATH_SEPARATOR=:
+ (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && {
+ (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 ||
+ PATH_SEPARATOR=';'
+ }
+fi
+
+
+# IFS
+# We need space, tab and new line, in precisely that order. Quoting is
+# there to prevent editors from complaining about space-tab.
+# (If _AS_PATH_WALK were called with IFS unset, it would disable word
+# splitting by setting IFS to empty value.)
+IFS=" "" $as_nl"
+
+# Find who we are. Look in the path if we contain no directory separator.
+case $0 in #((
+ *[\\/]* ) as_myself=$0 ;;
+ *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break
+ done
+IFS=$as_save_IFS
+
+ ;;
+esac
+# We did not find ourselves, most probably we were run as `sh COMMAND'
+# in which case we are not to be found in the path.
+if test "x$as_myself" = x; then
+ as_myself=$0
+fi
+if test ! -f "$as_myself"; then
+ $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2
+ exit 1
+fi
+
+# Unset variables that we do not need and which cause bugs (e.g. in
+# pre-3.0 UWIN ksh). But do not cause bugs in bash 2.01; the "|| exit 1"
+# suppresses any "Segmentation fault" message there. '((' could
+# trigger a bug in pdksh 5.2.14.
+for as_var in BASH_ENV ENV MAIL MAILPATH
+do eval test x\${$as_var+set} = xset \
+ && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || :
+done
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# NLS nuisances.
+LC_ALL=C
+export LC_ALL
+LANGUAGE=C
+export LANGUAGE
+
+# CDPATH.
+(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+
+if test "x$CONFIG_SHELL" = x; then
+ as_bourne_compatible="if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then :
+ emulate sh
+ NULLCMD=:
+ # Pre-4.2 versions of Zsh do word splitting on \${1+\"\$@\"}, which
+ # is contrary to our usage. Disable this feature.
+ alias -g '\${1+\"\$@\"}'='\"\$@\"'
+ setopt NO_GLOB_SUBST
+else
+ case \`(set -o) 2>/dev/null\` in #(
+ *posix*) :
+ set -o posix ;; #(
+ *) :
+ ;;
+esac
+fi
+"
+ as_required="as_fn_return () { (exit \$1); }
+as_fn_success () { as_fn_return 0; }
+as_fn_failure () { as_fn_return 1; }
+as_fn_ret_success () { return 0; }
+as_fn_ret_failure () { return 1; }
+
+exitcode=0
+as_fn_success || { exitcode=1; echo as_fn_success failed.; }
+as_fn_failure && { exitcode=1; echo as_fn_failure succeeded.; }
+as_fn_ret_success || { exitcode=1; echo as_fn_ret_success failed.; }
+as_fn_ret_failure && { exitcode=1; echo as_fn_ret_failure succeeded.; }
+if ( set x; as_fn_ret_success y && test x = \"\$1\" ); then :
+
+else
+ exitcode=1; echo positional parameters were not saved.
+fi
+test x\$exitcode = x0 || exit 1"
+ as_suggested=" as_lineno_1=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_1a=\$LINENO
+ as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+ eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+ test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1
+test \$(( 1 + 1 )) = 2 || exit 1"
+ if (eval "$as_required") 2>/dev/null; then :
+ as_have_required=yes
+else
+ as_have_required=no
+fi
+ if test x$as_have_required = xyes && (eval "$as_suggested") 2>/dev/null; then :
+
+else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+as_found=false
+for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ as_found=:
+ case $as_dir in #(
+ /*)
+ for as_base in sh bash ksh sh5; do
+ # Try only shells that exist, to save several forks.
+ as_shell=$as_dir/$as_base
+ if { test -f "$as_shell" || test -f "$as_shell.exe"; } &&
+ { $as_echo "$as_bourne_compatible""$as_required" | as_run=a "$as_shell"; } 2>/dev/null; then :
+ CONFIG_SHELL=$as_shell as_have_required=yes
+ if { $as_echo "$as_bourne_compatible""$as_suggested" | as_run=a "$as_shell"; } 2>/dev/null; then :
+ break 2
+fi
+fi
+ done;;
+ esac
+ as_found=false
+done
+$as_found || { if { test -f "$SHELL" || test -f "$SHELL.exe"; } &&
+ { $as_echo "$as_bourne_compatible""$as_required" | as_run=a "$SHELL"; } 2>/dev/null; then :
+ CONFIG_SHELL=$SHELL as_have_required=yes
+fi; }
+IFS=$as_save_IFS
+
+
+ if test "x$CONFIG_SHELL" != x; then :
+ # We cannot yet assume a decent shell, so we have to provide a
+ # neutralization value for shells without unset; and this also
+ # works around shells that cannot unset nonexistent variables.
+ BASH_ENV=/dev/null
+ ENV=/dev/null
+ (unset BASH_ENV) >/dev/null 2>&1 && unset BASH_ENV ENV
+ export CONFIG_SHELL
+ exec "$CONFIG_SHELL" "$as_myself" ${1+"$@"}
+fi
+
+ if test x$as_have_required = xno; then :
+ $as_echo "$0: This script requires a shell more modern than all"
+ $as_echo "$0: the shells that I found on your system."
+ if test x${ZSH_VERSION+set} = xset ; then
+ $as_echo "$0: In particular, zsh $ZSH_VERSION has bugs and should"
+ $as_echo "$0: be upgraded to zsh 4.3.4 or later."
+ else
+ $as_echo "$0: Please tell bug-autoconf at gnu.org about your system,
+$0: including any error possibly output before this
+$0: message. Then install a modern shell, or manually run
+$0: the script under such a shell if you do have one."
+ fi
+ exit 1
+fi
+fi
+fi
+SHELL=${CONFIG_SHELL-/bin/sh}
+export SHELL
+# Unset more variables known to interfere with behavior of common tools.
+CLICOLOR_FORCE= GREP_OPTIONS=
+unset CLICOLOR_FORCE GREP_OPTIONS
+
+## --------------------- ##
+## M4sh Shell Functions. ##
+## --------------------- ##
+# as_fn_unset VAR
+# ---------------
+# Portably unset VAR.
+as_fn_unset ()
+{
+ { eval $1=; unset $1;}
+}
+as_unset=as_fn_unset
+
+# as_fn_set_status STATUS
+# -----------------------
+# Set $? to STATUS, without forking.
+as_fn_set_status ()
+{
+ return $1
+} # as_fn_set_status
+
+# as_fn_exit STATUS
+# -----------------
+# Exit the shell with STATUS, even in a "trap 0" or "set -e" context.
+as_fn_exit ()
+{
+ set +e
+ as_fn_set_status $1
+ exit $1
+} # as_fn_exit
+
+# as_fn_mkdir_p
+# -------------
+# Create "$as_dir" as a directory, including parents if necessary.
+as_fn_mkdir_p ()
+{
+
+ case $as_dir in #(
+ -*) as_dir=./$as_dir;;
+ esac
+ test -d "$as_dir" || eval $as_mkdir_p || {
+ as_dirs=
+ while :; do
+ case $as_dir in #(
+ *\'*) as_qdir=`$as_echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'(
+ *) as_qdir=$as_dir;;
+ esac
+ as_dirs="'$as_qdir' $as_dirs"
+ as_dir=`$as_dirname -- "$as_dir" ||
+$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+ X"$as_dir" : 'X\(//\)[^/]' \| \
+ X"$as_dir" : 'X\(//\)$' \| \
+ X"$as_dir" : 'X\(/\)' \| . 2>/dev/null ||
+$as_echo X"$as_dir" |
+ sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+ s//\1/
+ q
+ }
+ /^X\(\/\/\)[^/].*/{
+ s//\1/
+ q
+ }
+ /^X\(\/\/\)$/{
+ s//\1/
+ q
+ }
+ /^X\(\/\).*/{
+ s//\1/
+ q
+ }
+ s/.*/./; q'`
+ test -d "$as_dir" && break
+ done
+ test -z "$as_dirs" || eval "mkdir $as_dirs"
+ } || test -d "$as_dir" || as_fn_error "cannot create directory $as_dir"
+
+
+} # as_fn_mkdir_p
+# as_fn_append VAR VALUE
+# ----------------------
+# Append the text in VALUE to the end of the definition contained in VAR. Take
+# advantage of any shell optimizations that allow amortized linear growth over
+# repeated appends, instead of the typical quadratic growth present in naive
+# implementations.
+if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null; then :
+ eval 'as_fn_append ()
+ {
+ eval $1+=\$2
+ }'
+else
+ as_fn_append ()
+ {
+ eval $1=\$$1\$2
+ }
+fi # as_fn_append
+
+# as_fn_arith ARG...
+# ------------------
+# Perform arithmetic evaluation on the ARGs, and store the result in the
+# global $as_val. Take advantage of shells that can avoid forks. The arguments
+# must be portable across $(()) and expr.
+if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null; then :
+ eval 'as_fn_arith ()
+ {
+ as_val=$(( $* ))
+ }'
+else
+ as_fn_arith ()
+ {
+ as_val=`expr "$@" || test $? -eq 1`
+ }
+fi # as_fn_arith
+
+
+# as_fn_error ERROR [LINENO LOG_FD]
+# ---------------------------------
+# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are
+# provided, also output the error to LOG_FD, referencing LINENO. Then exit the
+# script with status $?, using 1 if that was 0.
+as_fn_error ()
+{
+ as_status=$?; test $as_status -eq 0 && as_status=1
+ if test "$3"; then
+ as_lineno=${as_lineno-"$2"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ $as_echo "$as_me:${as_lineno-$LINENO}: error: $1" >&$3
+ fi
+ $as_echo "$as_me: error: $1" >&2
+ as_fn_exit $as_status
+} # as_fn_error
+
+if expr a : '\(a\)' >/dev/null 2>&1 &&
+ test "X`expr 00001 : '.*\(...\)'`" = X001; then
+ as_expr=expr
+else
+ as_expr=false
+fi
+
+if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then
+ as_basename=basename
+else
+ as_basename=false
+fi
+
+if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then
+ as_dirname=dirname
+else
+ as_dirname=false
+fi
+
+as_me=`$as_basename -- "$0" ||
+$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \
+ X"$0" : 'X\(//\)$' \| \
+ X"$0" : 'X\(/\)' \| . 2>/dev/null ||
+$as_echo X/"$0" |
+ sed '/^.*\/\([^/][^/]*\)\/*$/{
+ s//\1/
+ q
+ }
+ /^X\/\(\/\/\)$/{
+ s//\1/
+ q
+ }
+ /^X\/\(\/\).*/{
+ s//\1/
+ q
+ }
+ s/.*/./; q'`
+
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+
+ as_lineno_1=$LINENO as_lineno_1a=$LINENO
+ as_lineno_2=$LINENO as_lineno_2a=$LINENO
+ eval 'test "x$as_lineno_1'$as_run'" != "x$as_lineno_2'$as_run'" &&
+ test "x`expr $as_lineno_1'$as_run' + 1`" = "x$as_lineno_2'$as_run'"' || {
+ # Blame Lee E. McMahon (1931-1989) for sed's syntax. :-)
+ sed -n '
+ p
+ /[$]LINENO/=
+ ' <$as_myself |
+ sed '
+ s/[$]LINENO.*/&-/
+ t lineno
+ b
+ :lineno
+ N
+ :loop
+ s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/
+ t loop
+ s/-\n.*//
+ ' >$as_me.lineno &&
+ chmod +x "$as_me.lineno" ||
+ { $as_echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2; as_fn_exit 1; }
+
+ # Don't try to exec as it changes $[0], causing all sort of problems
+ # (the dirname of $[0] is not the place where we might find the
+ # original and so on. Autoconf is especially sensitive to this).
+ . "./$as_me.lineno"
+ # Exit status is that of the last command.
+ exit
+}
+
+ECHO_C= ECHO_N= ECHO_T=
+case `echo -n x` in #(((((
+-n*)
+ case `echo 'xy\c'` in
+ *c*) ECHO_T=' ';; # ECHO_T is single tab character.
+ xy) ECHO_C='\c';;
+ *) echo `echo ksh88 bug on AIX 6.1` > /dev/null
+ ECHO_T=' ';;
+ esac;;
+*)
+ ECHO_N='-n';;
+esac
+
+rm -f conf$$ conf$$.exe conf$$.file
+if test -d conf$$.dir; then
+ rm -f conf$$.dir/conf$$.file
+else
+ rm -f conf$$.dir
+ mkdir conf$$.dir 2>/dev/null
+fi
+if (echo >conf$$.file) 2>/dev/null; then
+ if ln -s conf$$.file conf$$ 2>/dev/null; then
+ as_ln_s='ln -s'
+ # ... but there are two gotchas:
+ # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail.
+ # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable.
+ # In both cases, we have to default to `cp -p'.
+ ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe ||
+ as_ln_s='cp -p'
+ elif ln conf$$.file conf$$ 2>/dev/null; then
+ as_ln_s=ln
+ else
+ as_ln_s='cp -p'
+ fi
+else
+ as_ln_s='cp -p'
+fi
+rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file
+rmdir conf$$.dir 2>/dev/null
+
+if mkdir -p . 2>/dev/null; then
+ as_mkdir_p='mkdir -p "$as_dir"'
+else
+ test -d ./-p && rmdir ./-p
+ as_mkdir_p=false
+fi
+
+if test -x / >/dev/null 2>&1; then
+ as_test_x='test -x'
+else
+ if ls -dL / >/dev/null 2>&1; then
+ as_ls_L_option=L
+ else
+ as_ls_L_option=
+ fi
+ as_test_x='
+ eval sh -c '\''
+ if test -d "$1"; then
+ test -d "$1/.";
+ else
+ case $1 in #(
+ -*)set "./$1";;
+ esac;
+ case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in #((
+ ???[sx]*):;;*)false;;esac;fi
+ '\'' sh
+ '
+fi
+as_executable_p=$as_test_x
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+
+
+exec 7<&0 </dev/null 6>&1
+
+# Name of the host.
+# hostname on some systems (SVR3.2, Linux) returns a bogus exit status,
+# so uname gets run too.
+ac_hostname=`(hostname || uname -n) 2>/dev/null | sed 1q`
+
+#
+# Initializations.
+#
+ac_default_prefix=/usr/local
+ac_clean_files=
+ac_config_libobj_dir=.
+LIBOBJS=
+cross_compiling=no
+subdirs=
+MFLAGS=
+MAKEFLAGS=
+
+# Identity of this package.
+PACKAGE_NAME=
+PACKAGE_TARNAME=
+PACKAGE_VERSION=
+PACKAGE_STRING=
+PACKAGE_BUGREPORT=
+PACKAGE_URL=
+
+ac_unique_file="Makefile.in"
+# Factoring default headers for most tests.
+ac_includes_default="\
+#include <stdio.h>
+#ifdef HAVE_SYS_TYPES_H
+# include <sys/types.h>
+#endif
+#ifdef HAVE_SYS_STAT_H
+# include <sys/stat.h>
+#endif
+#ifdef STDC_HEADERS
+# include <stdlib.h>
+# include <stddef.h>
+#else
+# ifdef HAVE_STDLIB_H
+# include <stdlib.h>
+# endif
+#endif
+#ifdef HAVE_STRING_H
+# if !defined STDC_HEADERS && defined HAVE_MEMORY_H
+# include <memory.h>
+# endif
+# include <string.h>
+#endif
+#ifdef HAVE_STRINGS_H
+# include <strings.h>
+#endif
+#ifdef HAVE_INTTYPES_H
+# include <inttypes.h>
+#endif
+#ifdef HAVE_STDINT_H
+# include <stdint.h>
+#endif
+#ifdef HAVE_UNISTD_H
+# include <unistd.h>
+#endif"
+
+ac_subst_vars='LTLIBOBJS
+LIBOBJS
+cgen_breaks
+want_or1k_nodelay
+want_or1k64
+sim_extra_cflags
+traps_obj
+cgen
+cgendir
+CGEN_MAINT
+REPORT_BUGS_TEXI
+REPORT_BUGS_TO
+PKGVERSION
+sim_profile
+sim_trace
+sim_stdio
+sim_debug
+sim_cflags
+sim_bswap
+MAINT
+CATOBJEXT
+GENCAT
+INSTOBJEXT
+DATADIRNAME
+CATALOGS
+POSUB
+GMSGFMT
+XGETTEXT
+INCINTL
+LIBINTL_DEP
+LIBINTL
+USE_NLS
+GMAKE_FALSE
+GMAKE_TRUE
+MAKE
+CCDEPMODE
+DEPDIR
+am__leading_dot
+RANLIB
+AR
+HDEFINES
+CC_FOR_BUILD
+INSTALL_DATA
+INSTALL_SCRIPT
+INSTALL_PROGRAM
+EGREP
+GREP
+CPP
+target_os
+target_vendor
+target_cpu
+target
+host_os
+host_vendor
+host_cpu
+host
+build_os
+build_vendor
+build_cpu
+build
+OBJEXT
+EXEEXT
+ac_ct_CC
+CPPFLAGS
+LDFLAGS
+CFLAGS
+CC
+WERROR_CFLAGS
+WARN_CFLAGS
+sim_xor_endian
+sim_stdcall
+sim_smp
+sim_reserved_bits
+sim_regparm
+sim_packages
+sim_inline
+sim_hw
+sim_hw_objs
+sim_hw_cflags
+sim_default_model
+sim_scache
+sim_float
+sim_hostendian
+sim_endian
+sim_bitsize
+sim_assert
+sim_alignment
+sim_environment
+target_alias
+host_alias
+build_alias
+LIBS
+ECHO_T
+ECHO_N
+ECHO_C
+DEFS
+mandir
+localedir
+libdir
+psdir
+pdfdir
+dvidir
+htmldir
+infodir
+docdir
+oldincludedir
+includedir
+localstatedir
+sharedstatedir
+sysconfdir
+datadir
+datarootdir
+libexecdir
+sbindir
+bindir
+program_transform_name
+prefix
+exec_prefix
+PACKAGE_URL
+PACKAGE_BUGREPORT
+PACKAGE_STRING
+PACKAGE_VERSION
+PACKAGE_TARNAME
+PACKAGE_NAME
+PATH_SEPARATOR
+SHELL'
+ac_subst_files=''
+ac_user_opts='
+enable_option_checking
+with_zlib
+enable_maintainer_mode
+enable_sim_bswap
+enable_sim_cflags
+enable_sim_debug
+enable_sim_stdio
+enable_sim_trace
+enable_sim_profile
+with_pkgversion
+with_bugurl
+enable_sim_endian
+enable_sim_alignment
+enable_sim_hostendian
+enable_sim_bitsize
+enable_sim_scache
+enable_sim_default_model
+enable_sim_environment
+enable_sim_inline
+enable_cgen_maint
+'
+ ac_precious_vars='build_alias
+host_alias
+target_alias
+CC
+CFLAGS
+LDFLAGS
+LIBS
+CPPFLAGS
+CPP'
+
+
+# Initialize some variables set by options.
+ac_init_help=
+ac_init_version=false
+ac_unrecognized_opts=
+ac_unrecognized_sep=
+# The variables have the same names as the options, with
+# dashes changed to underlines.
+cache_file=/dev/null
+exec_prefix=NONE
+no_create=
+no_recursion=
+prefix=NONE
+program_prefix=NONE
+program_suffix=NONE
+program_transform_name=s,x,x,
+silent=
+site=
+srcdir=
+verbose=
+x_includes=NONE
+x_libraries=NONE
+
+# Installation directory options.
+# These are left unexpanded so users can "make install exec_prefix=/foo"
+# and all the variables that are supposed to be based on exec_prefix
+# by default will actually change.
+# Use braces instead of parens because sh, perl, etc. also accept them.
+# (The list follows the same order as the GNU Coding Standards.)
+bindir='${exec_prefix}/bin'
+sbindir='${exec_prefix}/sbin'
+libexecdir='${exec_prefix}/libexec'
+datarootdir='${prefix}/share'
+datadir='${datarootdir}'
+sysconfdir='${prefix}/etc'
+sharedstatedir='${prefix}/com'
+localstatedir='${prefix}/var'
+includedir='${prefix}/include'
+oldincludedir='/usr/include'
+docdir='${datarootdir}/doc/${PACKAGE}'
+infodir='${datarootdir}/info'
+htmldir='${docdir}'
+dvidir='${docdir}'
+pdfdir='${docdir}'
+psdir='${docdir}'
+libdir='${exec_prefix}/lib'
+localedir='${datarootdir}/locale'
+mandir='${datarootdir}/man'
+
+ac_prev=
+ac_dashdash=
+for ac_option
+do
+ # If the previous option needs an argument, assign it.
+ if test -n "$ac_prev"; then
+ eval $ac_prev=\$ac_option
+ ac_prev=
+ continue
+ fi
+
+ case $ac_option in
+ *=*) ac_optarg=`expr "X$ac_option" : '[^=]*=\(.*\)'` ;;
+ *) ac_optarg=yes ;;
+ esac
+
+ # Accept the important Cygnus configure options, so we can diagnose typos.
+
+ case $ac_dashdash$ac_option in
+ --)
+ ac_dashdash=yes ;;
+
+ -bindir | --bindir | --bindi | --bind | --bin | --bi)
+ ac_prev=bindir ;;
+ -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
+ bindir=$ac_optarg ;;
+
+ -build | --build | --buil | --bui | --bu)
+ ac_prev=build_alias ;;
+ -build=* | --build=* | --buil=* | --bui=* | --bu=*)
+ build_alias=$ac_optarg ;;
+
+ -cache-file | --cache-file | --cache-fil | --cache-fi \
+ | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
+ ac_prev=cache_file ;;
+ -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
+ | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
+ cache_file=$ac_optarg ;;
+
+ --config-cache | -C)
+ cache_file=config.cache ;;
+
+ -datadir | --datadir | --datadi | --datad)
+ ac_prev=datadir ;;
+ -datadir=* | --datadir=* | --datadi=* | --datad=*)
+ datadir=$ac_optarg ;;
+
+ -datarootdir | --datarootdir | --datarootdi | --datarootd | --dataroot \
+ | --dataroo | --dataro | --datar)
+ ac_prev=datarootdir ;;
+ -datarootdir=* | --datarootdir=* | --datarootdi=* | --datarootd=* \
+ | --dataroot=* | --dataroo=* | --dataro=* | --datar=*)
+ datarootdir=$ac_optarg ;;
+
+ -disable-* | --disable-*)
+ ac_useropt=`expr "x$ac_option" : 'x-*disable-\(.*\)'`
+ # Reject names that are not valid shell variable names.
+ expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null &&
+ as_fn_error "invalid feature name: $ac_useropt"
+ ac_useropt_orig=$ac_useropt
+ ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'`
+ case $ac_user_opts in
+ *"
+"enable_$ac_useropt"
+"*) ;;
+ *) ac_unrecognized_opts="$ac_unrecognized_opts$ac_unrecognized_sep--disable-$ac_useropt_orig"
+ ac_unrecognized_sep=', ';;
+ esac
+ eval enable_$ac_useropt=no ;;
+
+ -docdir | --docdir | --docdi | --doc | --do)
+ ac_prev=docdir ;;
+ -docdir=* | --docdir=* | --docdi=* | --doc=* | --do=*)
+ docdir=$ac_optarg ;;
+
+ -dvidir | --dvidir | --dvidi | --dvid | --dvi | --dv)
+ ac_prev=dvidir ;;
+ -dvidir=* | --dvidir=* | --dvidi=* | --dvid=* | --dvi=* | --dv=*)
+ dvidir=$ac_optarg ;;
+
+ -enable-* | --enable-*)
+ ac_useropt=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'`
+ # Reject names that are not valid shell variable names.
+ expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null &&
+ as_fn_error "invalid feature name: $ac_useropt"
+ ac_useropt_orig=$ac_useropt
+ ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'`
+ case $ac_user_opts in
+ *"
+"enable_$ac_useropt"
+"*) ;;
+ *) ac_unrecognized_opts="$ac_unrecognized_opts$ac_unrecognized_sep--enable-$ac_useropt_orig"
+ ac_unrecognized_sep=', ';;
+ esac
+ eval enable_$ac_useropt=\$ac_optarg ;;
+
+ -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
+ | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
+ | --exec | --exe | --ex)
+ ac_prev=exec_prefix ;;
+ -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
+ | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
+ | --exec=* | --exe=* | --ex=*)
+ exec_prefix=$ac_optarg ;;
+
+ -gas | --gas | --ga | --g)
+ # Obsolete; use --with-gas.
+ with_gas=yes ;;
+
+ -help | --help | --hel | --he | -h)
+ ac_init_help=long ;;
+ -help=r* | --help=r* | --hel=r* | --he=r* | -hr*)
+ ac_init_help=recursive ;;
+ -help=s* | --help=s* | --hel=s* | --he=s* | -hs*)
+ ac_init_help=short ;;
+
+ -host | --host | --hos | --ho)
+ ac_prev=host_alias ;;
+ -host=* | --host=* | --hos=* | --ho=*)
+ host_alias=$ac_optarg ;;
+
+ -htmldir | --htmldir | --htmldi | --htmld | --html | --htm | --ht)
+ ac_prev=htmldir ;;
+ -htmldir=* | --htmldir=* | --htmldi=* | --htmld=* | --html=* | --htm=* \
+ | --ht=*)
+ htmldir=$ac_optarg ;;
+
+ -includedir | --includedir | --includedi | --included | --include \
+ | --includ | --inclu | --incl | --inc)
+ ac_prev=includedir ;;
+ -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
+ | --includ=* | --inclu=* | --incl=* | --inc=*)
+ includedir=$ac_optarg ;;
+
+ -infodir | --infodir | --infodi | --infod | --info | --inf)
+ ac_prev=infodir ;;
+ -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
+ infodir=$ac_optarg ;;
+
+ -libdir | --libdir | --libdi | --libd)
+ ac_prev=libdir ;;
+ -libdir=* | --libdir=* | --libdi=* | --libd=*)
+ libdir=$ac_optarg ;;
+
+ -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
+ | --libexe | --libex | --libe)
+ ac_prev=libexecdir ;;
+ -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
+ | --libexe=* | --libex=* | --libe=*)
+ libexecdir=$ac_optarg ;;
+
+ -localedir | --localedir | --localedi | --localed | --locale)
+ ac_prev=localedir ;;
+ -localedir=* | --localedir=* | --localedi=* | --localed=* | --locale=*)
+ localedir=$ac_optarg ;;
+
+ -localstatedir | --localstatedir | --localstatedi | --localstated \
+ | --localstate | --localstat | --localsta | --localst | --locals)
+ ac_prev=localstatedir ;;
+ -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
+ | --localstate=* | --localstat=* | --localsta=* | --localst=* | --locals=*)
+ localstatedir=$ac_optarg ;;
+
+ -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
+ ac_prev=mandir ;;
+ -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
+ mandir=$ac_optarg ;;
+
+ -nfp | --nfp | --nf)
+ # Obsolete; use --without-fp.
+ with_fp=no ;;
+
+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+ | --no-cr | --no-c | -n)
+ no_create=yes ;;
+
+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+ | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
+ no_recursion=yes ;;
+
+ -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
+ | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
+ | --oldin | --oldi | --old | --ol | --o)
+ ac_prev=oldincludedir ;;
+ -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
+ | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
+ | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
+ oldincludedir=$ac_optarg ;;
+
+ -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
+ ac_prev=prefix ;;
+ -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
+ prefix=$ac_optarg ;;
+
+ -program-prefix | --program-prefix | --program-prefi | --program-pref \
+ | --program-pre | --program-pr | --program-p)
+ ac_prev=program_prefix ;;
+ -program-prefix=* | --program-prefix=* | --program-prefi=* \
+ | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
+ program_prefix=$ac_optarg ;;
+
+ -program-suffix | --program-suffix | --program-suffi | --program-suff \
+ | --program-suf | --program-su | --program-s)
+ ac_prev=program_suffix ;;
+ -program-suffix=* | --program-suffix=* | --program-suffi=* \
+ | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
+ program_suffix=$ac_optarg ;;
+
+ -program-transform-name | --program-transform-name \
+ | --program-transform-nam | --program-transform-na \
+ | --program-transform-n | --program-transform- \
+ | --program-transform | --program-transfor \
+ | --program-transfo | --program-transf \
+ | --program-trans | --program-tran \
+ | --progr-tra | --program-tr | --program-t)
+ ac_prev=program_transform_name ;;
+ -program-transform-name=* | --program-transform-name=* \
+ | --program-transform-nam=* | --program-transform-na=* \
+ | --program-transform-n=* | --program-transform-=* \
+ | --program-transform=* | --program-transfor=* \
+ | --program-transfo=* | --program-transf=* \
+ | --program-trans=* | --program-tran=* \
+ | --progr-tra=* | --program-tr=* | --program-t=*)
+ program_transform_name=$ac_optarg ;;
+
+ -pdfdir | --pdfdir | --pdfdi | --pdfd | --pdf | --pd)
+ ac_prev=pdfdir ;;
+ -pdfdir=* | --pdfdir=* | --pdfdi=* | --pdfd=* | --pdf=* | --pd=*)
+ pdfdir=$ac_optarg ;;
+
+ -psdir | --psdir | --psdi | --psd | --ps)
+ ac_prev=psdir ;;
+ -psdir=* | --psdir=* | --psdi=* | --psd=* | --ps=*)
+ psdir=$ac_optarg ;;
+
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil)
+ silent=yes ;;
+
+ -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
+ ac_prev=sbindir ;;
+ -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
+ | --sbi=* | --sb=*)
+ sbindir=$ac_optarg ;;
+
+ -sharedstatedir | --sharedstatedir | --sharedstatedi \
+ | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
+ | --sharedst | --shareds | --shared | --share | --shar \
+ | --sha | --sh)
+ ac_prev=sharedstatedir ;;
+ -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
+ | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
+ | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
+ | --sha=* | --sh=*)
+ sharedstatedir=$ac_optarg ;;
+
+ -site | --site | --sit)
+ ac_prev=site ;;
+ -site=* | --site=* | --sit=*)
+ site=$ac_optarg ;;
+
+ -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
+ ac_prev=srcdir ;;
+ -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
+ srcdir=$ac_optarg ;;
+
+ -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
+ | --syscon | --sysco | --sysc | --sys | --sy)
+ ac_prev=sysconfdir ;;
+ -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
+ | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
+ sysconfdir=$ac_optarg ;;
+
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+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: $2: section \"Present But Cannot Be Compiled\"" >&5
+$as_echo "$as_me: WARNING: $2: section \"Present But Cannot Be Compiled\"" >&2;}
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: $2: proceeding with the compiler's result" >&5
+$as_echo "$as_me: WARNING: $2: proceeding with the compiler's result" >&2;}
+ ;;
+esac
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
+$as_echo_n "checking for $2... " >&6; }
+if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+ $as_echo_n "(cached) " >&6
+else
+ eval "$3=\$ac_header_compiler"
+fi
+eval ac_res=\$$3
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
+$as_echo "$ac_res" >&6; }
+fi
+ eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+
+} # ac_fn_c_check_header_mongrel
+
+# ac_fn_c_try_run LINENO
+# ----------------------
+# Try to link conftest.$ac_ext, and return whether this succeeded. Assumes
+# that executables *can* be run.
+ac_fn_c_try_run ()
+{
+ as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ if { { ac_try="$ac_link"
+case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_link") 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; } && { ac_try='./conftest$ac_exeext'
+ { { case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_try") 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }; then :
+ ac_retval=0
+else
+ $as_echo "$as_me: program exited with status $ac_status" >&5
+ $as_echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+ ac_retval=$ac_status
+fi
+ rm -rf conftest.dSYM conftest_ipa8_conftest.oo
+ eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ return $ac_retval
+
+} # ac_fn_c_try_run
+
+# ac_fn_c_check_header_compile LINENO HEADER VAR INCLUDES
+# -------------------------------------------------------
+# Tests whether HEADER exists and can be compiled using the include files in
+# INCLUDES, setting the cache variable VAR accordingly.
+ac_fn_c_check_header_compile ()
+{
+ as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
+$as_echo_n "checking for $2... " >&6; }
+if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+$4
+#include <$2>
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ eval "$3=yes"
+else
+ eval "$3=no"
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+eval ac_res=\$$3
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
+$as_echo "$ac_res" >&6; }
+ eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+
+} # ac_fn_c_check_header_compile
+
+# ac_fn_c_try_link LINENO
+# -----------------------
+# Try to link conftest.$ac_ext, and return whether this succeeded.
+ac_fn_c_try_link ()
+{
+ as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ rm -f conftest.$ac_objext conftest$ac_exeext
+ if { { ac_try="$ac_link"
+case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_link") 2>conftest.err
+ ac_status=$?
+ if test -s conftest.err; then
+ grep -v '^ *+' conftest.err >conftest.er1
+ cat conftest.er1 >&5
+ mv -f conftest.er1 conftest.err
+ fi
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; } && {
+ test -z "$ac_c_werror_flag" ||
+ test ! -s conftest.err
+ } && test -s conftest$ac_exeext && {
+ test "$cross_compiling" = yes ||
+ $as_test_x conftest$ac_exeext
+ }; then :
+ ac_retval=0
+else
+ $as_echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+ ac_retval=1
+fi
+ # Delete the IPA/IPO (Inter Procedural Analysis/Optimization) information
+ # created by the PGI compiler (conftest_ipa8_conftest.oo), as it would
+ # interfere with the next link command; also delete a directory that is
+ # left behind by Apple's compiler. We do this before executing the actions.
+ rm -rf conftest.dSYM conftest_ipa8_conftest.oo
+ eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ return $ac_retval
+
+} # ac_fn_c_try_link
+
+# ac_fn_c_check_func LINENO FUNC VAR
+# ----------------------------------
+# Tests whether FUNC exists, setting the cache variable VAR accordingly
+ac_fn_c_check_func ()
+{
+ as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
+$as_echo_n "checking for $2... " >&6; }
+if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+/* Define $2 to an innocuous variant, in case <limits.h> declares $2.
+ For example, HP-UX 11i <limits.h> declares gettimeofday. */
+#define $2 innocuous_$2
+
+/* System header to define __stub macros and hopefully few prototypes,
+ which can conflict with char $2 (); below.
+ Prefer <limits.h> to <assert.h> if __STDC__ is defined, since
+ <limits.h> exists even on freestanding compilers. */
+
+#ifdef __STDC__
+# include <limits.h>
+#else
+# include <assert.h>
+#endif
+
+#undef $2
+
+/* Override any GCC internal prototype to avoid an error.
+ Use char because int might match the return type of a GCC
+ builtin and then its argument prototype would still apply. */
+#ifdef __cplusplus
+extern "C"
+#endif
+char $2 ();
+/* The GNU C library defines this for functions which it implements
+ to always fail with ENOSYS. Some functions are actually named
+ something starting with __ and the normal name is an alias. */
+#if defined __stub_$2 || defined __stub___$2
+choke me
+#endif
+
+int
+main ()
+{
+return $2 ();
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"; then :
+ eval "$3=yes"
+else
+ eval "$3=no"
+fi
+rm -f core conftest.err conftest.$ac_objext \
+ conftest$ac_exeext conftest.$ac_ext
+fi
+eval ac_res=\$$3
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
+$as_echo "$ac_res" >&6; }
+ eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+
+} # ac_fn_c_check_func
+cat >config.log <<_ACEOF
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+
+It was created by $as_me, which was
+generated by GNU Autoconf 2.64. Invocation command line was
+
+ $ $0 $@
+
+_ACEOF
+exec 5>>config.log
+{
+cat <<_ASUNAME
+## --------- ##
+## Platform. ##
+## --------- ##
+
+hostname = `(hostname || uname -n) 2>/dev/null | sed 1q`
+uname -m = `(uname -m) 2>/dev/null || echo unknown`
+uname -r = `(uname -r) 2>/dev/null || echo unknown`
+uname -s = `(uname -s) 2>/dev/null || echo unknown`
+uname -v = `(uname -v) 2>/dev/null || echo unknown`
+
+/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null || echo unknown`
+/bin/uname -X = `(/bin/uname -X) 2>/dev/null || echo unknown`
+
+/bin/arch = `(/bin/arch) 2>/dev/null || echo unknown`
+/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null || echo unknown`
+/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null || echo unknown`
+/usr/bin/hostinfo = `(/usr/bin/hostinfo) 2>/dev/null || echo unknown`
+/bin/machine = `(/bin/machine) 2>/dev/null || echo unknown`
+/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null || echo unknown`
+/bin/universe = `(/bin/universe) 2>/dev/null || echo unknown`
+
+_ASUNAME
+
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ $as_echo "PATH: $as_dir"
+ done
+IFS=$as_save_IFS
+
+} >&5
+
+cat >&5 <<_ACEOF
+
+
+## ----------- ##
+## Core tests. ##
+## ----------- ##
+
+_ACEOF
+
+
+# Keep a trace of the command line.
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Strip out --silent because we don't want to record it for future runs.
+# Also quote any args containing shell meta-characters.
+# Make two passes to allow for proper duplicate-argument suppression.
+ac_configure_args=
+ac_configure_args0=
+ac_configure_args1=
+ac_must_keep_next=false
+for ac_pass in 1 2
+do
+ for ac_arg
+ do
+ case $ac_arg in
+ -no-create | --no-c* | -n | -no-recursion | --no-r*) continue ;;
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil)
+ continue ;;
+ *\'*)
+ ac_arg=`$as_echo "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;;
+ esac
+ case $ac_pass in
+ 1) as_fn_append ac_configure_args0 " '$ac_arg'" ;;
+ 2)
+ as_fn_append ac_configure_args1 " '$ac_arg'"
+ if test $ac_must_keep_next = true; then
+ ac_must_keep_next=false # Got value, back to normal.
+ else
+ case $ac_arg in
+ *=* | --config-cache | -C | -disable-* | --disable-* \
+ | -enable-* | --enable-* | -gas | --g* | -nfp | --nf* \
+ | -q | -quiet | --q* | -silent | --sil* | -v | -verb* \
+ | -with-* | --with-* | -without-* | --without-* | --x)
+ case "$ac_configure_args0 " in
+ "$ac_configure_args1"*" '$ac_arg' "* ) continue ;;
+ esac
+ ;;
+ -* ) ac_must_keep_next=true ;;
+ esac
+ fi
+ as_fn_append ac_configure_args " '$ac_arg'"
+ ;;
+ esac
+ done
+done
+{ ac_configure_args0=; unset ac_configure_args0;}
+{ ac_configure_args1=; unset ac_configure_args1;}
+
+# When interrupted or exit'd, cleanup temporary files, and complete
+# config.log. We remove comments because anyway the quotes in there
+# would cause problems or look ugly.
+# WARNING: Use '\'' to represent an apostrophe within the trap.
+# WARNING: Do not start the trap code with a newline, due to a FreeBSD 4.0 bug.
+trap 'exit_status=$?
+ # Save into config.log some information that might help in debugging.
+ {
+ echo
+
+ cat <<\_ASBOX
+## ---------------- ##
+## Cache variables. ##
+## ---------------- ##
+_ASBOX
+ echo
+ # The following way of writing the cache mishandles newlines in values,
+(
+ for ac_var in `(set) 2>&1 | sed -n '\''s/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'\''`; do
+ eval ac_val=\$$ac_var
+ case $ac_val in #(
+ *${as_nl}*)
+ case $ac_var in #(
+ *_cv_*) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5
+$as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;;
+ esac
+ case $ac_var in #(
+ _ | IFS | as_nl) ;; #(
+ BASH_ARGV | BASH_SOURCE) eval $ac_var= ;; #(
+ *) { eval $ac_var=; unset $ac_var;} ;;
+ esac ;;
+ esac
+ done
+ (set) 2>&1 |
+ case $as_nl`(ac_space='\'' '\''; set) 2>&1` in #(
+ *${as_nl}ac_space=\ *)
+ sed -n \
+ "s/'\''/'\''\\\\'\'''\''/g;
+ s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\''\\2'\''/p"
+ ;; #(
+ *)
+ sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p"
+ ;;
+ esac |
+ sort
+)
+ echo
+
+ cat <<\_ASBOX
+## ----------------- ##
+## Output variables. ##
+## ----------------- ##
+_ASBOX
+ echo
+ for ac_var in $ac_subst_vars
+ do
+ eval ac_val=\$$ac_var
+ case $ac_val in
+ *\'\''*) ac_val=`$as_echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;;
+ esac
+ $as_echo "$ac_var='\''$ac_val'\''"
+ done | sort
+ echo
+
+ if test -n "$ac_subst_files"; then
+ cat <<\_ASBOX
+## ------------------- ##
+## File substitutions. ##
+## ------------------- ##
+_ASBOX
+ echo
+ for ac_var in $ac_subst_files
+ do
+ eval ac_val=\$$ac_var
+ case $ac_val in
+ *\'\''*) ac_val=`$as_echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;;
+ esac
+ $as_echo "$ac_var='\''$ac_val'\''"
+ done | sort
+ echo
+ fi
+
+ if test -s confdefs.h; then
+ cat <<\_ASBOX
+## ----------- ##
+## confdefs.h. ##
+## ----------- ##
+_ASBOX
+ echo
+ cat confdefs.h
+ echo
+ fi
+ test "$ac_signal" != 0 &&
+ $as_echo "$as_me: caught signal $ac_signal"
+ $as_echo "$as_me: exit $exit_status"
+ } >&5
+ rm -f core *.core core.conftest.* &&
+ rm -f -r conftest* confdefs* conf$$* $ac_clean_files &&
+ exit $exit_status
+' 0
+for ac_signal in 1 2 13 15; do
+ trap 'ac_signal='$ac_signal'; as_fn_exit 1' $ac_signal
+done
+ac_signal=0
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -f -r conftest* confdefs.h
+
+$as_echo "/* confdefs.h */" > confdefs.h
+
+# Predefined preprocessor variables.
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_NAME "$PACKAGE_NAME"
+_ACEOF
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_TARNAME "$PACKAGE_TARNAME"
+_ACEOF
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_VERSION "$PACKAGE_VERSION"
+_ACEOF
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_STRING "$PACKAGE_STRING"
+_ACEOF
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_BUGREPORT "$PACKAGE_BUGREPORT"
+_ACEOF
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_URL "$PACKAGE_URL"
+_ACEOF
+
+
+# Let the site file select an alternate cache file if it wants to.
+# Prefer an explicitly selected file to automatically selected ones.
+ac_site_file1=NONE
+ac_site_file2=NONE
+if test -n "$CONFIG_SITE"; then
+ ac_site_file1=$CONFIG_SITE
+elif test "x$prefix" != xNONE; then
+ ac_site_file1=$prefix/share/config.site
+ ac_site_file2=$prefix/etc/config.site
+else
+ ac_site_file1=$ac_default_prefix/share/config.site
+ ac_site_file2=$ac_default_prefix/etc/config.site
+fi
+for ac_site_file in "$ac_site_file1" "$ac_site_file2"
+do
+ test "x$ac_site_file" = xNONE && continue
+ if test -r "$ac_site_file"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: loading site script $ac_site_file" >&5
+$as_echo "$as_me: loading site script $ac_site_file" >&6;}
+ sed 's/^/| /' "$ac_site_file" >&5
+ . "$ac_site_file"
+ fi
+done
+
+if test -r "$cache_file"; then
+ # Some versions of bash will fail to source /dev/null (special
+ # files actually), so we avoid doing that.
+ if test -f "$cache_file"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: loading cache $cache_file" >&5
+$as_echo "$as_me: loading cache $cache_file" >&6;}
+ case $cache_file in
+ [\\/]* | ?:[\\/]* ) . "$cache_file";;
+ *) . "./$cache_file";;
+ esac
+ fi
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5
+$as_echo "$as_me: creating cache $cache_file" >&6;}
+ >$cache_file
+fi
+
+# Check that the precious variables saved in the cache have kept the same
+# value.
+ac_cache_corrupted=false
+for ac_var in $ac_precious_vars; do
+ eval ac_old_set=\$ac_cv_env_${ac_var}_set
+ eval ac_new_set=\$ac_env_${ac_var}_set
+ eval ac_old_val=\$ac_cv_env_${ac_var}_value
+ eval ac_new_val=\$ac_env_${ac_var}_value
+ case $ac_old_set,$ac_new_set in
+ set,)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5
+$as_echo "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;}
+ ac_cache_corrupted=: ;;
+ ,set)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was not set in the previous run" >&5
+$as_echo "$as_me: error: \`$ac_var' was not set in the previous run" >&2;}
+ ac_cache_corrupted=: ;;
+ ,);;
+ *)
+ if test "x$ac_old_val" != "x$ac_new_val"; then
+ # differences in whitespace do not lead to failure.
+ ac_old_val_w=`echo x $ac_old_val`
+ ac_new_val_w=`echo x $ac_new_val`
+ if test "$ac_old_val_w" != "$ac_new_val_w"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' has changed since the previous run:" >&5
+$as_echo "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;}
+ ac_cache_corrupted=:
+ else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&5
+$as_echo "$as_me: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&2;}
+ eval $ac_var=\$ac_old_val
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: former value: \`$ac_old_val'" >&5
+$as_echo "$as_me: former value: \`$ac_old_val'" >&2;}
+ { $as_echo "$as_me:${as_lineno-$LINENO}: current value: \`$ac_new_val'" >&5
+$as_echo "$as_me: current value: \`$ac_new_val'" >&2;}
+ fi;;
+ esac
+ # Pass precious variables to config.status.
+ if test "$ac_new_set" = set; then
+ case $ac_new_val in
+ *\'*) ac_arg=$ac_var=`$as_echo "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;;
+ *) ac_arg=$ac_var=$ac_new_val ;;
+ esac
+ case " $ac_configure_args " in
+ *" '$ac_arg' "*) ;; # Avoid dups. Use of quotes ensures accuracy.
+ *) as_fn_append ac_configure_args " '$ac_arg'" ;;
+ esac
+ fi
+done
+if $ac_cache_corrupted; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+ { $as_echo "$as_me:${as_lineno-$LINENO}: error: changes in the environment can compromise the build" >&5
+$as_echo "$as_me: error: changes in the environment can compromise the build" >&2;}
+ as_fn_error "run \`make distclean' and/or \`rm $cache_file' and start over" "$LINENO" 5
+fi
+## -------------------- ##
+## Main body of script. ##
+## -------------------- ##
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+# This file contains common code used by all simulators.
+#
+# SIM_AC_COMMON invokes AC macros used by all simulators and by the common
+# directory. It is intended to be invoked before any target specific stuff.
+# SIM_AC_OUTPUT is a cover function to AC_OUTPUT to generate the Makefile.
+# It is intended to be invoked last.
+#
+# The simulator's configure.in should look like:
+#
+# dnl Process this file with autoconf to produce a configure script.
+# AC_PREREQ(2.64)dnl
+# AC_INIT(Makefile.in)
+# sinclude(../common/aclocal.m4)
+#
+# SIM_AC_COMMON
+#
+# ... target specific stuff ...
+#
+# SIM_AC_OUTPUT
+
+# Include global overrides and fixes for Autoconf.
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+# _AC_CHECK_DECL_BODY
+# -------------------
+# Shell function body for AC_CHECK_DECL.
+# _AC_CHECK_DECL_BODY
+
+# _AC_CHECK_DECLS(SYMBOL, ACTION-IF_FOUND, ACTION-IF-NOT-FOUND,
+# INCLUDES)
+# -------------------------------------------------------------
+# Helper to AC_CHECK_DECLS, which generates the check for a single
+# SYMBOL with INCLUDES, performs the AC_DEFINE, then expands
+# ACTION-IF-FOUND or ACTION-IF-NOT-FOUND.
+
+
+
+
+
+
+
+
+
+
+## -*- Autoconf -*-
+
+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 8
+
+# Based on depend.m4 from automake 1.9, modified for standalone use in
+# an environment where GNU make is required.
+
+# ZW_PROG_COMPILER_DEPENDENCIES
+# -----------------------------
+# Variant of _AM_DEPENDENCIES which just does the dependency probe and
+# sets fooDEPMODE accordingly. Cache-variable compatible with
+# original; not side-effect compatible. As the users of this macro
+# may require accurate dependencies for correct builds, it does *not*
+# honor --disable-dependency-checking, and failure to detect a usable
+# method is an error. depcomp is assumed to be located in
+# $ac_aux_dir.
+#
+# FIXME: Should use the Autoconf 2.5x language-selection mechanism.
+
+
+
+# AM_SET_DEPDIR
+# -------------
+# Choose a directory name for dependency files.
+
+
+# ZW_CREATE_DEPDIR
+# ----------------
+# As AM_SET_DEPDIR, but also create the directory at config.status time.
+
+
+
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+
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+
+
+
+
+
+sim_inline="-DDEFAULT_INLINE=0"
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
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+
+
+
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+
+
+
+
+
+
+
+
+
+# intl sister-directory configuration rules.
+#
+
+# The idea behind this macro is that there's no need to repeat all the
+# autoconf probes done by the intl directory - it's already done them
+# for us. In fact, there's no need even to look at the cache for the
+# answers. All we need to do is nab a few pieces of information.
+# The intl directory is set up to make this easy, by generating a
+# small file which can be sourced as a shell script; then we produce
+# the necessary substitutions and definitions for this directory.
+
+
+
+# Autoconf M4 include file defining utility macros for complex Canadian
+# cross builds.
+
+
+
+
+
+
+
+
+
+####
+# _NCN_TOOL_PREFIXES: Some stuff that oughtta be done in AC_CANONICAL_SYSTEM
+# or AC_INIT.
+# These demand that AC_CANONICAL_SYSTEM be called beforehand.
+
+####
+# NCN_STRICT_CHECK_TOOLS(variable, progs-to-check-for,[value-if-not-found],[path])
+# Like plain AC_CHECK_TOOLS, but require prefix if build!=host.
+
+
+####
+# NCN_STRICT_CHECK_TARGET_TOOLS(variable, progs-to-check-for,[value-if-not-found],[path])
+# Like CVS Autoconf AC_CHECK_TARGET_TOOLS, but require prefix if build!=target.
+
+
+
+# Backported from Autoconf 2.5x; can go away when and if
+# we switch. Put the OS path separator in $PATH_SEPARATOR.
+
+
+
+
+# ACX_HAVE_GCC_FOR_TARGET
+# Check if the variable GCC_FOR_TARGET really points to a GCC binary.
+
+
+# ACX_CHECK_INSTALLED_TARGET_TOOL(VAR, PROG)
+# Searching for installed target binutils. We need to take extra care,
+# else we may find the wrong assembler, linker, etc., and lose.
+#
+# First try --with-build-time-tools, if specified.
+#
+# For build != host, we ask the installed GCC for the name of the tool it
+# uses, and accept it if it is an absolute path. This is because the
+# only good choice for a compiler is the same GCC version that is being
+# installed (or we couldn't make target libraries), and we assume that
+# on the host system we'll have not only the same GCC version, but also
+# the same binutils version.
+#
+# For build == host, search the same directories that the installed
+# compiler will search. We used to do this for the assembler, linker,
+# and nm only; for simplicity of configuration, however, we extend this
+# criterion to tools (such as ar and ranlib) that are never invoked by
+# the compiler, to avoid mismatches.
+#
+# Also note we have to check MD_EXEC_PREFIX before checking the user's path
+# if build == target. This makes the most sense only when bootstrapping,
+# but we also do so when build != host. In this case, we hope that the
+# build and host systems will have similar contents of MD_EXEC_PREFIX.
+#
+# If we do not find a suitable binary, then try the user's path.
+
+
+###
+# AC_PROG_CPP_WERROR
+# Used for autoconf 2.5x to force AC_PREPROC_IFELSE to reject code which
+# triggers warnings from the preprocessor. Will be in autoconf 2.58.
+# For now, using this also overrides header checks to use only the
+# preprocessor (matches 2.13 behavior; matching 2.58's behavior is a
+# bit harder from here).
+# Eventually autoconf will default to checking headers with the compiler
+# instead, and we'll have to do this differently.
+
+# AC_PROG_CPP_WERROR
+
+# Test for GNAT.
+# We require the gnatbind & gnatmake programs, as well as a compiler driver
+# that understands Ada. We use the user's CC setting, already found, and
+# possibly add $1 to the command-line parameters.
+#
+# Sets the shell variable have_gnat to yes or no as appropriate, and
+# substitutes GNATBIND and GNATMAKE.
+
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+
+
+
+ case "${target_alias}" in
+ or1k*-linux*)
+ traps_obj=traps-linux.o
+ ;;
+ *)
+ traps_obj=traps.o
+ ;;
+ esac
+
+ case "${target_alias}" in
+ or1knd-*)
+ want_or1k_nodelay=true
+ default_model=or1200nd
+ ;;
+ *)
+ default_model=or1200
+ ;;
+ esac
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test -n "$ac_tool_prefix"; then
+ # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}gcc; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_CC="${ac_tool_prefix}gcc"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+$as_echo "$CC" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_CC"; then
+ ac_ct_CC=$CC
+ # Extract the first word of "gcc", so it can be a program name with args.
+set dummy gcc; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_ac_ct_CC+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$ac_ct_CC"; then
+ ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_ac_ct_CC="gcc"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CC=$ac_cv_prog_ac_ct_CC
+if test -n "$ac_ct_CC"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5
+$as_echo "$ac_ct_CC" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+ if test "x$ac_ct_CC" = x; then
+ CC=""
+ else
+ case $cross_compiling:$ac_tool_warned in
+yes:)
+{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+ CC=$ac_ct_CC
+ fi
+else
+ CC="$ac_cv_prog_CC"
+fi
+
+if test -z "$CC"; then
+ if test -n "$ac_tool_prefix"; then
+ # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}cc; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_CC="${ac_tool_prefix}cc"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+$as_echo "$CC" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+ fi
+fi
+if test -z "$CC"; then
+ # Extract the first word of "cc", so it can be a program name with args.
+set dummy cc; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ ac_prog_rejected=no
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then
+ ac_prog_rejected=yes
+ continue
+ fi
+ ac_cv_prog_CC="cc"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+if test $ac_prog_rejected = yes; then
+ # We found a bogon in the path, so make sure we never use it.
+ set dummy $ac_cv_prog_CC
+ shift
+ if test $# != 0; then
+ # We chose a different compiler from the bogus one.
+ # However, it has the same basename, so the bogon will be chosen
+ # first if we set CC to just the basename; use the full file name.
+ shift
+ ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@"
+ fi
+fi
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+$as_echo "$CC" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+fi
+if test -z "$CC"; then
+ if test -n "$ac_tool_prefix"; then
+ for ac_prog in cl.exe
+ do
+ # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_CC="$ac_tool_prefix$ac_prog"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+$as_echo "$CC" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+ test -n "$CC" && break
+ done
+fi
+if test -z "$CC"; then
+ ac_ct_CC=$CC
+ for ac_prog in cl.exe
+do
+ # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_ac_ct_CC+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$ac_ct_CC"; then
+ ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_ac_ct_CC="$ac_prog"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CC=$ac_cv_prog_ac_ct_CC
+if test -n "$ac_ct_CC"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5
+$as_echo "$ac_ct_CC" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+ test -n "$ac_ct_CC" && break
+done
+
+ if test "x$ac_ct_CC" = x; then
+ CC=""
+ else
+ case $cross_compiling:$ac_tool_warned in
+yes:)
+{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+ CC=$ac_ct_CC
+ fi
+fi
+
+fi
+
+
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+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error "no acceptable C compiler found in \$PATH
+See \`config.log' for more details." "$LINENO" 5; }
+
+# Provide some information about the compiler.
+$as_echo "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5
+set X $ac_compile
+ac_compiler=$2
+for ac_option in --version -v -V -qversion; do
+ { { ac_try="$ac_compiler $ac_option >&5"
+case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_compiler $ac_option >&5") 2>conftest.err
+ ac_status=$?
+ if test -s conftest.err; then
+ sed '10a\
+... rest of stderr output deleted ...
+ 10q' conftest.err >conftest.er1
+ cat conftest.er1 >&5
+ rm -f conftest.er1 conftest.err
+ fi
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }
+done
+
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+ac_clean_files_save=$ac_clean_files
+ac_clean_files="$ac_clean_files a.out a.out.dSYM a.exe b.out conftest.out"
+# Try to create an executable without -o first, disregard a.out.
+# It will help us diagnose broken compilers, and finding out an intuition
+# of exeext.
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+$as_echo_n "checking for C compiler default output file name... " >&6; }
+ac_link_default=`$as_echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'`
+
+# The possible output files:
+ac_files="a.out conftest.exe conftest a.exe a_out.exe b.out conftest.*"
+
+ac_rmfiles=
+for ac_file in $ac_files
+do
+ case $ac_file in
+ *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj ) ;;
+ * ) ac_rmfiles="$ac_rmfiles $ac_file";;
+ esac
+done
+rm -f $ac_rmfiles
+
+if { { ac_try="$ac_link_default"
+case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_link_default") 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; then :
+ # Autoconf-2.13 could set the ac_cv_exeext variable to `no'.
+# So ignore a value of `no', otherwise this would lead to `EXEEXT = no'
+# in a Makefile. We should not override ac_cv_exeext if it was cached,
+# so that the user can short-circuit this test for compilers unknown to
+# Autoconf.
+for ac_file in $ac_files ''
+do
+ test -f "$ac_file" || continue
+ case $ac_file in
+ *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj )
+ ;;
+ [ab].out )
+ # We found the default executable, but exeext='' is most
+ # certainly right.
+ break;;
+ *.* )
+ if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no;
+ then :; else
+ ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'`
+ fi
+ # We set ac_cv_exeext here because the later test for it is not
+ # safe: cross compilers may not add the suffix if given an `-o'
+ # argument, so we may need to know it at that point already.
+ # Even if this section looks crufty: it has the advantage of
+ # actually working.
+ break;;
+ * )
+ break;;
+ esac
+done
+test "$ac_cv_exeext" = no && ac_cv_exeext=
+
+else
+ ac_file=''
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_file" >&5
+$as_echo "$ac_file" >&6; }
+if test -z "$ac_file"; then :
+ $as_echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+{ as_fn_set_status 77
+as_fn_error "C compiler cannot create executables
+See \`config.log' for more details." "$LINENO" 5; }; }
+fi
+ac_exeext=$ac_cv_exeext
+
+# Check that the compiler produces executables we can run. If not, either
+# the compiler is broken, or we cross compile.
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the C compiler works" >&5
+$as_echo_n "checking whether the C compiler works... " >&6; }
+# If not cross compiling, check that we can run a simple program.
+if test "$cross_compiling" != yes; then
+ if { ac_try='./$ac_file'
+ { { case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_try") 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }; then
+ cross_compiling=no
+ else
+ if test "$cross_compiling" = maybe; then
+ cross_compiling=yes
+ else
+ { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error "cannot run C compiled programs.
+If you meant to cross compile, use \`--host'.
+See \`config.log' for more details." "$LINENO" 5; }
+ fi
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+$as_echo "yes" >&6; }
+
+rm -f -r a.out a.out.dSYM a.exe conftest$ac_cv_exeext b.out conftest.out
+ac_clean_files=$ac_clean_files_save
+# Check that the compiler produces executables we can run. If not, either
+# the compiler is broken, or we cross compile.
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are cross compiling" >&5
+$as_echo_n "checking whether we are cross compiling... " >&6; }
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $cross_compiling" >&5
+$as_echo "$cross_compiling" >&6; }
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for suffix of executables" >&5
+$as_echo_n "checking for suffix of executables... " >&6; }
+if { { ac_try="$ac_link"
+case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_link") 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; then :
+ # If both `conftest.exe' and `conftest' are `present' (well, observable)
+# catch `conftest.exe'. For instance with Cygwin, `ls conftest' will
+# work properly (i.e., refer to `conftest.exe'), while it won't with
+# `rm'.
+for ac_file in conftest.exe conftest conftest.*; do
+ test -f "$ac_file" || continue
+ case $ac_file in
+ *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj ) ;;
+ *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'`
+ break;;
+ * ) break;;
+ esac
+done
+else
+ { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error "cannot compute suffix of executables: cannot compile and link
+See \`config.log' for more details." "$LINENO" 5; }
+fi
+rm -f conftest$ac_cv_exeext
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_exeext" >&5
+$as_echo "$ac_cv_exeext" >&6; }
+
+rm -f conftest.$ac_ext
+EXEEXT=$ac_cv_exeext
+ac_exeext=$EXEEXT
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for suffix of object files" >&5
+$as_echo_n "checking for suffix of object files... " >&6; }
+if test "${ac_cv_objext+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+rm -f conftest.o conftest.obj
+if { { ac_try="$ac_compile"
+case "(($ac_try" in
+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+ *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+$as_echo "$ac_try_echo"; } >&5
+ (eval "$ac_compile") 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; then :
+ for ac_file in conftest.o conftest.obj conftest.*; do
+ test -f "$ac_file" || continue;
+ case $ac_file in
+ *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM ) ;;
+ *) ac_cv_objext=`expr "$ac_file" : '.*\.\(.*\)'`
+ break;;
+ esac
+done
+else
+ $as_echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error "cannot compute suffix of object files: cannot compile
+See \`config.log' for more details." "$LINENO" 5; }
+fi
+rm -f conftest.$ac_cv_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_objext" >&5
+$as_echo "$ac_cv_objext" >&6; }
+OBJEXT=$ac_cv_objext
+ac_objext=$OBJEXT
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are using the GNU C compiler" >&5
+$as_echo_n "checking whether we are using the GNU C compiler... " >&6; }
+if test "${ac_cv_c_compiler_gnu+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+int
+main ()
+{
+#ifndef __GNUC__
+ choke me
+#endif
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_compiler_gnu=yes
+else
+ ac_compiler_gnu=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ac_cv_c_compiler_gnu=$ac_compiler_gnu
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_compiler_gnu" >&5
+$as_echo "$ac_cv_c_compiler_gnu" >&6; }
+if test $ac_compiler_gnu = yes; then
+ GCC=yes
+else
+ GCC=
+fi
+ac_test_CFLAGS=${CFLAGS+set}
+ac_save_CFLAGS=$CFLAGS
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC accepts -g" >&5
+$as_echo_n "checking whether $CC accepts -g... " >&6; }
+if test "${ac_cv_prog_cc_g+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ ac_save_c_werror_flag=$ac_c_werror_flag
+ ac_c_werror_flag=yes
+ ac_cv_prog_cc_g=no
+ CFLAGS="-g"
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_prog_cc_g=yes
+else
+ CFLAGS=""
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+
+else
+ ac_c_werror_flag=$ac_save_c_werror_flag
+ CFLAGS="-g"
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_prog_cc_g=yes
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ ac_c_werror_flag=$ac_save_c_werror_flag
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_g" >&5
+$as_echo "$ac_cv_prog_cc_g" >&6; }
+if test "$ac_test_CFLAGS" = set; then
+ CFLAGS=$ac_save_CFLAGS
+elif test $ac_cv_prog_cc_g = yes; then
+ if test "$GCC" = yes; then
+ CFLAGS="-g -O2"
+ else
+ CFLAGS="-g"
+ fi
+else
+ if test "$GCC" = yes; then
+ CFLAGS="-O2"
+ else
+ CFLAGS=
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $CC option to accept ISO C89" >&5
+$as_echo_n "checking for $CC option to accept ISO C89... " >&6; }
+if test "${ac_cv_prog_cc_c89+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ ac_cv_prog_cc_c89=no
+ac_save_CC=$CC
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <stdarg.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */
+struct buf { int x; };
+FILE * (*rcsopen) (struct buf *, struct stat *, int);
+static char *e (p, i)
+ char **p;
+ int i;
+{
+ return p[i];
+}
+static char *f (char * (*g) (char **, int), char **p, ...)
+{
+ char *s;
+ va_list v;
+ va_start (v,p);
+ s = g (p, va_arg (v,int));
+ va_end (v);
+ return s;
+}
+
+/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has
+ function prototypes and stuff, but not '\xHH' hex character constants.
+ These don't provoke an error unfortunately, instead are silently treated
+ as 'x'. The following induces an error, until -std is added to get
+ proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an
+ array size at least. It's necessary to write '\x00'==0 to get something
+ that's true only with -std. */
+int osf4_cc_array ['\x00' == 0 ? 1 : -1];
+
+/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters
+ inside strings and character constants. */
+#define FOO(x) 'x'
+int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1];
+
+int test (int i, double x);
+struct s1 {int (*f) (int a);};
+struct s2 {int (*f) (double a);};
+int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int);
+int argc;
+char **argv;
+int
+main ()
+{
+return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1];
+ ;
+ return 0;
+}
+_ACEOF
+for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \
+ -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__"
+do
+ CC="$ac_save_CC $ac_arg"
+ if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_prog_cc_c89=$ac_arg
+fi
+rm -f core conftest.err conftest.$ac_objext
+ test "x$ac_cv_prog_cc_c89" != "xno" && break
+done
+rm -f conftest.$ac_ext
+CC=$ac_save_CC
+
+fi
+# AC_CACHE_VAL
+case "x$ac_cv_prog_cc_c89" in
+ x)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: none needed" >&5
+$as_echo "none needed" >&6; } ;;
+ xno)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5
+$as_echo "unsupported" >&6; } ;;
+ *)
+ CC="$CC $ac_cv_prog_cc_c89"
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5
+$as_echo "$ac_cv_prog_cc_c89" >&6; } ;;
+esac
+if test "x$ac_cv_prog_cc_c89" != xno; then :
+
+fi
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+ac_aux_dir=
+for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do
+ for ac_t in install-sh install.sh shtool; do
+ if test -f "$ac_dir/$ac_t"; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/$ac_t -c"
+ break 2
+ fi
+ done
+done
+if test -z "$ac_aux_dir"; then
+ as_fn_error "cannot find install-sh, install.sh, or shtool in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" "$LINENO" 5
+fi
+
+# These three variables are undocumented and unsupported,
+# and are intended to be withdrawn in a future Autoconf release.
+# They can cause serious problems if a builder's source tree is in a directory
+# whose full name contains unusual characters.
+ac_config_guess="$SHELL $ac_aux_dir/config.guess" # Please don't use this var.
+ac_config_sub="$SHELL $ac_aux_dir/config.sub" # Please don't use this var.
+ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var.
+
+
+# Make sure we can run config.sub.
+$SHELL "$ac_aux_dir/config.sub" sun4 >/dev/null 2>&1 ||
+ as_fn_error "cannot run $SHELL $ac_aux_dir/config.sub" "$LINENO" 5
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking build system type" >&5
+$as_echo_n "checking build system type... " >&6; }
+if test "${ac_cv_build+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ ac_build_alias=$build_alias
+test "x$ac_build_alias" = x &&
+ ac_build_alias=`$SHELL "$ac_aux_dir/config.guess"`
+test "x$ac_build_alias" = x &&
+ as_fn_error "cannot guess build type; you must specify one" "$LINENO" 5
+ac_cv_build=`$SHELL "$ac_aux_dir/config.sub" $ac_build_alias` ||
+ as_fn_error "$SHELL $ac_aux_dir/config.sub $ac_build_alias failed" "$LINENO" 5
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_build" >&5
+$as_echo "$ac_cv_build" >&6; }
+case $ac_cv_build in
+*-*-*) ;;
+*) as_fn_error "invalid value of canonical build" "$LINENO" 5;;
+esac
+build=$ac_cv_build
+ac_save_IFS=$IFS; IFS='-'
+set x $ac_cv_build
+shift
+build_cpu=$1
+build_vendor=$2
+shift; shift
+# Remember, the first character of IFS is used to create $*,
+# except with old shells:
+build_os=$*
+IFS=$ac_save_IFS
+case $build_os in *\ *) build_os=`echo "$build_os" | sed 's/ /-/g'`;; esac
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking host system type" >&5
+$as_echo_n "checking host system type... " >&6; }
+if test "${ac_cv_host+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test "x$host_alias" = x; then
+ ac_cv_host=$ac_cv_build
+else
+ ac_cv_host=`$SHELL "$ac_aux_dir/config.sub" $host_alias` ||
+ as_fn_error "$SHELL $ac_aux_dir/config.sub $host_alias failed" "$LINENO" 5
+fi
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_host" >&5
+$as_echo "$ac_cv_host" >&6; }
+case $ac_cv_host in
+*-*-*) ;;
+*) as_fn_error "invalid value of canonical host" "$LINENO" 5;;
+esac
+host=$ac_cv_host
+ac_save_IFS=$IFS; IFS='-'
+set x $ac_cv_host
+shift
+host_cpu=$1
+host_vendor=$2
+shift; shift
+# Remember, the first character of IFS is used to create $*,
+# except with old shells:
+host_os=$*
+IFS=$ac_save_IFS
+case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking target system type" >&5
+$as_echo_n "checking target system type... " >&6; }
+if test "${ac_cv_target+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test "x$target_alias" = x; then
+ ac_cv_target=$ac_cv_host
+else
+ ac_cv_target=`$SHELL "$ac_aux_dir/config.sub" $target_alias` ||
+ as_fn_error "$SHELL $ac_aux_dir/config.sub $target_alias failed" "$LINENO" 5
+fi
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_target" >&5
+$as_echo "$ac_cv_target" >&6; }
+case $ac_cv_target in
+*-*-*) ;;
+*) as_fn_error "invalid value of canonical target" "$LINENO" 5;;
+esac
+target=$ac_cv_target
+ac_save_IFS=$IFS; IFS='-'
+set x $ac_cv_target
+shift
+target_cpu=$1
+target_vendor=$2
+shift; shift
+# Remember, the first character of IFS is used to create $*,
+# except with old shells:
+target_os=$*
+IFS=$ac_save_IFS
+case $target_os in *\ *) target_os=`echo "$target_os" | sed 's/ /-/g'`;; esac
+
+
+# The aliases save the names the user supplied, while $host etc.
+# will get canonicalized.
+test -n "$target_alias" &&
+ test "$program_prefix$program_suffix$program_transform_name" = \
+ NONENONEs,x,x, &&
+ program_prefix=${target_alias}-
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to run the C preprocessor" >&5
+$as_echo_n "checking how to run the C preprocessor... " >&6; }
+# On Suns, sometimes $CPP names a directory.
+if test -n "$CPP" && test -d "$CPP"; then
+ CPP=
+fi
+if test -z "$CPP"; then
+ if test "${ac_cv_prog_CPP+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ # Double quotes because CPP needs to be expanded
+ for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp"
+ do
+ ac_preproc_ok=false
+for ac_c_preproc_warn_flag in '' yes
+do
+ # Use a header file that comes with gcc, so configuring glibc
+ # with a fresh cross-compiler works.
+ # Prefer <limits.h> to <assert.h> if __STDC__ is defined, since
+ # <limits.h> exists even on freestanding compilers.
+ # On the NeXT, cc -E runs the code through the compiler's parser,
+ # not just through cpp. "Syntax error" is here to catch this case.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#ifdef __STDC__
+# include <limits.h>
+#else
+# include <assert.h>
+#endif
+ Syntax error
+_ACEOF
+if ac_fn_c_try_cpp "$LINENO"; then :
+
+else
+ # Broken: fails on valid input.
+continue
+fi
+rm -f conftest.err conftest.$ac_ext
+
+ # OK, works on sane cases. Now check whether nonexistent headers
+ # can be detected and how.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <ac_nonexistent.h>
+_ACEOF
+if ac_fn_c_try_cpp "$LINENO"; then :
+ # Broken: success on invalid input.
+continue
+else
+ # Passes both tests.
+ac_preproc_ok=:
+break
+fi
+rm -f conftest.err conftest.$ac_ext
+
+done
+# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped.
+rm -f conftest.err conftest.$ac_ext
+if $ac_preproc_ok; then :
+ break
+fi
+
+ done
+ ac_cv_prog_CPP=$CPP
+
+fi
+ CPP=$ac_cv_prog_CPP
+else
+ ac_cv_prog_CPP=$CPP
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $CPP" >&5
+$as_echo "$CPP" >&6; }
+ac_preproc_ok=false
+for ac_c_preproc_warn_flag in '' yes
+do
+ # Use a header file that comes with gcc, so configuring glibc
+ # with a fresh cross-compiler works.
+ # Prefer <limits.h> to <assert.h> if __STDC__ is defined, since
+ # <limits.h> exists even on freestanding compilers.
+ # On the NeXT, cc -E runs the code through the compiler's parser,
+ # not just through cpp. "Syntax error" is here to catch this case.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#ifdef __STDC__
+# include <limits.h>
+#else
+# include <assert.h>
+#endif
+ Syntax error
+_ACEOF
+if ac_fn_c_try_cpp "$LINENO"; then :
+
+else
+ # Broken: fails on valid input.
+continue
+fi
+rm -f conftest.err conftest.$ac_ext
+
+ # OK, works on sane cases. Now check whether nonexistent headers
+ # can be detected and how.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <ac_nonexistent.h>
+_ACEOF
+if ac_fn_c_try_cpp "$LINENO"; then :
+ # Broken: success on invalid input.
+continue
+else
+ # Passes both tests.
+ac_preproc_ok=:
+break
+fi
+rm -f conftest.err conftest.$ac_ext
+
+done
+# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped.
+rm -f conftest.err conftest.$ac_ext
+if $ac_preproc_ok; then :
+
+else
+ { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error "C preprocessor \"$CPP\" fails sanity check
+See \`config.log' for more details." "$LINENO" 5; }
+fi
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for grep that handles long lines and -e" >&5
+$as_echo_n "checking for grep that handles long lines and -e... " >&6; }
+if test "${ac_cv_path_GREP+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -z "$GREP"; then
+ ac_path_GREP_found=false
+ # Loop through the user's path and test for each of PROGNAME-LIST
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_prog in grep ggrep; do
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext"
+ { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue
+# Check for GNU ac_path_GREP and select it if it is found.
+ # Check for GNU $ac_path_GREP
+case `"$ac_path_GREP" --version 2>&1` in
+*GNU*)
+ ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;;
+*)
+ ac_count=0
+ $as_echo_n 0123456789 >"conftest.in"
+ while :
+ do
+ cat "conftest.in" "conftest.in" >"conftest.tmp"
+ mv "conftest.tmp" "conftest.in"
+ cp "conftest.in" "conftest.nl"
+ $as_echo 'GREP' >> "conftest.nl"
+ "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break
+ diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break
+ as_fn_arith $ac_count + 1 && ac_count=$as_val
+ if test $ac_count -gt ${ac_path_GREP_max-0}; then
+ # Best one so far, save it but keep looking for a better one
+ ac_cv_path_GREP="$ac_path_GREP"
+ ac_path_GREP_max=$ac_count
+ fi
+ # 10*(2^10) chars as input seems more than enough
+ test $ac_count -gt 10 && break
+ done
+ rm -f conftest.in conftest.tmp conftest.nl conftest.out;;
+esac
+
+ $ac_path_GREP_found && break 3
+ done
+ done
+ done
+IFS=$as_save_IFS
+ if test -z "$ac_cv_path_GREP"; then
+ as_fn_error "no acceptable grep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
+ fi
+else
+ ac_cv_path_GREP=$GREP
+fi
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_GREP" >&5
+$as_echo "$ac_cv_path_GREP" >&6; }
+ GREP="$ac_cv_path_GREP"
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for egrep" >&5
+$as_echo_n "checking for egrep... " >&6; }
+if test "${ac_cv_path_EGREP+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if echo a | $GREP -E '(a|b)' >/dev/null 2>&1
+ then ac_cv_path_EGREP="$GREP -E"
+ else
+ if test -z "$EGREP"; then
+ ac_path_EGREP_found=false
+ # Loop through the user's path and test for each of PROGNAME-LIST
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_prog in egrep; do
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext"
+ { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue
+# Check for GNU ac_path_EGREP and select it if it is found.
+ # Check for GNU $ac_path_EGREP
+case `"$ac_path_EGREP" --version 2>&1` in
+*GNU*)
+ ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;;
+*)
+ ac_count=0
+ $as_echo_n 0123456789 >"conftest.in"
+ while :
+ do
+ cat "conftest.in" "conftest.in" >"conftest.tmp"
+ mv "conftest.tmp" "conftest.in"
+ cp "conftest.in" "conftest.nl"
+ $as_echo 'EGREP' >> "conftest.nl"
+ "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break
+ diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break
+ as_fn_arith $ac_count + 1 && ac_count=$as_val
+ if test $ac_count -gt ${ac_path_EGREP_max-0}; then
+ # Best one so far, save it but keep looking for a better one
+ ac_cv_path_EGREP="$ac_path_EGREP"
+ ac_path_EGREP_max=$ac_count
+ fi
+ # 10*(2^10) chars as input seems more than enough
+ test $ac_count -gt 10 && break
+ done
+ rm -f conftest.in conftest.tmp conftest.nl conftest.out;;
+esac
+
+ $ac_path_EGREP_found && break 3
+ done
+ done
+ done
+IFS=$as_save_IFS
+ if test -z "$ac_cv_path_EGREP"; then
+ as_fn_error "no acceptable egrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
+ fi
+else
+ ac_cv_path_EGREP=$EGREP
+fi
+
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_EGREP" >&5
+$as_echo "$ac_cv_path_EGREP" >&6; }
+ EGREP="$ac_cv_path_EGREP"
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5
+$as_echo_n "checking for ANSI C header files... " >&6; }
+if test "${ac_cv_header_stdc+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <float.h>
+
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_header_stdc=yes
+else
+ ac_cv_header_stdc=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+
+if test $ac_cv_header_stdc = yes; then
+ # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <string.h>
+
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ $EGREP "memchr" >/dev/null 2>&1; then :
+
+else
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+ # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <stdlib.h>
+
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ $EGREP "free" >/dev/null 2>&1; then :
+
+else
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+ # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
+ if test "$cross_compiling" = yes; then :
+ :
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <ctype.h>
+#include <stdlib.h>
+#if ((' ' & 0x0FF) == 0x020)
+# define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
+# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c))
+#else
+# define ISLOWER(c) \
+ (('a' <= (c) && (c) <= 'i') \
+ || ('j' <= (c) && (c) <= 'r') \
+ || ('s' <= (c) && (c) <= 'z'))
+# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c))
+#endif
+
+#define XOR(e, f) (((e) && !(f)) || (!(e) && (f)))
+int
+main ()
+{
+ int i;
+ for (i = 0; i < 256; i++)
+ if (XOR (islower (i), ISLOWER (i))
+ || toupper (i) != TOUPPER (i))
+ return 2;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_run "$LINENO"; then :
+
+else
+ ac_cv_header_stdc=no
+fi
+rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+ conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+
+fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_header_stdc" >&5
+$as_echo "$ac_cv_header_stdc" >&6; }
+if test $ac_cv_header_stdc = yes; then
+
+$as_echo "#define STDC_HEADERS 1" >>confdefs.h
+
+fi
+
+# On IRIX 5.3, sys/types and inttypes.h are conflicting.
+for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \
+ inttypes.h stdint.h unistd.h
+do :
+ as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
+ac_fn_c_check_header_compile "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default
+"
+eval as_val=\$$as_ac_Header
+ if test "x$as_val" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+
+
+ ac_fn_c_check_header_mongrel "$LINENO" "minix/config.h" "ac_cv_header_minix_config_h" "$ac_includes_default"
+if test "x$ac_cv_header_minix_config_h" = x""yes; then :
+ MINIX=yes
+else
+ MINIX=
+fi
+
+
+ if test "$MINIX" = yes; then
+
+$as_echo "#define _POSIX_SOURCE 1" >>confdefs.h
+
+
+$as_echo "#define _POSIX_1_SOURCE 2" >>confdefs.h
+
+
+$as_echo "#define _MINIX 1" >>confdefs.h
+
+ fi
+
+
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether it is safe to define __EXTENSIONS__" >&5
+$as_echo_n "checking whether it is safe to define __EXTENSIONS__... " >&6; }
+if test "${ac_cv_safe_to_define___extensions__+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+# define __EXTENSIONS__ 1
+ $ac_includes_default
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_safe_to_define___extensions__=yes
+else
+ ac_cv_safe_to_define___extensions__=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_safe_to_define___extensions__" >&5
+$as_echo "$ac_cv_safe_to_define___extensions__" >&6; }
+ test $ac_cv_safe_to_define___extensions__ = yes &&
+ $as_echo "#define __EXTENSIONS__ 1" >>confdefs.h
+
+ $as_echo "#define _ALL_SOURCE 1" >>confdefs.h
+
+ $as_echo "#define _GNU_SOURCE 1" >>confdefs.h
+
+ $as_echo "#define _POSIX_PTHREAD_SEMANTICS 1" >>confdefs.h
+
+ $as_echo "#define _TANDEM_SOURCE 1" >>confdefs.h
+
+
+test "$program_prefix" != NONE &&
+ program_transform_name="s&^&$program_prefix&;$program_transform_name"
+# Use a double $ so make ignores it.
+test "$program_suffix" != NONE &&
+ program_transform_name="s&\$&$program_suffix&;$program_transform_name"
+# Double any \ or $.
+# By default was `s,x,x', remove it if useless.
+ac_script='s/[\\$]/&&/g;s/;s,x,x,$//'
+program_transform_name=`$as_echo "$program_transform_name" | sed "$ac_script"`
+
+# Find a good install program. We prefer a C program (faster),
+# so one script is as good as another. But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AmigaOS /C/install, which installs bootblocks on floppy discs
+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# OS/2's system install, which has a completely different semantic
+# ./install, which can be erroneously created by make from ./install.sh.
+# Reject install programs that cannot install multiple files.
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a BSD-compatible install" >&5
+$as_echo_n "checking for a BSD-compatible install... " >&6; }
+if test -z "$INSTALL"; then
+if test "${ac_cv_path_install+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ # Account for people who put trailing slashes in PATH elements.
+case $as_dir/ in #((
+ ./ | .// | /[cC]/* | \
+ /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \
+ ?:[\\/]os2[\\/]install[\\/]* | ?:[\\/]OS2[\\/]INSTALL[\\/]* | \
+ /usr/ucb/* ) ;;
+ *)
+ # OSF1 and SCO ODT 3.0 have their own names for install.
+ # Don't use installbsd from OSF since it installs stuff as root
+ # by default.
+ for ac_prog in ginstall scoinst install; do
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; }; then
+ if test $ac_prog = install &&
+ grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
+ # AIX install. It has an incompatible calling convention.
+ :
+ elif test $ac_prog = install &&
+ grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
+ # program-specific install script used by HP pwplus--don't use.
+ :
+ else
+ rm -rf conftest.one conftest.two conftest.dir
+ echo one > conftest.one
+ echo two > conftest.two
+ mkdir conftest.dir
+ if "$as_dir/$ac_prog$ac_exec_ext" -c conftest.one conftest.two "`pwd`/conftest.dir" &&
+ test -s conftest.one && test -s conftest.two &&
+ test -s conftest.dir/conftest.one &&
+ test -s conftest.dir/conftest.two
+ then
+ ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c"
+ break 3
+ fi
+ fi
+ fi
+ done
+ done
+ ;;
+esac
+
+ done
+IFS=$as_save_IFS
+
+rm -rf conftest.one conftest.two conftest.dir
+
+fi
+ if test "${ac_cv_path_install+set}" = set; then
+ INSTALL=$ac_cv_path_install
+ else
+ # As a last resort, use the slow shell script. Don't cache a
+ # value for INSTALL within a source directory, because that will
+ # break other packages using the cache if that directory is
+ # removed, or if the value is a relative name.
+ INSTALL=$ac_install_sh
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $INSTALL" >&5
+$as_echo "$INSTALL" >&6; }
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+rm -rf .tst 2>/dev/null
+mkdir .tst 2>/dev/null
+if test -d .tst; then
+ am__leading_dot=.
+else
+ am__leading_dot=_
+fi
+rmdir .tst 2>/dev/null
+
+DEPDIR="${am__leading_dot}deps"
+
+
+
+# autoconf.info says this should be called right after AC_INIT.
+ac_config_headers="$ac_config_headers config.h:config.in"
+
+
+
+
+
+
+# Put a plausible default for CC_FOR_BUILD in Makefile.
+if test "x$cross_compiling" = "xno"; then
+ CC_FOR_BUILD='$(CC)'
+else
+ CC_FOR_BUILD=gcc
+fi
+
+
+
+
+AR=${AR-ar}
+
+if test -n "$ac_tool_prefix"; then
+ # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
+set dummy ${ac_tool_prefix}ranlib; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_RANLIB+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$RANLIB"; then
+ ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+RANLIB=$ac_cv_prog_RANLIB
+if test -n "$RANLIB"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5
+$as_echo "$RANLIB" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_RANLIB"; then
+ ac_ct_RANLIB=$RANLIB
+ # Extract the first word of "ranlib", so it can be a program name with args.
+set dummy ranlib; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$ac_ct_RANLIB"; then
+ ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_ac_ct_RANLIB="ranlib"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB
+if test -n "$ac_ct_RANLIB"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5
+$as_echo "$ac_ct_RANLIB" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+ if test "x$ac_ct_RANLIB" = x; then
+ RANLIB=":"
+ else
+ case $cross_compiling:$ac_tool_warned in
+yes:)
+{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+ RANLIB=$ac_ct_RANLIB
+ fi
+else
+ RANLIB="$ac_cv_prog_RANLIB"
+fi
+
+
+# Dependency checking.
+ac_config_commands="$ac_config_commands depdir"
+
+
+depcc="$CC" am_compiler_list=
+
+am_depcomp=$ac_aux_dir/depcomp
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5
+$as_echo_n "checking dependency style of $depcc... " >&6; }
+if test "${am_cv_CC_dependencies_compiler_type+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -f "$am_depcomp"; then
+ # We make a subdir and do the tests there. Otherwise we can end up
+ # making bogus files that we don't know about and never remove. For
+ # instance it was reported that on HP-UX the gcc test will end up
+ # making a dummy file named `D' -- because `-MD' means `put the output
+ # in D'.
+ mkdir conftest.dir
+ # Copy depcomp to subdir because otherwise we won't find it if we're
+ # using a relative directory.
+ cp "$am_depcomp" conftest.dir
+ cd conftest.dir
+ # We will build objects and dependencies in a subdirectory because
+ # it helps to detect inapplicable dependency modes. For instance
+ # both Tru64's cc and ICC support -MD to output dependencies as a
+ # side effect of compilation, but ICC will put the dependencies in
+ # the current directory while Tru64 will put them in the object
+ # directory.
+ mkdir sub
+
+ am_cv_CC_dependencies_compiler_type=none
+ if test "$am_compiler_list" = ""; then
+ am_compiler_list=`sed -n 's/^\([a-zA-Z0-9]*\))$/\1/p' < ./depcomp`
+ fi
+ for depmode in $am_compiler_list; do
+ if test $depmode = none; then break; fi
+
+ $as_echo "$as_me:$LINENO: trying $depmode" >&5
+ # Setup a source with many dependencies, because some compilers
+ # like to wrap large dependency lists on column 80 (with \), and
+ # we should not choose a depcomp mode which is confused by this.
+ #
+ # We need to recreate these files for each test, as the compiler may
+ # overwrite some of them when testing with obscure command lines.
+ # This happens at least with the AIX C compiler.
+ : > sub/conftest.c
+ for i in 1 2 3 4 5 6; do
+ echo '#include "conftst'$i'.h"' >> sub/conftest.c
+ # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with
+ # Solaris 8's {/usr,}/bin/sh.
+ touch sub/conftst$i.h
+ done
+ echo "include sub/conftest.Po" > confmf
+
+ # We check with `-c' and `-o' for the sake of the "dashmstdout"
+ # mode. It turns out that the SunPro C++ compiler does not properly
+ # handle `-M -o', and we need to detect this.
+ depcmd="depmode=$depmode \
+ source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \
+ depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \
+ $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c"
+ echo "| $depcmd" | sed -e 's/ */ /g' >&5
+ if env $depcmd > conftest.err 2>&1 &&
+ grep sub/conftst6.h sub/conftest.Po >>conftest.err 2>&1 &&
+ grep sub/conftest.${OBJEXT-o} sub/conftest.Po >>conftest.err 2>&1 &&
+ ${MAKE-make} -s -f confmf >>conftest.err 2>&1; then
+ # icc doesn't choke on unknown options, it will just issue warnings
+ # or remarks (even with -Werror). So we grep stderr for any message
+ # that says an option was ignored or not supported.
+ # When given -MP, icc 7.0 and 7.1 complain thusly:
+ # icc: Command line warning: ignoring option '-M'; no argument required
+ # The diagnosis changed in icc 8.0:
+ # icc: Command line remark: option '-MP' not supported
+ if (grep 'ignoring option' conftest.err ||
+ grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else
+ am_cv_CC_dependencies_compiler_type=$depmode
+ $as_echo "$as_me:$LINENO: success" >&5
+ break
+ fi
+ fi
+ $as_echo "$as_me:$LINENO: failure, diagnostics are:" >&5
+ sed -e 's/^/| /' < conftest.err >&5
+ done
+
+ cd ..
+ rm -rf conftest.dir
+else
+ am_cv_CC_dependencies_compiler_type=none
+fi
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_CC_dependencies_compiler_type" >&5
+$as_echo "$am_cv_CC_dependencies_compiler_type" >&6; }
+if test x${am_cv_CC_dependencies_compiler_type-none} = xnone
+then as_fn_error "no usable dependency style found" "$LINENO" 5
+else CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type
+
+fi
+
+
+# Check for the 'make' the user wants to use.
+for ac_prog in make
+do
+ # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_MAKE+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ if test -n "$MAKE"; then
+ ac_cv_prog_MAKE="$MAKE" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_prog_MAKE="$ac_prog"
+ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+ done
+IFS=$as_save_IFS
+
+fi
+fi
+MAKE=$ac_cv_prog_MAKE
+if test -n "$MAKE"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MAKE" >&5
+$as_echo "$MAKE" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+ test -n "$MAKE" && break
+done
+
+MAKE_IS_GNU=
+case "`$MAKE --version 2>&1 | sed 1q`" in
+ *GNU*)
+ MAKE_IS_GNU=yes
+ ;;
+esac
+ if test "$MAKE_IS_GNU" = yes; then
+ GMAKE_TRUE=
+ GMAKE_FALSE='#'
+else
+ GMAKE_TRUE='#'
+ GMAKE_FALSE=
+fi
+
+
+ALL_LINGUAS=
+# If we haven't got the data from the intl directory,
+# assume NLS is disabled.
+USE_NLS=no
+LIBINTL=
+LIBINTL_DEP=
+INCINTL=
+XGETTEXT=
+GMSGFMT=
+POSUB=
+
+if test -f ../../intl/config.intl; then
+ . ../../intl/config.intl
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether NLS is requested" >&5
+$as_echo_n "checking whether NLS is requested... " >&6; }
+if test x"$USE_NLS" != xyes; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+$as_echo "yes" >&6; }
+
+$as_echo "#define ENABLE_NLS 1" >>confdefs.h
+
+
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for catalogs to be installed" >&5
+$as_echo_n "checking for catalogs to be installed... " >&6; }
+ # Look for .po and .gmo files in the source directory.
+ CATALOGS=
+ XLINGUAS=
+ for cat in $srcdir/po/*.gmo $srcdir/po/*.po; do
+ # If there aren't any .gmo files the shell will give us the
+ # literal string "../path/to/srcdir/po/*.gmo" which has to be
+ # weeded out.
+ case "$cat" in *\**)
+ continue;;
+ esac
+ # The quadruple backslash is collapsed to a double backslash
+ # by the backticks, then collapsed again by the double quotes,
+ # leaving us with one backslash in the sed expression (right
+ # before the dot that mustn't act as a wildcard).
+ cat=`echo $cat | sed -e "s!$srcdir/po/!!" -e "s!\\\\.po!.gmo!"`
+ lang=`echo $cat | sed -e "s!\\\\.gmo!!"`
+ # The user is allowed to set LINGUAS to a list of languages to
+ # install catalogs for. If it's empty that means "all of them."
+ if test "x$LINGUAS" = x; then
+ CATALOGS="$CATALOGS $cat"
+ XLINGUAS="$XLINGUAS $lang"
+ else
+ case "$LINGUAS" in *$lang*)
+ CATALOGS="$CATALOGS $cat"
+ XLINGUAS="$XLINGUAS $lang"
+ ;;
+ esac
+ fi
+ done
+ LINGUAS="$XLINGUAS"
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LINGUAS" >&5
+$as_echo "$LINGUAS" >&6; }
+
+
+ DATADIRNAME=share
+
+ INSTOBJEXT=.mo
+
+ GENCAT=gencat
+
+ CATOBJEXT=.gmo
+
+fi
+
+# Check for common headers.
+# FIXME: Seems to me this can cause problems for i386-windows hosts.
+# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
+for ac_header in stdlib.h string.h strings.h unistd.h time.h
+do :
+ as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
+ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
+eval as_val=\$$as_ac_Header
+ if test "x$as_val" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+for ac_header in sys/time.h sys/resource.h
+do :
+ as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
+ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
+eval as_val=\$$as_ac_Header
+ if test "x$as_val" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+for ac_header in fcntl.h fpu_control.h
+do :
+ as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
+ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
+eval as_val=\$$as_ac_Header
+ if test "x$as_val" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+for ac_header in dlfcn.h errno.h sys/stat.h
+do :
+ as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
+ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
+eval as_val=\$$as_ac_Header
+ if test "x$as_val" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+for ac_func in getrusage time sigaction __setfpucw
+do :
+ as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
+ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
+eval as_val=\$$as_ac_var
+ if test "x$as_val" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+done
+
+
+# Check for socket libraries
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for bind in -lsocket" >&5
+$as_echo_n "checking for bind in -lsocket... " >&6; }
+if test "${ac_cv_lib_socket_bind+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ ac_check_lib_save_LIBS=$LIBS
+LIBS="-lsocket $LIBS"
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+/* Override any GCC internal prototype to avoid an error.
+ Use char because int might match the return type of a GCC
+ builtin and then its argument prototype would still apply. */
+#ifdef __cplusplus
+extern "C"
+#endif
+char bind ();
+int
+main ()
+{
+return bind ();
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"; then :
+ ac_cv_lib_socket_bind=yes
+else
+ ac_cv_lib_socket_bind=no
+fi
+rm -f core conftest.err conftest.$ac_objext \
+ conftest$ac_exeext conftest.$ac_ext
+LIBS=$ac_check_lib_save_LIBS
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_socket_bind" >&5
+$as_echo "$ac_cv_lib_socket_bind" >&6; }
+if test "x$ac_cv_lib_socket_bind" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define HAVE_LIBSOCKET 1
+_ACEOF
+
+ LIBS="-lsocket $LIBS"
+
+fi
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for gethostbyname in -lnsl" >&5
+$as_echo_n "checking for gethostbyname in -lnsl... " >&6; }
+if test "${ac_cv_lib_nsl_gethostbyname+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ ac_check_lib_save_LIBS=$LIBS
+LIBS="-lnsl $LIBS"
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+/* Override any GCC internal prototype to avoid an error.
+ Use char because int might match the return type of a GCC
+ builtin and then its argument prototype would still apply. */
+#ifdef __cplusplus
+extern "C"
+#endif
+char gethostbyname ();
+int
+main ()
+{
+return gethostbyname ();
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"; then :
+ ac_cv_lib_nsl_gethostbyname=yes
+else
+ ac_cv_lib_nsl_gethostbyname=no
+fi
+rm -f core conftest.err conftest.$ac_objext \
+ conftest$ac_exeext conftest.$ac_ext
+LIBS=$ac_check_lib_save_LIBS
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_nsl_gethostbyname" >&5
+$as_echo "$ac_cv_lib_nsl_gethostbyname" >&6; }
+if test "x$ac_cv_lib_nsl_gethostbyname" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define HAVE_LIBNSL 1
+_ACEOF
+
+ LIBS="-lnsl $LIBS"
+
+fi
+
+
+# BFD conditionally uses zlib, so we must link it in if libbfd does, by
+# using the same condition.
+
+ # See if the user specified whether he wants zlib support or not.
+
+# Check whether --with-zlib was given.
+if test "${with_zlib+set}" = set; then :
+ withval=$with_zlib;
+else
+ with_zlib=auto
+fi
+
+
+ if test "$with_zlib" != "no"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for library containing zlibVersion" >&5
+$as_echo_n "checking for library containing zlibVersion... " >&6; }
+if test "${ac_cv_search_zlibVersion+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ ac_func_search_save_LIBS=$LIBS
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+
+/* Override any GCC internal prototype to avoid an error.
+ Use char because int might match the return type of a GCC
+ builtin and then its argument prototype would still apply. */
+#ifdef __cplusplus
+extern "C"
+#endif
+char zlibVersion ();
+int
+main ()
+{
+return zlibVersion ();
+ ;
+ return 0;
+}
+_ACEOF
+for ac_lib in '' z; do
+ if test -z "$ac_lib"; then
+ ac_res="none required"
+ else
+ ac_res=-l$ac_lib
+ LIBS="-l$ac_lib $ac_func_search_save_LIBS"
+ fi
+ if ac_fn_c_try_link "$LINENO"; then :
+ ac_cv_search_zlibVersion=$ac_res
+fi
+rm -f core conftest.err conftest.$ac_objext \
+ conftest$ac_exeext
+ if test "${ac_cv_search_zlibVersion+set}" = set; then :
+ break
+fi
+done
+if test "${ac_cv_search_zlibVersion+set}" = set; then :
+
+else
+ ac_cv_search_zlibVersion=no
+fi
+rm conftest.$ac_ext
+LIBS=$ac_func_search_save_LIBS
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_search_zlibVersion" >&5
+$as_echo "$ac_cv_search_zlibVersion" >&6; }
+ac_res=$ac_cv_search_zlibVersion
+if test "$ac_res" != no; then :
+ test "$ac_res" = "none required" || LIBS="$ac_res $LIBS"
+ for ac_header in zlib.h
+do :
+ ac_fn_c_check_header_mongrel "$LINENO" "zlib.h" "ac_cv_header_zlib_h" "$ac_includes_default"
+if test "x$ac_cv_header_zlib_h" = x""yes; then :
+ cat >>confdefs.h <<_ACEOF
+#define HAVE_ZLIB_H 1
+_ACEOF
+
+fi
+
+done
+
+fi
+
+ if test "$with_zlib" = "yes" -a "$ac_cv_header_zlib_h" != "yes"; then
+ as_fn_error "zlib (libz) library was explicitly requested but not found" "$LINENO" 5
+ fi
+ fi
+
+
+. ${srcdir}/../../bfd/configure.host
+
+
+
+USE_MAINTAINER_MODE=no
+# Check whether --enable-maintainer-mode was given.
+if test "${enable_maintainer_mode+set}" = set; then :
+ enableval=$enable_maintainer_mode; case "${enableval}" in
+ yes) MAINT="" USE_MAINTAINER_MODE=yes ;;
+ no) MAINT="#" ;;
+ *) as_fn_error "\"--enable-maintainer-mode does not take a value\"" "$LINENO" 5; MAINT="#" ;;
+esac
+if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
+ echo "Setting maintainer mode" 6>&1
+fi
+else
+ MAINT="#"
+fi
+
+
+
+# Check whether --enable-sim-bswap was given.
+if test "${enable_sim_bswap+set}" = set; then :
+ enableval=$enable_sim_bswap; case "${enableval}" in
+ yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
+ no) sim_bswap="-DWITH_BSWAP=0";;
+ *) as_fn_error "\"--enable-sim-bswap does not take a value\"" "$LINENO" 5; sim_bswap="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
+ echo "Setting bswap flags = $sim_bswap" 6>&1
+fi
+else
+ sim_bswap=""
+fi
+
+
+
+# Check whether --enable-sim-cflags was given.
+if test "${enable_sim_cflags+set}" = set; then :
+ enableval=$enable_sim_cflags; case "${enableval}" in
+ yes) sim_cflags="-O2 -fomit-frame-pointer";;
+ trace) as_fn_error "\"Please use --enable-sim-debug instead.\"" "$LINENO" 5; sim_cflags="";;
+ no) sim_cflags="";;
+ *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
+ echo "Setting sim cflags = $sim_cflags" 6>&1
+fi
+else
+ sim_cflags=""
+fi
+
+
+
+# Check whether --enable-sim-debug was given.
+if test "${enable_sim_debug+set}" = set; then :
+ enableval=$enable_sim_debug; case "${enableval}" in
+ yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
+ no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
+ *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
+ echo "Setting sim debug = $sim_debug" 6>&1
+fi
+else
+ sim_debug=""
+fi
+
+
+
+# Check whether --enable-sim-stdio was given.
+if test "${enable_sim_stdio+set}" = set; then :
+ enableval=$enable_sim_stdio; case "${enableval}" in
+ yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
+ no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
+ *) as_fn_error "\"Unknown value $enableval passed to --enable-sim-stdio\"" "$LINENO" 5; sim_stdio="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
+ echo "Setting stdio flags = $sim_stdio" 6>&1
+fi
+else
+ sim_stdio=""
+fi
+
+
+
+# Check whether --enable-sim-trace was given.
+if test "${enable_sim_trace+set}" = set; then :
+ enableval=$enable_sim_trace; case "${enableval}" in
+ yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
+ no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
+ [-0-9]*)
+ sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
+ [[:lower:]]*)
+ sim_trace=""
+ for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
+ if test x"$sim_trace" = x; then
+ sim_trace="-DWITH_TRACE='(TRACE_$x"
+ else
+ sim_trace="${sim_trace}|TRACE_$x"
+ fi
+ done
+ sim_trace="$sim_trace)'" ;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
+ echo "Setting sim trace = $sim_trace" 6>&1
+fi
+else
+ sim_trace=""
+fi
+
+
+
+# Check whether --enable-sim-profile was given.
+if test "${enable_sim_profile+set}" = set; then :
+ enableval=$enable_sim_profile; case "${enableval}" in
+ yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
+ no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
+ [-0-9]*)
+ sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
+ [a-z]*)
+ sim_profile=""
+ for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
+ if test x"$sim_profile" = x; then
+ sim_profile="-DWITH_PROFILE='(PROFILE_$x"
+ else
+ sim_profile="${sim_profile}|PROFILE_$x"
+ fi
+ done
+ sim_profile="$sim_profile)'" ;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
+ echo "Setting sim profile = $sim_profile" 6>&1
+fi
+else
+ sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
+fi
+
+
+
+
+# Check whether --with-pkgversion was given.
+if test "${with_pkgversion+set}" = set; then :
+ withval=$with_pkgversion; case "$withval" in
+ yes) as_fn_error "package version not specified" "$LINENO" 5 ;;
+ no) PKGVERSION= ;;
+ *) PKGVERSION="($withval) " ;;
+ esac
+else
+ PKGVERSION="(GDB) "
+
+fi
+
+
+
+
+
+# Check whether --with-bugurl was given.
+if test "${with_bugurl+set}" = set; then :
+ withval=$with_bugurl; case "$withval" in
+ yes) as_fn_error "bug URL not specified" "$LINENO" 5 ;;
+ no) BUGURL=
+ ;;
+ *) BUGURL="$withval"
+ ;;
+ esac
+else
+ BUGURL="http://www.gnu.org/software/gdb/bugs/"
+
+fi
+
+ case ${BUGURL} in
+ "")
+ REPORT_BUGS_TO=
+ REPORT_BUGS_TEXI=
+ ;;
+ *)
+ REPORT_BUGS_TO="<$BUGURL>"
+ REPORT_BUGS_TEXI=@uref{`echo "$BUGURL" | sed 's/@/@@/g'`}
+ ;;
+ esac;
+
+
+
+
+cat >>confdefs.h <<_ACEOF
+#define PKGVERSION "$PKGVERSION"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define REPORT_BUGS_TO "$REPORT_BUGS_TO"
+_ACEOF
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking return type of signal handlers" >&5
+$as_echo_n "checking return type of signal handlers... " >&6; }
+if test "${ac_cv_type_signal+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <sys/types.h>
+#include <signal.h>
+
+int
+main ()
+{
+return *(signal (0, 0)) (0) == 1;
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_type_signal=int
+else
+ ac_cv_type_signal=void
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_type_signal" >&5
+$as_echo "$ac_cv_type_signal" >&6; }
+
+cat >>confdefs.h <<_ACEOF
+#define RETSIGTYPE $ac_cv_type_signal
+_ACEOF
+
+
+
+
+
+sim_link_files=
+sim_link_links=
+
+sim_link_links=tconfig.h
+if test -f ${srcdir}/tconfig.in
+then
+ sim_link_files=tconfig.in
+else
+ sim_link_files=../common/tconfig.in
+fi
+
+# targ-vals.def points to the libc macro description file.
+case "${target}" in
+*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
+esac
+sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
+sim_link_links="${sim_link_links} targ-vals.def"
+
+
+
+
+wire_endian="BIG_ENDIAN"
+default_endian=""
+# Check whether --enable-sim-endian was given.
+if test "${enable_sim_endian+set}" = set; then :
+ enableval=$enable_sim_endian; case "${enableval}" in
+ b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
+ l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
+ yes) if test x"$wire_endian" != x; then
+ sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
+ else
+ if test x"$default_endian" != x; then
+ sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
+ else
+ echo "No hard-wired endian for target $target" 1>&6
+ sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
+ fi
+ fi;;
+ no) if test x"$default_endian" != x; then
+ sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
+ else
+ if test x"$wire_endian" != x; then
+ sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
+ else
+ echo "No default endian for target $target" 1>&6
+ sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
+ fi
+ fi;;
+ *) as_fn_error "\"Unknown value $enableval for --enable-sim-endian\"" "$LINENO" 5; sim_endian="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
+ echo "Setting endian flags = $sim_endian" 6>&1
+fi
+else
+ if test x"$default_endian" != x; then
+ sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
+else
+ if test x"$wire_endian" != x; then
+ sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
+ else
+ sim_endian=
+ fi
+fi
+fi
+
+wire_alignment="STRICT_ALIGNMENT"
+default_alignment=""
+
+# Check whether --enable-sim-alignment was given.
+if test "${enable_sim_alignment+set}" = set; then :
+ enableval=$enable_sim_alignment; case "${enableval}" in
+ strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
+ nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
+ forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
+ yes) if test x"$wire_alignment" != x; then
+ sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
+ else
+ if test x"$default_alignment" != x; then
+ sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
+ else
+ echo "No hard-wired alignment for target $target" 1>&6
+ sim_alignment="-DWITH_ALIGNMENT=0"
+ fi
+ fi;;
+ no) if test x"$default_alignment" != x; then
+ sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
+ else
+ if test x"$wire_alignment" != x; then
+ sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
+ else
+ echo "No default alignment for target $target" 1>&6
+ sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
+ fi
+ fi;;
+ *) as_fn_error "\"Unknown value $enableval passed to --enable-sim-alignment\"" "$LINENO" 5; sim_alignment="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
+ echo "Setting alignment flags = $sim_alignment" 6>&1
+fi
+else
+ if test x"$default_alignment" != x; then
+ sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
+else
+ if test x"$wire_alignment" != x; then
+ sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
+ else
+ sim_alignment=
+ fi
+fi
+fi
+
+
+# Check whether --enable-sim-hostendian was given.
+if test "${enable_sim_hostendian+set}" = set; then :
+ enableval=$enable_sim_hostendian; case "${enableval}" in
+ no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
+ b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
+ l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
+ *) as_fn_error "\"Unknown value $enableval for --enable-sim-hostendian\"" "$LINENO" 5; sim_hostendian="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
+ echo "Setting hostendian flags = $sim_hostendian" 6>&1
+fi
+else
+
+if test "x$cross_compiling" = "xno"; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5
+$as_echo_n "checking whether byte ordering is bigendian... " >&6; }
+if test "${ac_cv_c_bigendian+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ ac_cv_c_bigendian=unknown
+ # See if we're dealing with a universal compiler.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#ifndef __APPLE_CC__
+ not a universal capable compiler
+ #endif
+ typedef int dummy;
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+
+ # Check for potential -arch flags. It is not universal unless
+ # there are at least two -arch flags with different values.
+ ac_arch=
+ ac_prev=
+ for ac_word in $CC $CFLAGS $CPPFLAGS $LDFLAGS; do
+ if test -n "$ac_prev"; then
+ case $ac_word in
+ i?86 | x86_64 | ppc | ppc64)
+ if test -z "$ac_arch" || test "$ac_arch" = "$ac_word"; then
+ ac_arch=$ac_word
+ else
+ ac_cv_c_bigendian=universal
+ break
+ fi
+ ;;
+ esac
+ ac_prev=
+ elif test "x$ac_word" = "x-arch"; then
+ ac_prev=arch
+ fi
+ done
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ if test $ac_cv_c_bigendian = unknown; then
+ # See if sys/param.h defines the BYTE_ORDER macro.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <sys/types.h>
+ #include <sys/param.h>
+
+int
+main ()
+{
+#if ! (defined BYTE_ORDER && defined BIG_ENDIAN \
+ && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN \
+ && LITTLE_ENDIAN)
+ bogus endian macros
+ #endif
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ # It does; now see whether it defined to BIG_ENDIAN or not.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <sys/types.h>
+ #include <sys/param.h>
+
+int
+main ()
+{
+#if BYTE_ORDER != BIG_ENDIAN
+ not big endian
+ #endif
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_c_bigendian=yes
+else
+ ac_cv_c_bigendian=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ fi
+ if test $ac_cv_c_bigendian = unknown; then
+ # See if <limits.h> defines _LITTLE_ENDIAN or _BIG_ENDIAN (e.g., Solaris).
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <limits.h>
+
+int
+main ()
+{
+#if ! (defined _LITTLE_ENDIAN || defined _BIG_ENDIAN)
+ bogus endian macros
+ #endif
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ # It does; now see whether it defined to _BIG_ENDIAN or not.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <limits.h>
+
+int
+main ()
+{
+#ifndef _BIG_ENDIAN
+ not big endian
+ #endif
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_c_bigendian=yes
+else
+ ac_cv_c_bigendian=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ fi
+ if test $ac_cv_c_bigendian = unknown; then
+ # Compile a test program.
+ if test "$cross_compiling" = yes; then :
+ # Try to guess by grepping values from an object file.
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+short int ascii_mm[] =
+ { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 };
+ short int ascii_ii[] =
+ { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 };
+ int use_ascii (int i) {
+ return ascii_mm[i] + ascii_ii[i];
+ }
+ short int ebcdic_ii[] =
+ { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 };
+ short int ebcdic_mm[] =
+ { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 };
+ int use_ebcdic (int i) {
+ return ebcdic_mm[i] + ebcdic_ii[i];
+ }
+ extern int foo;
+
+int
+main ()
+{
+return use_ascii (foo) == use_ebcdic (foo);
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ if grep BIGenDianSyS conftest.$ac_objext >/dev/null; then
+ ac_cv_c_bigendian=yes
+ fi
+ if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then
+ if test "$ac_cv_c_bigendian" = unknown; then
+ ac_cv_c_bigendian=no
+ else
+ # finding both strings is unlikely to happen, but who knows?
+ ac_cv_c_bigendian=unknown
+ fi
+ fi
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+$ac_includes_default
+int
+main ()
+{
+
+ /* Are we little or big endian? From Harbison&Steele. */
+ union
+ {
+ long int l;
+ char c[sizeof (long int)];
+ } u;
+ u.l = 1;
+ return u.c[sizeof (long int) - 1] == 1;
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_run "$LINENO"; then :
+ ac_cv_c_bigendian=no
+else
+ ac_cv_c_bigendian=yes
+fi
+rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+ conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_bigendian" >&5
+$as_echo "$ac_cv_c_bigendian" >&6; }
+ case $ac_cv_c_bigendian in #(
+ yes)
+ $as_echo "#define WORDS_BIGENDIAN 1" >>confdefs.h
+;; #(
+ no)
+ ;; #(
+ universal)
+
+$as_echo "#define AC_APPLE_UNIVERSAL_BUILD 1" >>confdefs.h
+
+ ;; #(
+ *)
+ as_fn_error "unknown endianness
+ presetting ac_cv_c_bigendian=no (or yes) will help" "$LINENO" 5 ;;
+ esac
+
+ if test $ac_cv_c_bigendian = yes; then
+ sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
+ else
+ sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
+ fi
+else
+ sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
+fi
+fi
+
+wire_word_bitsize="32"
+wire_word_msb="31"
+wire_address_bitsize="32"
+wire_cell_bitsize=""
+# Check whether --enable-sim-bitsize was given.
+if test "${enable_sim_bitsize+set}" = set; then :
+ enableval=$enable_sim_bitsize; sim_bitsize=
+case "${enableval}" in
+ 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";;
+ 32,31 | 32,31,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";;
+ 64,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
+ 32,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
+ 32) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
+ sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31"
+ else
+ sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0"
+ fi ;;
+ 64) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
+ sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63"
+ else
+ sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0"
+ fi ;;
+ *) as_fn_error "\"--enable-sim-bitsize was given $enableval. Expected 32 or 64\"" "$LINENO" 5 ;;
+esac
+# address bitsize
+tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9]*,*//"`
+case x"${tmp}" in
+ x ) ;;
+ x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=32" ;;
+ x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=64" ;;
+ * ) as_fn_error "\"--enable-sim-bitsize was given address size $enableval. Expected 32 or 64\"" "$LINENO" 5 ;;
+esac
+# cell bitsize
+tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9*]*,*[0-9]*,*//"`
+case x"${tmp}" in
+ x ) ;;
+ x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=32" ;;
+ x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=64" ;;
+ * ) as_fn_error "\"--enable-sim-bitsize was given cell size $enableval. Expected 32 or 64\"" "$LINENO" 5 ;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
+ echo "Setting bitsize flags = $sim_bitsize" 6>&1
+fi
+else
+ sim_bitsize=""
+if test x"$wire_word_bitsize" != x; then
+ sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_word_bitsize"
+fi
+if test x"$wire_word_msb" != x; then
+ sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_word_msb"
+fi
+if test x"$wire_address_bitsize" != x; then
+ sim_bitsize="$sim_bitsize -DWITH_TARGET_ADDRESS_BITSIZE=$wire_address_bitsize"
+fi
+if test x"$wire_cell_bitsize" != x; then
+ sim_bitsize="$sim_bitsize -DWITH_TARGET_CELL_BITSIZE=$wire_cell_bitsize"
+fi
+fi
+
+
+default_sim_scache="16384"
+# Check whether --enable-sim-scache was given.
+if test "${enable_sim_scache+set}" = set; then :
+ enableval=$enable_sim_scache; case "${enableval}" in
+ yes) sim_scache="-DWITH_SCACHE=${default_sim_scache}";;
+ no) sim_scache="-DWITH_SCACHE=0" ;;
+ [0-9]*) sim_scache="-DWITH_SCACHE=${enableval}";;
+ *) as_fn_error "\"Bad value $enableval passed to --enable-sim-scache\"" "$LINENO" 5;
+ sim_scache="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_scache" != x""; then
+ echo "Setting scache size = $sim_scache" 6>&1
+fi
+else
+ sim_scache="-DWITH_SCACHE=${default_sim_scache}"
+fi
+
+
+
+default_sim_default_model="$default_model"
+# Check whether --enable-sim-default-model was given.
+if test "${enable_sim_default_model+set}" = set; then :
+ enableval=$enable_sim_default_model; case "${enableval}" in
+ yes|no) as_fn_error "\"Missing argument to --enable-sim-default-model\"" "$LINENO" 5;;
+ *) sim_default_model="-DWITH_DEFAULT_MODEL='\"${enableval}\"'";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then
+ echo "Setting default model = $sim_default_model" 6>&1
+fi
+else
+ sim_default_model="-DWITH_DEFAULT_MODEL='\"${default_sim_default_model}\"'"
+fi
+
+
+
+# Check whether --enable-sim-environment was given.
+if test "${enable_sim_environment+set}" = set; then :
+ enableval=$enable_sim_environment; case "${enableval}" in
+ all | ALL) sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT";;
+ user | USER) sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
+ virtual | VIRTUAL) sim_environment="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
+ operating | OPERATING) sim_environment="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";;
+ *) as_fn_error "\"Unknown value $enableval passed to --enable-sim-environment\"" "$LINENO" 5;
+ sim_environment="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_environment" != x""; then
+ echo "Setting sim environment = $sim_environment" 6>&1
+fi
+else
+ sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT"
+fi
+
+
+default_sim_inline=""
+# Check whether --enable-sim-inline was given.
+if test "${enable_sim_inline+set}" = set; then :
+ enableval=$enable_sim_inline; sim_inline=""
+case "$enableval" in
+ no) sim_inline="-DDEFAULT_INLINE=0";;
+ 0) sim_inline="-DDEFAULT_INLINE=0";;
+ yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
+ 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
+ *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
+ new_flag=""
+ case "$x" in
+ *_INLINE=*) new_flag="-D$x";;
+ *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
+ *_INLINE) new_flag="-D$x=ALL_C_INLINE";;
+ *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
+ esac
+ if test x"$sim_inline" = x""; then
+ sim_inline="$new_flag"
+ else
+ sim_inline="$sim_inline $new_flag"
+ fi
+ done;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
+ echo "Setting inline flags = $sim_inline" 6>&1
+fi
+else
+
+if test "x$cross_compiling" = "xno"; then
+ if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
+ sim_inline="${default_sim_inline}"
+ if test x"$silent" != x"yes"; then
+ echo "Setting inline flags = $sim_inline" 6>&1
+ fi
+ else
+ sim_inline=""
+ fi
+else
+ sim_inline="-DDEFAULT_INLINE=0"
+fi
+fi
+
+
+cgen_maint=no
+cgen=guile
+cgendir='$(srcdir)/../../cgen'
+# Check whether --enable-cgen-maint was given.
+if test "${enable_cgen_maint+set}" = set; then :
+ enableval=$enable_cgen_maint; case "${enableval}" in
+ yes) cgen_maint=yes ;;
+ no) cgen_maint=no ;;
+ *)
+ # argument is cgen install directory (not implemented yet).
+ # Having a `share' directory might be more appropriate for the .scm,
+ # .cpu, etc. files.
+ cgendir=${cgen_maint}/lib/cgen
+ cgen=guile
+ ;;
+esac
+fi
+if test x${cgen_maint} != xno ; then
+ CGEN_MAINT=''
+else
+ CGEN_MAINT='#'
+fi
+
+
+
+
+
+
+
+
+
+
+
+ac_sources="$sim_link_files"
+ac_dests="$sim_link_links"
+while test -n "$ac_sources"; do
+ set $ac_dests; ac_dest=$1; shift; ac_dests=$*
+ set $ac_sources; ac_source=$1; shift; ac_sources=$*
+ ac_config_links_1="$ac_config_links_1 $ac_dest:$ac_source"
+done
+ac_config_links="$ac_config_links $ac_config_links_1"
+
+cgen_breaks=""
+if grep CGEN_MAINT $srcdir/Makefile.in >/dev/null; then
+cgen_breaks="break cgen_rtx_error";
+fi
+
+ac_config_files="$ac_config_files Makefile.sim:Makefile.in"
+
+ac_config_files="$ac_config_files Make-common.sim:../common/Make-common.in"
+
+ac_config_files="$ac_config_files .gdbinit:../common/gdbinit.in"
+
+ac_config_commands="$ac_config_commands Makefile"
+
+ac_config_commands="$ac_config_commands stamp-h"
+
+cat >confcache <<\_ACEOF
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs, see configure's option --config-cache.
+# It is not useful on other systems. If it contains results you don't
+# want to keep, you may remove or edit it.
+#
+# config.status only pays attention to the cache file if you give it
+# the --recheck option to rerun configure.
+#
+# `ac_cv_env_foo' variables (set or unset) will be overridden when
+# loading this file, other *unset* `ac_cv_foo' will be assigned the
+# following values.
+
+_ACEOF
+
+# The following way of writing the cache mishandles newlines in values,
+# but we know of no workaround that is simple, portable, and efficient.
+# So, we kill variables containing newlines.
+# Ultrix sh set writes to stderr and can't be redirected directly,
+# and sets the high bit in the cache file unless we assign to the vars.
+(
+ for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do
+ eval ac_val=\$$ac_var
+ case $ac_val in #(
+ *${as_nl}*)
+ case $ac_var in #(
+ *_cv_*) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5
+$as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;;
+ esac
+ case $ac_var in #(
+ _ | IFS | as_nl) ;; #(
+ BASH_ARGV | BASH_SOURCE) eval $ac_var= ;; #(
+ *) { eval $ac_var=; unset $ac_var;} ;;
+ esac ;;
+ esac
+ done
+
+ (set) 2>&1 |
+ case $as_nl`(ac_space=' '; set) 2>&1` in #(
+ *${as_nl}ac_space=\ *)
+ # `set' does not quote correctly, so add quotes: double-quote
+ # substitution turns \\\\ into \\, and sed turns \\ into \.
+ sed -n \
+ "s/'/'\\\\''/g;
+ s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p"
+ ;; #(
+ *)
+ # `set' quotes correctly as required by POSIX, so do not add quotes.
+ sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p"
+ ;;
+ esac |
+ sort
+) |
+ sed '
+ /^ac_cv_env_/b end
+ t clear
+ :clear
+ s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/
+ t end
+ s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/
+ :end' >>confcache
+if diff "$cache_file" confcache >/dev/null 2>&1; then :; else
+ if test -w "$cache_file"; then
+ test "x$cache_file" != "x/dev/null" &&
+ { $as_echo "$as_me:${as_lineno-$LINENO}: updating cache $cache_file" >&5
+$as_echo "$as_me: updating cache $cache_file" >&6;}
+ cat confcache >$cache_file
+ else
+ { $as_echo "$as_me:${as_lineno-$LINENO}: not updating unwritable cache $cache_file" >&5
+$as_echo "$as_me: not updating unwritable cache $cache_file" >&6;}
+ fi
+fi
+rm -f confcache
+
+test "x$prefix" = xNONE && prefix=$ac_default_prefix
+# Let make expand exec_prefix.
+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
+
+DEFS=-DHAVE_CONFIG_H
+
+ac_libobjs=
+ac_ltlibobjs=
+for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue
+ # 1. Remove the extension, and $U if already installed.
+ ac_script='s/\$U\././;s/\.o$//;s/\.obj$//'
+ ac_i=`$as_echo "$ac_i" | sed "$ac_script"`
+ # 2. Prepend LIBOBJDIR. When used with automake>=1.10 LIBOBJDIR
+ # will be set to the directory where LIBOBJS objects are built.
+ as_fn_append ac_libobjs " \${LIBOBJDIR}$ac_i\$U.$ac_objext"
+ as_fn_append ac_ltlibobjs " \${LIBOBJDIR}$ac_i"'$U.lo'
+done
+LIBOBJS=$ac_libobjs
+
+LTLIBOBJS=$ac_ltlibobjs
+
+
+if test -z "${GMAKE_TRUE}" && test -z "${GMAKE_FALSE}"; then
+ as_fn_error "conditional \"GMAKE\" was never defined.
+Usually this means the macro was only invoked conditionally." "$LINENO" 5
+fi
+
+
+: ${CONFIG_STATUS=./config.status}
+ac_write_fail=0
+ac_clean_files_save=$ac_clean_files
+ac_clean_files="$ac_clean_files $CONFIG_STATUS"
+{ $as_echo "$as_me:${as_lineno-$LINENO}: creating $CONFIG_STATUS" >&5
+$as_echo "$as_me: creating $CONFIG_STATUS" >&6;}
+as_write_fail=0
+cat >$CONFIG_STATUS <<_ASEOF || as_write_fail=1
+#! $SHELL
+# Generated by $as_me.
+# Run this file to recreate the current configuration.
+# Compiler output produced by configure, useful for debugging
+# configure, is in config.log if it exists.
+
+debug=false
+ac_cs_recheck=false
+ac_cs_silent=false
+
+SHELL=\${CONFIG_SHELL-$SHELL}
+export SHELL
+_ASEOF
+cat >>$CONFIG_STATUS <<\_ASEOF || as_write_fail=1
+## -------------------- ##
+## M4sh Initialization. ##
+## -------------------- ##
+
+# Be more Bourne compatible
+DUALCASE=1; export DUALCASE # for MKS sh
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then :
+ emulate sh
+ NULLCMD=:
+ # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which
+ # is contrary to our usage. Disable this feature.
+ alias -g '${1+"$@"}'='"$@"'
+ setopt NO_GLOB_SUBST
+else
+ case `(set -o) 2>/dev/null` in #(
+ *posix*) :
+ set -o posix ;; #(
+ *) :
+ ;;
+esac
+fi
+
+
+as_nl='
+'
+export as_nl
+# Printing a long string crashes Solaris 7 /usr/bin/printf.
+as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
+as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo
+as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo
+# Prefer a ksh shell builtin over an external printf program on Solaris,
+# but without wasting forks for bash or zsh.
+if test -z "$BASH_VERSION$ZSH_VERSION" \
+ && (test "X`print -r -- $as_echo`" = "X$as_echo") 2>/dev/null; then
+ as_echo='print -r --'
+ as_echo_n='print -rn --'
+elif (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then
+ as_echo='printf %s\n'
+ as_echo_n='printf %s'
+else
+ if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then
+ as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"'
+ as_echo_n='/usr/ucb/echo -n'
+ else
+ as_echo_body='eval expr "X$1" : "X\\(.*\\)"'
+ as_echo_n_body='eval
+ arg=$1;
+ case $arg in #(
+ *"$as_nl"*)
+ expr "X$arg" : "X\\(.*\\)$as_nl";
+ arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;;
+ esac;
+ expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl"
+ '
+ export as_echo_n_body
+ as_echo_n='sh -c $as_echo_n_body as_echo'
+ fi
+ export as_echo_body
+ as_echo='sh -c $as_echo_body as_echo'
+fi
+
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+ PATH_SEPARATOR=:
+ (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && {
+ (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 ||
+ PATH_SEPARATOR=';'
+ }
+fi
+
+
+# IFS
+# We need space, tab and new line, in precisely that order. Quoting is
+# there to prevent editors from complaining about space-tab.
+# (If _AS_PATH_WALK were called with IFS unset, it would disable word
+# splitting by setting IFS to empty value.)
+IFS=" "" $as_nl"
+
+# Find who we are. Look in the path if we contain no directory separator.
+case $0 in #((
+ *[\\/]* ) as_myself=$0 ;;
+ *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break
+ done
+IFS=$as_save_IFS
+
+ ;;
+esac
+# We did not find ourselves, most probably we were run as `sh COMMAND'
+# in which case we are not to be found in the path.
+if test "x$as_myself" = x; then
+ as_myself=$0
+fi
+if test ! -f "$as_myself"; then
+ $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2
+ exit 1
+fi
+
+# Unset variables that we do not need and which cause bugs (e.g. in
+# pre-3.0 UWIN ksh). But do not cause bugs in bash 2.01; the "|| exit 1"
+# suppresses any "Segmentation fault" message there. '((' could
+# trigger a bug in pdksh 5.2.14.
+for as_var in BASH_ENV ENV MAIL MAILPATH
+do eval test x\${$as_var+set} = xset \
+ && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || :
+done
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# NLS nuisances.
+LC_ALL=C
+export LC_ALL
+LANGUAGE=C
+export LANGUAGE
+
+# CDPATH.
+(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+
+
+# as_fn_error ERROR [LINENO LOG_FD]
+# ---------------------------------
+# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are
+# provided, also output the error to LOG_FD, referencing LINENO. Then exit the
+# script with status $?, using 1 if that was 0.
+as_fn_error ()
+{
+ as_status=$?; test $as_status -eq 0 && as_status=1
+ if test "$3"; then
+ as_lineno=${as_lineno-"$2"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ $as_echo "$as_me:${as_lineno-$LINENO}: error: $1" >&$3
+ fi
+ $as_echo "$as_me: error: $1" >&2
+ as_fn_exit $as_status
+} # as_fn_error
+
+
+# as_fn_set_status STATUS
+# -----------------------
+# Set $? to STATUS, without forking.
+as_fn_set_status ()
+{
+ return $1
+} # as_fn_set_status
+
+# as_fn_exit STATUS
+# -----------------
+# Exit the shell with STATUS, even in a "trap 0" or "set -e" context.
+as_fn_exit ()
+{
+ set +e
+ as_fn_set_status $1
+ exit $1
+} # as_fn_exit
+
+# as_fn_unset VAR
+# ---------------
+# Portably unset VAR.
+as_fn_unset ()
+{
+ { eval $1=; unset $1;}
+}
+as_unset=as_fn_unset
+# as_fn_append VAR VALUE
+# ----------------------
+# Append the text in VALUE to the end of the definition contained in VAR. Take
+# advantage of any shell optimizations that allow amortized linear growth over
+# repeated appends, instead of the typical quadratic growth present in naive
+# implementations.
+if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null; then :
+ eval 'as_fn_append ()
+ {
+ eval $1+=\$2
+ }'
+else
+ as_fn_append ()
+ {
+ eval $1=\$$1\$2
+ }
+fi # as_fn_append
+
+# as_fn_arith ARG...
+# ------------------
+# Perform arithmetic evaluation on the ARGs, and store the result in the
+# global $as_val. Take advantage of shells that can avoid forks. The arguments
+# must be portable across $(()) and expr.
+if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null; then :
+ eval 'as_fn_arith ()
+ {
+ as_val=$(( $* ))
+ }'
+else
+ as_fn_arith ()
+ {
+ as_val=`expr "$@" || test $? -eq 1`
+ }
+fi # as_fn_arith
+
+
+if expr a : '\(a\)' >/dev/null 2>&1 &&
+ test "X`expr 00001 : '.*\(...\)'`" = X001; then
+ as_expr=expr
+else
+ as_expr=false
+fi
+
+if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then
+ as_basename=basename
+else
+ as_basename=false
+fi
+
+if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then
+ as_dirname=dirname
+else
+ as_dirname=false
+fi
+
+as_me=`$as_basename -- "$0" ||
+$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \
+ X"$0" : 'X\(//\)$' \| \
+ X"$0" : 'X\(/\)' \| . 2>/dev/null ||
+$as_echo X/"$0" |
+ sed '/^.*\/\([^/][^/]*\)\/*$/{
+ s//\1/
+ q
+ }
+ /^X\/\(\/\/\)$/{
+ s//\1/
+ q
+ }
+ /^X\/\(\/\).*/{
+ s//\1/
+ q
+ }
+ s/.*/./; q'`
+
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+ECHO_C= ECHO_N= ECHO_T=
+case `echo -n x` in #(((((
+-n*)
+ case `echo 'xy\c'` in
+ *c*) ECHO_T=' ';; # ECHO_T is single tab character.
+ xy) ECHO_C='\c';;
+ *) echo `echo ksh88 bug on AIX 6.1` > /dev/null
+ ECHO_T=' ';;
+ esac;;
+*)
+ ECHO_N='-n';;
+esac
+
+rm -f conf$$ conf$$.exe conf$$.file
+if test -d conf$$.dir; then
+ rm -f conf$$.dir/conf$$.file
+else
+ rm -f conf$$.dir
+ mkdir conf$$.dir 2>/dev/null
+fi
+if (echo >conf$$.file) 2>/dev/null; then
+ if ln -s conf$$.file conf$$ 2>/dev/null; then
+ as_ln_s='ln -s'
+ # ... but there are two gotchas:
+ # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail.
+ # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable.
+ # In both cases, we have to default to `cp -p'.
+ ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe ||
+ as_ln_s='cp -p'
+ elif ln conf$$.file conf$$ 2>/dev/null; then
+ as_ln_s=ln
+ else
+ as_ln_s='cp -p'
+ fi
+else
+ as_ln_s='cp -p'
+fi
+rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file
+rmdir conf$$.dir 2>/dev/null
+
+
+# as_fn_mkdir_p
+# -------------
+# Create "$as_dir" as a directory, including parents if necessary.
+as_fn_mkdir_p ()
+{
+
+ case $as_dir in #(
+ -*) as_dir=./$as_dir;;
+ esac
+ test -d "$as_dir" || eval $as_mkdir_p || {
+ as_dirs=
+ while :; do
+ case $as_dir in #(
+ *\'*) as_qdir=`$as_echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'(
+ *) as_qdir=$as_dir;;
+ esac
+ as_dirs="'$as_qdir' $as_dirs"
+ as_dir=`$as_dirname -- "$as_dir" ||
+$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+ X"$as_dir" : 'X\(//\)[^/]' \| \
+ X"$as_dir" : 'X\(//\)$' \| \
+ X"$as_dir" : 'X\(/\)' \| . 2>/dev/null ||
+$as_echo X"$as_dir" |
+ sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+ s//\1/
+ q
+ }
+ /^X\(\/\/\)[^/].*/{
+ s//\1/
+ q
+ }
+ /^X\(\/\/\)$/{
+ s//\1/
+ q
+ }
+ /^X\(\/\).*/{
+ s//\1/
+ q
+ }
+ s/.*/./; q'`
+ test -d "$as_dir" && break
+ done
+ test -z "$as_dirs" || eval "mkdir $as_dirs"
+ } || test -d "$as_dir" || as_fn_error "cannot create directory $as_dir"
+
+
+} # as_fn_mkdir_p
+if mkdir -p . 2>/dev/null; then
+ as_mkdir_p='mkdir -p "$as_dir"'
+else
+ test -d ./-p && rmdir ./-p
+ as_mkdir_p=false
+fi
+
+if test -x / >/dev/null 2>&1; then
+ as_test_x='test -x'
+else
+ if ls -dL / >/dev/null 2>&1; then
+ as_ls_L_option=L
+ else
+ as_ls_L_option=
+ fi
+ as_test_x='
+ eval sh -c '\''
+ if test -d "$1"; then
+ test -d "$1/.";
+ else
+ case $1 in #(
+ -*)set "./$1";;
+ esac;
+ case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in #((
+ ???[sx]*):;;*)false;;esac;fi
+ '\'' sh
+ '
+fi
+as_executable_p=$as_test_x
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+
+
+exec 6>&1
+## ----------------------------------- ##
+## Main body of $CONFIG_STATUS script. ##
+## ----------------------------------- ##
+_ASEOF
+test $as_write_fail = 0 && chmod +x $CONFIG_STATUS || ac_write_fail=1
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+# Save the log message, to keep $0 and so on meaningful, and to
+# report actual input values of CONFIG_FILES etc. instead of their
+# values after options handling.
+ac_log="
+This file was extended by $as_me, which was
+generated by GNU Autoconf 2.64. Invocation command line was
+
+ CONFIG_FILES = $CONFIG_FILES
+ CONFIG_HEADERS = $CONFIG_HEADERS
+ CONFIG_LINKS = $CONFIG_LINKS
+ CONFIG_COMMANDS = $CONFIG_COMMANDS
+ $ $0 $@
+
+on `(hostname || uname -n) 2>/dev/null | sed 1q`
+"
+
+_ACEOF
+
+case $ac_config_files in *"
+"*) set x $ac_config_files; shift; ac_config_files=$*;;
+esac
+
+case $ac_config_headers in *"
+"*) set x $ac_config_headers; shift; ac_config_headers=$*;;
+esac
+
+
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+# Files that config.status was made for.
+config_files="$ac_config_files"
+config_headers="$ac_config_headers"
+config_links="$ac_config_links"
+config_commands="$ac_config_commands"
+
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+ac_cs_usage="\
+\`$as_me' instantiates files and other configuration actions
+from templates according to the current configuration. Unless the files
+and actions are specified as TAGs, all are instantiated by default.
+
+Usage: $0 [OPTION]... [TAG]...
+
+ -h, --help print this help, then exit
+ -V, --version print version number and configuration settings, then exit
+ -q, --quiet, --silent
+ do not print progress messages
+ -d, --debug don't remove temporary files
+ --recheck update $as_me by reconfiguring in the same conditions
+ --file=FILE[:TEMPLATE]
+ instantiate the configuration file FILE
+ --header=FILE[:TEMPLATE]
+ instantiate the configuration header FILE
+
+Configuration files:
+$config_files
+
+Configuration headers:
+$config_headers
+
+Configuration links:
+$config_links
+
+Configuration commands:
+$config_commands
+
+Report bugs to the package provider."
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+ac_cs_version="\\
+config.status
+configured by $0, generated by GNU Autoconf 2.64,
+ with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
+
+Copyright (C) 2009 Free Software Foundation, Inc.
+This config.status script is free software; the Free Software Foundation
+gives unlimited permission to copy, distribute and modify it."
+
+ac_pwd='$ac_pwd'
+srcdir='$srcdir'
+INSTALL='$INSTALL'
+test -n "\$AWK" || AWK=awk
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+# The default lists apply if the user does not specify any file.
+ac_need_defaults=:
+while test $# != 0
+do
+ case $1 in
+ --*=*)
+ ac_option=`expr "X$1" : 'X\([^=]*\)='`
+ ac_optarg=`expr "X$1" : 'X[^=]*=\(.*\)'`
+ ac_shift=:
+ ;;
+ *)
+ ac_option=$1
+ ac_optarg=$2
+ ac_shift=shift
+ ;;
+ esac
+
+ case $ac_option in
+ # Handling of the options.
+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+ ac_cs_recheck=: ;;
+ --version | --versio | --versi | --vers | --ver | --ve | --v | -V )
+ $as_echo "$ac_cs_version"; exit ;;
+ --debug | --debu | --deb | --de | --d | -d )
+ debug=: ;;
+ --file | --fil | --fi | --f )
+ $ac_shift
+ case $ac_optarg in
+ *\'*) ac_optarg=`$as_echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;;
+ esac
+ as_fn_append CONFIG_FILES " '$ac_optarg'"
+ ac_need_defaults=false;;
+ --header | --heade | --head | --hea )
+ $ac_shift
+ case $ac_optarg in
+ *\'*) ac_optarg=`$as_echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;;
+ esac
+ as_fn_append CONFIG_HEADERS " '$ac_optarg'"
+ ac_need_defaults=false;;
+ --he | --h)
+ # Conflict between --help and --header
+ as_fn_error "ambiguous option: \`$1'
+Try \`$0 --help' for more information.";;
+ --help | --hel | -h )
+ $as_echo "$ac_cs_usage"; exit ;;
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil | --si | --s)
+ ac_cs_silent=: ;;
+
+ # This is an error.
+ -*) as_fn_error "unrecognized option: \`$1'
+Try \`$0 --help' for more information." ;;
+
+ *) as_fn_append ac_config_targets " $1"
+ ac_need_defaults=false ;;
+
+ esac
+ shift
+done
+
+ac_configure_extra_args=
+
+if $ac_cs_silent; then
+ exec 6>/dev/null
+ ac_configure_extra_args="$ac_configure_extra_args --silent"
+fi
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+if \$ac_cs_recheck; then
+ set X '$SHELL' '$0' $ac_configure_args \$ac_configure_extra_args --no-create --no-recursion
+ shift
+ \$as_echo "running CONFIG_SHELL=$SHELL \$*" >&6
+ CONFIG_SHELL='$SHELL'
+ export CONFIG_SHELL
+ exec "\$@"
+fi
+
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+exec 5>>config.log
+{
+ echo
+ sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX
+## Running $as_me. ##
+_ASBOX
+ $as_echo "$ac_log"
+} >&5
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+#
+# INIT-COMMANDS
+#
+ac_aux_dir=$ac_aux_dir DEPDIR=$DEPDIR
+
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+
+# Handling of arguments.
+for ac_config_target in $ac_config_targets
+do
+ case $ac_config_target in
+ "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h:config.in" ;;
+ "depdir") CONFIG_COMMANDS="$CONFIG_COMMANDS depdir" ;;
+ "$ac_config_links_1") CONFIG_LINKS="$CONFIG_LINKS $ac_config_links_1" ;;
+ "Makefile.sim") CONFIG_FILES="$CONFIG_FILES Makefile.sim:Makefile.in" ;;
+ "Make-common.sim") CONFIG_FILES="$CONFIG_FILES Make-common.sim:../common/Make-common.in" ;;
+ ".gdbinit") CONFIG_FILES="$CONFIG_FILES .gdbinit:../common/gdbinit.in" ;;
+ "Makefile") CONFIG_COMMANDS="$CONFIG_COMMANDS Makefile" ;;
+ "stamp-h") CONFIG_COMMANDS="$CONFIG_COMMANDS stamp-h" ;;
+
+ *) as_fn_error "invalid argument: \`$ac_config_target'" "$LINENO" 5;;
+ esac
+done
+
+
+# If the user did not use the arguments to specify the items to instantiate,
+# then the envvar interface is used. Set only those that are not.
+# We use the long form for the default assignment because of an extremely
+# bizarre bug on SunOS 4.1.3.
+if $ac_need_defaults; then
+ test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files
+ test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers
+ test "${CONFIG_LINKS+set}" = set || CONFIG_LINKS=$config_links
+ test "${CONFIG_COMMANDS+set}" = set || CONFIG_COMMANDS=$config_commands
+fi
+
+# Have a temporary directory for convenience. Make it in the build tree
+# simply because there is no reason against having it here, and in addition,
+# creating and moving files from /tmp can sometimes cause problems.
+# Hook for its removal unless debugging.
+# Note that there is a small window in which the directory will not be cleaned:
+# after its creation but before its name has been assigned to `$tmp'.
+$debug ||
+{
+ tmp=
+ trap 'exit_status=$?
+ { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status
+' 0
+ trap 'as_fn_exit 1' 1 2 13 15
+}
+# Create a (secure) tmp directory for tmp files.
+
+{
+ tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` &&
+ test -n "$tmp" && test -d "$tmp"
+} ||
+{
+ tmp=./conf$$-$RANDOM
+ (umask 077 && mkdir "$tmp")
+} || as_fn_error "cannot create a temporary directory in ." "$LINENO" 5
+
+# Set up the scripts for CONFIG_FILES section.
+# No need to generate them if there are no CONFIG_FILES.
+# This happens for instance with `./config.status config.h'.
+if test -n "$CONFIG_FILES"; then
+
+
+ac_cr=`echo X | tr X '\015'`
+# On cygwin, bash can eat \r inside `` if the user requested igncr.
+# But we know of no other shell where ac_cr would be empty at this
+# point, so we can use a bashism as a fallback.
+if test "x$ac_cr" = x; then
+ eval ac_cr=\$\'\\r\'
+fi
+ac_cs_awk_cr=`$AWK 'BEGIN { print "a\rb" }' </dev/null 2>/dev/null`
+if test "$ac_cs_awk_cr" = "a${ac_cr}b"; then
+ ac_cs_awk_cr='\r'
+else
+ ac_cs_awk_cr=$ac_cr
+fi
+
+echo 'BEGIN {' >"$tmp/subs1.awk" &&
+_ACEOF
+
+
+{
+ echo "cat >conf$$subs.awk <<_ACEOF" &&
+ echo "$ac_subst_vars" | sed 's/.*/&!$&$ac_delim/' &&
+ echo "_ACEOF"
+} >conf$$subs.sh ||
+ as_fn_error "could not make $CONFIG_STATUS" "$LINENO" 5
+ac_delim_num=`echo "$ac_subst_vars" | grep -c '$'`
+ac_delim='%!_!# '
+for ac_last_try in false false false false false :; do
+ . ./conf$$subs.sh ||
+ as_fn_error "could not make $CONFIG_STATUS" "$LINENO" 5
+
+ ac_delim_n=`sed -n "s/.*$ac_delim\$/X/p" conf$$subs.awk | grep -c X`
+ if test $ac_delim_n = $ac_delim_num; then
+ break
+ elif $ac_last_try; then
+ as_fn_error "could not make $CONFIG_STATUS" "$LINENO" 5
+ else
+ ac_delim="$ac_delim!$ac_delim _$ac_delim!! "
+ fi
+done
+rm -f conf$$subs.sh
+
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+cat >>"\$tmp/subs1.awk" <<\\_ACAWK &&
+_ACEOF
+sed -n '
+h
+s/^/S["/; s/!.*/"]=/
+p
+g
+s/^[^!]*!//
+:repl
+t repl
+s/'"$ac_delim"'$//
+t delim
+:nl
+h
+s/\(.\{148\}\).*/\1/
+t more1
+s/["\\]/\\&/g; s/^/"/; s/$/\\n"\\/
+p
+n
+b repl
+:more1
+s/["\\]/\\&/g; s/^/"/; s/$/"\\/
+p
+g
+s/.\{148\}//
+t nl
+:delim
+h
+s/\(.\{148\}\).*/\1/
+t more2
+s/["\\]/\\&/g; s/^/"/; s/$/"/
+p
+b
+:more2
+s/["\\]/\\&/g; s/^/"/; s/$/"\\/
+p
+g
+s/.\{148\}//
+t delim
+' <conf$$subs.awk | sed '
+/^[^""]/{
+ N
+ s/\n//
+}
+' >>$CONFIG_STATUS || ac_write_fail=1
+rm -f conf$$subs.awk
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+_ACAWK
+cat >>"\$tmp/subs1.awk" <<_ACAWK &&
+ for (key in S) S_is_set[key] = 1
+ FS = "\a"
+
+}
+{
+ line = $ 0
+ nfields = split(line, field, "@")
+ substed = 0
+ len = length(field[1])
+ for (i = 2; i < nfields; i++) {
+ key = field[i]
+ keylen = length(key)
+ if (S_is_set[key]) {
+ value = S[key]
+ line = substr(line, 1, len) "" value "" substr(line, len + keylen + 3)
+ len += length(value) + length(field[++i])
+ substed = 1
+ } else
+ len += 1 + keylen
+ }
+
+ print line
+}
+
+_ACAWK
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+if sed "s/$ac_cr//" < /dev/null > /dev/null 2>&1; then
+ sed "s/$ac_cr\$//; s/$ac_cr/$ac_cs_awk_cr/g"
+else
+ cat
+fi < "$tmp/subs1.awk" > "$tmp/subs.awk" \
+ || as_fn_error "could not setup config files machinery" "$LINENO" 5
+_ACEOF
+
+# VPATH may cause trouble with some makes, so we remove $(srcdir),
+# ${srcdir} and @srcdir@ from VPATH if srcdir is ".", strip leading and
+# trailing colons and then remove the whole line if VPATH becomes empty
+# (actually we leave an empty line to preserve line numbers).
+if test "x$srcdir" = x.; then
+ ac_vpsub='/^[ ]*VPATH[ ]*=/{
+s/:*\$(srcdir):*/:/
+s/:*\${srcdir}:*/:/
+s/:*@srcdir@:*/:/
+s/^\([^=]*=[ ]*\):*/\1/
+s/:*$//
+s/^[^=]*=[ ]*$//
+}'
+fi
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+fi # test -n "$CONFIG_FILES"
+
+# Set up the scripts for CONFIG_HEADERS section.
+# No need to generate them if there are no CONFIG_HEADERS.
+# This happens for instance with `./config.status Makefile'.
+if test -n "$CONFIG_HEADERS"; then
+cat >"$tmp/defines.awk" <<\_ACAWK ||
+BEGIN {
+_ACEOF
+
+# Transform confdefs.h into an awk script `defines.awk', embedded as
+# here-document in config.status, that substitutes the proper values into
+# config.h.in to produce config.h.
+
+# Create a delimiter string that does not exist in confdefs.h, to ease
+# handling of long lines.
+ac_delim='%!_!# '
+for ac_last_try in false false :; do
+ ac_t=`sed -n "/$ac_delim/p" confdefs.h`
+ if test -z "$ac_t"; then
+ break
+ elif $ac_last_try; then
+ as_fn_error "could not make $CONFIG_HEADERS" "$LINENO" 5
+ else
+ ac_delim="$ac_delim!$ac_delim _$ac_delim!! "
+ fi
+done
+
+# For the awk script, D is an array of macro values keyed by name,
+# likewise P contains macro parameters if any. Preserve backslash
+# newline sequences.
+
+ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]*
+sed -n '
+s/.\{148\}/&'"$ac_delim"'/g
+t rset
+:rset
+s/^[ ]*#[ ]*define[ ][ ]*/ /
+t def
+d
+:def
+s/\\$//
+t bsnl
+s/["\\]/\\&/g
+s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\
+D["\1"]=" \3"/p
+s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2"/p
+d
+:bsnl
+s/["\\]/\\&/g
+s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\
+D["\1"]=" \3\\\\\\n"\\/p
+t cont
+s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2\\\\\\n"\\/p
+t cont
+d
+:cont
+n
+s/.\{148\}/&'"$ac_delim"'/g
+t clear
+:clear
+s/\\$//
+t bsnlc
+s/["\\]/\\&/g; s/^/"/; s/$/"/p
+d
+:bsnlc
+s/["\\]/\\&/g; s/^/"/; s/$/\\\\\\n"\\/p
+b cont
+' <confdefs.h | sed '
+s/'"$ac_delim"'/"\\\
+"/g' >>$CONFIG_STATUS || ac_write_fail=1
+
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+ for (key in D) D_is_set[key] = 1
+ FS = "\a"
+}
+/^[\t ]*#[\t ]*(define|undef)[\t ]+$ac_word_re([\t (]|\$)/ {
+ line = \$ 0
+ split(line, arg, " ")
+ if (arg[1] == "#") {
+ defundef = arg[2]
+ mac1 = arg[3]
+ } else {
+ defundef = substr(arg[1], 2)
+ mac1 = arg[2]
+ }
+ split(mac1, mac2, "(") #)
+ macro = mac2[1]
+ prefix = substr(line, 1, index(line, defundef) - 1)
+ if (D_is_set[macro]) {
+ # Preserve the white space surrounding the "#".
+ print prefix "define", macro P[macro] D[macro]
+ next
+ } else {
+ # Replace #undef with comments. This is necessary, for example,
+ # in the case of _POSIX_SOURCE, which is predefined and required
+ # on some systems where configure will not decide to define it.
+ if (defundef == "undef") {
+ print "/*", prefix defundef, macro, "*/"
+ next
+ }
+ }
+}
+{ print }
+_ACAWK
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+ as_fn_error "could not setup config headers machinery" "$LINENO" 5
+fi # test -n "$CONFIG_HEADERS"
+
+
+eval set X " :F $CONFIG_FILES :H $CONFIG_HEADERS :L $CONFIG_LINKS :C $CONFIG_COMMANDS"
+shift
+for ac_tag
+do
+ case $ac_tag in
+ :[FHLC]) ac_mode=$ac_tag; continue;;
+ esac
+ case $ac_mode$ac_tag in
+ :[FHL]*:*);;
+ :L* | :C*:*) as_fn_error "invalid tag \`$ac_tag'" "$LINENO" 5;;
+ :[FH]-) ac_tag=-:-;;
+ :[FH]*) ac_tag=$ac_tag:$ac_tag.in;;
+ esac
+ ac_save_IFS=$IFS
+ IFS=:
+ set x $ac_tag
+ IFS=$ac_save_IFS
+ shift
+ ac_file=$1
+ shift
+
+ case $ac_mode in
+ :L) ac_source=$1;;
+ :[FH])
+ ac_file_inputs=
+ for ac_f
+ do
+ case $ac_f in
+ -) ac_f="$tmp/stdin";;
+ *) # Look for the file first in the build tree, then in the source tree
+ # (if the path is not absolute). The absolute path cannot be DOS-style,
+ # because $ac_f cannot contain `:'.
+ test -f "$ac_f" ||
+ case $ac_f in
+ [\\/$]*) false;;
+ *) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";;
+ esac ||
+ as_fn_error "cannot find input file: \`$ac_f'" "$LINENO" 5;;
+ esac
+ case $ac_f in *\'*) ac_f=`$as_echo "$ac_f" | sed "s/'/'\\\\\\\\''/g"`;; esac
+ as_fn_append ac_file_inputs " '$ac_f'"
+ done
+
+ # Let's still pretend it is `configure' which instantiates (i.e., don't
+ # use $as_me), people would be surprised to read:
+ # /* config.h. Generated by config.status. */
+ configure_input='Generated from '`
+ $as_echo "$*" | sed 's|^[^:]*/||;s|:[^:]*/|, |g'
+ `' by configure.'
+ if test x"$ac_file" != x-; then
+ configure_input="$ac_file. $configure_input"
+ { $as_echo "$as_me:${as_lineno-$LINENO}: creating $ac_file" >&5
+$as_echo "$as_me: creating $ac_file" >&6;}
+ fi
+ # Neutralize special characters interpreted by sed in replacement strings.
+ case $configure_input in #(
+ *\&* | *\|* | *\\* )
+ ac_sed_conf_input=`$as_echo "$configure_input" |
+ sed 's/[\\\\&|]/\\\\&/g'`;; #(
+ *) ac_sed_conf_input=$configure_input;;
+ esac
+
+ case $ac_tag in
+ *:-:* | *:-) cat >"$tmp/stdin" \
+ || as_fn_error "could not create $ac_file" "$LINENO" 5 ;;
+ esac
+ ;;
+ esac
+
+ ac_dir=`$as_dirname -- "$ac_file" ||
+$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+ X"$ac_file" : 'X\(//\)[^/]' \| \
+ X"$ac_file" : 'X\(//\)$' \| \
+ X"$ac_file" : 'X\(/\)' \| . 2>/dev/null ||
+$as_echo X"$ac_file" |
+ sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+ s//\1/
+ q
+ }
+ /^X\(\/\/\)[^/].*/{
+ s//\1/
+ q
+ }
+ /^X\(\/\/\)$/{
+ s//\1/
+ q
+ }
+ /^X\(\/\).*/{
+ s//\1/
+ q
+ }
+ s/.*/./; q'`
+ as_dir="$ac_dir"; as_fn_mkdir_p
+ ac_builddir=.
+
+case "$ac_dir" in
+.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;;
+*)
+ ac_dir_suffix=/`$as_echo "$ac_dir" | sed 's|^\.[\\/]||'`
+ # A ".." for each directory in $ac_dir_suffix.
+ ac_top_builddir_sub=`$as_echo "$ac_dir_suffix" | sed 's|/[^\\/]*|/..|g;s|/||'`
+ case $ac_top_builddir_sub in
+ "") ac_top_builddir_sub=. ac_top_build_prefix= ;;
+ *) ac_top_build_prefix=$ac_top_builddir_sub/ ;;
+ esac ;;
+esac
+ac_abs_top_builddir=$ac_pwd
+ac_abs_builddir=$ac_pwd$ac_dir_suffix
+# for backward compatibility:
+ac_top_builddir=$ac_top_build_prefix
+
+case $srcdir in
+ .) # We are building in place.
+ ac_srcdir=.
+ ac_top_srcdir=$ac_top_builddir_sub
+ ac_abs_top_srcdir=$ac_pwd ;;
+ [\\/]* | ?:[\\/]* ) # Absolute name.
+ ac_srcdir=$srcdir$ac_dir_suffix;
+ ac_top_srcdir=$srcdir
+ ac_abs_top_srcdir=$srcdir ;;
+ *) # Relative name.
+ ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix
+ ac_top_srcdir=$ac_top_build_prefix$srcdir
+ ac_abs_top_srcdir=$ac_pwd/$srcdir ;;
+esac
+ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix
+
+
+ case $ac_mode in
+ :F)
+ #
+ # CONFIG_FILE
+ #
+
+ case $INSTALL in
+ [\\/$]* | ?:[\\/]* ) ac_INSTALL=$INSTALL ;;
+ *) ac_INSTALL=$ac_top_build_prefix$INSTALL ;;
+ esac
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+# If the template does not know about datarootdir, expand it.
+# FIXME: This hack should be removed a few years after 2.60.
+ac_datarootdir_hack=; ac_datarootdir_seen=
+ac_sed_dataroot='
+/datarootdir/ {
+ p
+ q
+}
+/@datadir@/p
+/@docdir@/p
+/@infodir@/p
+/@localedir@/p
+/@mandir@/p'
+case `eval "sed -n \"\$ac_sed_dataroot\" $ac_file_inputs"` in
+*datarootdir*) ac_datarootdir_seen=yes;;
+*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5
+$as_echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;}
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+ ac_datarootdir_hack='
+ s&@datadir@&$datadir&g
+ s&@docdir@&$docdir&g
+ s&@infodir@&$infodir&g
+ s&@localedir@&$localedir&g
+ s&@mandir@&$mandir&g
+ s&\\\${datarootdir}&$datarootdir&g' ;;
+esac
+_ACEOF
+
+# Neutralize VPATH when `$srcdir' = `.'.
+# Shell code in configure.ac might set extrasub.
+# FIXME: do we really want to maintain this feature?
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+ac_sed_extra="$ac_vpsub
+$extrasub
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+:t
+/@[a-zA-Z_][a-zA-Z_0-9]*@/!b
+s|@configure_input@|$ac_sed_conf_input|;t t
+s&@top_builddir@&$ac_top_builddir_sub&;t t
+s&@top_build_prefix@&$ac_top_build_prefix&;t t
+s&@srcdir@&$ac_srcdir&;t t
+s&@abs_srcdir@&$ac_abs_srcdir&;t t
+s&@top_srcdir@&$ac_top_srcdir&;t t
+s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t
+s&@builddir@&$ac_builddir&;t t
+s&@abs_builddir@&$ac_abs_builddir&;t t
+s&@abs_top_builddir@&$ac_abs_top_builddir&;t t
+s&@INSTALL@&$ac_INSTALL&;t t
+$ac_datarootdir_hack
+"
+eval sed \"\$ac_sed_extra\" "$ac_file_inputs" | $AWK -f "$tmp/subs.awk" >$tmp/out \
+ || as_fn_error "could not create $ac_file" "$LINENO" 5
+
+test -z "$ac_datarootdir_hack$ac_datarootdir_seen" &&
+ { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } &&
+ { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } &&
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file contains a reference to the variable \`datarootdir'
+which seems to be undefined. Please make sure it is defined." >&5
+$as_echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir'
+which seems to be undefined. Please make sure it is defined." >&2;}
+
+ rm -f "$tmp/stdin"
+ case $ac_file in
+ -) cat "$tmp/out" && rm -f "$tmp/out";;
+ *) rm -f "$ac_file" && mv "$tmp/out" "$ac_file";;
+ esac \
+ || as_fn_error "could not create $ac_file" "$LINENO" 5
+ ;;
+ :H)
+ #
+ # CONFIG_HEADER
+ #
+ if test x"$ac_file" != x-; then
+ {
+ $as_echo "/* $configure_input */" \
+ && eval '$AWK -f "$tmp/defines.awk"' "$ac_file_inputs"
+ } >"$tmp/config.h" \
+ || as_fn_error "could not create $ac_file" "$LINENO" 5
+ if diff "$ac_file" "$tmp/config.h" >/dev/null 2>&1; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: $ac_file is unchanged" >&5
+$as_echo "$as_me: $ac_file is unchanged" >&6;}
+ else
+ rm -f "$ac_file"
+ mv "$tmp/config.h" "$ac_file" \
+ || as_fn_error "could not create $ac_file" "$LINENO" 5
+ fi
+ else
+ $as_echo "/* $configure_input */" \
+ && eval '$AWK -f "$tmp/defines.awk"' "$ac_file_inputs" \
+ || as_fn_error "could not create -" "$LINENO" 5
+ fi
+ ;;
+ :L)
+ #
+ # CONFIG_LINK
+ #
+
+ if test "$ac_source" = "$ac_file" && test "$srcdir" = '.'; then
+ :
+ else
+ # Prefer the file from the source tree if names are identical.
+ if test "$ac_source" = "$ac_file" || test ! -r "$ac_source"; then
+ ac_source=$srcdir/$ac_source
+ fi
+
+ { $as_echo "$as_me:${as_lineno-$LINENO}: linking $ac_source to $ac_file" >&5
+$as_echo "$as_me: linking $ac_source to $ac_file" >&6;}
+
+ if test ! -r "$ac_source"; then
+ as_fn_error "$ac_source: file not found" "$LINENO" 5
+ fi
+ rm -f "$ac_file"
+
+ # Try a relative symlink, then a hard link, then a copy.
+ case $srcdir in
+ [\\/$]* | ?:[\\/]* ) ac_rel_source=$ac_source ;;
+ *) ac_rel_source=$ac_top_build_prefix$ac_source ;;
+ esac
+ ln -s "$ac_rel_source" "$ac_file" 2>/dev/null ||
+ ln "$ac_source" "$ac_file" 2>/dev/null ||
+ cp -p "$ac_source" "$ac_file" ||
+ as_fn_error "cannot link or copy $ac_source to $ac_file" "$LINENO" 5
+ fi
+ ;;
+ :C) { $as_echo "$as_me:${as_lineno-$LINENO}: executing $ac_file commands" >&5
+$as_echo "$as_me: executing $ac_file commands" >&6;}
+ ;;
+ esac
+
+
+ case $ac_file$ac_mode in
+ "depdir":C) $SHELL $ac_aux_dir/mkinstalldirs $DEPDIR ;;
+ "Makefile":C) echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
+ rm -f Makesim1.tmp Makesim2.tmp Makefile
+ sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
+ sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
+ sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
+ -e '/^## COMMON_POST_/ r Makesim2.tmp' \
+ <Makefile.sim >Makefile
+ rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
+ ;;
+ "stamp-h":C) echo > stamp-h ;;
+
+ esac
+done # for ac_tag
+
+
+as_fn_exit 0
+_ACEOF
+ac_clean_files=$ac_clean_files_save
+
+test $ac_write_fail = 0 ||
+ as_fn_error "write failure creating $CONFIG_STATUS" "$LINENO" 5
+
+
+# configure is writing to config.log, and then calls config.status.
+# config.status does its own redirection, appending to config.log.
+# Unfortunately, on DOS this fails, as config.log is still kept open
+# by configure, so config.status won't be able to write to it; its
+# output is simply discarded. So we exec the FD to /dev/null,
+# effectively closing config.log, so it can be properly (re)opened and
+# appended to by config.status. When coming back to configure, we
+# need to make the FD available again.
+if test "$no_create" != yes; then
+ ac_cs_success=:
+ ac_config_status_args=
+ test "$silent" = yes &&
+ ac_config_status_args="$ac_config_status_args --quiet"
+ exec 5>/dev/null
+ $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false
+ exec 5>>config.log
+ # Use ||, not &&, to avoid exiting from the if with $? = 1, which
+ # would make configure fail if this is the last instruction.
+ $ac_cs_success || as_fn_exit $?
+fi
+if test -n "$ac_unrecognized_opts" && test "$enable_option_checking" != no; then
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: unrecognized options: $ac_unrecognized_opts" >&5
+$as_echo "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2;}
+fi
+
+
diff --git a/sim/or1k/configure.ac b/sim/or1k/configure.ac
new file mode 100644
index 0000000..fde576b
--- /dev/null
+++ b/sim/or1k/configure.ac
@@ -0,0 +1,42 @@
+dnl Process this file with autoconf to produce a configure script.
+AC_PREREQ(2.64)dnl
+AC_INIT(Makefile.in)
+sinclude(../common/acinclude.m4)
+
+ case "${target_alias}" in
+ or1k*-linux*)
+ traps_obj=traps-linux.o
+ ;;
+ *)
+ traps_obj=traps.o
+ ;;
+ esac
+
+ case "${target_alias}" in
+ or1knd-*)
+ want_or1k_nodelay=true
+ default_model=or1200nd
+ ;;
+ *)
+ default_model=or1200
+ ;;
+ esac
+
+SIM_AC_COMMON
+
+SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
+SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT)
+SIM_AC_OPTION_HOSTENDIAN
+SIM_AC_OPTION_BITSIZE([32], [31], [32])
+SIM_AC_OPTION_SCACHE([16384])
+SIM_AC_OPTION_DEFAULT_MODEL([$default_model])
+SIM_AC_OPTION_ENVIRONMENT
+SIM_AC_OPTION_INLINE()
+SIM_AC_OPTION_CGEN_MAINT
+
+AC_SUBST(traps_obj)
+AC_SUBST(sim_extra_cflags)
+AC_SUBST(want_or1k64)
+AC_SUBST(want_or1k_nodelay)
+
+SIM_AC_OUTPUT
diff --git a/sim/or1k/cpu.h b/sim/or1k/cpu.h
new file mode 100644
index 0000000..1f2a5f3
--- /dev/null
+++ b/sim/or1k/cpu.h
@@ -0,0 +1,5 @@
+#ifndef WANT_OR1K64
+#include "cpu32.h"
+#else
+#include "cpu64.h"
+#endif
diff --git a/sim/or1k/cpu32.c b/sim/or1k/cpu32.c
new file mode 100644
index 0000000..d503534
--- /dev/null
+++ b/sim/or1k/cpu32.c
@@ -0,0 +1,10133 @@
+/* Misc. support for CPU family or1k32bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k32bf
+#define WANT_CPU_OR1K32BF
+
+#include "sim-main.h"
+#include "cgen-ops.h"
+
+/* Get the value of h-pc. */
+
+USI
+or1k32bf_h_pc_get (SIM_CPU *current_cpu)
+{
+ return CPU (h_pc);
+}
+
+/* Set a value for h-pc. */
+
+void
+or1k32bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
+{
+ CPU (h_pc) = newval;
+}
+
+/* Get the value of h-fsr. */
+
+SF
+or1k32bf_h_fsr_get (SIM_CPU *current_cpu, UINT regno)
+{
+ return GET_H_FSR (regno);
+}
+
+/* Set a value for h-fsr. */
+
+void
+or1k32bf_h_fsr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
+{
+ SET_H_FSR (regno, newval);
+}
+
+/* Get the value of h-spr. */
+
+USI
+or1k32bf_h_spr_get (SIM_CPU *current_cpu, UINT regno)
+{
+ return GET_H_SPR (regno);
+}
+
+/* Set a value for h-spr. */
+
+void
+or1k32bf_h_spr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
+{
+ SET_H_SPR (regno, newval);
+}
+
+/* Get the value of h-gpr. */
+
+USI
+or1k32bf_h_gpr_get (SIM_CPU *current_cpu, UINT regno)
+{
+ return GET_H_GPR (regno);
+}
+
+/* Set a value for h-gpr. */
+
+void
+or1k32bf_h_gpr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
+{
+ SET_H_GPR (regno, newval);
+}
+
+/* Get the value of h-sys-vr. */
+
+USI
+or1k32bf_h_sys_vr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR ();
+}
+
+/* Set a value for h-sys-vr. */
+
+void
+or1k32bf_h_sys_vr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_VR (newval);
+}
+
+/* Get the value of h-sys-upr. */
+
+USI
+or1k32bf_h_sys_upr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR ();
+}
+
+/* Set a value for h-sys-upr. */
+
+void
+or1k32bf_h_sys_upr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR (newval);
+}
+
+/* Get the value of h-sys-cpucfgr. */
+
+USI
+or1k32bf_h_sys_cpucfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR ();
+}
+
+/* Set a value for h-sys-cpucfgr. */
+
+void
+or1k32bf_h_sys_cpucfgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR (newval);
+}
+
+/* Get the value of h-sys-dmmucfgr. */
+
+USI
+or1k32bf_h_sys_dmmucfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_DMMUCFGR ();
+}
+
+/* Set a value for h-sys-dmmucfgr. */
+
+void
+or1k32bf_h_sys_dmmucfgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_DMMUCFGR (newval);
+}
+
+/* Get the value of h-sys-immucfgr. */
+
+USI
+or1k32bf_h_sys_immucfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_IMMUCFGR ();
+}
+
+/* Set a value for h-sys-immucfgr. */
+
+void
+or1k32bf_h_sys_immucfgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_IMMUCFGR (newval);
+}
+
+/* Get the value of h-sys-dccfgr. */
+
+USI
+or1k32bf_h_sys_dccfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_DCCFGR ();
+}
+
+/* Set a value for h-sys-dccfgr. */
+
+void
+or1k32bf_h_sys_dccfgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_DCCFGR (newval);
+}
+
+/* Get the value of h-sys-iccfgr. */
+
+USI
+or1k32bf_h_sys_iccfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ICCFGR ();
+}
+
+/* Set a value for h-sys-iccfgr. */
+
+void
+or1k32bf_h_sys_iccfgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ICCFGR (newval);
+}
+
+/* Get the value of h-sys-dcfgr. */
+
+USI
+or1k32bf_h_sys_dcfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_DCFGR ();
+}
+
+/* Set a value for h-sys-dcfgr. */
+
+void
+or1k32bf_h_sys_dcfgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_DCFGR (newval);
+}
+
+/* Get the value of h-sys-pccfgr. */
+
+USI
+or1k32bf_h_sys_pccfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_PCCFGR ();
+}
+
+/* Set a value for h-sys-pccfgr. */
+
+void
+or1k32bf_h_sys_pccfgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_PCCFGR (newval);
+}
+
+/* Get the value of h-sys-npc. */
+
+USI
+or1k32bf_h_sys_npc_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_NPC ();
+}
+
+/* Set a value for h-sys-npc. */
+
+void
+or1k32bf_h_sys_npc_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_NPC (newval);
+}
+
+/* Get the value of h-sys-sr. */
+
+USI
+or1k32bf_h_sys_sr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR ();
+}
+
+/* Set a value for h-sys-sr. */
+
+void
+or1k32bf_h_sys_sr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR (newval);
+}
+
+/* Get the value of h-sys-ppc. */
+
+USI
+or1k32bf_h_sys_ppc_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_PPC ();
+}
+
+/* Set a value for h-sys-ppc. */
+
+void
+or1k32bf_h_sys_ppc_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_PPC (newval);
+}
+
+/* Get the value of h-sys-fpcsr. */
+
+USI
+or1k32bf_h_sys_fpcsr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR ();
+}
+
+/* Set a value for h-sys-fpcsr. */
+
+void
+or1k32bf_h_sys_fpcsr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR (newval);
+}
+
+/* Get the value of h-sys-epcr0. */
+
+USI
+or1k32bf_h_sys_epcr0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR0 ();
+}
+
+/* Set a value for h-sys-epcr0. */
+
+void
+or1k32bf_h_sys_epcr0_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR0 (newval);
+}
+
+/* Get the value of h-sys-epcr1. */
+
+USI
+or1k32bf_h_sys_epcr1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR1 ();
+}
+
+/* Set a value for h-sys-epcr1. */
+
+void
+or1k32bf_h_sys_epcr1_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR1 (newval);
+}
+
+/* Get the value of h-sys-epcr2. */
+
+USI
+or1k32bf_h_sys_epcr2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR2 ();
+}
+
+/* Set a value for h-sys-epcr2. */
+
+void
+or1k32bf_h_sys_epcr2_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR2 (newval);
+}
+
+/* Get the value of h-sys-epcr3. */
+
+USI
+or1k32bf_h_sys_epcr3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR3 ();
+}
+
+/* Set a value for h-sys-epcr3. */
+
+void
+or1k32bf_h_sys_epcr3_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR3 (newval);
+}
+
+/* Get the value of h-sys-epcr4. */
+
+USI
+or1k32bf_h_sys_epcr4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR4 ();
+}
+
+/* Set a value for h-sys-epcr4. */
+
+void
+or1k32bf_h_sys_epcr4_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR4 (newval);
+}
+
+/* Get the value of h-sys-epcr5. */
+
+USI
+or1k32bf_h_sys_epcr5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR5 ();
+}
+
+/* Set a value for h-sys-epcr5. */
+
+void
+or1k32bf_h_sys_epcr5_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR5 (newval);
+}
+
+/* Get the value of h-sys-epcr6. */
+
+USI
+or1k32bf_h_sys_epcr6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR6 ();
+}
+
+/* Set a value for h-sys-epcr6. */
+
+void
+or1k32bf_h_sys_epcr6_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR6 (newval);
+}
+
+/* Get the value of h-sys-epcr7. */
+
+USI
+or1k32bf_h_sys_epcr7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR7 ();
+}
+
+/* Set a value for h-sys-epcr7. */
+
+void
+or1k32bf_h_sys_epcr7_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR7 (newval);
+}
+
+/* Get the value of h-sys-epcr8. */
+
+USI
+or1k32bf_h_sys_epcr8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR8 ();
+}
+
+/* Set a value for h-sys-epcr8. */
+
+void
+or1k32bf_h_sys_epcr8_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR8 (newval);
+}
+
+/* Get the value of h-sys-epcr9. */
+
+USI
+or1k32bf_h_sys_epcr9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR9 ();
+}
+
+/* Set a value for h-sys-epcr9. */
+
+void
+or1k32bf_h_sys_epcr9_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR9 (newval);
+}
+
+/* Get the value of h-sys-epcr10. */
+
+USI
+or1k32bf_h_sys_epcr10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR10 ();
+}
+
+/* Set a value for h-sys-epcr10. */
+
+void
+or1k32bf_h_sys_epcr10_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR10 (newval);
+}
+
+/* Get the value of h-sys-epcr11. */
+
+USI
+or1k32bf_h_sys_epcr11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR11 ();
+}
+
+/* Set a value for h-sys-epcr11. */
+
+void
+or1k32bf_h_sys_epcr11_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR11 (newval);
+}
+
+/* Get the value of h-sys-epcr12. */
+
+USI
+or1k32bf_h_sys_epcr12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR12 ();
+}
+
+/* Set a value for h-sys-epcr12. */
+
+void
+or1k32bf_h_sys_epcr12_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR12 (newval);
+}
+
+/* Get the value of h-sys-epcr13. */
+
+USI
+or1k32bf_h_sys_epcr13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR13 ();
+}
+
+/* Set a value for h-sys-epcr13. */
+
+void
+or1k32bf_h_sys_epcr13_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR13 (newval);
+}
+
+/* Get the value of h-sys-epcr14. */
+
+USI
+or1k32bf_h_sys_epcr14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR14 ();
+}
+
+/* Set a value for h-sys-epcr14. */
+
+void
+or1k32bf_h_sys_epcr14_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR14 (newval);
+}
+
+/* Get the value of h-sys-epcr15. */
+
+USI
+or1k32bf_h_sys_epcr15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR15 ();
+}
+
+/* Set a value for h-sys-epcr15. */
+
+void
+or1k32bf_h_sys_epcr15_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EPCR15 (newval);
+}
+
+/* Get the value of h-sys-eear0. */
+
+USI
+or1k32bf_h_sys_eear0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR0 ();
+}
+
+/* Set a value for h-sys-eear0. */
+
+void
+or1k32bf_h_sys_eear0_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR0 (newval);
+}
+
+/* Get the value of h-sys-eear1. */
+
+USI
+or1k32bf_h_sys_eear1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR1 ();
+}
+
+/* Set a value for h-sys-eear1. */
+
+void
+or1k32bf_h_sys_eear1_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR1 (newval);
+}
+
+/* Get the value of h-sys-eear2. */
+
+USI
+or1k32bf_h_sys_eear2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR2 ();
+}
+
+/* Set a value for h-sys-eear2. */
+
+void
+or1k32bf_h_sys_eear2_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR2 (newval);
+}
+
+/* Get the value of h-sys-eear3. */
+
+USI
+or1k32bf_h_sys_eear3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR3 ();
+}
+
+/* Set a value for h-sys-eear3. */
+
+void
+or1k32bf_h_sys_eear3_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR3 (newval);
+}
+
+/* Get the value of h-sys-eear4. */
+
+USI
+or1k32bf_h_sys_eear4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR4 ();
+}
+
+/* Set a value for h-sys-eear4. */
+
+void
+or1k32bf_h_sys_eear4_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR4 (newval);
+}
+
+/* Get the value of h-sys-eear5. */
+
+USI
+or1k32bf_h_sys_eear5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR5 ();
+}
+
+/* Set a value for h-sys-eear5. */
+
+void
+or1k32bf_h_sys_eear5_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR5 (newval);
+}
+
+/* Get the value of h-sys-eear6. */
+
+USI
+or1k32bf_h_sys_eear6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR6 ();
+}
+
+/* Set a value for h-sys-eear6. */
+
+void
+or1k32bf_h_sys_eear6_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR6 (newval);
+}
+
+/* Get the value of h-sys-eear7. */
+
+USI
+or1k32bf_h_sys_eear7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR7 ();
+}
+
+/* Set a value for h-sys-eear7. */
+
+void
+or1k32bf_h_sys_eear7_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR7 (newval);
+}
+
+/* Get the value of h-sys-eear8. */
+
+USI
+or1k32bf_h_sys_eear8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR8 ();
+}
+
+/* Set a value for h-sys-eear8. */
+
+void
+or1k32bf_h_sys_eear8_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR8 (newval);
+}
+
+/* Get the value of h-sys-eear9. */
+
+USI
+or1k32bf_h_sys_eear9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR9 ();
+}
+
+/* Set a value for h-sys-eear9. */
+
+void
+or1k32bf_h_sys_eear9_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR9 (newval);
+}
+
+/* Get the value of h-sys-eear10. */
+
+USI
+or1k32bf_h_sys_eear10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR10 ();
+}
+
+/* Set a value for h-sys-eear10. */
+
+void
+or1k32bf_h_sys_eear10_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR10 (newval);
+}
+
+/* Get the value of h-sys-eear11. */
+
+USI
+or1k32bf_h_sys_eear11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR11 ();
+}
+
+/* Set a value for h-sys-eear11. */
+
+void
+or1k32bf_h_sys_eear11_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR11 (newval);
+}
+
+/* Get the value of h-sys-eear12. */
+
+USI
+or1k32bf_h_sys_eear12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR12 ();
+}
+
+/* Set a value for h-sys-eear12. */
+
+void
+or1k32bf_h_sys_eear12_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR12 (newval);
+}
+
+/* Get the value of h-sys-eear13. */
+
+USI
+or1k32bf_h_sys_eear13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR13 ();
+}
+
+/* Set a value for h-sys-eear13. */
+
+void
+or1k32bf_h_sys_eear13_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR13 (newval);
+}
+
+/* Get the value of h-sys-eear14. */
+
+USI
+or1k32bf_h_sys_eear14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR14 ();
+}
+
+/* Set a value for h-sys-eear14. */
+
+void
+or1k32bf_h_sys_eear14_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR14 (newval);
+}
+
+/* Get the value of h-sys-eear15. */
+
+USI
+or1k32bf_h_sys_eear15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR15 ();
+}
+
+/* Set a value for h-sys-eear15. */
+
+void
+or1k32bf_h_sys_eear15_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_EEAR15 (newval);
+}
+
+/* Get the value of h-sys-esr0. */
+
+USI
+or1k32bf_h_sys_esr0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR0 ();
+}
+
+/* Set a value for h-sys-esr0. */
+
+void
+or1k32bf_h_sys_esr0_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR0 (newval);
+}
+
+/* Get the value of h-sys-esr1. */
+
+USI
+or1k32bf_h_sys_esr1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR1 ();
+}
+
+/* Set a value for h-sys-esr1. */
+
+void
+or1k32bf_h_sys_esr1_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR1 (newval);
+}
+
+/* Get the value of h-sys-esr2. */
+
+USI
+or1k32bf_h_sys_esr2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR2 ();
+}
+
+/* Set a value for h-sys-esr2. */
+
+void
+or1k32bf_h_sys_esr2_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR2 (newval);
+}
+
+/* Get the value of h-sys-esr3. */
+
+USI
+or1k32bf_h_sys_esr3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR3 ();
+}
+
+/* Set a value for h-sys-esr3. */
+
+void
+or1k32bf_h_sys_esr3_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR3 (newval);
+}
+
+/* Get the value of h-sys-esr4. */
+
+USI
+or1k32bf_h_sys_esr4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR4 ();
+}
+
+/* Set a value for h-sys-esr4. */
+
+void
+or1k32bf_h_sys_esr4_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR4 (newval);
+}
+
+/* Get the value of h-sys-esr5. */
+
+USI
+or1k32bf_h_sys_esr5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR5 ();
+}
+
+/* Set a value for h-sys-esr5. */
+
+void
+or1k32bf_h_sys_esr5_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR5 (newval);
+}
+
+/* Get the value of h-sys-esr6. */
+
+USI
+or1k32bf_h_sys_esr6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR6 ();
+}
+
+/* Set a value for h-sys-esr6. */
+
+void
+or1k32bf_h_sys_esr6_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR6 (newval);
+}
+
+/* Get the value of h-sys-esr7. */
+
+USI
+or1k32bf_h_sys_esr7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR7 ();
+}
+
+/* Set a value for h-sys-esr7. */
+
+void
+or1k32bf_h_sys_esr7_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR7 (newval);
+}
+
+/* Get the value of h-sys-esr8. */
+
+USI
+or1k32bf_h_sys_esr8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR8 ();
+}
+
+/* Set a value for h-sys-esr8. */
+
+void
+or1k32bf_h_sys_esr8_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR8 (newval);
+}
+
+/* Get the value of h-sys-esr9. */
+
+USI
+or1k32bf_h_sys_esr9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR9 ();
+}
+
+/* Set a value for h-sys-esr9. */
+
+void
+or1k32bf_h_sys_esr9_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR9 (newval);
+}
+
+/* Get the value of h-sys-esr10. */
+
+USI
+or1k32bf_h_sys_esr10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR10 ();
+}
+
+/* Set a value for h-sys-esr10. */
+
+void
+or1k32bf_h_sys_esr10_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR10 (newval);
+}
+
+/* Get the value of h-sys-esr11. */
+
+USI
+or1k32bf_h_sys_esr11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR11 ();
+}
+
+/* Set a value for h-sys-esr11. */
+
+void
+or1k32bf_h_sys_esr11_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR11 (newval);
+}
+
+/* Get the value of h-sys-esr12. */
+
+USI
+or1k32bf_h_sys_esr12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR12 ();
+}
+
+/* Set a value for h-sys-esr12. */
+
+void
+or1k32bf_h_sys_esr12_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR12 (newval);
+}
+
+/* Get the value of h-sys-esr13. */
+
+USI
+or1k32bf_h_sys_esr13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR13 ();
+}
+
+/* Set a value for h-sys-esr13. */
+
+void
+or1k32bf_h_sys_esr13_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR13 (newval);
+}
+
+/* Get the value of h-sys-esr14. */
+
+USI
+or1k32bf_h_sys_esr14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR14 ();
+}
+
+/* Set a value for h-sys-esr14. */
+
+void
+or1k32bf_h_sys_esr14_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR14 (newval);
+}
+
+/* Get the value of h-sys-esr15. */
+
+USI
+or1k32bf_h_sys_esr15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR15 ();
+}
+
+/* Set a value for h-sys-esr15. */
+
+void
+or1k32bf_h_sys_esr15_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_ESR15 (newval);
+}
+
+/* Get the value of h-sys-gpr0. */
+
+USI
+or1k32bf_h_sys_gpr0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR0 ();
+}
+
+/* Set a value for h-sys-gpr0. */
+
+void
+or1k32bf_h_sys_gpr0_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR0 (newval);
+}
+
+/* Get the value of h-sys-gpr1. */
+
+USI
+or1k32bf_h_sys_gpr1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR1 ();
+}
+
+/* Set a value for h-sys-gpr1. */
+
+void
+or1k32bf_h_sys_gpr1_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR1 (newval);
+}
+
+/* Get the value of h-sys-gpr2. */
+
+USI
+or1k32bf_h_sys_gpr2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR2 ();
+}
+
+/* Set a value for h-sys-gpr2. */
+
+void
+or1k32bf_h_sys_gpr2_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR2 (newval);
+}
+
+/* Get the value of h-sys-gpr3. */
+
+USI
+or1k32bf_h_sys_gpr3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR3 ();
+}
+
+/* Set a value for h-sys-gpr3. */
+
+void
+or1k32bf_h_sys_gpr3_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR3 (newval);
+}
+
+/* Get the value of h-sys-gpr4. */
+
+USI
+or1k32bf_h_sys_gpr4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR4 ();
+}
+
+/* Set a value for h-sys-gpr4. */
+
+void
+or1k32bf_h_sys_gpr4_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR4 (newval);
+}
+
+/* Get the value of h-sys-gpr5. */
+
+USI
+or1k32bf_h_sys_gpr5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR5 ();
+}
+
+/* Set a value for h-sys-gpr5. */
+
+void
+or1k32bf_h_sys_gpr5_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR5 (newval);
+}
+
+/* Get the value of h-sys-gpr6. */
+
+USI
+or1k32bf_h_sys_gpr6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR6 ();
+}
+
+/* Set a value for h-sys-gpr6. */
+
+void
+or1k32bf_h_sys_gpr6_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR6 (newval);
+}
+
+/* Get the value of h-sys-gpr7. */
+
+USI
+or1k32bf_h_sys_gpr7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR7 ();
+}
+
+/* Set a value for h-sys-gpr7. */
+
+void
+or1k32bf_h_sys_gpr7_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR7 (newval);
+}
+
+/* Get the value of h-sys-gpr8. */
+
+USI
+or1k32bf_h_sys_gpr8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR8 ();
+}
+
+/* Set a value for h-sys-gpr8. */
+
+void
+or1k32bf_h_sys_gpr8_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR8 (newval);
+}
+
+/* Get the value of h-sys-gpr9. */
+
+USI
+or1k32bf_h_sys_gpr9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR9 ();
+}
+
+/* Set a value for h-sys-gpr9. */
+
+void
+or1k32bf_h_sys_gpr9_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR9 (newval);
+}
+
+/* Get the value of h-sys-gpr10. */
+
+USI
+or1k32bf_h_sys_gpr10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR10 ();
+}
+
+/* Set a value for h-sys-gpr10. */
+
+void
+or1k32bf_h_sys_gpr10_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR10 (newval);
+}
+
+/* Get the value of h-sys-gpr11. */
+
+USI
+or1k32bf_h_sys_gpr11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR11 ();
+}
+
+/* Set a value for h-sys-gpr11. */
+
+void
+or1k32bf_h_sys_gpr11_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR11 (newval);
+}
+
+/* Get the value of h-sys-gpr12. */
+
+USI
+or1k32bf_h_sys_gpr12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR12 ();
+}
+
+/* Set a value for h-sys-gpr12. */
+
+void
+or1k32bf_h_sys_gpr12_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR12 (newval);
+}
+
+/* Get the value of h-sys-gpr13. */
+
+USI
+or1k32bf_h_sys_gpr13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR13 ();
+}
+
+/* Set a value for h-sys-gpr13. */
+
+void
+or1k32bf_h_sys_gpr13_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR13 (newval);
+}
+
+/* Get the value of h-sys-gpr14. */
+
+USI
+or1k32bf_h_sys_gpr14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR14 ();
+}
+
+/* Set a value for h-sys-gpr14. */
+
+void
+or1k32bf_h_sys_gpr14_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR14 (newval);
+}
+
+/* Get the value of h-sys-gpr15. */
+
+USI
+or1k32bf_h_sys_gpr15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR15 ();
+}
+
+/* Set a value for h-sys-gpr15. */
+
+void
+or1k32bf_h_sys_gpr15_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR15 (newval);
+}
+
+/* Get the value of h-sys-gpr16. */
+
+USI
+or1k32bf_h_sys_gpr16_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR16 ();
+}
+
+/* Set a value for h-sys-gpr16. */
+
+void
+or1k32bf_h_sys_gpr16_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR16 (newval);
+}
+
+/* Get the value of h-sys-gpr17. */
+
+USI
+or1k32bf_h_sys_gpr17_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR17 ();
+}
+
+/* Set a value for h-sys-gpr17. */
+
+void
+or1k32bf_h_sys_gpr17_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR17 (newval);
+}
+
+/* Get the value of h-sys-gpr18. */
+
+USI
+or1k32bf_h_sys_gpr18_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR18 ();
+}
+
+/* Set a value for h-sys-gpr18. */
+
+void
+or1k32bf_h_sys_gpr18_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR18 (newval);
+}
+
+/* Get the value of h-sys-gpr19. */
+
+USI
+or1k32bf_h_sys_gpr19_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR19 ();
+}
+
+/* Set a value for h-sys-gpr19. */
+
+void
+or1k32bf_h_sys_gpr19_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR19 (newval);
+}
+
+/* Get the value of h-sys-gpr20. */
+
+USI
+or1k32bf_h_sys_gpr20_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR20 ();
+}
+
+/* Set a value for h-sys-gpr20. */
+
+void
+or1k32bf_h_sys_gpr20_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR20 (newval);
+}
+
+/* Get the value of h-sys-gpr21. */
+
+USI
+or1k32bf_h_sys_gpr21_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR21 ();
+}
+
+/* Set a value for h-sys-gpr21. */
+
+void
+or1k32bf_h_sys_gpr21_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR21 (newval);
+}
+
+/* Get the value of h-sys-gpr22. */
+
+USI
+or1k32bf_h_sys_gpr22_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR22 ();
+}
+
+/* Set a value for h-sys-gpr22. */
+
+void
+or1k32bf_h_sys_gpr22_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR22 (newval);
+}
+
+/* Get the value of h-sys-gpr23. */
+
+USI
+or1k32bf_h_sys_gpr23_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR23 ();
+}
+
+/* Set a value for h-sys-gpr23. */
+
+void
+or1k32bf_h_sys_gpr23_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR23 (newval);
+}
+
+/* Get the value of h-sys-gpr24. */
+
+USI
+or1k32bf_h_sys_gpr24_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR24 ();
+}
+
+/* Set a value for h-sys-gpr24. */
+
+void
+or1k32bf_h_sys_gpr24_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR24 (newval);
+}
+
+/* Get the value of h-sys-gpr25. */
+
+USI
+or1k32bf_h_sys_gpr25_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR25 ();
+}
+
+/* Set a value for h-sys-gpr25. */
+
+void
+or1k32bf_h_sys_gpr25_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR25 (newval);
+}
+
+/* Get the value of h-sys-gpr26. */
+
+USI
+or1k32bf_h_sys_gpr26_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR26 ();
+}
+
+/* Set a value for h-sys-gpr26. */
+
+void
+or1k32bf_h_sys_gpr26_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR26 (newval);
+}
+
+/* Get the value of h-sys-gpr27. */
+
+USI
+or1k32bf_h_sys_gpr27_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR27 ();
+}
+
+/* Set a value for h-sys-gpr27. */
+
+void
+or1k32bf_h_sys_gpr27_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR27 (newval);
+}
+
+/* Get the value of h-sys-gpr28. */
+
+USI
+or1k32bf_h_sys_gpr28_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR28 ();
+}
+
+/* Set a value for h-sys-gpr28. */
+
+void
+or1k32bf_h_sys_gpr28_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR28 (newval);
+}
+
+/* Get the value of h-sys-gpr29. */
+
+USI
+or1k32bf_h_sys_gpr29_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR29 ();
+}
+
+/* Set a value for h-sys-gpr29. */
+
+void
+or1k32bf_h_sys_gpr29_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR29 (newval);
+}
+
+/* Get the value of h-sys-gpr30. */
+
+USI
+or1k32bf_h_sys_gpr30_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR30 ();
+}
+
+/* Set a value for h-sys-gpr30. */
+
+void
+or1k32bf_h_sys_gpr30_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR30 (newval);
+}
+
+/* Get the value of h-sys-gpr31. */
+
+USI
+or1k32bf_h_sys_gpr31_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR31 ();
+}
+
+/* Set a value for h-sys-gpr31. */
+
+void
+or1k32bf_h_sys_gpr31_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR31 (newval);
+}
+
+/* Get the value of h-sys-gpr32. */
+
+USI
+or1k32bf_h_sys_gpr32_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR32 ();
+}
+
+/* Set a value for h-sys-gpr32. */
+
+void
+or1k32bf_h_sys_gpr32_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR32 (newval);
+}
+
+/* Get the value of h-sys-gpr33. */
+
+USI
+or1k32bf_h_sys_gpr33_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR33 ();
+}
+
+/* Set a value for h-sys-gpr33. */
+
+void
+or1k32bf_h_sys_gpr33_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR33 (newval);
+}
+
+/* Get the value of h-sys-gpr34. */
+
+USI
+or1k32bf_h_sys_gpr34_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR34 ();
+}
+
+/* Set a value for h-sys-gpr34. */
+
+void
+or1k32bf_h_sys_gpr34_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR34 (newval);
+}
+
+/* Get the value of h-sys-gpr35. */
+
+USI
+or1k32bf_h_sys_gpr35_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR35 ();
+}
+
+/* Set a value for h-sys-gpr35. */
+
+void
+or1k32bf_h_sys_gpr35_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR35 (newval);
+}
+
+/* Get the value of h-sys-gpr36. */
+
+USI
+or1k32bf_h_sys_gpr36_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR36 ();
+}
+
+/* Set a value for h-sys-gpr36. */
+
+void
+or1k32bf_h_sys_gpr36_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR36 (newval);
+}
+
+/* Get the value of h-sys-gpr37. */
+
+USI
+or1k32bf_h_sys_gpr37_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR37 ();
+}
+
+/* Set a value for h-sys-gpr37. */
+
+void
+or1k32bf_h_sys_gpr37_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR37 (newval);
+}
+
+/* Get the value of h-sys-gpr38. */
+
+USI
+or1k32bf_h_sys_gpr38_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR38 ();
+}
+
+/* Set a value for h-sys-gpr38. */
+
+void
+or1k32bf_h_sys_gpr38_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR38 (newval);
+}
+
+/* Get the value of h-sys-gpr39. */
+
+USI
+or1k32bf_h_sys_gpr39_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR39 ();
+}
+
+/* Set a value for h-sys-gpr39. */
+
+void
+or1k32bf_h_sys_gpr39_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR39 (newval);
+}
+
+/* Get the value of h-sys-gpr40. */
+
+USI
+or1k32bf_h_sys_gpr40_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR40 ();
+}
+
+/* Set a value for h-sys-gpr40. */
+
+void
+or1k32bf_h_sys_gpr40_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR40 (newval);
+}
+
+/* Get the value of h-sys-gpr41. */
+
+USI
+or1k32bf_h_sys_gpr41_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR41 ();
+}
+
+/* Set a value for h-sys-gpr41. */
+
+void
+or1k32bf_h_sys_gpr41_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR41 (newval);
+}
+
+/* Get the value of h-sys-gpr42. */
+
+USI
+or1k32bf_h_sys_gpr42_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR42 ();
+}
+
+/* Set a value for h-sys-gpr42. */
+
+void
+or1k32bf_h_sys_gpr42_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR42 (newval);
+}
+
+/* Get the value of h-sys-gpr43. */
+
+USI
+or1k32bf_h_sys_gpr43_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR43 ();
+}
+
+/* Set a value for h-sys-gpr43. */
+
+void
+or1k32bf_h_sys_gpr43_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR43 (newval);
+}
+
+/* Get the value of h-sys-gpr44. */
+
+USI
+or1k32bf_h_sys_gpr44_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR44 ();
+}
+
+/* Set a value for h-sys-gpr44. */
+
+void
+or1k32bf_h_sys_gpr44_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR44 (newval);
+}
+
+/* Get the value of h-sys-gpr45. */
+
+USI
+or1k32bf_h_sys_gpr45_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR45 ();
+}
+
+/* Set a value for h-sys-gpr45. */
+
+void
+or1k32bf_h_sys_gpr45_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR45 (newval);
+}
+
+/* Get the value of h-sys-gpr46. */
+
+USI
+or1k32bf_h_sys_gpr46_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR46 ();
+}
+
+/* Set a value for h-sys-gpr46. */
+
+void
+or1k32bf_h_sys_gpr46_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR46 (newval);
+}
+
+/* Get the value of h-sys-gpr47. */
+
+USI
+or1k32bf_h_sys_gpr47_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR47 ();
+}
+
+/* Set a value for h-sys-gpr47. */
+
+void
+or1k32bf_h_sys_gpr47_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR47 (newval);
+}
+
+/* Get the value of h-sys-gpr48. */
+
+USI
+or1k32bf_h_sys_gpr48_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR48 ();
+}
+
+/* Set a value for h-sys-gpr48. */
+
+void
+or1k32bf_h_sys_gpr48_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR48 (newval);
+}
+
+/* Get the value of h-sys-gpr49. */
+
+USI
+or1k32bf_h_sys_gpr49_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR49 ();
+}
+
+/* Set a value for h-sys-gpr49. */
+
+void
+or1k32bf_h_sys_gpr49_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR49 (newval);
+}
+
+/* Get the value of h-sys-gpr50. */
+
+USI
+or1k32bf_h_sys_gpr50_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR50 ();
+}
+
+/* Set a value for h-sys-gpr50. */
+
+void
+or1k32bf_h_sys_gpr50_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR50 (newval);
+}
+
+/* Get the value of h-sys-gpr51. */
+
+USI
+or1k32bf_h_sys_gpr51_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR51 ();
+}
+
+/* Set a value for h-sys-gpr51. */
+
+void
+or1k32bf_h_sys_gpr51_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR51 (newval);
+}
+
+/* Get the value of h-sys-gpr52. */
+
+USI
+or1k32bf_h_sys_gpr52_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR52 ();
+}
+
+/* Set a value for h-sys-gpr52. */
+
+void
+or1k32bf_h_sys_gpr52_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR52 (newval);
+}
+
+/* Get the value of h-sys-gpr53. */
+
+USI
+or1k32bf_h_sys_gpr53_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR53 ();
+}
+
+/* Set a value for h-sys-gpr53. */
+
+void
+or1k32bf_h_sys_gpr53_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR53 (newval);
+}
+
+/* Get the value of h-sys-gpr54. */
+
+USI
+or1k32bf_h_sys_gpr54_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR54 ();
+}
+
+/* Set a value for h-sys-gpr54. */
+
+void
+or1k32bf_h_sys_gpr54_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR54 (newval);
+}
+
+/* Get the value of h-sys-gpr55. */
+
+USI
+or1k32bf_h_sys_gpr55_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR55 ();
+}
+
+/* Set a value for h-sys-gpr55. */
+
+void
+or1k32bf_h_sys_gpr55_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR55 (newval);
+}
+
+/* Get the value of h-sys-gpr56. */
+
+USI
+or1k32bf_h_sys_gpr56_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR56 ();
+}
+
+/* Set a value for h-sys-gpr56. */
+
+void
+or1k32bf_h_sys_gpr56_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR56 (newval);
+}
+
+/* Get the value of h-sys-gpr57. */
+
+USI
+or1k32bf_h_sys_gpr57_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR57 ();
+}
+
+/* Set a value for h-sys-gpr57. */
+
+void
+or1k32bf_h_sys_gpr57_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR57 (newval);
+}
+
+/* Get the value of h-sys-gpr58. */
+
+USI
+or1k32bf_h_sys_gpr58_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR58 ();
+}
+
+/* Set a value for h-sys-gpr58. */
+
+void
+or1k32bf_h_sys_gpr58_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR58 (newval);
+}
+
+/* Get the value of h-sys-gpr59. */
+
+USI
+or1k32bf_h_sys_gpr59_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR59 ();
+}
+
+/* Set a value for h-sys-gpr59. */
+
+void
+or1k32bf_h_sys_gpr59_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR59 (newval);
+}
+
+/* Get the value of h-sys-gpr60. */
+
+USI
+or1k32bf_h_sys_gpr60_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR60 ();
+}
+
+/* Set a value for h-sys-gpr60. */
+
+void
+or1k32bf_h_sys_gpr60_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR60 (newval);
+}
+
+/* Get the value of h-sys-gpr61. */
+
+USI
+or1k32bf_h_sys_gpr61_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR61 ();
+}
+
+/* Set a value for h-sys-gpr61. */
+
+void
+or1k32bf_h_sys_gpr61_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR61 (newval);
+}
+
+/* Get the value of h-sys-gpr62. */
+
+USI
+or1k32bf_h_sys_gpr62_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR62 ();
+}
+
+/* Set a value for h-sys-gpr62. */
+
+void
+or1k32bf_h_sys_gpr62_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR62 (newval);
+}
+
+/* Get the value of h-sys-gpr63. */
+
+USI
+or1k32bf_h_sys_gpr63_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR63 ();
+}
+
+/* Set a value for h-sys-gpr63. */
+
+void
+or1k32bf_h_sys_gpr63_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR63 (newval);
+}
+
+/* Get the value of h-sys-gpr64. */
+
+USI
+or1k32bf_h_sys_gpr64_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR64 ();
+}
+
+/* Set a value for h-sys-gpr64. */
+
+void
+or1k32bf_h_sys_gpr64_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR64 (newval);
+}
+
+/* Get the value of h-sys-gpr65. */
+
+USI
+or1k32bf_h_sys_gpr65_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR65 ();
+}
+
+/* Set a value for h-sys-gpr65. */
+
+void
+or1k32bf_h_sys_gpr65_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR65 (newval);
+}
+
+/* Get the value of h-sys-gpr66. */
+
+USI
+or1k32bf_h_sys_gpr66_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR66 ();
+}
+
+/* Set a value for h-sys-gpr66. */
+
+void
+or1k32bf_h_sys_gpr66_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR66 (newval);
+}
+
+/* Get the value of h-sys-gpr67. */
+
+USI
+or1k32bf_h_sys_gpr67_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR67 ();
+}
+
+/* Set a value for h-sys-gpr67. */
+
+void
+or1k32bf_h_sys_gpr67_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR67 (newval);
+}
+
+/* Get the value of h-sys-gpr68. */
+
+USI
+or1k32bf_h_sys_gpr68_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR68 ();
+}
+
+/* Set a value for h-sys-gpr68. */
+
+void
+or1k32bf_h_sys_gpr68_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR68 (newval);
+}
+
+/* Get the value of h-sys-gpr69. */
+
+USI
+or1k32bf_h_sys_gpr69_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR69 ();
+}
+
+/* Set a value for h-sys-gpr69. */
+
+void
+or1k32bf_h_sys_gpr69_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR69 (newval);
+}
+
+/* Get the value of h-sys-gpr70. */
+
+USI
+or1k32bf_h_sys_gpr70_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR70 ();
+}
+
+/* Set a value for h-sys-gpr70. */
+
+void
+or1k32bf_h_sys_gpr70_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR70 (newval);
+}
+
+/* Get the value of h-sys-gpr71. */
+
+USI
+or1k32bf_h_sys_gpr71_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR71 ();
+}
+
+/* Set a value for h-sys-gpr71. */
+
+void
+or1k32bf_h_sys_gpr71_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR71 (newval);
+}
+
+/* Get the value of h-sys-gpr72. */
+
+USI
+or1k32bf_h_sys_gpr72_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR72 ();
+}
+
+/* Set a value for h-sys-gpr72. */
+
+void
+or1k32bf_h_sys_gpr72_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR72 (newval);
+}
+
+/* Get the value of h-sys-gpr73. */
+
+USI
+or1k32bf_h_sys_gpr73_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR73 ();
+}
+
+/* Set a value for h-sys-gpr73. */
+
+void
+or1k32bf_h_sys_gpr73_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR73 (newval);
+}
+
+/* Get the value of h-sys-gpr74. */
+
+USI
+or1k32bf_h_sys_gpr74_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR74 ();
+}
+
+/* Set a value for h-sys-gpr74. */
+
+void
+or1k32bf_h_sys_gpr74_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR74 (newval);
+}
+
+/* Get the value of h-sys-gpr75. */
+
+USI
+or1k32bf_h_sys_gpr75_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR75 ();
+}
+
+/* Set a value for h-sys-gpr75. */
+
+void
+or1k32bf_h_sys_gpr75_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR75 (newval);
+}
+
+/* Get the value of h-sys-gpr76. */
+
+USI
+or1k32bf_h_sys_gpr76_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR76 ();
+}
+
+/* Set a value for h-sys-gpr76. */
+
+void
+or1k32bf_h_sys_gpr76_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR76 (newval);
+}
+
+/* Get the value of h-sys-gpr77. */
+
+USI
+or1k32bf_h_sys_gpr77_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR77 ();
+}
+
+/* Set a value for h-sys-gpr77. */
+
+void
+or1k32bf_h_sys_gpr77_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR77 (newval);
+}
+
+/* Get the value of h-sys-gpr78. */
+
+USI
+or1k32bf_h_sys_gpr78_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR78 ();
+}
+
+/* Set a value for h-sys-gpr78. */
+
+void
+or1k32bf_h_sys_gpr78_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR78 (newval);
+}
+
+/* Get the value of h-sys-gpr79. */
+
+USI
+or1k32bf_h_sys_gpr79_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR79 ();
+}
+
+/* Set a value for h-sys-gpr79. */
+
+void
+or1k32bf_h_sys_gpr79_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR79 (newval);
+}
+
+/* Get the value of h-sys-gpr80. */
+
+USI
+or1k32bf_h_sys_gpr80_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR80 ();
+}
+
+/* Set a value for h-sys-gpr80. */
+
+void
+or1k32bf_h_sys_gpr80_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR80 (newval);
+}
+
+/* Get the value of h-sys-gpr81. */
+
+USI
+or1k32bf_h_sys_gpr81_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR81 ();
+}
+
+/* Set a value for h-sys-gpr81. */
+
+void
+or1k32bf_h_sys_gpr81_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR81 (newval);
+}
+
+/* Get the value of h-sys-gpr82. */
+
+USI
+or1k32bf_h_sys_gpr82_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR82 ();
+}
+
+/* Set a value for h-sys-gpr82. */
+
+void
+or1k32bf_h_sys_gpr82_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR82 (newval);
+}
+
+/* Get the value of h-sys-gpr83. */
+
+USI
+or1k32bf_h_sys_gpr83_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR83 ();
+}
+
+/* Set a value for h-sys-gpr83. */
+
+void
+or1k32bf_h_sys_gpr83_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR83 (newval);
+}
+
+/* Get the value of h-sys-gpr84. */
+
+USI
+or1k32bf_h_sys_gpr84_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR84 ();
+}
+
+/* Set a value for h-sys-gpr84. */
+
+void
+or1k32bf_h_sys_gpr84_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR84 (newval);
+}
+
+/* Get the value of h-sys-gpr85. */
+
+USI
+or1k32bf_h_sys_gpr85_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR85 ();
+}
+
+/* Set a value for h-sys-gpr85. */
+
+void
+or1k32bf_h_sys_gpr85_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR85 (newval);
+}
+
+/* Get the value of h-sys-gpr86. */
+
+USI
+or1k32bf_h_sys_gpr86_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR86 ();
+}
+
+/* Set a value for h-sys-gpr86. */
+
+void
+or1k32bf_h_sys_gpr86_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR86 (newval);
+}
+
+/* Get the value of h-sys-gpr87. */
+
+USI
+or1k32bf_h_sys_gpr87_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR87 ();
+}
+
+/* Set a value for h-sys-gpr87. */
+
+void
+or1k32bf_h_sys_gpr87_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR87 (newval);
+}
+
+/* Get the value of h-sys-gpr88. */
+
+USI
+or1k32bf_h_sys_gpr88_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR88 ();
+}
+
+/* Set a value for h-sys-gpr88. */
+
+void
+or1k32bf_h_sys_gpr88_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR88 (newval);
+}
+
+/* Get the value of h-sys-gpr89. */
+
+USI
+or1k32bf_h_sys_gpr89_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR89 ();
+}
+
+/* Set a value for h-sys-gpr89. */
+
+void
+or1k32bf_h_sys_gpr89_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR89 (newval);
+}
+
+/* Get the value of h-sys-gpr90. */
+
+USI
+or1k32bf_h_sys_gpr90_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR90 ();
+}
+
+/* Set a value for h-sys-gpr90. */
+
+void
+or1k32bf_h_sys_gpr90_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR90 (newval);
+}
+
+/* Get the value of h-sys-gpr91. */
+
+USI
+or1k32bf_h_sys_gpr91_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR91 ();
+}
+
+/* Set a value for h-sys-gpr91. */
+
+void
+or1k32bf_h_sys_gpr91_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR91 (newval);
+}
+
+/* Get the value of h-sys-gpr92. */
+
+USI
+or1k32bf_h_sys_gpr92_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR92 ();
+}
+
+/* Set a value for h-sys-gpr92. */
+
+void
+or1k32bf_h_sys_gpr92_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR92 (newval);
+}
+
+/* Get the value of h-sys-gpr93. */
+
+USI
+or1k32bf_h_sys_gpr93_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR93 ();
+}
+
+/* Set a value for h-sys-gpr93. */
+
+void
+or1k32bf_h_sys_gpr93_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR93 (newval);
+}
+
+/* Get the value of h-sys-gpr94. */
+
+USI
+or1k32bf_h_sys_gpr94_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR94 ();
+}
+
+/* Set a value for h-sys-gpr94. */
+
+void
+or1k32bf_h_sys_gpr94_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR94 (newval);
+}
+
+/* Get the value of h-sys-gpr95. */
+
+USI
+or1k32bf_h_sys_gpr95_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR95 ();
+}
+
+/* Set a value for h-sys-gpr95. */
+
+void
+or1k32bf_h_sys_gpr95_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR95 (newval);
+}
+
+/* Get the value of h-sys-gpr96. */
+
+USI
+or1k32bf_h_sys_gpr96_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR96 ();
+}
+
+/* Set a value for h-sys-gpr96. */
+
+void
+or1k32bf_h_sys_gpr96_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR96 (newval);
+}
+
+/* Get the value of h-sys-gpr97. */
+
+USI
+or1k32bf_h_sys_gpr97_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR97 ();
+}
+
+/* Set a value for h-sys-gpr97. */
+
+void
+or1k32bf_h_sys_gpr97_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR97 (newval);
+}
+
+/* Get the value of h-sys-gpr98. */
+
+USI
+or1k32bf_h_sys_gpr98_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR98 ();
+}
+
+/* Set a value for h-sys-gpr98. */
+
+void
+or1k32bf_h_sys_gpr98_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR98 (newval);
+}
+
+/* Get the value of h-sys-gpr99. */
+
+USI
+or1k32bf_h_sys_gpr99_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR99 ();
+}
+
+/* Set a value for h-sys-gpr99. */
+
+void
+or1k32bf_h_sys_gpr99_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR99 (newval);
+}
+
+/* Get the value of h-sys-gpr100. */
+
+USI
+or1k32bf_h_sys_gpr100_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR100 ();
+}
+
+/* Set a value for h-sys-gpr100. */
+
+void
+or1k32bf_h_sys_gpr100_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR100 (newval);
+}
+
+/* Get the value of h-sys-gpr101. */
+
+USI
+or1k32bf_h_sys_gpr101_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR101 ();
+}
+
+/* Set a value for h-sys-gpr101. */
+
+void
+or1k32bf_h_sys_gpr101_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR101 (newval);
+}
+
+/* Get the value of h-sys-gpr102. */
+
+USI
+or1k32bf_h_sys_gpr102_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR102 ();
+}
+
+/* Set a value for h-sys-gpr102. */
+
+void
+or1k32bf_h_sys_gpr102_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR102 (newval);
+}
+
+/* Get the value of h-sys-gpr103. */
+
+USI
+or1k32bf_h_sys_gpr103_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR103 ();
+}
+
+/* Set a value for h-sys-gpr103. */
+
+void
+or1k32bf_h_sys_gpr103_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR103 (newval);
+}
+
+/* Get the value of h-sys-gpr104. */
+
+USI
+or1k32bf_h_sys_gpr104_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR104 ();
+}
+
+/* Set a value for h-sys-gpr104. */
+
+void
+or1k32bf_h_sys_gpr104_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR104 (newval);
+}
+
+/* Get the value of h-sys-gpr105. */
+
+USI
+or1k32bf_h_sys_gpr105_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR105 ();
+}
+
+/* Set a value for h-sys-gpr105. */
+
+void
+or1k32bf_h_sys_gpr105_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR105 (newval);
+}
+
+/* Get the value of h-sys-gpr106. */
+
+USI
+or1k32bf_h_sys_gpr106_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR106 ();
+}
+
+/* Set a value for h-sys-gpr106. */
+
+void
+or1k32bf_h_sys_gpr106_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR106 (newval);
+}
+
+/* Get the value of h-sys-gpr107. */
+
+USI
+or1k32bf_h_sys_gpr107_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR107 ();
+}
+
+/* Set a value for h-sys-gpr107. */
+
+void
+or1k32bf_h_sys_gpr107_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR107 (newval);
+}
+
+/* Get the value of h-sys-gpr108. */
+
+USI
+or1k32bf_h_sys_gpr108_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR108 ();
+}
+
+/* Set a value for h-sys-gpr108. */
+
+void
+or1k32bf_h_sys_gpr108_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR108 (newval);
+}
+
+/* Get the value of h-sys-gpr109. */
+
+USI
+or1k32bf_h_sys_gpr109_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR109 ();
+}
+
+/* Set a value for h-sys-gpr109. */
+
+void
+or1k32bf_h_sys_gpr109_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR109 (newval);
+}
+
+/* Get the value of h-sys-gpr110. */
+
+USI
+or1k32bf_h_sys_gpr110_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR110 ();
+}
+
+/* Set a value for h-sys-gpr110. */
+
+void
+or1k32bf_h_sys_gpr110_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR110 (newval);
+}
+
+/* Get the value of h-sys-gpr111. */
+
+USI
+or1k32bf_h_sys_gpr111_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR111 ();
+}
+
+/* Set a value for h-sys-gpr111. */
+
+void
+or1k32bf_h_sys_gpr111_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR111 (newval);
+}
+
+/* Get the value of h-sys-gpr112. */
+
+USI
+or1k32bf_h_sys_gpr112_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR112 ();
+}
+
+/* Set a value for h-sys-gpr112. */
+
+void
+or1k32bf_h_sys_gpr112_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR112 (newval);
+}
+
+/* Get the value of h-sys-gpr113. */
+
+USI
+or1k32bf_h_sys_gpr113_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR113 ();
+}
+
+/* Set a value for h-sys-gpr113. */
+
+void
+or1k32bf_h_sys_gpr113_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR113 (newval);
+}
+
+/* Get the value of h-sys-gpr114. */
+
+USI
+or1k32bf_h_sys_gpr114_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR114 ();
+}
+
+/* Set a value for h-sys-gpr114. */
+
+void
+or1k32bf_h_sys_gpr114_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR114 (newval);
+}
+
+/* Get the value of h-sys-gpr115. */
+
+USI
+or1k32bf_h_sys_gpr115_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR115 ();
+}
+
+/* Set a value for h-sys-gpr115. */
+
+void
+or1k32bf_h_sys_gpr115_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR115 (newval);
+}
+
+/* Get the value of h-sys-gpr116. */
+
+USI
+or1k32bf_h_sys_gpr116_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR116 ();
+}
+
+/* Set a value for h-sys-gpr116. */
+
+void
+or1k32bf_h_sys_gpr116_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR116 (newval);
+}
+
+/* Get the value of h-sys-gpr117. */
+
+USI
+or1k32bf_h_sys_gpr117_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR117 ();
+}
+
+/* Set a value for h-sys-gpr117. */
+
+void
+or1k32bf_h_sys_gpr117_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR117 (newval);
+}
+
+/* Get the value of h-sys-gpr118. */
+
+USI
+or1k32bf_h_sys_gpr118_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR118 ();
+}
+
+/* Set a value for h-sys-gpr118. */
+
+void
+or1k32bf_h_sys_gpr118_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR118 (newval);
+}
+
+/* Get the value of h-sys-gpr119. */
+
+USI
+or1k32bf_h_sys_gpr119_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR119 ();
+}
+
+/* Set a value for h-sys-gpr119. */
+
+void
+or1k32bf_h_sys_gpr119_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR119 (newval);
+}
+
+/* Get the value of h-sys-gpr120. */
+
+USI
+or1k32bf_h_sys_gpr120_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR120 ();
+}
+
+/* Set a value for h-sys-gpr120. */
+
+void
+or1k32bf_h_sys_gpr120_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR120 (newval);
+}
+
+/* Get the value of h-sys-gpr121. */
+
+USI
+or1k32bf_h_sys_gpr121_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR121 ();
+}
+
+/* Set a value for h-sys-gpr121. */
+
+void
+or1k32bf_h_sys_gpr121_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR121 (newval);
+}
+
+/* Get the value of h-sys-gpr122. */
+
+USI
+or1k32bf_h_sys_gpr122_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR122 ();
+}
+
+/* Set a value for h-sys-gpr122. */
+
+void
+or1k32bf_h_sys_gpr122_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR122 (newval);
+}
+
+/* Get the value of h-sys-gpr123. */
+
+USI
+or1k32bf_h_sys_gpr123_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR123 ();
+}
+
+/* Set a value for h-sys-gpr123. */
+
+void
+or1k32bf_h_sys_gpr123_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR123 (newval);
+}
+
+/* Get the value of h-sys-gpr124. */
+
+USI
+or1k32bf_h_sys_gpr124_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR124 ();
+}
+
+/* Set a value for h-sys-gpr124. */
+
+void
+or1k32bf_h_sys_gpr124_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR124 (newval);
+}
+
+/* Get the value of h-sys-gpr125. */
+
+USI
+or1k32bf_h_sys_gpr125_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR125 ();
+}
+
+/* Set a value for h-sys-gpr125. */
+
+void
+or1k32bf_h_sys_gpr125_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR125 (newval);
+}
+
+/* Get the value of h-sys-gpr126. */
+
+USI
+or1k32bf_h_sys_gpr126_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR126 ();
+}
+
+/* Set a value for h-sys-gpr126. */
+
+void
+or1k32bf_h_sys_gpr126_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR126 (newval);
+}
+
+/* Get the value of h-sys-gpr127. */
+
+USI
+or1k32bf_h_sys_gpr127_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR127 ();
+}
+
+/* Set a value for h-sys-gpr127. */
+
+void
+or1k32bf_h_sys_gpr127_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR127 (newval);
+}
+
+/* Get the value of h-sys-gpr128. */
+
+USI
+or1k32bf_h_sys_gpr128_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR128 ();
+}
+
+/* Set a value for h-sys-gpr128. */
+
+void
+or1k32bf_h_sys_gpr128_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR128 (newval);
+}
+
+/* Get the value of h-sys-gpr129. */
+
+USI
+or1k32bf_h_sys_gpr129_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR129 ();
+}
+
+/* Set a value for h-sys-gpr129. */
+
+void
+or1k32bf_h_sys_gpr129_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR129 (newval);
+}
+
+/* Get the value of h-sys-gpr130. */
+
+USI
+or1k32bf_h_sys_gpr130_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR130 ();
+}
+
+/* Set a value for h-sys-gpr130. */
+
+void
+or1k32bf_h_sys_gpr130_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR130 (newval);
+}
+
+/* Get the value of h-sys-gpr131. */
+
+USI
+or1k32bf_h_sys_gpr131_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR131 ();
+}
+
+/* Set a value for h-sys-gpr131. */
+
+void
+or1k32bf_h_sys_gpr131_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR131 (newval);
+}
+
+/* Get the value of h-sys-gpr132. */
+
+USI
+or1k32bf_h_sys_gpr132_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR132 ();
+}
+
+/* Set a value for h-sys-gpr132. */
+
+void
+or1k32bf_h_sys_gpr132_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR132 (newval);
+}
+
+/* Get the value of h-sys-gpr133. */
+
+USI
+or1k32bf_h_sys_gpr133_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR133 ();
+}
+
+/* Set a value for h-sys-gpr133. */
+
+void
+or1k32bf_h_sys_gpr133_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR133 (newval);
+}
+
+/* Get the value of h-sys-gpr134. */
+
+USI
+or1k32bf_h_sys_gpr134_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR134 ();
+}
+
+/* Set a value for h-sys-gpr134. */
+
+void
+or1k32bf_h_sys_gpr134_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR134 (newval);
+}
+
+/* Get the value of h-sys-gpr135. */
+
+USI
+or1k32bf_h_sys_gpr135_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR135 ();
+}
+
+/* Set a value for h-sys-gpr135. */
+
+void
+or1k32bf_h_sys_gpr135_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR135 (newval);
+}
+
+/* Get the value of h-sys-gpr136. */
+
+USI
+or1k32bf_h_sys_gpr136_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR136 ();
+}
+
+/* Set a value for h-sys-gpr136. */
+
+void
+or1k32bf_h_sys_gpr136_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR136 (newval);
+}
+
+/* Get the value of h-sys-gpr137. */
+
+USI
+or1k32bf_h_sys_gpr137_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR137 ();
+}
+
+/* Set a value for h-sys-gpr137. */
+
+void
+or1k32bf_h_sys_gpr137_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR137 (newval);
+}
+
+/* Get the value of h-sys-gpr138. */
+
+USI
+or1k32bf_h_sys_gpr138_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR138 ();
+}
+
+/* Set a value for h-sys-gpr138. */
+
+void
+or1k32bf_h_sys_gpr138_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR138 (newval);
+}
+
+/* Get the value of h-sys-gpr139. */
+
+USI
+or1k32bf_h_sys_gpr139_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR139 ();
+}
+
+/* Set a value for h-sys-gpr139. */
+
+void
+or1k32bf_h_sys_gpr139_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR139 (newval);
+}
+
+/* Get the value of h-sys-gpr140. */
+
+USI
+or1k32bf_h_sys_gpr140_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR140 ();
+}
+
+/* Set a value for h-sys-gpr140. */
+
+void
+or1k32bf_h_sys_gpr140_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR140 (newval);
+}
+
+/* Get the value of h-sys-gpr141. */
+
+USI
+or1k32bf_h_sys_gpr141_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR141 ();
+}
+
+/* Set a value for h-sys-gpr141. */
+
+void
+or1k32bf_h_sys_gpr141_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR141 (newval);
+}
+
+/* Get the value of h-sys-gpr142. */
+
+USI
+or1k32bf_h_sys_gpr142_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR142 ();
+}
+
+/* Set a value for h-sys-gpr142. */
+
+void
+or1k32bf_h_sys_gpr142_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR142 (newval);
+}
+
+/* Get the value of h-sys-gpr143. */
+
+USI
+or1k32bf_h_sys_gpr143_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR143 ();
+}
+
+/* Set a value for h-sys-gpr143. */
+
+void
+or1k32bf_h_sys_gpr143_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR143 (newval);
+}
+
+/* Get the value of h-sys-gpr144. */
+
+USI
+or1k32bf_h_sys_gpr144_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR144 ();
+}
+
+/* Set a value for h-sys-gpr144. */
+
+void
+or1k32bf_h_sys_gpr144_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR144 (newval);
+}
+
+/* Get the value of h-sys-gpr145. */
+
+USI
+or1k32bf_h_sys_gpr145_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR145 ();
+}
+
+/* Set a value for h-sys-gpr145. */
+
+void
+or1k32bf_h_sys_gpr145_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR145 (newval);
+}
+
+/* Get the value of h-sys-gpr146. */
+
+USI
+or1k32bf_h_sys_gpr146_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR146 ();
+}
+
+/* Set a value for h-sys-gpr146. */
+
+void
+or1k32bf_h_sys_gpr146_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR146 (newval);
+}
+
+/* Get the value of h-sys-gpr147. */
+
+USI
+or1k32bf_h_sys_gpr147_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR147 ();
+}
+
+/* Set a value for h-sys-gpr147. */
+
+void
+or1k32bf_h_sys_gpr147_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR147 (newval);
+}
+
+/* Get the value of h-sys-gpr148. */
+
+USI
+or1k32bf_h_sys_gpr148_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR148 ();
+}
+
+/* Set a value for h-sys-gpr148. */
+
+void
+or1k32bf_h_sys_gpr148_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR148 (newval);
+}
+
+/* Get the value of h-sys-gpr149. */
+
+USI
+or1k32bf_h_sys_gpr149_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR149 ();
+}
+
+/* Set a value for h-sys-gpr149. */
+
+void
+or1k32bf_h_sys_gpr149_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR149 (newval);
+}
+
+/* Get the value of h-sys-gpr150. */
+
+USI
+or1k32bf_h_sys_gpr150_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR150 ();
+}
+
+/* Set a value for h-sys-gpr150. */
+
+void
+or1k32bf_h_sys_gpr150_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR150 (newval);
+}
+
+/* Get the value of h-sys-gpr151. */
+
+USI
+or1k32bf_h_sys_gpr151_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR151 ();
+}
+
+/* Set a value for h-sys-gpr151. */
+
+void
+or1k32bf_h_sys_gpr151_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR151 (newval);
+}
+
+/* Get the value of h-sys-gpr152. */
+
+USI
+or1k32bf_h_sys_gpr152_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR152 ();
+}
+
+/* Set a value for h-sys-gpr152. */
+
+void
+or1k32bf_h_sys_gpr152_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR152 (newval);
+}
+
+/* Get the value of h-sys-gpr153. */
+
+USI
+or1k32bf_h_sys_gpr153_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR153 ();
+}
+
+/* Set a value for h-sys-gpr153. */
+
+void
+or1k32bf_h_sys_gpr153_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR153 (newval);
+}
+
+/* Get the value of h-sys-gpr154. */
+
+USI
+or1k32bf_h_sys_gpr154_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR154 ();
+}
+
+/* Set a value for h-sys-gpr154. */
+
+void
+or1k32bf_h_sys_gpr154_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR154 (newval);
+}
+
+/* Get the value of h-sys-gpr155. */
+
+USI
+or1k32bf_h_sys_gpr155_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR155 ();
+}
+
+/* Set a value for h-sys-gpr155. */
+
+void
+or1k32bf_h_sys_gpr155_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR155 (newval);
+}
+
+/* Get the value of h-sys-gpr156. */
+
+USI
+or1k32bf_h_sys_gpr156_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR156 ();
+}
+
+/* Set a value for h-sys-gpr156. */
+
+void
+or1k32bf_h_sys_gpr156_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR156 (newval);
+}
+
+/* Get the value of h-sys-gpr157. */
+
+USI
+or1k32bf_h_sys_gpr157_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR157 ();
+}
+
+/* Set a value for h-sys-gpr157. */
+
+void
+or1k32bf_h_sys_gpr157_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR157 (newval);
+}
+
+/* Get the value of h-sys-gpr158. */
+
+USI
+or1k32bf_h_sys_gpr158_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR158 ();
+}
+
+/* Set a value for h-sys-gpr158. */
+
+void
+or1k32bf_h_sys_gpr158_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR158 (newval);
+}
+
+/* Get the value of h-sys-gpr159. */
+
+USI
+or1k32bf_h_sys_gpr159_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR159 ();
+}
+
+/* Set a value for h-sys-gpr159. */
+
+void
+or1k32bf_h_sys_gpr159_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR159 (newval);
+}
+
+/* Get the value of h-sys-gpr160. */
+
+USI
+or1k32bf_h_sys_gpr160_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR160 ();
+}
+
+/* Set a value for h-sys-gpr160. */
+
+void
+or1k32bf_h_sys_gpr160_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR160 (newval);
+}
+
+/* Get the value of h-sys-gpr161. */
+
+USI
+or1k32bf_h_sys_gpr161_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR161 ();
+}
+
+/* Set a value for h-sys-gpr161. */
+
+void
+or1k32bf_h_sys_gpr161_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR161 (newval);
+}
+
+/* Get the value of h-sys-gpr162. */
+
+USI
+or1k32bf_h_sys_gpr162_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR162 ();
+}
+
+/* Set a value for h-sys-gpr162. */
+
+void
+or1k32bf_h_sys_gpr162_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR162 (newval);
+}
+
+/* Get the value of h-sys-gpr163. */
+
+USI
+or1k32bf_h_sys_gpr163_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR163 ();
+}
+
+/* Set a value for h-sys-gpr163. */
+
+void
+or1k32bf_h_sys_gpr163_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR163 (newval);
+}
+
+/* Get the value of h-sys-gpr164. */
+
+USI
+or1k32bf_h_sys_gpr164_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR164 ();
+}
+
+/* Set a value for h-sys-gpr164. */
+
+void
+or1k32bf_h_sys_gpr164_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR164 (newval);
+}
+
+/* Get the value of h-sys-gpr165. */
+
+USI
+or1k32bf_h_sys_gpr165_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR165 ();
+}
+
+/* Set a value for h-sys-gpr165. */
+
+void
+or1k32bf_h_sys_gpr165_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR165 (newval);
+}
+
+/* Get the value of h-sys-gpr166. */
+
+USI
+or1k32bf_h_sys_gpr166_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR166 ();
+}
+
+/* Set a value for h-sys-gpr166. */
+
+void
+or1k32bf_h_sys_gpr166_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR166 (newval);
+}
+
+/* Get the value of h-sys-gpr167. */
+
+USI
+or1k32bf_h_sys_gpr167_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR167 ();
+}
+
+/* Set a value for h-sys-gpr167. */
+
+void
+or1k32bf_h_sys_gpr167_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR167 (newval);
+}
+
+/* Get the value of h-sys-gpr168. */
+
+USI
+or1k32bf_h_sys_gpr168_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR168 ();
+}
+
+/* Set a value for h-sys-gpr168. */
+
+void
+or1k32bf_h_sys_gpr168_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR168 (newval);
+}
+
+/* Get the value of h-sys-gpr169. */
+
+USI
+or1k32bf_h_sys_gpr169_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR169 ();
+}
+
+/* Set a value for h-sys-gpr169. */
+
+void
+or1k32bf_h_sys_gpr169_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR169 (newval);
+}
+
+/* Get the value of h-sys-gpr170. */
+
+USI
+or1k32bf_h_sys_gpr170_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR170 ();
+}
+
+/* Set a value for h-sys-gpr170. */
+
+void
+or1k32bf_h_sys_gpr170_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR170 (newval);
+}
+
+/* Get the value of h-sys-gpr171. */
+
+USI
+or1k32bf_h_sys_gpr171_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR171 ();
+}
+
+/* Set a value for h-sys-gpr171. */
+
+void
+or1k32bf_h_sys_gpr171_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR171 (newval);
+}
+
+/* Get the value of h-sys-gpr172. */
+
+USI
+or1k32bf_h_sys_gpr172_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR172 ();
+}
+
+/* Set a value for h-sys-gpr172. */
+
+void
+or1k32bf_h_sys_gpr172_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR172 (newval);
+}
+
+/* Get the value of h-sys-gpr173. */
+
+USI
+or1k32bf_h_sys_gpr173_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR173 ();
+}
+
+/* Set a value for h-sys-gpr173. */
+
+void
+or1k32bf_h_sys_gpr173_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR173 (newval);
+}
+
+/* Get the value of h-sys-gpr174. */
+
+USI
+or1k32bf_h_sys_gpr174_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR174 ();
+}
+
+/* Set a value for h-sys-gpr174. */
+
+void
+or1k32bf_h_sys_gpr174_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR174 (newval);
+}
+
+/* Get the value of h-sys-gpr175. */
+
+USI
+or1k32bf_h_sys_gpr175_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR175 ();
+}
+
+/* Set a value for h-sys-gpr175. */
+
+void
+or1k32bf_h_sys_gpr175_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR175 (newval);
+}
+
+/* Get the value of h-sys-gpr176. */
+
+USI
+or1k32bf_h_sys_gpr176_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR176 ();
+}
+
+/* Set a value for h-sys-gpr176. */
+
+void
+or1k32bf_h_sys_gpr176_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR176 (newval);
+}
+
+/* Get the value of h-sys-gpr177. */
+
+USI
+or1k32bf_h_sys_gpr177_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR177 ();
+}
+
+/* Set a value for h-sys-gpr177. */
+
+void
+or1k32bf_h_sys_gpr177_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR177 (newval);
+}
+
+/* Get the value of h-sys-gpr178. */
+
+USI
+or1k32bf_h_sys_gpr178_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR178 ();
+}
+
+/* Set a value for h-sys-gpr178. */
+
+void
+or1k32bf_h_sys_gpr178_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR178 (newval);
+}
+
+/* Get the value of h-sys-gpr179. */
+
+USI
+or1k32bf_h_sys_gpr179_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR179 ();
+}
+
+/* Set a value for h-sys-gpr179. */
+
+void
+or1k32bf_h_sys_gpr179_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR179 (newval);
+}
+
+/* Get the value of h-sys-gpr180. */
+
+USI
+or1k32bf_h_sys_gpr180_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR180 ();
+}
+
+/* Set a value for h-sys-gpr180. */
+
+void
+or1k32bf_h_sys_gpr180_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR180 (newval);
+}
+
+/* Get the value of h-sys-gpr181. */
+
+USI
+or1k32bf_h_sys_gpr181_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR181 ();
+}
+
+/* Set a value for h-sys-gpr181. */
+
+void
+or1k32bf_h_sys_gpr181_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR181 (newval);
+}
+
+/* Get the value of h-sys-gpr182. */
+
+USI
+or1k32bf_h_sys_gpr182_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR182 ();
+}
+
+/* Set a value for h-sys-gpr182. */
+
+void
+or1k32bf_h_sys_gpr182_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR182 (newval);
+}
+
+/* Get the value of h-sys-gpr183. */
+
+USI
+or1k32bf_h_sys_gpr183_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR183 ();
+}
+
+/* Set a value for h-sys-gpr183. */
+
+void
+or1k32bf_h_sys_gpr183_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR183 (newval);
+}
+
+/* Get the value of h-sys-gpr184. */
+
+USI
+or1k32bf_h_sys_gpr184_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR184 ();
+}
+
+/* Set a value for h-sys-gpr184. */
+
+void
+or1k32bf_h_sys_gpr184_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR184 (newval);
+}
+
+/* Get the value of h-sys-gpr185. */
+
+USI
+or1k32bf_h_sys_gpr185_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR185 ();
+}
+
+/* Set a value for h-sys-gpr185. */
+
+void
+or1k32bf_h_sys_gpr185_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR185 (newval);
+}
+
+/* Get the value of h-sys-gpr186. */
+
+USI
+or1k32bf_h_sys_gpr186_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR186 ();
+}
+
+/* Set a value for h-sys-gpr186. */
+
+void
+or1k32bf_h_sys_gpr186_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR186 (newval);
+}
+
+/* Get the value of h-sys-gpr187. */
+
+USI
+or1k32bf_h_sys_gpr187_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR187 ();
+}
+
+/* Set a value for h-sys-gpr187. */
+
+void
+or1k32bf_h_sys_gpr187_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR187 (newval);
+}
+
+/* Get the value of h-sys-gpr188. */
+
+USI
+or1k32bf_h_sys_gpr188_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR188 ();
+}
+
+/* Set a value for h-sys-gpr188. */
+
+void
+or1k32bf_h_sys_gpr188_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR188 (newval);
+}
+
+/* Get the value of h-sys-gpr189. */
+
+USI
+or1k32bf_h_sys_gpr189_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR189 ();
+}
+
+/* Set a value for h-sys-gpr189. */
+
+void
+or1k32bf_h_sys_gpr189_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR189 (newval);
+}
+
+/* Get the value of h-sys-gpr190. */
+
+USI
+or1k32bf_h_sys_gpr190_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR190 ();
+}
+
+/* Set a value for h-sys-gpr190. */
+
+void
+or1k32bf_h_sys_gpr190_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR190 (newval);
+}
+
+/* Get the value of h-sys-gpr191. */
+
+USI
+or1k32bf_h_sys_gpr191_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR191 ();
+}
+
+/* Set a value for h-sys-gpr191. */
+
+void
+or1k32bf_h_sys_gpr191_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR191 (newval);
+}
+
+/* Get the value of h-sys-gpr192. */
+
+USI
+or1k32bf_h_sys_gpr192_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR192 ();
+}
+
+/* Set a value for h-sys-gpr192. */
+
+void
+or1k32bf_h_sys_gpr192_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR192 (newval);
+}
+
+/* Get the value of h-sys-gpr193. */
+
+USI
+or1k32bf_h_sys_gpr193_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR193 ();
+}
+
+/* Set a value for h-sys-gpr193. */
+
+void
+or1k32bf_h_sys_gpr193_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR193 (newval);
+}
+
+/* Get the value of h-sys-gpr194. */
+
+USI
+or1k32bf_h_sys_gpr194_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR194 ();
+}
+
+/* Set a value for h-sys-gpr194. */
+
+void
+or1k32bf_h_sys_gpr194_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR194 (newval);
+}
+
+/* Get the value of h-sys-gpr195. */
+
+USI
+or1k32bf_h_sys_gpr195_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR195 ();
+}
+
+/* Set a value for h-sys-gpr195. */
+
+void
+or1k32bf_h_sys_gpr195_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR195 (newval);
+}
+
+/* Get the value of h-sys-gpr196. */
+
+USI
+or1k32bf_h_sys_gpr196_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR196 ();
+}
+
+/* Set a value for h-sys-gpr196. */
+
+void
+or1k32bf_h_sys_gpr196_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR196 (newval);
+}
+
+/* Get the value of h-sys-gpr197. */
+
+USI
+or1k32bf_h_sys_gpr197_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR197 ();
+}
+
+/* Set a value for h-sys-gpr197. */
+
+void
+or1k32bf_h_sys_gpr197_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR197 (newval);
+}
+
+/* Get the value of h-sys-gpr198. */
+
+USI
+or1k32bf_h_sys_gpr198_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR198 ();
+}
+
+/* Set a value for h-sys-gpr198. */
+
+void
+or1k32bf_h_sys_gpr198_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR198 (newval);
+}
+
+/* Get the value of h-sys-gpr199. */
+
+USI
+or1k32bf_h_sys_gpr199_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR199 ();
+}
+
+/* Set a value for h-sys-gpr199. */
+
+void
+or1k32bf_h_sys_gpr199_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR199 (newval);
+}
+
+/* Get the value of h-sys-gpr200. */
+
+USI
+or1k32bf_h_sys_gpr200_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR200 ();
+}
+
+/* Set a value for h-sys-gpr200. */
+
+void
+or1k32bf_h_sys_gpr200_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR200 (newval);
+}
+
+/* Get the value of h-sys-gpr201. */
+
+USI
+or1k32bf_h_sys_gpr201_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR201 ();
+}
+
+/* Set a value for h-sys-gpr201. */
+
+void
+or1k32bf_h_sys_gpr201_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR201 (newval);
+}
+
+/* Get the value of h-sys-gpr202. */
+
+USI
+or1k32bf_h_sys_gpr202_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR202 ();
+}
+
+/* Set a value for h-sys-gpr202. */
+
+void
+or1k32bf_h_sys_gpr202_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR202 (newval);
+}
+
+/* Get the value of h-sys-gpr203. */
+
+USI
+or1k32bf_h_sys_gpr203_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR203 ();
+}
+
+/* Set a value for h-sys-gpr203. */
+
+void
+or1k32bf_h_sys_gpr203_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR203 (newval);
+}
+
+/* Get the value of h-sys-gpr204. */
+
+USI
+or1k32bf_h_sys_gpr204_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR204 ();
+}
+
+/* Set a value for h-sys-gpr204. */
+
+void
+or1k32bf_h_sys_gpr204_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR204 (newval);
+}
+
+/* Get the value of h-sys-gpr205. */
+
+USI
+or1k32bf_h_sys_gpr205_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR205 ();
+}
+
+/* Set a value for h-sys-gpr205. */
+
+void
+or1k32bf_h_sys_gpr205_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR205 (newval);
+}
+
+/* Get the value of h-sys-gpr206. */
+
+USI
+or1k32bf_h_sys_gpr206_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR206 ();
+}
+
+/* Set a value for h-sys-gpr206. */
+
+void
+or1k32bf_h_sys_gpr206_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR206 (newval);
+}
+
+/* Get the value of h-sys-gpr207. */
+
+USI
+or1k32bf_h_sys_gpr207_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR207 ();
+}
+
+/* Set a value for h-sys-gpr207. */
+
+void
+or1k32bf_h_sys_gpr207_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR207 (newval);
+}
+
+/* Get the value of h-sys-gpr208. */
+
+USI
+or1k32bf_h_sys_gpr208_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR208 ();
+}
+
+/* Set a value for h-sys-gpr208. */
+
+void
+or1k32bf_h_sys_gpr208_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR208 (newval);
+}
+
+/* Get the value of h-sys-gpr209. */
+
+USI
+or1k32bf_h_sys_gpr209_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR209 ();
+}
+
+/* Set a value for h-sys-gpr209. */
+
+void
+or1k32bf_h_sys_gpr209_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR209 (newval);
+}
+
+/* Get the value of h-sys-gpr210. */
+
+USI
+or1k32bf_h_sys_gpr210_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR210 ();
+}
+
+/* Set a value for h-sys-gpr210. */
+
+void
+or1k32bf_h_sys_gpr210_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR210 (newval);
+}
+
+/* Get the value of h-sys-gpr211. */
+
+USI
+or1k32bf_h_sys_gpr211_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR211 ();
+}
+
+/* Set a value for h-sys-gpr211. */
+
+void
+or1k32bf_h_sys_gpr211_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR211 (newval);
+}
+
+/* Get the value of h-sys-gpr212. */
+
+USI
+or1k32bf_h_sys_gpr212_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR212 ();
+}
+
+/* Set a value for h-sys-gpr212. */
+
+void
+or1k32bf_h_sys_gpr212_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR212 (newval);
+}
+
+/* Get the value of h-sys-gpr213. */
+
+USI
+or1k32bf_h_sys_gpr213_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR213 ();
+}
+
+/* Set a value for h-sys-gpr213. */
+
+void
+or1k32bf_h_sys_gpr213_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR213 (newval);
+}
+
+/* Get the value of h-sys-gpr214. */
+
+USI
+or1k32bf_h_sys_gpr214_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR214 ();
+}
+
+/* Set a value for h-sys-gpr214. */
+
+void
+or1k32bf_h_sys_gpr214_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR214 (newval);
+}
+
+/* Get the value of h-sys-gpr215. */
+
+USI
+or1k32bf_h_sys_gpr215_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR215 ();
+}
+
+/* Set a value for h-sys-gpr215. */
+
+void
+or1k32bf_h_sys_gpr215_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR215 (newval);
+}
+
+/* Get the value of h-sys-gpr216. */
+
+USI
+or1k32bf_h_sys_gpr216_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR216 ();
+}
+
+/* Set a value for h-sys-gpr216. */
+
+void
+or1k32bf_h_sys_gpr216_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR216 (newval);
+}
+
+/* Get the value of h-sys-gpr217. */
+
+USI
+or1k32bf_h_sys_gpr217_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR217 ();
+}
+
+/* Set a value for h-sys-gpr217. */
+
+void
+or1k32bf_h_sys_gpr217_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR217 (newval);
+}
+
+/* Get the value of h-sys-gpr218. */
+
+USI
+or1k32bf_h_sys_gpr218_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR218 ();
+}
+
+/* Set a value for h-sys-gpr218. */
+
+void
+or1k32bf_h_sys_gpr218_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR218 (newval);
+}
+
+/* Get the value of h-sys-gpr219. */
+
+USI
+or1k32bf_h_sys_gpr219_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR219 ();
+}
+
+/* Set a value for h-sys-gpr219. */
+
+void
+or1k32bf_h_sys_gpr219_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR219 (newval);
+}
+
+/* Get the value of h-sys-gpr220. */
+
+USI
+or1k32bf_h_sys_gpr220_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR220 ();
+}
+
+/* Set a value for h-sys-gpr220. */
+
+void
+or1k32bf_h_sys_gpr220_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR220 (newval);
+}
+
+/* Get the value of h-sys-gpr221. */
+
+USI
+or1k32bf_h_sys_gpr221_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR221 ();
+}
+
+/* Set a value for h-sys-gpr221. */
+
+void
+or1k32bf_h_sys_gpr221_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR221 (newval);
+}
+
+/* Get the value of h-sys-gpr222. */
+
+USI
+or1k32bf_h_sys_gpr222_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR222 ();
+}
+
+/* Set a value for h-sys-gpr222. */
+
+void
+or1k32bf_h_sys_gpr222_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR222 (newval);
+}
+
+/* Get the value of h-sys-gpr223. */
+
+USI
+or1k32bf_h_sys_gpr223_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR223 ();
+}
+
+/* Set a value for h-sys-gpr223. */
+
+void
+or1k32bf_h_sys_gpr223_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR223 (newval);
+}
+
+/* Get the value of h-sys-gpr224. */
+
+USI
+or1k32bf_h_sys_gpr224_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR224 ();
+}
+
+/* Set a value for h-sys-gpr224. */
+
+void
+or1k32bf_h_sys_gpr224_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR224 (newval);
+}
+
+/* Get the value of h-sys-gpr225. */
+
+USI
+or1k32bf_h_sys_gpr225_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR225 ();
+}
+
+/* Set a value for h-sys-gpr225. */
+
+void
+or1k32bf_h_sys_gpr225_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR225 (newval);
+}
+
+/* Get the value of h-sys-gpr226. */
+
+USI
+or1k32bf_h_sys_gpr226_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR226 ();
+}
+
+/* Set a value for h-sys-gpr226. */
+
+void
+or1k32bf_h_sys_gpr226_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR226 (newval);
+}
+
+/* Get the value of h-sys-gpr227. */
+
+USI
+or1k32bf_h_sys_gpr227_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR227 ();
+}
+
+/* Set a value for h-sys-gpr227. */
+
+void
+or1k32bf_h_sys_gpr227_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR227 (newval);
+}
+
+/* Get the value of h-sys-gpr228. */
+
+USI
+or1k32bf_h_sys_gpr228_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR228 ();
+}
+
+/* Set a value for h-sys-gpr228. */
+
+void
+or1k32bf_h_sys_gpr228_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR228 (newval);
+}
+
+/* Get the value of h-sys-gpr229. */
+
+USI
+or1k32bf_h_sys_gpr229_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR229 ();
+}
+
+/* Set a value for h-sys-gpr229. */
+
+void
+or1k32bf_h_sys_gpr229_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR229 (newval);
+}
+
+/* Get the value of h-sys-gpr230. */
+
+USI
+or1k32bf_h_sys_gpr230_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR230 ();
+}
+
+/* Set a value for h-sys-gpr230. */
+
+void
+or1k32bf_h_sys_gpr230_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR230 (newval);
+}
+
+/* Get the value of h-sys-gpr231. */
+
+USI
+or1k32bf_h_sys_gpr231_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR231 ();
+}
+
+/* Set a value for h-sys-gpr231. */
+
+void
+or1k32bf_h_sys_gpr231_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR231 (newval);
+}
+
+/* Get the value of h-sys-gpr232. */
+
+USI
+or1k32bf_h_sys_gpr232_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR232 ();
+}
+
+/* Set a value for h-sys-gpr232. */
+
+void
+or1k32bf_h_sys_gpr232_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR232 (newval);
+}
+
+/* Get the value of h-sys-gpr233. */
+
+USI
+or1k32bf_h_sys_gpr233_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR233 ();
+}
+
+/* Set a value for h-sys-gpr233. */
+
+void
+or1k32bf_h_sys_gpr233_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR233 (newval);
+}
+
+/* Get the value of h-sys-gpr234. */
+
+USI
+or1k32bf_h_sys_gpr234_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR234 ();
+}
+
+/* Set a value for h-sys-gpr234. */
+
+void
+or1k32bf_h_sys_gpr234_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR234 (newval);
+}
+
+/* Get the value of h-sys-gpr235. */
+
+USI
+or1k32bf_h_sys_gpr235_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR235 ();
+}
+
+/* Set a value for h-sys-gpr235. */
+
+void
+or1k32bf_h_sys_gpr235_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR235 (newval);
+}
+
+/* Get the value of h-sys-gpr236. */
+
+USI
+or1k32bf_h_sys_gpr236_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR236 ();
+}
+
+/* Set a value for h-sys-gpr236. */
+
+void
+or1k32bf_h_sys_gpr236_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR236 (newval);
+}
+
+/* Get the value of h-sys-gpr237. */
+
+USI
+or1k32bf_h_sys_gpr237_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR237 ();
+}
+
+/* Set a value for h-sys-gpr237. */
+
+void
+or1k32bf_h_sys_gpr237_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR237 (newval);
+}
+
+/* Get the value of h-sys-gpr238. */
+
+USI
+or1k32bf_h_sys_gpr238_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR238 ();
+}
+
+/* Set a value for h-sys-gpr238. */
+
+void
+or1k32bf_h_sys_gpr238_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR238 (newval);
+}
+
+/* Get the value of h-sys-gpr239. */
+
+USI
+or1k32bf_h_sys_gpr239_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR239 ();
+}
+
+/* Set a value for h-sys-gpr239. */
+
+void
+or1k32bf_h_sys_gpr239_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR239 (newval);
+}
+
+/* Get the value of h-sys-gpr240. */
+
+USI
+or1k32bf_h_sys_gpr240_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR240 ();
+}
+
+/* Set a value for h-sys-gpr240. */
+
+void
+or1k32bf_h_sys_gpr240_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR240 (newval);
+}
+
+/* Get the value of h-sys-gpr241. */
+
+USI
+or1k32bf_h_sys_gpr241_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR241 ();
+}
+
+/* Set a value for h-sys-gpr241. */
+
+void
+or1k32bf_h_sys_gpr241_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR241 (newval);
+}
+
+/* Get the value of h-sys-gpr242. */
+
+USI
+or1k32bf_h_sys_gpr242_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR242 ();
+}
+
+/* Set a value for h-sys-gpr242. */
+
+void
+or1k32bf_h_sys_gpr242_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR242 (newval);
+}
+
+/* Get the value of h-sys-gpr243. */
+
+USI
+or1k32bf_h_sys_gpr243_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR243 ();
+}
+
+/* Set a value for h-sys-gpr243. */
+
+void
+or1k32bf_h_sys_gpr243_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR243 (newval);
+}
+
+/* Get the value of h-sys-gpr244. */
+
+USI
+or1k32bf_h_sys_gpr244_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR244 ();
+}
+
+/* Set a value for h-sys-gpr244. */
+
+void
+or1k32bf_h_sys_gpr244_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR244 (newval);
+}
+
+/* Get the value of h-sys-gpr245. */
+
+USI
+or1k32bf_h_sys_gpr245_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR245 ();
+}
+
+/* Set a value for h-sys-gpr245. */
+
+void
+or1k32bf_h_sys_gpr245_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR245 (newval);
+}
+
+/* Get the value of h-sys-gpr246. */
+
+USI
+or1k32bf_h_sys_gpr246_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR246 ();
+}
+
+/* Set a value for h-sys-gpr246. */
+
+void
+or1k32bf_h_sys_gpr246_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR246 (newval);
+}
+
+/* Get the value of h-sys-gpr247. */
+
+USI
+or1k32bf_h_sys_gpr247_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR247 ();
+}
+
+/* Set a value for h-sys-gpr247. */
+
+void
+or1k32bf_h_sys_gpr247_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR247 (newval);
+}
+
+/* Get the value of h-sys-gpr248. */
+
+USI
+or1k32bf_h_sys_gpr248_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR248 ();
+}
+
+/* Set a value for h-sys-gpr248. */
+
+void
+or1k32bf_h_sys_gpr248_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR248 (newval);
+}
+
+/* Get the value of h-sys-gpr249. */
+
+USI
+or1k32bf_h_sys_gpr249_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR249 ();
+}
+
+/* Set a value for h-sys-gpr249. */
+
+void
+or1k32bf_h_sys_gpr249_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR249 (newval);
+}
+
+/* Get the value of h-sys-gpr250. */
+
+USI
+or1k32bf_h_sys_gpr250_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR250 ();
+}
+
+/* Set a value for h-sys-gpr250. */
+
+void
+or1k32bf_h_sys_gpr250_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR250 (newval);
+}
+
+/* Get the value of h-sys-gpr251. */
+
+USI
+or1k32bf_h_sys_gpr251_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR251 ();
+}
+
+/* Set a value for h-sys-gpr251. */
+
+void
+or1k32bf_h_sys_gpr251_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR251 (newval);
+}
+
+/* Get the value of h-sys-gpr252. */
+
+USI
+or1k32bf_h_sys_gpr252_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR252 ();
+}
+
+/* Set a value for h-sys-gpr252. */
+
+void
+or1k32bf_h_sys_gpr252_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR252 (newval);
+}
+
+/* Get the value of h-sys-gpr253. */
+
+USI
+or1k32bf_h_sys_gpr253_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR253 ();
+}
+
+/* Set a value for h-sys-gpr253. */
+
+void
+or1k32bf_h_sys_gpr253_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR253 (newval);
+}
+
+/* Get the value of h-sys-gpr254. */
+
+USI
+or1k32bf_h_sys_gpr254_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR254 ();
+}
+
+/* Set a value for h-sys-gpr254. */
+
+void
+or1k32bf_h_sys_gpr254_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR254 (newval);
+}
+
+/* Get the value of h-sys-gpr255. */
+
+USI
+or1k32bf_h_sys_gpr255_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR255 ();
+}
+
+/* Set a value for h-sys-gpr255. */
+
+void
+or1k32bf_h_sys_gpr255_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR255 (newval);
+}
+
+/* Get the value of h-sys-gpr256. */
+
+USI
+or1k32bf_h_sys_gpr256_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR256 ();
+}
+
+/* Set a value for h-sys-gpr256. */
+
+void
+or1k32bf_h_sys_gpr256_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR256 (newval);
+}
+
+/* Get the value of h-sys-gpr257. */
+
+USI
+or1k32bf_h_sys_gpr257_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR257 ();
+}
+
+/* Set a value for h-sys-gpr257. */
+
+void
+or1k32bf_h_sys_gpr257_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR257 (newval);
+}
+
+/* Get the value of h-sys-gpr258. */
+
+USI
+or1k32bf_h_sys_gpr258_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR258 ();
+}
+
+/* Set a value for h-sys-gpr258. */
+
+void
+or1k32bf_h_sys_gpr258_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR258 (newval);
+}
+
+/* Get the value of h-sys-gpr259. */
+
+USI
+or1k32bf_h_sys_gpr259_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR259 ();
+}
+
+/* Set a value for h-sys-gpr259. */
+
+void
+or1k32bf_h_sys_gpr259_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR259 (newval);
+}
+
+/* Get the value of h-sys-gpr260. */
+
+USI
+or1k32bf_h_sys_gpr260_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR260 ();
+}
+
+/* Set a value for h-sys-gpr260. */
+
+void
+or1k32bf_h_sys_gpr260_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR260 (newval);
+}
+
+/* Get the value of h-sys-gpr261. */
+
+USI
+or1k32bf_h_sys_gpr261_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR261 ();
+}
+
+/* Set a value for h-sys-gpr261. */
+
+void
+or1k32bf_h_sys_gpr261_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR261 (newval);
+}
+
+/* Get the value of h-sys-gpr262. */
+
+USI
+or1k32bf_h_sys_gpr262_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR262 ();
+}
+
+/* Set a value for h-sys-gpr262. */
+
+void
+or1k32bf_h_sys_gpr262_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR262 (newval);
+}
+
+/* Get the value of h-sys-gpr263. */
+
+USI
+or1k32bf_h_sys_gpr263_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR263 ();
+}
+
+/* Set a value for h-sys-gpr263. */
+
+void
+or1k32bf_h_sys_gpr263_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR263 (newval);
+}
+
+/* Get the value of h-sys-gpr264. */
+
+USI
+or1k32bf_h_sys_gpr264_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR264 ();
+}
+
+/* Set a value for h-sys-gpr264. */
+
+void
+or1k32bf_h_sys_gpr264_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR264 (newval);
+}
+
+/* Get the value of h-sys-gpr265. */
+
+USI
+or1k32bf_h_sys_gpr265_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR265 ();
+}
+
+/* Set a value for h-sys-gpr265. */
+
+void
+or1k32bf_h_sys_gpr265_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR265 (newval);
+}
+
+/* Get the value of h-sys-gpr266. */
+
+USI
+or1k32bf_h_sys_gpr266_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR266 ();
+}
+
+/* Set a value for h-sys-gpr266. */
+
+void
+or1k32bf_h_sys_gpr266_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR266 (newval);
+}
+
+/* Get the value of h-sys-gpr267. */
+
+USI
+or1k32bf_h_sys_gpr267_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR267 ();
+}
+
+/* Set a value for h-sys-gpr267. */
+
+void
+or1k32bf_h_sys_gpr267_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR267 (newval);
+}
+
+/* Get the value of h-sys-gpr268. */
+
+USI
+or1k32bf_h_sys_gpr268_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR268 ();
+}
+
+/* Set a value for h-sys-gpr268. */
+
+void
+or1k32bf_h_sys_gpr268_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR268 (newval);
+}
+
+/* Get the value of h-sys-gpr269. */
+
+USI
+or1k32bf_h_sys_gpr269_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR269 ();
+}
+
+/* Set a value for h-sys-gpr269. */
+
+void
+or1k32bf_h_sys_gpr269_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR269 (newval);
+}
+
+/* Get the value of h-sys-gpr270. */
+
+USI
+or1k32bf_h_sys_gpr270_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR270 ();
+}
+
+/* Set a value for h-sys-gpr270. */
+
+void
+or1k32bf_h_sys_gpr270_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR270 (newval);
+}
+
+/* Get the value of h-sys-gpr271. */
+
+USI
+or1k32bf_h_sys_gpr271_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR271 ();
+}
+
+/* Set a value for h-sys-gpr271. */
+
+void
+or1k32bf_h_sys_gpr271_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR271 (newval);
+}
+
+/* Get the value of h-sys-gpr272. */
+
+USI
+or1k32bf_h_sys_gpr272_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR272 ();
+}
+
+/* Set a value for h-sys-gpr272. */
+
+void
+or1k32bf_h_sys_gpr272_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR272 (newval);
+}
+
+/* Get the value of h-sys-gpr273. */
+
+USI
+or1k32bf_h_sys_gpr273_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR273 ();
+}
+
+/* Set a value for h-sys-gpr273. */
+
+void
+or1k32bf_h_sys_gpr273_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR273 (newval);
+}
+
+/* Get the value of h-sys-gpr274. */
+
+USI
+or1k32bf_h_sys_gpr274_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR274 ();
+}
+
+/* Set a value for h-sys-gpr274. */
+
+void
+or1k32bf_h_sys_gpr274_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR274 (newval);
+}
+
+/* Get the value of h-sys-gpr275. */
+
+USI
+or1k32bf_h_sys_gpr275_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR275 ();
+}
+
+/* Set a value for h-sys-gpr275. */
+
+void
+or1k32bf_h_sys_gpr275_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR275 (newval);
+}
+
+/* Get the value of h-sys-gpr276. */
+
+USI
+or1k32bf_h_sys_gpr276_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR276 ();
+}
+
+/* Set a value for h-sys-gpr276. */
+
+void
+or1k32bf_h_sys_gpr276_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR276 (newval);
+}
+
+/* Get the value of h-sys-gpr277. */
+
+USI
+or1k32bf_h_sys_gpr277_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR277 ();
+}
+
+/* Set a value for h-sys-gpr277. */
+
+void
+or1k32bf_h_sys_gpr277_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR277 (newval);
+}
+
+/* Get the value of h-sys-gpr278. */
+
+USI
+or1k32bf_h_sys_gpr278_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR278 ();
+}
+
+/* Set a value for h-sys-gpr278. */
+
+void
+or1k32bf_h_sys_gpr278_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR278 (newval);
+}
+
+/* Get the value of h-sys-gpr279. */
+
+USI
+or1k32bf_h_sys_gpr279_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR279 ();
+}
+
+/* Set a value for h-sys-gpr279. */
+
+void
+or1k32bf_h_sys_gpr279_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR279 (newval);
+}
+
+/* Get the value of h-sys-gpr280. */
+
+USI
+or1k32bf_h_sys_gpr280_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR280 ();
+}
+
+/* Set a value for h-sys-gpr280. */
+
+void
+or1k32bf_h_sys_gpr280_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR280 (newval);
+}
+
+/* Get the value of h-sys-gpr281. */
+
+USI
+or1k32bf_h_sys_gpr281_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR281 ();
+}
+
+/* Set a value for h-sys-gpr281. */
+
+void
+or1k32bf_h_sys_gpr281_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR281 (newval);
+}
+
+/* Get the value of h-sys-gpr282. */
+
+USI
+or1k32bf_h_sys_gpr282_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR282 ();
+}
+
+/* Set a value for h-sys-gpr282. */
+
+void
+or1k32bf_h_sys_gpr282_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR282 (newval);
+}
+
+/* Get the value of h-sys-gpr283. */
+
+USI
+or1k32bf_h_sys_gpr283_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR283 ();
+}
+
+/* Set a value for h-sys-gpr283. */
+
+void
+or1k32bf_h_sys_gpr283_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR283 (newval);
+}
+
+/* Get the value of h-sys-gpr284. */
+
+USI
+or1k32bf_h_sys_gpr284_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR284 ();
+}
+
+/* Set a value for h-sys-gpr284. */
+
+void
+or1k32bf_h_sys_gpr284_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR284 (newval);
+}
+
+/* Get the value of h-sys-gpr285. */
+
+USI
+or1k32bf_h_sys_gpr285_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR285 ();
+}
+
+/* Set a value for h-sys-gpr285. */
+
+void
+or1k32bf_h_sys_gpr285_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR285 (newval);
+}
+
+/* Get the value of h-sys-gpr286. */
+
+USI
+or1k32bf_h_sys_gpr286_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR286 ();
+}
+
+/* Set a value for h-sys-gpr286. */
+
+void
+or1k32bf_h_sys_gpr286_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR286 (newval);
+}
+
+/* Get the value of h-sys-gpr287. */
+
+USI
+or1k32bf_h_sys_gpr287_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR287 ();
+}
+
+/* Set a value for h-sys-gpr287. */
+
+void
+or1k32bf_h_sys_gpr287_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR287 (newval);
+}
+
+/* Get the value of h-sys-gpr288. */
+
+USI
+or1k32bf_h_sys_gpr288_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR288 ();
+}
+
+/* Set a value for h-sys-gpr288. */
+
+void
+or1k32bf_h_sys_gpr288_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR288 (newval);
+}
+
+/* Get the value of h-sys-gpr289. */
+
+USI
+or1k32bf_h_sys_gpr289_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR289 ();
+}
+
+/* Set a value for h-sys-gpr289. */
+
+void
+or1k32bf_h_sys_gpr289_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR289 (newval);
+}
+
+/* Get the value of h-sys-gpr290. */
+
+USI
+or1k32bf_h_sys_gpr290_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR290 ();
+}
+
+/* Set a value for h-sys-gpr290. */
+
+void
+or1k32bf_h_sys_gpr290_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR290 (newval);
+}
+
+/* Get the value of h-sys-gpr291. */
+
+USI
+or1k32bf_h_sys_gpr291_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR291 ();
+}
+
+/* Set a value for h-sys-gpr291. */
+
+void
+or1k32bf_h_sys_gpr291_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR291 (newval);
+}
+
+/* Get the value of h-sys-gpr292. */
+
+USI
+or1k32bf_h_sys_gpr292_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR292 ();
+}
+
+/* Set a value for h-sys-gpr292. */
+
+void
+or1k32bf_h_sys_gpr292_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR292 (newval);
+}
+
+/* Get the value of h-sys-gpr293. */
+
+USI
+or1k32bf_h_sys_gpr293_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR293 ();
+}
+
+/* Set a value for h-sys-gpr293. */
+
+void
+or1k32bf_h_sys_gpr293_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR293 (newval);
+}
+
+/* Get the value of h-sys-gpr294. */
+
+USI
+or1k32bf_h_sys_gpr294_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR294 ();
+}
+
+/* Set a value for h-sys-gpr294. */
+
+void
+or1k32bf_h_sys_gpr294_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR294 (newval);
+}
+
+/* Get the value of h-sys-gpr295. */
+
+USI
+or1k32bf_h_sys_gpr295_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR295 ();
+}
+
+/* Set a value for h-sys-gpr295. */
+
+void
+or1k32bf_h_sys_gpr295_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR295 (newval);
+}
+
+/* Get the value of h-sys-gpr296. */
+
+USI
+or1k32bf_h_sys_gpr296_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR296 ();
+}
+
+/* Set a value for h-sys-gpr296. */
+
+void
+or1k32bf_h_sys_gpr296_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR296 (newval);
+}
+
+/* Get the value of h-sys-gpr297. */
+
+USI
+or1k32bf_h_sys_gpr297_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR297 ();
+}
+
+/* Set a value for h-sys-gpr297. */
+
+void
+or1k32bf_h_sys_gpr297_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR297 (newval);
+}
+
+/* Get the value of h-sys-gpr298. */
+
+USI
+or1k32bf_h_sys_gpr298_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR298 ();
+}
+
+/* Set a value for h-sys-gpr298. */
+
+void
+or1k32bf_h_sys_gpr298_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR298 (newval);
+}
+
+/* Get the value of h-sys-gpr299. */
+
+USI
+or1k32bf_h_sys_gpr299_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR299 ();
+}
+
+/* Set a value for h-sys-gpr299. */
+
+void
+or1k32bf_h_sys_gpr299_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR299 (newval);
+}
+
+/* Get the value of h-sys-gpr300. */
+
+USI
+or1k32bf_h_sys_gpr300_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR300 ();
+}
+
+/* Set a value for h-sys-gpr300. */
+
+void
+or1k32bf_h_sys_gpr300_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR300 (newval);
+}
+
+/* Get the value of h-sys-gpr301. */
+
+USI
+or1k32bf_h_sys_gpr301_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR301 ();
+}
+
+/* Set a value for h-sys-gpr301. */
+
+void
+or1k32bf_h_sys_gpr301_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR301 (newval);
+}
+
+/* Get the value of h-sys-gpr302. */
+
+USI
+or1k32bf_h_sys_gpr302_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR302 ();
+}
+
+/* Set a value for h-sys-gpr302. */
+
+void
+or1k32bf_h_sys_gpr302_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR302 (newval);
+}
+
+/* Get the value of h-sys-gpr303. */
+
+USI
+or1k32bf_h_sys_gpr303_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR303 ();
+}
+
+/* Set a value for h-sys-gpr303. */
+
+void
+or1k32bf_h_sys_gpr303_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR303 (newval);
+}
+
+/* Get the value of h-sys-gpr304. */
+
+USI
+or1k32bf_h_sys_gpr304_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR304 ();
+}
+
+/* Set a value for h-sys-gpr304. */
+
+void
+or1k32bf_h_sys_gpr304_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR304 (newval);
+}
+
+/* Get the value of h-sys-gpr305. */
+
+USI
+or1k32bf_h_sys_gpr305_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR305 ();
+}
+
+/* Set a value for h-sys-gpr305. */
+
+void
+or1k32bf_h_sys_gpr305_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR305 (newval);
+}
+
+/* Get the value of h-sys-gpr306. */
+
+USI
+or1k32bf_h_sys_gpr306_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR306 ();
+}
+
+/* Set a value for h-sys-gpr306. */
+
+void
+or1k32bf_h_sys_gpr306_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR306 (newval);
+}
+
+/* Get the value of h-sys-gpr307. */
+
+USI
+or1k32bf_h_sys_gpr307_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR307 ();
+}
+
+/* Set a value for h-sys-gpr307. */
+
+void
+or1k32bf_h_sys_gpr307_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR307 (newval);
+}
+
+/* Get the value of h-sys-gpr308. */
+
+USI
+or1k32bf_h_sys_gpr308_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR308 ();
+}
+
+/* Set a value for h-sys-gpr308. */
+
+void
+or1k32bf_h_sys_gpr308_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR308 (newval);
+}
+
+/* Get the value of h-sys-gpr309. */
+
+USI
+or1k32bf_h_sys_gpr309_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR309 ();
+}
+
+/* Set a value for h-sys-gpr309. */
+
+void
+or1k32bf_h_sys_gpr309_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR309 (newval);
+}
+
+/* Get the value of h-sys-gpr310. */
+
+USI
+or1k32bf_h_sys_gpr310_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR310 ();
+}
+
+/* Set a value for h-sys-gpr310. */
+
+void
+or1k32bf_h_sys_gpr310_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR310 (newval);
+}
+
+/* Get the value of h-sys-gpr311. */
+
+USI
+or1k32bf_h_sys_gpr311_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR311 ();
+}
+
+/* Set a value for h-sys-gpr311. */
+
+void
+or1k32bf_h_sys_gpr311_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR311 (newval);
+}
+
+/* Get the value of h-sys-gpr312. */
+
+USI
+or1k32bf_h_sys_gpr312_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR312 ();
+}
+
+/* Set a value for h-sys-gpr312. */
+
+void
+or1k32bf_h_sys_gpr312_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR312 (newval);
+}
+
+/* Get the value of h-sys-gpr313. */
+
+USI
+or1k32bf_h_sys_gpr313_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR313 ();
+}
+
+/* Set a value for h-sys-gpr313. */
+
+void
+or1k32bf_h_sys_gpr313_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR313 (newval);
+}
+
+/* Get the value of h-sys-gpr314. */
+
+USI
+or1k32bf_h_sys_gpr314_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR314 ();
+}
+
+/* Set a value for h-sys-gpr314. */
+
+void
+or1k32bf_h_sys_gpr314_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR314 (newval);
+}
+
+/* Get the value of h-sys-gpr315. */
+
+USI
+or1k32bf_h_sys_gpr315_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR315 ();
+}
+
+/* Set a value for h-sys-gpr315. */
+
+void
+or1k32bf_h_sys_gpr315_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR315 (newval);
+}
+
+/* Get the value of h-sys-gpr316. */
+
+USI
+or1k32bf_h_sys_gpr316_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR316 ();
+}
+
+/* Set a value for h-sys-gpr316. */
+
+void
+or1k32bf_h_sys_gpr316_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR316 (newval);
+}
+
+/* Get the value of h-sys-gpr317. */
+
+USI
+or1k32bf_h_sys_gpr317_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR317 ();
+}
+
+/* Set a value for h-sys-gpr317. */
+
+void
+or1k32bf_h_sys_gpr317_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR317 (newval);
+}
+
+/* Get the value of h-sys-gpr318. */
+
+USI
+or1k32bf_h_sys_gpr318_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR318 ();
+}
+
+/* Set a value for h-sys-gpr318. */
+
+void
+or1k32bf_h_sys_gpr318_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR318 (newval);
+}
+
+/* Get the value of h-sys-gpr319. */
+
+USI
+or1k32bf_h_sys_gpr319_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR319 ();
+}
+
+/* Set a value for h-sys-gpr319. */
+
+void
+or1k32bf_h_sys_gpr319_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR319 (newval);
+}
+
+/* Get the value of h-sys-gpr320. */
+
+USI
+or1k32bf_h_sys_gpr320_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR320 ();
+}
+
+/* Set a value for h-sys-gpr320. */
+
+void
+or1k32bf_h_sys_gpr320_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR320 (newval);
+}
+
+/* Get the value of h-sys-gpr321. */
+
+USI
+or1k32bf_h_sys_gpr321_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR321 ();
+}
+
+/* Set a value for h-sys-gpr321. */
+
+void
+or1k32bf_h_sys_gpr321_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR321 (newval);
+}
+
+/* Get the value of h-sys-gpr322. */
+
+USI
+or1k32bf_h_sys_gpr322_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR322 ();
+}
+
+/* Set a value for h-sys-gpr322. */
+
+void
+or1k32bf_h_sys_gpr322_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR322 (newval);
+}
+
+/* Get the value of h-sys-gpr323. */
+
+USI
+or1k32bf_h_sys_gpr323_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR323 ();
+}
+
+/* Set a value for h-sys-gpr323. */
+
+void
+or1k32bf_h_sys_gpr323_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR323 (newval);
+}
+
+/* Get the value of h-sys-gpr324. */
+
+USI
+or1k32bf_h_sys_gpr324_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR324 ();
+}
+
+/* Set a value for h-sys-gpr324. */
+
+void
+or1k32bf_h_sys_gpr324_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR324 (newval);
+}
+
+/* Get the value of h-sys-gpr325. */
+
+USI
+or1k32bf_h_sys_gpr325_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR325 ();
+}
+
+/* Set a value for h-sys-gpr325. */
+
+void
+or1k32bf_h_sys_gpr325_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR325 (newval);
+}
+
+/* Get the value of h-sys-gpr326. */
+
+USI
+or1k32bf_h_sys_gpr326_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR326 ();
+}
+
+/* Set a value for h-sys-gpr326. */
+
+void
+or1k32bf_h_sys_gpr326_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR326 (newval);
+}
+
+/* Get the value of h-sys-gpr327. */
+
+USI
+or1k32bf_h_sys_gpr327_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR327 ();
+}
+
+/* Set a value for h-sys-gpr327. */
+
+void
+or1k32bf_h_sys_gpr327_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR327 (newval);
+}
+
+/* Get the value of h-sys-gpr328. */
+
+USI
+or1k32bf_h_sys_gpr328_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR328 ();
+}
+
+/* Set a value for h-sys-gpr328. */
+
+void
+or1k32bf_h_sys_gpr328_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR328 (newval);
+}
+
+/* Get the value of h-sys-gpr329. */
+
+USI
+or1k32bf_h_sys_gpr329_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR329 ();
+}
+
+/* Set a value for h-sys-gpr329. */
+
+void
+or1k32bf_h_sys_gpr329_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR329 (newval);
+}
+
+/* Get the value of h-sys-gpr330. */
+
+USI
+or1k32bf_h_sys_gpr330_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR330 ();
+}
+
+/* Set a value for h-sys-gpr330. */
+
+void
+or1k32bf_h_sys_gpr330_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR330 (newval);
+}
+
+/* Get the value of h-sys-gpr331. */
+
+USI
+or1k32bf_h_sys_gpr331_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR331 ();
+}
+
+/* Set a value for h-sys-gpr331. */
+
+void
+or1k32bf_h_sys_gpr331_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR331 (newval);
+}
+
+/* Get the value of h-sys-gpr332. */
+
+USI
+or1k32bf_h_sys_gpr332_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR332 ();
+}
+
+/* Set a value for h-sys-gpr332. */
+
+void
+or1k32bf_h_sys_gpr332_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR332 (newval);
+}
+
+/* Get the value of h-sys-gpr333. */
+
+USI
+or1k32bf_h_sys_gpr333_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR333 ();
+}
+
+/* Set a value for h-sys-gpr333. */
+
+void
+or1k32bf_h_sys_gpr333_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR333 (newval);
+}
+
+/* Get the value of h-sys-gpr334. */
+
+USI
+or1k32bf_h_sys_gpr334_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR334 ();
+}
+
+/* Set a value for h-sys-gpr334. */
+
+void
+or1k32bf_h_sys_gpr334_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR334 (newval);
+}
+
+/* Get the value of h-sys-gpr335. */
+
+USI
+or1k32bf_h_sys_gpr335_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR335 ();
+}
+
+/* Set a value for h-sys-gpr335. */
+
+void
+or1k32bf_h_sys_gpr335_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR335 (newval);
+}
+
+/* Get the value of h-sys-gpr336. */
+
+USI
+or1k32bf_h_sys_gpr336_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR336 ();
+}
+
+/* Set a value for h-sys-gpr336. */
+
+void
+or1k32bf_h_sys_gpr336_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR336 (newval);
+}
+
+/* Get the value of h-sys-gpr337. */
+
+USI
+or1k32bf_h_sys_gpr337_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR337 ();
+}
+
+/* Set a value for h-sys-gpr337. */
+
+void
+or1k32bf_h_sys_gpr337_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR337 (newval);
+}
+
+/* Get the value of h-sys-gpr338. */
+
+USI
+or1k32bf_h_sys_gpr338_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR338 ();
+}
+
+/* Set a value for h-sys-gpr338. */
+
+void
+or1k32bf_h_sys_gpr338_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR338 (newval);
+}
+
+/* Get the value of h-sys-gpr339. */
+
+USI
+or1k32bf_h_sys_gpr339_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR339 ();
+}
+
+/* Set a value for h-sys-gpr339. */
+
+void
+or1k32bf_h_sys_gpr339_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR339 (newval);
+}
+
+/* Get the value of h-sys-gpr340. */
+
+USI
+or1k32bf_h_sys_gpr340_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR340 ();
+}
+
+/* Set a value for h-sys-gpr340. */
+
+void
+or1k32bf_h_sys_gpr340_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR340 (newval);
+}
+
+/* Get the value of h-sys-gpr341. */
+
+USI
+or1k32bf_h_sys_gpr341_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR341 ();
+}
+
+/* Set a value for h-sys-gpr341. */
+
+void
+or1k32bf_h_sys_gpr341_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR341 (newval);
+}
+
+/* Get the value of h-sys-gpr342. */
+
+USI
+or1k32bf_h_sys_gpr342_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR342 ();
+}
+
+/* Set a value for h-sys-gpr342. */
+
+void
+or1k32bf_h_sys_gpr342_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR342 (newval);
+}
+
+/* Get the value of h-sys-gpr343. */
+
+USI
+or1k32bf_h_sys_gpr343_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR343 ();
+}
+
+/* Set a value for h-sys-gpr343. */
+
+void
+or1k32bf_h_sys_gpr343_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR343 (newval);
+}
+
+/* Get the value of h-sys-gpr344. */
+
+USI
+or1k32bf_h_sys_gpr344_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR344 ();
+}
+
+/* Set a value for h-sys-gpr344. */
+
+void
+or1k32bf_h_sys_gpr344_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR344 (newval);
+}
+
+/* Get the value of h-sys-gpr345. */
+
+USI
+or1k32bf_h_sys_gpr345_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR345 ();
+}
+
+/* Set a value for h-sys-gpr345. */
+
+void
+or1k32bf_h_sys_gpr345_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR345 (newval);
+}
+
+/* Get the value of h-sys-gpr346. */
+
+USI
+or1k32bf_h_sys_gpr346_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR346 ();
+}
+
+/* Set a value for h-sys-gpr346. */
+
+void
+or1k32bf_h_sys_gpr346_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR346 (newval);
+}
+
+/* Get the value of h-sys-gpr347. */
+
+USI
+or1k32bf_h_sys_gpr347_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR347 ();
+}
+
+/* Set a value for h-sys-gpr347. */
+
+void
+or1k32bf_h_sys_gpr347_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR347 (newval);
+}
+
+/* Get the value of h-sys-gpr348. */
+
+USI
+or1k32bf_h_sys_gpr348_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR348 ();
+}
+
+/* Set a value for h-sys-gpr348. */
+
+void
+or1k32bf_h_sys_gpr348_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR348 (newval);
+}
+
+/* Get the value of h-sys-gpr349. */
+
+USI
+or1k32bf_h_sys_gpr349_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR349 ();
+}
+
+/* Set a value for h-sys-gpr349. */
+
+void
+or1k32bf_h_sys_gpr349_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR349 (newval);
+}
+
+/* Get the value of h-sys-gpr350. */
+
+USI
+or1k32bf_h_sys_gpr350_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR350 ();
+}
+
+/* Set a value for h-sys-gpr350. */
+
+void
+or1k32bf_h_sys_gpr350_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR350 (newval);
+}
+
+/* Get the value of h-sys-gpr351. */
+
+USI
+or1k32bf_h_sys_gpr351_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR351 ();
+}
+
+/* Set a value for h-sys-gpr351. */
+
+void
+or1k32bf_h_sys_gpr351_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR351 (newval);
+}
+
+/* Get the value of h-sys-gpr352. */
+
+USI
+or1k32bf_h_sys_gpr352_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR352 ();
+}
+
+/* Set a value for h-sys-gpr352. */
+
+void
+or1k32bf_h_sys_gpr352_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR352 (newval);
+}
+
+/* Get the value of h-sys-gpr353. */
+
+USI
+or1k32bf_h_sys_gpr353_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR353 ();
+}
+
+/* Set a value for h-sys-gpr353. */
+
+void
+or1k32bf_h_sys_gpr353_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR353 (newval);
+}
+
+/* Get the value of h-sys-gpr354. */
+
+USI
+or1k32bf_h_sys_gpr354_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR354 ();
+}
+
+/* Set a value for h-sys-gpr354. */
+
+void
+or1k32bf_h_sys_gpr354_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR354 (newval);
+}
+
+/* Get the value of h-sys-gpr355. */
+
+USI
+or1k32bf_h_sys_gpr355_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR355 ();
+}
+
+/* Set a value for h-sys-gpr355. */
+
+void
+or1k32bf_h_sys_gpr355_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR355 (newval);
+}
+
+/* Get the value of h-sys-gpr356. */
+
+USI
+or1k32bf_h_sys_gpr356_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR356 ();
+}
+
+/* Set a value for h-sys-gpr356. */
+
+void
+or1k32bf_h_sys_gpr356_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR356 (newval);
+}
+
+/* Get the value of h-sys-gpr357. */
+
+USI
+or1k32bf_h_sys_gpr357_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR357 ();
+}
+
+/* Set a value for h-sys-gpr357. */
+
+void
+or1k32bf_h_sys_gpr357_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR357 (newval);
+}
+
+/* Get the value of h-sys-gpr358. */
+
+USI
+or1k32bf_h_sys_gpr358_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR358 ();
+}
+
+/* Set a value for h-sys-gpr358. */
+
+void
+or1k32bf_h_sys_gpr358_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR358 (newval);
+}
+
+/* Get the value of h-sys-gpr359. */
+
+USI
+or1k32bf_h_sys_gpr359_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR359 ();
+}
+
+/* Set a value for h-sys-gpr359. */
+
+void
+or1k32bf_h_sys_gpr359_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR359 (newval);
+}
+
+/* Get the value of h-sys-gpr360. */
+
+USI
+or1k32bf_h_sys_gpr360_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR360 ();
+}
+
+/* Set a value for h-sys-gpr360. */
+
+void
+or1k32bf_h_sys_gpr360_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR360 (newval);
+}
+
+/* Get the value of h-sys-gpr361. */
+
+USI
+or1k32bf_h_sys_gpr361_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR361 ();
+}
+
+/* Set a value for h-sys-gpr361. */
+
+void
+or1k32bf_h_sys_gpr361_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR361 (newval);
+}
+
+/* Get the value of h-sys-gpr362. */
+
+USI
+or1k32bf_h_sys_gpr362_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR362 ();
+}
+
+/* Set a value for h-sys-gpr362. */
+
+void
+or1k32bf_h_sys_gpr362_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR362 (newval);
+}
+
+/* Get the value of h-sys-gpr363. */
+
+USI
+or1k32bf_h_sys_gpr363_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR363 ();
+}
+
+/* Set a value for h-sys-gpr363. */
+
+void
+or1k32bf_h_sys_gpr363_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR363 (newval);
+}
+
+/* Get the value of h-sys-gpr364. */
+
+USI
+or1k32bf_h_sys_gpr364_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR364 ();
+}
+
+/* Set a value for h-sys-gpr364. */
+
+void
+or1k32bf_h_sys_gpr364_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR364 (newval);
+}
+
+/* Get the value of h-sys-gpr365. */
+
+USI
+or1k32bf_h_sys_gpr365_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR365 ();
+}
+
+/* Set a value for h-sys-gpr365. */
+
+void
+or1k32bf_h_sys_gpr365_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR365 (newval);
+}
+
+/* Get the value of h-sys-gpr366. */
+
+USI
+or1k32bf_h_sys_gpr366_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR366 ();
+}
+
+/* Set a value for h-sys-gpr366. */
+
+void
+or1k32bf_h_sys_gpr366_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR366 (newval);
+}
+
+/* Get the value of h-sys-gpr367. */
+
+USI
+or1k32bf_h_sys_gpr367_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR367 ();
+}
+
+/* Set a value for h-sys-gpr367. */
+
+void
+or1k32bf_h_sys_gpr367_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR367 (newval);
+}
+
+/* Get the value of h-sys-gpr368. */
+
+USI
+or1k32bf_h_sys_gpr368_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR368 ();
+}
+
+/* Set a value for h-sys-gpr368. */
+
+void
+or1k32bf_h_sys_gpr368_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR368 (newval);
+}
+
+/* Get the value of h-sys-gpr369. */
+
+USI
+or1k32bf_h_sys_gpr369_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR369 ();
+}
+
+/* Set a value for h-sys-gpr369. */
+
+void
+or1k32bf_h_sys_gpr369_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR369 (newval);
+}
+
+/* Get the value of h-sys-gpr370. */
+
+USI
+or1k32bf_h_sys_gpr370_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR370 ();
+}
+
+/* Set a value for h-sys-gpr370. */
+
+void
+or1k32bf_h_sys_gpr370_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR370 (newval);
+}
+
+/* Get the value of h-sys-gpr371. */
+
+USI
+or1k32bf_h_sys_gpr371_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR371 ();
+}
+
+/* Set a value for h-sys-gpr371. */
+
+void
+or1k32bf_h_sys_gpr371_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR371 (newval);
+}
+
+/* Get the value of h-sys-gpr372. */
+
+USI
+or1k32bf_h_sys_gpr372_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR372 ();
+}
+
+/* Set a value for h-sys-gpr372. */
+
+void
+or1k32bf_h_sys_gpr372_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR372 (newval);
+}
+
+/* Get the value of h-sys-gpr373. */
+
+USI
+or1k32bf_h_sys_gpr373_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR373 ();
+}
+
+/* Set a value for h-sys-gpr373. */
+
+void
+or1k32bf_h_sys_gpr373_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR373 (newval);
+}
+
+/* Get the value of h-sys-gpr374. */
+
+USI
+or1k32bf_h_sys_gpr374_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR374 ();
+}
+
+/* Set a value for h-sys-gpr374. */
+
+void
+or1k32bf_h_sys_gpr374_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR374 (newval);
+}
+
+/* Get the value of h-sys-gpr375. */
+
+USI
+or1k32bf_h_sys_gpr375_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR375 ();
+}
+
+/* Set a value for h-sys-gpr375. */
+
+void
+or1k32bf_h_sys_gpr375_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR375 (newval);
+}
+
+/* Get the value of h-sys-gpr376. */
+
+USI
+or1k32bf_h_sys_gpr376_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR376 ();
+}
+
+/* Set a value for h-sys-gpr376. */
+
+void
+or1k32bf_h_sys_gpr376_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR376 (newval);
+}
+
+/* Get the value of h-sys-gpr377. */
+
+USI
+or1k32bf_h_sys_gpr377_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR377 ();
+}
+
+/* Set a value for h-sys-gpr377. */
+
+void
+or1k32bf_h_sys_gpr377_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR377 (newval);
+}
+
+/* Get the value of h-sys-gpr378. */
+
+USI
+or1k32bf_h_sys_gpr378_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR378 ();
+}
+
+/* Set a value for h-sys-gpr378. */
+
+void
+or1k32bf_h_sys_gpr378_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR378 (newval);
+}
+
+/* Get the value of h-sys-gpr379. */
+
+USI
+or1k32bf_h_sys_gpr379_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR379 ();
+}
+
+/* Set a value for h-sys-gpr379. */
+
+void
+or1k32bf_h_sys_gpr379_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR379 (newval);
+}
+
+/* Get the value of h-sys-gpr380. */
+
+USI
+or1k32bf_h_sys_gpr380_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR380 ();
+}
+
+/* Set a value for h-sys-gpr380. */
+
+void
+or1k32bf_h_sys_gpr380_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR380 (newval);
+}
+
+/* Get the value of h-sys-gpr381. */
+
+USI
+or1k32bf_h_sys_gpr381_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR381 ();
+}
+
+/* Set a value for h-sys-gpr381. */
+
+void
+or1k32bf_h_sys_gpr381_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR381 (newval);
+}
+
+/* Get the value of h-sys-gpr382. */
+
+USI
+or1k32bf_h_sys_gpr382_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR382 ();
+}
+
+/* Set a value for h-sys-gpr382. */
+
+void
+or1k32bf_h_sys_gpr382_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR382 (newval);
+}
+
+/* Get the value of h-sys-gpr383. */
+
+USI
+or1k32bf_h_sys_gpr383_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR383 ();
+}
+
+/* Set a value for h-sys-gpr383. */
+
+void
+or1k32bf_h_sys_gpr383_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR383 (newval);
+}
+
+/* Get the value of h-sys-gpr384. */
+
+USI
+or1k32bf_h_sys_gpr384_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR384 ();
+}
+
+/* Set a value for h-sys-gpr384. */
+
+void
+or1k32bf_h_sys_gpr384_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR384 (newval);
+}
+
+/* Get the value of h-sys-gpr385. */
+
+USI
+or1k32bf_h_sys_gpr385_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR385 ();
+}
+
+/* Set a value for h-sys-gpr385. */
+
+void
+or1k32bf_h_sys_gpr385_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR385 (newval);
+}
+
+/* Get the value of h-sys-gpr386. */
+
+USI
+or1k32bf_h_sys_gpr386_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR386 ();
+}
+
+/* Set a value for h-sys-gpr386. */
+
+void
+or1k32bf_h_sys_gpr386_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR386 (newval);
+}
+
+/* Get the value of h-sys-gpr387. */
+
+USI
+or1k32bf_h_sys_gpr387_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR387 ();
+}
+
+/* Set a value for h-sys-gpr387. */
+
+void
+or1k32bf_h_sys_gpr387_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR387 (newval);
+}
+
+/* Get the value of h-sys-gpr388. */
+
+USI
+or1k32bf_h_sys_gpr388_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR388 ();
+}
+
+/* Set a value for h-sys-gpr388. */
+
+void
+or1k32bf_h_sys_gpr388_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR388 (newval);
+}
+
+/* Get the value of h-sys-gpr389. */
+
+USI
+or1k32bf_h_sys_gpr389_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR389 ();
+}
+
+/* Set a value for h-sys-gpr389. */
+
+void
+or1k32bf_h_sys_gpr389_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR389 (newval);
+}
+
+/* Get the value of h-sys-gpr390. */
+
+USI
+or1k32bf_h_sys_gpr390_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR390 ();
+}
+
+/* Set a value for h-sys-gpr390. */
+
+void
+or1k32bf_h_sys_gpr390_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR390 (newval);
+}
+
+/* Get the value of h-sys-gpr391. */
+
+USI
+or1k32bf_h_sys_gpr391_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR391 ();
+}
+
+/* Set a value for h-sys-gpr391. */
+
+void
+or1k32bf_h_sys_gpr391_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR391 (newval);
+}
+
+/* Get the value of h-sys-gpr392. */
+
+USI
+or1k32bf_h_sys_gpr392_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR392 ();
+}
+
+/* Set a value for h-sys-gpr392. */
+
+void
+or1k32bf_h_sys_gpr392_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR392 (newval);
+}
+
+/* Get the value of h-sys-gpr393. */
+
+USI
+or1k32bf_h_sys_gpr393_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR393 ();
+}
+
+/* Set a value for h-sys-gpr393. */
+
+void
+or1k32bf_h_sys_gpr393_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR393 (newval);
+}
+
+/* Get the value of h-sys-gpr394. */
+
+USI
+or1k32bf_h_sys_gpr394_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR394 ();
+}
+
+/* Set a value for h-sys-gpr394. */
+
+void
+or1k32bf_h_sys_gpr394_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR394 (newval);
+}
+
+/* Get the value of h-sys-gpr395. */
+
+USI
+or1k32bf_h_sys_gpr395_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR395 ();
+}
+
+/* Set a value for h-sys-gpr395. */
+
+void
+or1k32bf_h_sys_gpr395_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR395 (newval);
+}
+
+/* Get the value of h-sys-gpr396. */
+
+USI
+or1k32bf_h_sys_gpr396_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR396 ();
+}
+
+/* Set a value for h-sys-gpr396. */
+
+void
+or1k32bf_h_sys_gpr396_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR396 (newval);
+}
+
+/* Get the value of h-sys-gpr397. */
+
+USI
+or1k32bf_h_sys_gpr397_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR397 ();
+}
+
+/* Set a value for h-sys-gpr397. */
+
+void
+or1k32bf_h_sys_gpr397_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR397 (newval);
+}
+
+/* Get the value of h-sys-gpr398. */
+
+USI
+or1k32bf_h_sys_gpr398_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR398 ();
+}
+
+/* Set a value for h-sys-gpr398. */
+
+void
+or1k32bf_h_sys_gpr398_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR398 (newval);
+}
+
+/* Get the value of h-sys-gpr399. */
+
+USI
+or1k32bf_h_sys_gpr399_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR399 ();
+}
+
+/* Set a value for h-sys-gpr399. */
+
+void
+or1k32bf_h_sys_gpr399_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR399 (newval);
+}
+
+/* Get the value of h-sys-gpr400. */
+
+USI
+or1k32bf_h_sys_gpr400_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR400 ();
+}
+
+/* Set a value for h-sys-gpr400. */
+
+void
+or1k32bf_h_sys_gpr400_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR400 (newval);
+}
+
+/* Get the value of h-sys-gpr401. */
+
+USI
+or1k32bf_h_sys_gpr401_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR401 ();
+}
+
+/* Set a value for h-sys-gpr401. */
+
+void
+or1k32bf_h_sys_gpr401_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR401 (newval);
+}
+
+/* Get the value of h-sys-gpr402. */
+
+USI
+or1k32bf_h_sys_gpr402_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR402 ();
+}
+
+/* Set a value for h-sys-gpr402. */
+
+void
+or1k32bf_h_sys_gpr402_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR402 (newval);
+}
+
+/* Get the value of h-sys-gpr403. */
+
+USI
+or1k32bf_h_sys_gpr403_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR403 ();
+}
+
+/* Set a value for h-sys-gpr403. */
+
+void
+or1k32bf_h_sys_gpr403_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR403 (newval);
+}
+
+/* Get the value of h-sys-gpr404. */
+
+USI
+or1k32bf_h_sys_gpr404_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR404 ();
+}
+
+/* Set a value for h-sys-gpr404. */
+
+void
+or1k32bf_h_sys_gpr404_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR404 (newval);
+}
+
+/* Get the value of h-sys-gpr405. */
+
+USI
+or1k32bf_h_sys_gpr405_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR405 ();
+}
+
+/* Set a value for h-sys-gpr405. */
+
+void
+or1k32bf_h_sys_gpr405_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR405 (newval);
+}
+
+/* Get the value of h-sys-gpr406. */
+
+USI
+or1k32bf_h_sys_gpr406_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR406 ();
+}
+
+/* Set a value for h-sys-gpr406. */
+
+void
+or1k32bf_h_sys_gpr406_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR406 (newval);
+}
+
+/* Get the value of h-sys-gpr407. */
+
+USI
+or1k32bf_h_sys_gpr407_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR407 ();
+}
+
+/* Set a value for h-sys-gpr407. */
+
+void
+or1k32bf_h_sys_gpr407_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR407 (newval);
+}
+
+/* Get the value of h-sys-gpr408. */
+
+USI
+or1k32bf_h_sys_gpr408_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR408 ();
+}
+
+/* Set a value for h-sys-gpr408. */
+
+void
+or1k32bf_h_sys_gpr408_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR408 (newval);
+}
+
+/* Get the value of h-sys-gpr409. */
+
+USI
+or1k32bf_h_sys_gpr409_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR409 ();
+}
+
+/* Set a value for h-sys-gpr409. */
+
+void
+or1k32bf_h_sys_gpr409_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR409 (newval);
+}
+
+/* Get the value of h-sys-gpr410. */
+
+USI
+or1k32bf_h_sys_gpr410_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR410 ();
+}
+
+/* Set a value for h-sys-gpr410. */
+
+void
+or1k32bf_h_sys_gpr410_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR410 (newval);
+}
+
+/* Get the value of h-sys-gpr411. */
+
+USI
+or1k32bf_h_sys_gpr411_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR411 ();
+}
+
+/* Set a value for h-sys-gpr411. */
+
+void
+or1k32bf_h_sys_gpr411_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR411 (newval);
+}
+
+/* Get the value of h-sys-gpr412. */
+
+USI
+or1k32bf_h_sys_gpr412_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR412 ();
+}
+
+/* Set a value for h-sys-gpr412. */
+
+void
+or1k32bf_h_sys_gpr412_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR412 (newval);
+}
+
+/* Get the value of h-sys-gpr413. */
+
+USI
+or1k32bf_h_sys_gpr413_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR413 ();
+}
+
+/* Set a value for h-sys-gpr413. */
+
+void
+or1k32bf_h_sys_gpr413_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR413 (newval);
+}
+
+/* Get the value of h-sys-gpr414. */
+
+USI
+or1k32bf_h_sys_gpr414_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR414 ();
+}
+
+/* Set a value for h-sys-gpr414. */
+
+void
+or1k32bf_h_sys_gpr414_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR414 (newval);
+}
+
+/* Get the value of h-sys-gpr415. */
+
+USI
+or1k32bf_h_sys_gpr415_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR415 ();
+}
+
+/* Set a value for h-sys-gpr415. */
+
+void
+or1k32bf_h_sys_gpr415_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR415 (newval);
+}
+
+/* Get the value of h-sys-gpr416. */
+
+USI
+or1k32bf_h_sys_gpr416_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR416 ();
+}
+
+/* Set a value for h-sys-gpr416. */
+
+void
+or1k32bf_h_sys_gpr416_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR416 (newval);
+}
+
+/* Get the value of h-sys-gpr417. */
+
+USI
+or1k32bf_h_sys_gpr417_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR417 ();
+}
+
+/* Set a value for h-sys-gpr417. */
+
+void
+or1k32bf_h_sys_gpr417_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR417 (newval);
+}
+
+/* Get the value of h-sys-gpr418. */
+
+USI
+or1k32bf_h_sys_gpr418_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR418 ();
+}
+
+/* Set a value for h-sys-gpr418. */
+
+void
+or1k32bf_h_sys_gpr418_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR418 (newval);
+}
+
+/* Get the value of h-sys-gpr419. */
+
+USI
+or1k32bf_h_sys_gpr419_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR419 ();
+}
+
+/* Set a value for h-sys-gpr419. */
+
+void
+or1k32bf_h_sys_gpr419_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR419 (newval);
+}
+
+/* Get the value of h-sys-gpr420. */
+
+USI
+or1k32bf_h_sys_gpr420_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR420 ();
+}
+
+/* Set a value for h-sys-gpr420. */
+
+void
+or1k32bf_h_sys_gpr420_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR420 (newval);
+}
+
+/* Get the value of h-sys-gpr421. */
+
+USI
+or1k32bf_h_sys_gpr421_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR421 ();
+}
+
+/* Set a value for h-sys-gpr421. */
+
+void
+or1k32bf_h_sys_gpr421_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR421 (newval);
+}
+
+/* Get the value of h-sys-gpr422. */
+
+USI
+or1k32bf_h_sys_gpr422_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR422 ();
+}
+
+/* Set a value for h-sys-gpr422. */
+
+void
+or1k32bf_h_sys_gpr422_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR422 (newval);
+}
+
+/* Get the value of h-sys-gpr423. */
+
+USI
+or1k32bf_h_sys_gpr423_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR423 ();
+}
+
+/* Set a value for h-sys-gpr423. */
+
+void
+or1k32bf_h_sys_gpr423_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR423 (newval);
+}
+
+/* Get the value of h-sys-gpr424. */
+
+USI
+or1k32bf_h_sys_gpr424_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR424 ();
+}
+
+/* Set a value for h-sys-gpr424. */
+
+void
+or1k32bf_h_sys_gpr424_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR424 (newval);
+}
+
+/* Get the value of h-sys-gpr425. */
+
+USI
+or1k32bf_h_sys_gpr425_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR425 ();
+}
+
+/* Set a value for h-sys-gpr425. */
+
+void
+or1k32bf_h_sys_gpr425_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR425 (newval);
+}
+
+/* Get the value of h-sys-gpr426. */
+
+USI
+or1k32bf_h_sys_gpr426_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR426 ();
+}
+
+/* Set a value for h-sys-gpr426. */
+
+void
+or1k32bf_h_sys_gpr426_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR426 (newval);
+}
+
+/* Get the value of h-sys-gpr427. */
+
+USI
+or1k32bf_h_sys_gpr427_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR427 ();
+}
+
+/* Set a value for h-sys-gpr427. */
+
+void
+or1k32bf_h_sys_gpr427_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR427 (newval);
+}
+
+/* Get the value of h-sys-gpr428. */
+
+USI
+or1k32bf_h_sys_gpr428_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR428 ();
+}
+
+/* Set a value for h-sys-gpr428. */
+
+void
+or1k32bf_h_sys_gpr428_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR428 (newval);
+}
+
+/* Get the value of h-sys-gpr429. */
+
+USI
+or1k32bf_h_sys_gpr429_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR429 ();
+}
+
+/* Set a value for h-sys-gpr429. */
+
+void
+or1k32bf_h_sys_gpr429_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR429 (newval);
+}
+
+/* Get the value of h-sys-gpr430. */
+
+USI
+or1k32bf_h_sys_gpr430_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR430 ();
+}
+
+/* Set a value for h-sys-gpr430. */
+
+void
+or1k32bf_h_sys_gpr430_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR430 (newval);
+}
+
+/* Get the value of h-sys-gpr431. */
+
+USI
+or1k32bf_h_sys_gpr431_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR431 ();
+}
+
+/* Set a value for h-sys-gpr431. */
+
+void
+or1k32bf_h_sys_gpr431_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR431 (newval);
+}
+
+/* Get the value of h-sys-gpr432. */
+
+USI
+or1k32bf_h_sys_gpr432_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR432 ();
+}
+
+/* Set a value for h-sys-gpr432. */
+
+void
+or1k32bf_h_sys_gpr432_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR432 (newval);
+}
+
+/* Get the value of h-sys-gpr433. */
+
+USI
+or1k32bf_h_sys_gpr433_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR433 ();
+}
+
+/* Set a value for h-sys-gpr433. */
+
+void
+or1k32bf_h_sys_gpr433_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR433 (newval);
+}
+
+/* Get the value of h-sys-gpr434. */
+
+USI
+or1k32bf_h_sys_gpr434_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR434 ();
+}
+
+/* Set a value for h-sys-gpr434. */
+
+void
+or1k32bf_h_sys_gpr434_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR434 (newval);
+}
+
+/* Get the value of h-sys-gpr435. */
+
+USI
+or1k32bf_h_sys_gpr435_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR435 ();
+}
+
+/* Set a value for h-sys-gpr435. */
+
+void
+or1k32bf_h_sys_gpr435_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR435 (newval);
+}
+
+/* Get the value of h-sys-gpr436. */
+
+USI
+or1k32bf_h_sys_gpr436_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR436 ();
+}
+
+/* Set a value for h-sys-gpr436. */
+
+void
+or1k32bf_h_sys_gpr436_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR436 (newval);
+}
+
+/* Get the value of h-sys-gpr437. */
+
+USI
+or1k32bf_h_sys_gpr437_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR437 ();
+}
+
+/* Set a value for h-sys-gpr437. */
+
+void
+or1k32bf_h_sys_gpr437_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR437 (newval);
+}
+
+/* Get the value of h-sys-gpr438. */
+
+USI
+or1k32bf_h_sys_gpr438_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR438 ();
+}
+
+/* Set a value for h-sys-gpr438. */
+
+void
+or1k32bf_h_sys_gpr438_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR438 (newval);
+}
+
+/* Get the value of h-sys-gpr439. */
+
+USI
+or1k32bf_h_sys_gpr439_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR439 ();
+}
+
+/* Set a value for h-sys-gpr439. */
+
+void
+or1k32bf_h_sys_gpr439_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR439 (newval);
+}
+
+/* Get the value of h-sys-gpr440. */
+
+USI
+or1k32bf_h_sys_gpr440_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR440 ();
+}
+
+/* Set a value for h-sys-gpr440. */
+
+void
+or1k32bf_h_sys_gpr440_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR440 (newval);
+}
+
+/* Get the value of h-sys-gpr441. */
+
+USI
+or1k32bf_h_sys_gpr441_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR441 ();
+}
+
+/* Set a value for h-sys-gpr441. */
+
+void
+or1k32bf_h_sys_gpr441_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR441 (newval);
+}
+
+/* Get the value of h-sys-gpr442. */
+
+USI
+or1k32bf_h_sys_gpr442_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR442 ();
+}
+
+/* Set a value for h-sys-gpr442. */
+
+void
+or1k32bf_h_sys_gpr442_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR442 (newval);
+}
+
+/* Get the value of h-sys-gpr443. */
+
+USI
+or1k32bf_h_sys_gpr443_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR443 ();
+}
+
+/* Set a value for h-sys-gpr443. */
+
+void
+or1k32bf_h_sys_gpr443_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR443 (newval);
+}
+
+/* Get the value of h-sys-gpr444. */
+
+USI
+or1k32bf_h_sys_gpr444_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR444 ();
+}
+
+/* Set a value for h-sys-gpr444. */
+
+void
+or1k32bf_h_sys_gpr444_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR444 (newval);
+}
+
+/* Get the value of h-sys-gpr445. */
+
+USI
+or1k32bf_h_sys_gpr445_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR445 ();
+}
+
+/* Set a value for h-sys-gpr445. */
+
+void
+or1k32bf_h_sys_gpr445_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR445 (newval);
+}
+
+/* Get the value of h-sys-gpr446. */
+
+USI
+or1k32bf_h_sys_gpr446_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR446 ();
+}
+
+/* Set a value for h-sys-gpr446. */
+
+void
+or1k32bf_h_sys_gpr446_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR446 (newval);
+}
+
+/* Get the value of h-sys-gpr447. */
+
+USI
+or1k32bf_h_sys_gpr447_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR447 ();
+}
+
+/* Set a value for h-sys-gpr447. */
+
+void
+or1k32bf_h_sys_gpr447_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR447 (newval);
+}
+
+/* Get the value of h-sys-gpr448. */
+
+USI
+or1k32bf_h_sys_gpr448_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR448 ();
+}
+
+/* Set a value for h-sys-gpr448. */
+
+void
+or1k32bf_h_sys_gpr448_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR448 (newval);
+}
+
+/* Get the value of h-sys-gpr449. */
+
+USI
+or1k32bf_h_sys_gpr449_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR449 ();
+}
+
+/* Set a value for h-sys-gpr449. */
+
+void
+or1k32bf_h_sys_gpr449_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR449 (newval);
+}
+
+/* Get the value of h-sys-gpr450. */
+
+USI
+or1k32bf_h_sys_gpr450_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR450 ();
+}
+
+/* Set a value for h-sys-gpr450. */
+
+void
+or1k32bf_h_sys_gpr450_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR450 (newval);
+}
+
+/* Get the value of h-sys-gpr451. */
+
+USI
+or1k32bf_h_sys_gpr451_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR451 ();
+}
+
+/* Set a value for h-sys-gpr451. */
+
+void
+or1k32bf_h_sys_gpr451_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR451 (newval);
+}
+
+/* Get the value of h-sys-gpr452. */
+
+USI
+or1k32bf_h_sys_gpr452_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR452 ();
+}
+
+/* Set a value for h-sys-gpr452. */
+
+void
+or1k32bf_h_sys_gpr452_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR452 (newval);
+}
+
+/* Get the value of h-sys-gpr453. */
+
+USI
+or1k32bf_h_sys_gpr453_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR453 ();
+}
+
+/* Set a value for h-sys-gpr453. */
+
+void
+or1k32bf_h_sys_gpr453_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR453 (newval);
+}
+
+/* Get the value of h-sys-gpr454. */
+
+USI
+or1k32bf_h_sys_gpr454_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR454 ();
+}
+
+/* Set a value for h-sys-gpr454. */
+
+void
+or1k32bf_h_sys_gpr454_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR454 (newval);
+}
+
+/* Get the value of h-sys-gpr455. */
+
+USI
+or1k32bf_h_sys_gpr455_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR455 ();
+}
+
+/* Set a value for h-sys-gpr455. */
+
+void
+or1k32bf_h_sys_gpr455_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR455 (newval);
+}
+
+/* Get the value of h-sys-gpr456. */
+
+USI
+or1k32bf_h_sys_gpr456_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR456 ();
+}
+
+/* Set a value for h-sys-gpr456. */
+
+void
+or1k32bf_h_sys_gpr456_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR456 (newval);
+}
+
+/* Get the value of h-sys-gpr457. */
+
+USI
+or1k32bf_h_sys_gpr457_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR457 ();
+}
+
+/* Set a value for h-sys-gpr457. */
+
+void
+or1k32bf_h_sys_gpr457_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR457 (newval);
+}
+
+/* Get the value of h-sys-gpr458. */
+
+USI
+or1k32bf_h_sys_gpr458_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR458 ();
+}
+
+/* Set a value for h-sys-gpr458. */
+
+void
+or1k32bf_h_sys_gpr458_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR458 (newval);
+}
+
+/* Get the value of h-sys-gpr459. */
+
+USI
+or1k32bf_h_sys_gpr459_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR459 ();
+}
+
+/* Set a value for h-sys-gpr459. */
+
+void
+or1k32bf_h_sys_gpr459_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR459 (newval);
+}
+
+/* Get the value of h-sys-gpr460. */
+
+USI
+or1k32bf_h_sys_gpr460_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR460 ();
+}
+
+/* Set a value for h-sys-gpr460. */
+
+void
+or1k32bf_h_sys_gpr460_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR460 (newval);
+}
+
+/* Get the value of h-sys-gpr461. */
+
+USI
+or1k32bf_h_sys_gpr461_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR461 ();
+}
+
+/* Set a value for h-sys-gpr461. */
+
+void
+or1k32bf_h_sys_gpr461_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR461 (newval);
+}
+
+/* Get the value of h-sys-gpr462. */
+
+USI
+or1k32bf_h_sys_gpr462_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR462 ();
+}
+
+/* Set a value for h-sys-gpr462. */
+
+void
+or1k32bf_h_sys_gpr462_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR462 (newval);
+}
+
+/* Get the value of h-sys-gpr463. */
+
+USI
+or1k32bf_h_sys_gpr463_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR463 ();
+}
+
+/* Set a value for h-sys-gpr463. */
+
+void
+or1k32bf_h_sys_gpr463_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR463 (newval);
+}
+
+/* Get the value of h-sys-gpr464. */
+
+USI
+or1k32bf_h_sys_gpr464_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR464 ();
+}
+
+/* Set a value for h-sys-gpr464. */
+
+void
+or1k32bf_h_sys_gpr464_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR464 (newval);
+}
+
+/* Get the value of h-sys-gpr465. */
+
+USI
+or1k32bf_h_sys_gpr465_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR465 ();
+}
+
+/* Set a value for h-sys-gpr465. */
+
+void
+or1k32bf_h_sys_gpr465_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR465 (newval);
+}
+
+/* Get the value of h-sys-gpr466. */
+
+USI
+or1k32bf_h_sys_gpr466_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR466 ();
+}
+
+/* Set a value for h-sys-gpr466. */
+
+void
+or1k32bf_h_sys_gpr466_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR466 (newval);
+}
+
+/* Get the value of h-sys-gpr467. */
+
+USI
+or1k32bf_h_sys_gpr467_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR467 ();
+}
+
+/* Set a value for h-sys-gpr467. */
+
+void
+or1k32bf_h_sys_gpr467_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR467 (newval);
+}
+
+/* Get the value of h-sys-gpr468. */
+
+USI
+or1k32bf_h_sys_gpr468_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR468 ();
+}
+
+/* Set a value for h-sys-gpr468. */
+
+void
+or1k32bf_h_sys_gpr468_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR468 (newval);
+}
+
+/* Get the value of h-sys-gpr469. */
+
+USI
+or1k32bf_h_sys_gpr469_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR469 ();
+}
+
+/* Set a value for h-sys-gpr469. */
+
+void
+or1k32bf_h_sys_gpr469_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR469 (newval);
+}
+
+/* Get the value of h-sys-gpr470. */
+
+USI
+or1k32bf_h_sys_gpr470_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR470 ();
+}
+
+/* Set a value for h-sys-gpr470. */
+
+void
+or1k32bf_h_sys_gpr470_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR470 (newval);
+}
+
+/* Get the value of h-sys-gpr471. */
+
+USI
+or1k32bf_h_sys_gpr471_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR471 ();
+}
+
+/* Set a value for h-sys-gpr471. */
+
+void
+or1k32bf_h_sys_gpr471_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR471 (newval);
+}
+
+/* Get the value of h-sys-gpr472. */
+
+USI
+or1k32bf_h_sys_gpr472_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR472 ();
+}
+
+/* Set a value for h-sys-gpr472. */
+
+void
+or1k32bf_h_sys_gpr472_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR472 (newval);
+}
+
+/* Get the value of h-sys-gpr473. */
+
+USI
+or1k32bf_h_sys_gpr473_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR473 ();
+}
+
+/* Set a value for h-sys-gpr473. */
+
+void
+or1k32bf_h_sys_gpr473_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR473 (newval);
+}
+
+/* Get the value of h-sys-gpr474. */
+
+USI
+or1k32bf_h_sys_gpr474_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR474 ();
+}
+
+/* Set a value for h-sys-gpr474. */
+
+void
+or1k32bf_h_sys_gpr474_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR474 (newval);
+}
+
+/* Get the value of h-sys-gpr475. */
+
+USI
+or1k32bf_h_sys_gpr475_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR475 ();
+}
+
+/* Set a value for h-sys-gpr475. */
+
+void
+or1k32bf_h_sys_gpr475_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR475 (newval);
+}
+
+/* Get the value of h-sys-gpr476. */
+
+USI
+or1k32bf_h_sys_gpr476_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR476 ();
+}
+
+/* Set a value for h-sys-gpr476. */
+
+void
+or1k32bf_h_sys_gpr476_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR476 (newval);
+}
+
+/* Get the value of h-sys-gpr477. */
+
+USI
+or1k32bf_h_sys_gpr477_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR477 ();
+}
+
+/* Set a value for h-sys-gpr477. */
+
+void
+or1k32bf_h_sys_gpr477_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR477 (newval);
+}
+
+/* Get the value of h-sys-gpr478. */
+
+USI
+or1k32bf_h_sys_gpr478_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR478 ();
+}
+
+/* Set a value for h-sys-gpr478. */
+
+void
+or1k32bf_h_sys_gpr478_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR478 (newval);
+}
+
+/* Get the value of h-sys-gpr479. */
+
+USI
+or1k32bf_h_sys_gpr479_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR479 ();
+}
+
+/* Set a value for h-sys-gpr479. */
+
+void
+or1k32bf_h_sys_gpr479_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR479 (newval);
+}
+
+/* Get the value of h-sys-gpr480. */
+
+USI
+or1k32bf_h_sys_gpr480_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR480 ();
+}
+
+/* Set a value for h-sys-gpr480. */
+
+void
+or1k32bf_h_sys_gpr480_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR480 (newval);
+}
+
+/* Get the value of h-sys-gpr481. */
+
+USI
+or1k32bf_h_sys_gpr481_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR481 ();
+}
+
+/* Set a value for h-sys-gpr481. */
+
+void
+or1k32bf_h_sys_gpr481_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR481 (newval);
+}
+
+/* Get the value of h-sys-gpr482. */
+
+USI
+or1k32bf_h_sys_gpr482_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR482 ();
+}
+
+/* Set a value for h-sys-gpr482. */
+
+void
+or1k32bf_h_sys_gpr482_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR482 (newval);
+}
+
+/* Get the value of h-sys-gpr483. */
+
+USI
+or1k32bf_h_sys_gpr483_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR483 ();
+}
+
+/* Set a value for h-sys-gpr483. */
+
+void
+or1k32bf_h_sys_gpr483_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR483 (newval);
+}
+
+/* Get the value of h-sys-gpr484. */
+
+USI
+or1k32bf_h_sys_gpr484_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR484 ();
+}
+
+/* Set a value for h-sys-gpr484. */
+
+void
+or1k32bf_h_sys_gpr484_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR484 (newval);
+}
+
+/* Get the value of h-sys-gpr485. */
+
+USI
+or1k32bf_h_sys_gpr485_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR485 ();
+}
+
+/* Set a value for h-sys-gpr485. */
+
+void
+or1k32bf_h_sys_gpr485_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR485 (newval);
+}
+
+/* Get the value of h-sys-gpr486. */
+
+USI
+or1k32bf_h_sys_gpr486_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR486 ();
+}
+
+/* Set a value for h-sys-gpr486. */
+
+void
+or1k32bf_h_sys_gpr486_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR486 (newval);
+}
+
+/* Get the value of h-sys-gpr487. */
+
+USI
+or1k32bf_h_sys_gpr487_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR487 ();
+}
+
+/* Set a value for h-sys-gpr487. */
+
+void
+or1k32bf_h_sys_gpr487_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR487 (newval);
+}
+
+/* Get the value of h-sys-gpr488. */
+
+USI
+or1k32bf_h_sys_gpr488_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR488 ();
+}
+
+/* Set a value for h-sys-gpr488. */
+
+void
+or1k32bf_h_sys_gpr488_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR488 (newval);
+}
+
+/* Get the value of h-sys-gpr489. */
+
+USI
+or1k32bf_h_sys_gpr489_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR489 ();
+}
+
+/* Set a value for h-sys-gpr489. */
+
+void
+or1k32bf_h_sys_gpr489_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR489 (newval);
+}
+
+/* Get the value of h-sys-gpr490. */
+
+USI
+or1k32bf_h_sys_gpr490_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR490 ();
+}
+
+/* Set a value for h-sys-gpr490. */
+
+void
+or1k32bf_h_sys_gpr490_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR490 (newval);
+}
+
+/* Get the value of h-sys-gpr491. */
+
+USI
+or1k32bf_h_sys_gpr491_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR491 ();
+}
+
+/* Set a value for h-sys-gpr491. */
+
+void
+or1k32bf_h_sys_gpr491_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR491 (newval);
+}
+
+/* Get the value of h-sys-gpr492. */
+
+USI
+or1k32bf_h_sys_gpr492_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR492 ();
+}
+
+/* Set a value for h-sys-gpr492. */
+
+void
+or1k32bf_h_sys_gpr492_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR492 (newval);
+}
+
+/* Get the value of h-sys-gpr493. */
+
+USI
+or1k32bf_h_sys_gpr493_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR493 ();
+}
+
+/* Set a value for h-sys-gpr493. */
+
+void
+or1k32bf_h_sys_gpr493_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR493 (newval);
+}
+
+/* Get the value of h-sys-gpr494. */
+
+USI
+or1k32bf_h_sys_gpr494_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR494 ();
+}
+
+/* Set a value for h-sys-gpr494. */
+
+void
+or1k32bf_h_sys_gpr494_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR494 (newval);
+}
+
+/* Get the value of h-sys-gpr495. */
+
+USI
+or1k32bf_h_sys_gpr495_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR495 ();
+}
+
+/* Set a value for h-sys-gpr495. */
+
+void
+or1k32bf_h_sys_gpr495_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR495 (newval);
+}
+
+/* Get the value of h-sys-gpr496. */
+
+USI
+or1k32bf_h_sys_gpr496_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR496 ();
+}
+
+/* Set a value for h-sys-gpr496. */
+
+void
+or1k32bf_h_sys_gpr496_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR496 (newval);
+}
+
+/* Get the value of h-sys-gpr497. */
+
+USI
+or1k32bf_h_sys_gpr497_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR497 ();
+}
+
+/* Set a value for h-sys-gpr497. */
+
+void
+or1k32bf_h_sys_gpr497_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR497 (newval);
+}
+
+/* Get the value of h-sys-gpr498. */
+
+USI
+or1k32bf_h_sys_gpr498_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR498 ();
+}
+
+/* Set a value for h-sys-gpr498. */
+
+void
+or1k32bf_h_sys_gpr498_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR498 (newval);
+}
+
+/* Get the value of h-sys-gpr499. */
+
+USI
+or1k32bf_h_sys_gpr499_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR499 ();
+}
+
+/* Set a value for h-sys-gpr499. */
+
+void
+or1k32bf_h_sys_gpr499_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR499 (newval);
+}
+
+/* Get the value of h-sys-gpr500. */
+
+USI
+or1k32bf_h_sys_gpr500_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR500 ();
+}
+
+/* Set a value for h-sys-gpr500. */
+
+void
+or1k32bf_h_sys_gpr500_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR500 (newval);
+}
+
+/* Get the value of h-sys-gpr501. */
+
+USI
+or1k32bf_h_sys_gpr501_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR501 ();
+}
+
+/* Set a value for h-sys-gpr501. */
+
+void
+or1k32bf_h_sys_gpr501_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR501 (newval);
+}
+
+/* Get the value of h-sys-gpr502. */
+
+USI
+or1k32bf_h_sys_gpr502_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR502 ();
+}
+
+/* Set a value for h-sys-gpr502. */
+
+void
+or1k32bf_h_sys_gpr502_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR502 (newval);
+}
+
+/* Get the value of h-sys-gpr503. */
+
+USI
+or1k32bf_h_sys_gpr503_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR503 ();
+}
+
+/* Set a value for h-sys-gpr503. */
+
+void
+or1k32bf_h_sys_gpr503_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR503 (newval);
+}
+
+/* Get the value of h-sys-gpr504. */
+
+USI
+or1k32bf_h_sys_gpr504_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR504 ();
+}
+
+/* Set a value for h-sys-gpr504. */
+
+void
+or1k32bf_h_sys_gpr504_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR504 (newval);
+}
+
+/* Get the value of h-sys-gpr505. */
+
+USI
+or1k32bf_h_sys_gpr505_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR505 ();
+}
+
+/* Set a value for h-sys-gpr505. */
+
+void
+or1k32bf_h_sys_gpr505_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR505 (newval);
+}
+
+/* Get the value of h-sys-gpr506. */
+
+USI
+or1k32bf_h_sys_gpr506_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR506 ();
+}
+
+/* Set a value for h-sys-gpr506. */
+
+void
+or1k32bf_h_sys_gpr506_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR506 (newval);
+}
+
+/* Get the value of h-sys-gpr507. */
+
+USI
+or1k32bf_h_sys_gpr507_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR507 ();
+}
+
+/* Set a value for h-sys-gpr507. */
+
+void
+or1k32bf_h_sys_gpr507_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR507 (newval);
+}
+
+/* Get the value of h-sys-gpr508. */
+
+USI
+or1k32bf_h_sys_gpr508_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR508 ();
+}
+
+/* Set a value for h-sys-gpr508. */
+
+void
+or1k32bf_h_sys_gpr508_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR508 (newval);
+}
+
+/* Get the value of h-sys-gpr509. */
+
+USI
+or1k32bf_h_sys_gpr509_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR509 ();
+}
+
+/* Set a value for h-sys-gpr509. */
+
+void
+or1k32bf_h_sys_gpr509_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR509 (newval);
+}
+
+/* Get the value of h-sys-gpr510. */
+
+USI
+or1k32bf_h_sys_gpr510_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR510 ();
+}
+
+/* Set a value for h-sys-gpr510. */
+
+void
+or1k32bf_h_sys_gpr510_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR510 (newval);
+}
+
+/* Get the value of h-sys-gpr511. */
+
+USI
+or1k32bf_h_sys_gpr511_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR511 ();
+}
+
+/* Set a value for h-sys-gpr511. */
+
+void
+or1k32bf_h_sys_gpr511_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_GPR511 (newval);
+}
+
+/* Get the value of h-mac-maclo. */
+
+USI
+or1k32bf_h_mac_maclo_get (SIM_CPU *current_cpu)
+{
+ return GET_H_MAC_MACLO ();
+}
+
+/* Set a value for h-mac-maclo. */
+
+void
+or1k32bf_h_mac_maclo_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_MAC_MACLO (newval);
+}
+
+/* Get the value of h-mac-machi. */
+
+USI
+or1k32bf_h_mac_machi_get (SIM_CPU *current_cpu)
+{
+ return GET_H_MAC_MACHI ();
+}
+
+/* Set a value for h-mac-machi. */
+
+void
+or1k32bf_h_mac_machi_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_MAC_MACHI (newval);
+}
+
+/* Get the value of h-sys-vr-rev. */
+
+USI
+or1k32bf_h_sys_vr_rev_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR_REV ();
+}
+
+/* Set a value for h-sys-vr-rev. */
+
+void
+or1k32bf_h_sys_vr_rev_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_VR_REV (newval);
+}
+
+/* Get the value of h-sys-vr-cfg. */
+
+USI
+or1k32bf_h_sys_vr_cfg_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR_CFG ();
+}
+
+/* Set a value for h-sys-vr-cfg. */
+
+void
+or1k32bf_h_sys_vr_cfg_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_VR_CFG (newval);
+}
+
+/* Get the value of h-sys-vr-ver. */
+
+USI
+or1k32bf_h_sys_vr_ver_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR_VER ();
+}
+
+/* Set a value for h-sys-vr-ver. */
+
+void
+or1k32bf_h_sys_vr_ver_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_VR_VER (newval);
+}
+
+/* Get the value of h-sys-upr-up. */
+
+USI
+or1k32bf_h_sys_upr_up_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_UP ();
+}
+
+/* Set a value for h-sys-upr-up. */
+
+void
+or1k32bf_h_sys_upr_up_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_UP (newval);
+}
+
+/* Get the value of h-sys-upr-dcp. */
+
+USI
+or1k32bf_h_sys_upr_dcp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_DCP ();
+}
+
+/* Set a value for h-sys-upr-dcp. */
+
+void
+or1k32bf_h_sys_upr_dcp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_DCP (newval);
+}
+
+/* Get the value of h-sys-upr-icp. */
+
+USI
+or1k32bf_h_sys_upr_icp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_ICP ();
+}
+
+/* Set a value for h-sys-upr-icp. */
+
+void
+or1k32bf_h_sys_upr_icp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_ICP (newval);
+}
+
+/* Get the value of h-sys-upr-dmp. */
+
+USI
+or1k32bf_h_sys_upr_dmp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_DMP ();
+}
+
+/* Set a value for h-sys-upr-dmp. */
+
+void
+or1k32bf_h_sys_upr_dmp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_DMP (newval);
+}
+
+/* Get the value of h-sys-upr-mp. */
+
+USI
+or1k32bf_h_sys_upr_mp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_MP ();
+}
+
+/* Set a value for h-sys-upr-mp. */
+
+void
+or1k32bf_h_sys_upr_mp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_MP (newval);
+}
+
+/* Get the value of h-sys-upr-imp. */
+
+USI
+or1k32bf_h_sys_upr_imp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_IMP ();
+}
+
+/* Set a value for h-sys-upr-imp. */
+
+void
+or1k32bf_h_sys_upr_imp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_IMP (newval);
+}
+
+/* Get the value of h-sys-upr-dup. */
+
+USI
+or1k32bf_h_sys_upr_dup_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_DUP ();
+}
+
+/* Set a value for h-sys-upr-dup. */
+
+void
+or1k32bf_h_sys_upr_dup_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_DUP (newval);
+}
+
+/* Get the value of h-sys-upr-pcup. */
+
+USI
+or1k32bf_h_sys_upr_pcup_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_PCUP ();
+}
+
+/* Set a value for h-sys-upr-pcup. */
+
+void
+or1k32bf_h_sys_upr_pcup_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_PCUP (newval);
+}
+
+/* Get the value of h-sys-upr-picp. */
+
+USI
+or1k32bf_h_sys_upr_picp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_PICP ();
+}
+
+/* Set a value for h-sys-upr-picp. */
+
+void
+or1k32bf_h_sys_upr_picp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_PICP (newval);
+}
+
+/* Get the value of h-sys-upr-pmp. */
+
+USI
+or1k32bf_h_sys_upr_pmp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_PMP ();
+}
+
+/* Set a value for h-sys-upr-pmp. */
+
+void
+or1k32bf_h_sys_upr_pmp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_PMP (newval);
+}
+
+/* Get the value of h-sys-upr-ttp. */
+
+USI
+or1k32bf_h_sys_upr_ttp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_TTP ();
+}
+
+/* Set a value for h-sys-upr-ttp. */
+
+void
+or1k32bf_h_sys_upr_ttp_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_TTP (newval);
+}
+
+/* Get the value of h-sys-upr-cup. */
+
+USI
+or1k32bf_h_sys_upr_cup_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_CUP ();
+}
+
+/* Set a value for h-sys-upr-cup. */
+
+void
+or1k32bf_h_sys_upr_cup_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_UPR_CUP (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-nsgr. */
+
+USI
+or1k32bf_h_sys_cpucfgr_nsgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_NSGR ();
+}
+
+/* Set a value for h-sys-cpucfgr-nsgr. */
+
+void
+or1k32bf_h_sys_cpucfgr_nsgr_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_NSGR (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-cgf. */
+
+USI
+or1k32bf_h_sys_cpucfgr_cgf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_CGF ();
+}
+
+/* Set a value for h-sys-cpucfgr-cgf. */
+
+void
+or1k32bf_h_sys_cpucfgr_cgf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_CGF (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-ob32s. */
+
+USI
+or1k32bf_h_sys_cpucfgr_ob32s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OB32S ();
+}
+
+/* Set a value for h-sys-cpucfgr-ob32s. */
+
+void
+or1k32bf_h_sys_cpucfgr_ob32s_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_OB32S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-ob64s. */
+
+USI
+or1k32bf_h_sys_cpucfgr_ob64s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OB64S ();
+}
+
+/* Set a value for h-sys-cpucfgr-ob64s. */
+
+void
+or1k32bf_h_sys_cpucfgr_ob64s_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_OB64S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-of32s. */
+
+USI
+or1k32bf_h_sys_cpucfgr_of32s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OF32S ();
+}
+
+/* Set a value for h-sys-cpucfgr-of32s. */
+
+void
+or1k32bf_h_sys_cpucfgr_of32s_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_OF32S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-of64s. */
+
+USI
+or1k32bf_h_sys_cpucfgr_of64s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OF64S ();
+}
+
+/* Set a value for h-sys-cpucfgr-of64s. */
+
+void
+or1k32bf_h_sys_cpucfgr_of64s_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_OF64S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-ov64s. */
+
+USI
+or1k32bf_h_sys_cpucfgr_ov64s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OV64S ();
+}
+
+/* Set a value for h-sys-cpucfgr-ov64s. */
+
+void
+or1k32bf_h_sys_cpucfgr_ov64s_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_OV64S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-nd. */
+
+USI
+or1k32bf_h_sys_cpucfgr_nd_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_ND ();
+}
+
+/* Set a value for h-sys-cpucfgr-nd. */
+
+void
+or1k32bf_h_sys_cpucfgr_nd_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_CPUCFGR_ND (newval);
+}
+
+/* Get the value of h-sys-sr-sm. */
+
+USI
+or1k32bf_h_sys_sr_sm_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_SM ();
+}
+
+/* Set a value for h-sys-sr-sm. */
+
+void
+or1k32bf_h_sys_sr_sm_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_SM (newval);
+}
+
+/* Get the value of h-sys-sr-tee. */
+
+USI
+or1k32bf_h_sys_sr_tee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_TEE ();
+}
+
+/* Set a value for h-sys-sr-tee. */
+
+void
+or1k32bf_h_sys_sr_tee_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_TEE (newval);
+}
+
+/* Get the value of h-sys-sr-iee. */
+
+USI
+or1k32bf_h_sys_sr_iee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_IEE ();
+}
+
+/* Set a value for h-sys-sr-iee. */
+
+void
+or1k32bf_h_sys_sr_iee_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_IEE (newval);
+}
+
+/* Get the value of h-sys-sr-dce. */
+
+USI
+or1k32bf_h_sys_sr_dce_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_DCE ();
+}
+
+/* Set a value for h-sys-sr-dce. */
+
+void
+or1k32bf_h_sys_sr_dce_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_DCE (newval);
+}
+
+/* Get the value of h-sys-sr-ice. */
+
+USI
+or1k32bf_h_sys_sr_ice_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_ICE ();
+}
+
+/* Set a value for h-sys-sr-ice. */
+
+void
+or1k32bf_h_sys_sr_ice_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_ICE (newval);
+}
+
+/* Get the value of h-sys-sr-dme. */
+
+USI
+or1k32bf_h_sys_sr_dme_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_DME ();
+}
+
+/* Set a value for h-sys-sr-dme. */
+
+void
+or1k32bf_h_sys_sr_dme_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_DME (newval);
+}
+
+/* Get the value of h-sys-sr-ime. */
+
+USI
+or1k32bf_h_sys_sr_ime_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_IME ();
+}
+
+/* Set a value for h-sys-sr-ime. */
+
+void
+or1k32bf_h_sys_sr_ime_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_IME (newval);
+}
+
+/* Get the value of h-sys-sr-lee. */
+
+USI
+or1k32bf_h_sys_sr_lee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_LEE ();
+}
+
+/* Set a value for h-sys-sr-lee. */
+
+void
+or1k32bf_h_sys_sr_lee_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_LEE (newval);
+}
+
+/* Get the value of h-sys-sr-ce. */
+
+USI
+or1k32bf_h_sys_sr_ce_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_CE ();
+}
+
+/* Set a value for h-sys-sr-ce. */
+
+void
+or1k32bf_h_sys_sr_ce_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_CE (newval);
+}
+
+/* Get the value of h-sys-sr-f. */
+
+USI
+or1k32bf_h_sys_sr_f_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_F ();
+}
+
+/* Set a value for h-sys-sr-f. */
+
+void
+or1k32bf_h_sys_sr_f_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_F (newval);
+}
+
+/* Get the value of h-sys-sr-cy. */
+
+USI
+or1k32bf_h_sys_sr_cy_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_CY ();
+}
+
+/* Set a value for h-sys-sr-cy. */
+
+void
+or1k32bf_h_sys_sr_cy_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_CY (newval);
+}
+
+/* Get the value of h-sys-sr-ov. */
+
+USI
+or1k32bf_h_sys_sr_ov_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_OV ();
+}
+
+/* Set a value for h-sys-sr-ov. */
+
+void
+or1k32bf_h_sys_sr_ov_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_OV (newval);
+}
+
+/* Get the value of h-sys-sr-ove. */
+
+USI
+or1k32bf_h_sys_sr_ove_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_OVE ();
+}
+
+/* Set a value for h-sys-sr-ove. */
+
+void
+or1k32bf_h_sys_sr_ove_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_OVE (newval);
+}
+
+/* Get the value of h-sys-sr-dsx. */
+
+USI
+or1k32bf_h_sys_sr_dsx_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_DSX ();
+}
+
+/* Set a value for h-sys-sr-dsx. */
+
+void
+or1k32bf_h_sys_sr_dsx_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_DSX (newval);
+}
+
+/* Get the value of h-sys-sr-eph. */
+
+USI
+or1k32bf_h_sys_sr_eph_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_EPH ();
+}
+
+/* Set a value for h-sys-sr-eph. */
+
+void
+or1k32bf_h_sys_sr_eph_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_EPH (newval);
+}
+
+/* Get the value of h-sys-sr-fo. */
+
+USI
+or1k32bf_h_sys_sr_fo_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_FO ();
+}
+
+/* Set a value for h-sys-sr-fo. */
+
+void
+or1k32bf_h_sys_sr_fo_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_FO (newval);
+}
+
+/* Get the value of h-sys-sr-sumra. */
+
+USI
+or1k32bf_h_sys_sr_sumra_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_SUMRA ();
+}
+
+/* Set a value for h-sys-sr-sumra. */
+
+void
+or1k32bf_h_sys_sr_sumra_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_SUMRA (newval);
+}
+
+/* Get the value of h-sys-sr-cid. */
+
+USI
+or1k32bf_h_sys_sr_cid_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_CID ();
+}
+
+/* Set a value for h-sys-sr-cid. */
+
+void
+or1k32bf_h_sys_sr_cid_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_SR_CID (newval);
+}
+
+/* Get the value of h-sys-fpcsr-fpee. */
+
+USI
+or1k32bf_h_sys_fpcsr_fpee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_FPEE ();
+}
+
+/* Set a value for h-sys-fpcsr-fpee. */
+
+void
+or1k32bf_h_sys_fpcsr_fpee_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_FPEE (newval);
+}
+
+/* Get the value of h-sys-fpcsr-rm. */
+
+USI
+or1k32bf_h_sys_fpcsr_rm_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_RM ();
+}
+
+/* Set a value for h-sys-fpcsr-rm. */
+
+void
+or1k32bf_h_sys_fpcsr_rm_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_RM (newval);
+}
+
+/* Get the value of h-sys-fpcsr-ovf. */
+
+USI
+or1k32bf_h_sys_fpcsr_ovf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_OVF ();
+}
+
+/* Set a value for h-sys-fpcsr-ovf. */
+
+void
+or1k32bf_h_sys_fpcsr_ovf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_OVF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-unf. */
+
+USI
+or1k32bf_h_sys_fpcsr_unf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_UNF ();
+}
+
+/* Set a value for h-sys-fpcsr-unf. */
+
+void
+or1k32bf_h_sys_fpcsr_unf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_UNF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-snf. */
+
+USI
+or1k32bf_h_sys_fpcsr_snf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_SNF ();
+}
+
+/* Set a value for h-sys-fpcsr-snf. */
+
+void
+or1k32bf_h_sys_fpcsr_snf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_SNF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-qnf. */
+
+USI
+or1k32bf_h_sys_fpcsr_qnf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_QNF ();
+}
+
+/* Set a value for h-sys-fpcsr-qnf. */
+
+void
+or1k32bf_h_sys_fpcsr_qnf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_QNF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-zf. */
+
+USI
+or1k32bf_h_sys_fpcsr_zf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_ZF ();
+}
+
+/* Set a value for h-sys-fpcsr-zf. */
+
+void
+or1k32bf_h_sys_fpcsr_zf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_ZF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-ixf. */
+
+USI
+or1k32bf_h_sys_fpcsr_ixf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_IXF ();
+}
+
+/* Set a value for h-sys-fpcsr-ixf. */
+
+void
+or1k32bf_h_sys_fpcsr_ixf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_IXF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-ivf. */
+
+USI
+or1k32bf_h_sys_fpcsr_ivf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_IVF ();
+}
+
+/* Set a value for h-sys-fpcsr-ivf. */
+
+void
+or1k32bf_h_sys_fpcsr_ivf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_IVF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-inf. */
+
+USI
+or1k32bf_h_sys_fpcsr_inf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_INF ();
+}
+
+/* Set a value for h-sys-fpcsr-inf. */
+
+void
+or1k32bf_h_sys_fpcsr_inf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_INF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-dzf. */
+
+USI
+or1k32bf_h_sys_fpcsr_dzf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_DZF ();
+}
+
+/* Set a value for h-sys-fpcsr-dzf. */
+
+void
+or1k32bf_h_sys_fpcsr_dzf_set (SIM_CPU *current_cpu, USI newval)
+{
+ SET_H_SYS_FPCSR_DZF (newval);
+}
+
+/* Record trace results for INSN. */
+
+void
+or1k32bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
+ int *indices, TRACE_RECORD *tr)
+{
+}
diff --git a/sim/or1k/cpu32.h b/sim/or1k/cpu32.h
new file mode 100644
index 0000000..e3a8276
--- /dev/null
+++ b/sim/or1k/cpu32.h
@@ -0,0 +1,4992 @@
+/* CPU family header for or1k32bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef CPU_OR1K32BF_H
+#define CPU_OR1K32BF_H
+
+/* Maximum number of instructions that are fetched at a time.
+ This is for LIW type instructions sets (e.g. m32r). */
+#define MAX_LIW_INSNS 1
+
+/* Maximum number of instructions that can be executed in parallel. */
+#define MAX_PARALLEL_INSNS 1
+
+/* The size of an "int" needed to hold an instruction word.
+ This is usually 32 bits, but some architectures needs 64 bits. */
+typedef CGEN_INSN_INT CGEN_INSN_WORD;
+
+#include "cgen-engine.h"
+
+/* CPU state information. */
+typedef struct {
+ /* Hardware elements. */
+ struct {
+ /* program counter */
+ USI h_pc;
+#define GET_H_PC() CPU (h_pc)
+#define SET_H_PC(x) (CPU (h_pc) = (x))
+ /* general registers */
+ USI h_gpr[32];
+#define GET_H_GPR(index) GET_H_SPR (((index) + (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0))))
+#define SET_H_GPR(index, x) \
+do { \
+SET_H_SPR ((((index)) + (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0))), (x));\
+;} while (0)
+ } hardware;
+#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+} OR1K32BF_CPU_DATA;
+
+/* Virtual regs. */
+
+#define GET_H_FSR(index) SUBWORDSISF (TRUNCSISI (GET_H_GPR (index)))
+#define SET_H_FSR(index, x) \
+do { \
+SET_H_GPR ((index), ZEXTSISI (SUBWORDSFSI ((x))));\
+;} while (0)
+#define GET_H_SPR(index) or1k32bf_h_spr_get_raw (current_cpu, index)
+#define SET_H_SPR(index, x) \
+do { \
+or1k32bf_h_spr_set_raw (current_cpu, (index), (x));\
+;} while (0)
+#define GET_H_SYS_VR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR))
+#define SET_H_SYS_VR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), (x));\
+;} while (0)
+#define GET_H_SYS_UPR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR))
+#define SET_H_SYS_UPR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR))
+#define SET_H_SYS_CPUCFGR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_DMMUCFGR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DMMUCFGR))
+#define SET_H_SYS_DMMUCFGR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DMMUCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_IMMUCFGR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_IMMUCFGR))
+#define SET_H_SYS_IMMUCFGR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_IMMUCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_DCCFGR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCCFGR))
+#define SET_H_SYS_DCCFGR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_ICCFGR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ICCFGR))
+#define SET_H_SYS_ICCFGR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ICCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_DCFGR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCFGR))
+#define SET_H_SYS_DCFGR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_PCCFGR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PCCFGR))
+#define SET_H_SYS_PCCFGR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PCCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_NPC() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_NPC))
+#define SET_H_SYS_NPC(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_NPC), (x));\
+;} while (0)
+#define GET_H_SYS_SR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR))
+#define SET_H_SYS_SR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), (x));\
+;} while (0)
+#define GET_H_SYS_PPC() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PPC))
+#define SET_H_SYS_PPC(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PPC), (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR))
+#define SET_H_SYS_FPCSR(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR0() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR0))
+#define SET_H_SYS_EPCR0(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR0), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR1() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR1))
+#define SET_H_SYS_EPCR1(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR1), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR2() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR2))
+#define SET_H_SYS_EPCR2(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR2), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR3() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR3))
+#define SET_H_SYS_EPCR3(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR3), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR4() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR4))
+#define SET_H_SYS_EPCR4(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR4), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR5() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR5))
+#define SET_H_SYS_EPCR5(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR5), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR6() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR6))
+#define SET_H_SYS_EPCR6(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR6), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR7() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR7))
+#define SET_H_SYS_EPCR7(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR7), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR8() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR8))
+#define SET_H_SYS_EPCR8(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR8), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR9() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR9))
+#define SET_H_SYS_EPCR9(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR9), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR10() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR10))
+#define SET_H_SYS_EPCR10(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR10), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR11() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR11))
+#define SET_H_SYS_EPCR11(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR11), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR12() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR12))
+#define SET_H_SYS_EPCR12(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR12), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR13() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR13))
+#define SET_H_SYS_EPCR13(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR13), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR14() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR14))
+#define SET_H_SYS_EPCR14(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR14), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR15() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR15))
+#define SET_H_SYS_EPCR15(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR15), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR0() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR0))
+#define SET_H_SYS_EEAR0(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR0), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR1() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR1))
+#define SET_H_SYS_EEAR1(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR1), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR2() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR2))
+#define SET_H_SYS_EEAR2(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR2), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR3() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR3))
+#define SET_H_SYS_EEAR3(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR3), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR4() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR4))
+#define SET_H_SYS_EEAR4(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR4), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR5() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR5))
+#define SET_H_SYS_EEAR5(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR5), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR6() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR6))
+#define SET_H_SYS_EEAR6(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR6), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR7() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR7))
+#define SET_H_SYS_EEAR7(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR7), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR8() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR8))
+#define SET_H_SYS_EEAR8(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR8), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR9() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR9))
+#define SET_H_SYS_EEAR9(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR9), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR10() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR10))
+#define SET_H_SYS_EEAR10(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR10), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR11() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR11))
+#define SET_H_SYS_EEAR11(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR11), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR12() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR12))
+#define SET_H_SYS_EEAR12(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR12), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR13() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR13))
+#define SET_H_SYS_EEAR13(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR13), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR14() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR14))
+#define SET_H_SYS_EEAR14(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR14), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR15() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR15))
+#define SET_H_SYS_EEAR15(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR15), (x));\
+;} while (0)
+#define GET_H_SYS_ESR0() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR0))
+#define SET_H_SYS_ESR0(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR0), (x));\
+;} while (0)
+#define GET_H_SYS_ESR1() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR1))
+#define SET_H_SYS_ESR1(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR1), (x));\
+;} while (0)
+#define GET_H_SYS_ESR2() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR2))
+#define SET_H_SYS_ESR2(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR2), (x));\
+;} while (0)
+#define GET_H_SYS_ESR3() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR3))
+#define SET_H_SYS_ESR3(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR3), (x));\
+;} while (0)
+#define GET_H_SYS_ESR4() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR4))
+#define SET_H_SYS_ESR4(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR4), (x));\
+;} while (0)
+#define GET_H_SYS_ESR5() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR5))
+#define SET_H_SYS_ESR5(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR5), (x));\
+;} while (0)
+#define GET_H_SYS_ESR6() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR6))
+#define SET_H_SYS_ESR6(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR6), (x));\
+;} while (0)
+#define GET_H_SYS_ESR7() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR7))
+#define SET_H_SYS_ESR7(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR7), (x));\
+;} while (0)
+#define GET_H_SYS_ESR8() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR8))
+#define SET_H_SYS_ESR8(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR8), (x));\
+;} while (0)
+#define GET_H_SYS_ESR9() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR9))
+#define SET_H_SYS_ESR9(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR9), (x));\
+;} while (0)
+#define GET_H_SYS_ESR10() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR10))
+#define SET_H_SYS_ESR10(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR10), (x));\
+;} while (0)
+#define GET_H_SYS_ESR11() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR11))
+#define SET_H_SYS_ESR11(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR11), (x));\
+;} while (0)
+#define GET_H_SYS_ESR12() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR12))
+#define SET_H_SYS_ESR12(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR12), (x));\
+;} while (0)
+#define GET_H_SYS_ESR13() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR13))
+#define SET_H_SYS_ESR13(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR13), (x));\
+;} while (0)
+#define GET_H_SYS_ESR14() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR14))
+#define SET_H_SYS_ESR14(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR14), (x));\
+;} while (0)
+#define GET_H_SYS_ESR15() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR15))
+#define SET_H_SYS_ESR15(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR15), (x));\
+;} while (0)
+#define GET_H_SYS_GPR0() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0))
+#define SET_H_SYS_GPR0(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0), (x));\
+;} while (0)
+#define GET_H_SYS_GPR1() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR1))
+#define SET_H_SYS_GPR1(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR1), (x));\
+;} while (0)
+#define GET_H_SYS_GPR2() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR2))
+#define SET_H_SYS_GPR2(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR2), (x));\
+;} while (0)
+#define GET_H_SYS_GPR3() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR3))
+#define SET_H_SYS_GPR3(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR3), (x));\
+;} while (0)
+#define GET_H_SYS_GPR4() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR4))
+#define SET_H_SYS_GPR4(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR4), (x));\
+;} while (0)
+#define GET_H_SYS_GPR5() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR5))
+#define SET_H_SYS_GPR5(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR5), (x));\
+;} while (0)
+#define GET_H_SYS_GPR6() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR6))
+#define SET_H_SYS_GPR6(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR6), (x));\
+;} while (0)
+#define GET_H_SYS_GPR7() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR7))
+#define SET_H_SYS_GPR7(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR7), (x));\
+;} while (0)
+#define GET_H_SYS_GPR8() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR8))
+#define SET_H_SYS_GPR8(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR8), (x));\
+;} while (0)
+#define GET_H_SYS_GPR9() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR9))
+#define SET_H_SYS_GPR9(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR9), (x));\
+;} while (0)
+#define GET_H_SYS_GPR10() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR10))
+#define SET_H_SYS_GPR10(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR10), (x));\
+;} while (0)
+#define GET_H_SYS_GPR11() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR11))
+#define SET_H_SYS_GPR11(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR11), (x));\
+;} while (0)
+#define GET_H_SYS_GPR12() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR12))
+#define SET_H_SYS_GPR12(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR12), (x));\
+;} while (0)
+#define GET_H_SYS_GPR13() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR13))
+#define SET_H_SYS_GPR13(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR13), (x));\
+;} while (0)
+#define GET_H_SYS_GPR14() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR14))
+#define SET_H_SYS_GPR14(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR14), (x));\
+;} while (0)
+#define GET_H_SYS_GPR15() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR15))
+#define SET_H_SYS_GPR15(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR15), (x));\
+;} while (0)
+#define GET_H_SYS_GPR16() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR16))
+#define SET_H_SYS_GPR16(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR16), (x));\
+;} while (0)
+#define GET_H_SYS_GPR17() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR17))
+#define SET_H_SYS_GPR17(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR17), (x));\
+;} while (0)
+#define GET_H_SYS_GPR18() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR18))
+#define SET_H_SYS_GPR18(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR18), (x));\
+;} while (0)
+#define GET_H_SYS_GPR19() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR19))
+#define SET_H_SYS_GPR19(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR19), (x));\
+;} while (0)
+#define GET_H_SYS_GPR20() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR20))
+#define SET_H_SYS_GPR20(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR20), (x));\
+;} while (0)
+#define GET_H_SYS_GPR21() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR21))
+#define SET_H_SYS_GPR21(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR21), (x));\
+;} while (0)
+#define GET_H_SYS_GPR22() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR22))
+#define SET_H_SYS_GPR22(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR22), (x));\
+;} while (0)
+#define GET_H_SYS_GPR23() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR23))
+#define SET_H_SYS_GPR23(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR23), (x));\
+;} while (0)
+#define GET_H_SYS_GPR24() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR24))
+#define SET_H_SYS_GPR24(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR24), (x));\
+;} while (0)
+#define GET_H_SYS_GPR25() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR25))
+#define SET_H_SYS_GPR25(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR25), (x));\
+;} while (0)
+#define GET_H_SYS_GPR26() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR26))
+#define SET_H_SYS_GPR26(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR26), (x));\
+;} while (0)
+#define GET_H_SYS_GPR27() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR27))
+#define SET_H_SYS_GPR27(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR27), (x));\
+;} while (0)
+#define GET_H_SYS_GPR28() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR28))
+#define SET_H_SYS_GPR28(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR28), (x));\
+;} while (0)
+#define GET_H_SYS_GPR29() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR29))
+#define SET_H_SYS_GPR29(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR29), (x));\
+;} while (0)
+#define GET_H_SYS_GPR30() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR30))
+#define SET_H_SYS_GPR30(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR30), (x));\
+;} while (0)
+#define GET_H_SYS_GPR31() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR31))
+#define SET_H_SYS_GPR31(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR31), (x));\
+;} while (0)
+#define GET_H_SYS_GPR32() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR32))
+#define SET_H_SYS_GPR32(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR32), (x));\
+;} while (0)
+#define GET_H_SYS_GPR33() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR33))
+#define SET_H_SYS_GPR33(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR33), (x));\
+;} while (0)
+#define GET_H_SYS_GPR34() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR34))
+#define SET_H_SYS_GPR34(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR34), (x));\
+;} while (0)
+#define GET_H_SYS_GPR35() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR35))
+#define SET_H_SYS_GPR35(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR35), (x));\
+;} while (0)
+#define GET_H_SYS_GPR36() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR36))
+#define SET_H_SYS_GPR36(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR36), (x));\
+;} while (0)
+#define GET_H_SYS_GPR37() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR37))
+#define SET_H_SYS_GPR37(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR37), (x));\
+;} while (0)
+#define GET_H_SYS_GPR38() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR38))
+#define SET_H_SYS_GPR38(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR38), (x));\
+;} while (0)
+#define GET_H_SYS_GPR39() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR39))
+#define SET_H_SYS_GPR39(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR39), (x));\
+;} while (0)
+#define GET_H_SYS_GPR40() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR40))
+#define SET_H_SYS_GPR40(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR40), (x));\
+;} while (0)
+#define GET_H_SYS_GPR41() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR41))
+#define SET_H_SYS_GPR41(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR41), (x));\
+;} while (0)
+#define GET_H_SYS_GPR42() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR42))
+#define SET_H_SYS_GPR42(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR42), (x));\
+;} while (0)
+#define GET_H_SYS_GPR43() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR43))
+#define SET_H_SYS_GPR43(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR43), (x));\
+;} while (0)
+#define GET_H_SYS_GPR44() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR44))
+#define SET_H_SYS_GPR44(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR44), (x));\
+;} while (0)
+#define GET_H_SYS_GPR45() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR45))
+#define SET_H_SYS_GPR45(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR45), (x));\
+;} while (0)
+#define GET_H_SYS_GPR46() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR46))
+#define SET_H_SYS_GPR46(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR46), (x));\
+;} while (0)
+#define GET_H_SYS_GPR47() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR47))
+#define SET_H_SYS_GPR47(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR47), (x));\
+;} while (0)
+#define GET_H_SYS_GPR48() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR48))
+#define SET_H_SYS_GPR48(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR48), (x));\
+;} while (0)
+#define GET_H_SYS_GPR49() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR49))
+#define SET_H_SYS_GPR49(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR49), (x));\
+;} while (0)
+#define GET_H_SYS_GPR50() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR50))
+#define SET_H_SYS_GPR50(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR50), (x));\
+;} while (0)
+#define GET_H_SYS_GPR51() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR51))
+#define SET_H_SYS_GPR51(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR51), (x));\
+;} while (0)
+#define GET_H_SYS_GPR52() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR52))
+#define SET_H_SYS_GPR52(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR52), (x));\
+;} while (0)
+#define GET_H_SYS_GPR53() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR53))
+#define SET_H_SYS_GPR53(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR53), (x));\
+;} while (0)
+#define GET_H_SYS_GPR54() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR54))
+#define SET_H_SYS_GPR54(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR54), (x));\
+;} while (0)
+#define GET_H_SYS_GPR55() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR55))
+#define SET_H_SYS_GPR55(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR55), (x));\
+;} while (0)
+#define GET_H_SYS_GPR56() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR56))
+#define SET_H_SYS_GPR56(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR56), (x));\
+;} while (0)
+#define GET_H_SYS_GPR57() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR57))
+#define SET_H_SYS_GPR57(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR57), (x));\
+;} while (0)
+#define GET_H_SYS_GPR58() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR58))
+#define SET_H_SYS_GPR58(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR58), (x));\
+;} while (0)
+#define GET_H_SYS_GPR59() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR59))
+#define SET_H_SYS_GPR59(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR59), (x));\
+;} while (0)
+#define GET_H_SYS_GPR60() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR60))
+#define SET_H_SYS_GPR60(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR60), (x));\
+;} while (0)
+#define GET_H_SYS_GPR61() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR61))
+#define SET_H_SYS_GPR61(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR61), (x));\
+;} while (0)
+#define GET_H_SYS_GPR62() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR62))
+#define SET_H_SYS_GPR62(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR62), (x));\
+;} while (0)
+#define GET_H_SYS_GPR63() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR63))
+#define SET_H_SYS_GPR63(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR63), (x));\
+;} while (0)
+#define GET_H_SYS_GPR64() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR64))
+#define SET_H_SYS_GPR64(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR64), (x));\
+;} while (0)
+#define GET_H_SYS_GPR65() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR65))
+#define SET_H_SYS_GPR65(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR65), (x));\
+;} while (0)
+#define GET_H_SYS_GPR66() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR66))
+#define SET_H_SYS_GPR66(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR66), (x));\
+;} while (0)
+#define GET_H_SYS_GPR67() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR67))
+#define SET_H_SYS_GPR67(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR67), (x));\
+;} while (0)
+#define GET_H_SYS_GPR68() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR68))
+#define SET_H_SYS_GPR68(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR68), (x));\
+;} while (0)
+#define GET_H_SYS_GPR69() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR69))
+#define SET_H_SYS_GPR69(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR69), (x));\
+;} while (0)
+#define GET_H_SYS_GPR70() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR70))
+#define SET_H_SYS_GPR70(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR70), (x));\
+;} while (0)
+#define GET_H_SYS_GPR71() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR71))
+#define SET_H_SYS_GPR71(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR71), (x));\
+;} while (0)
+#define GET_H_SYS_GPR72() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR72))
+#define SET_H_SYS_GPR72(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR72), (x));\
+;} while (0)
+#define GET_H_SYS_GPR73() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR73))
+#define SET_H_SYS_GPR73(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR73), (x));\
+;} while (0)
+#define GET_H_SYS_GPR74() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR74))
+#define SET_H_SYS_GPR74(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR74), (x));\
+;} while (0)
+#define GET_H_SYS_GPR75() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR75))
+#define SET_H_SYS_GPR75(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR75), (x));\
+;} while (0)
+#define GET_H_SYS_GPR76() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR76))
+#define SET_H_SYS_GPR76(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR76), (x));\
+;} while (0)
+#define GET_H_SYS_GPR77() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR77))
+#define SET_H_SYS_GPR77(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR77), (x));\
+;} while (0)
+#define GET_H_SYS_GPR78() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR78))
+#define SET_H_SYS_GPR78(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR78), (x));\
+;} while (0)
+#define GET_H_SYS_GPR79() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR79))
+#define SET_H_SYS_GPR79(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR79), (x));\
+;} while (0)
+#define GET_H_SYS_GPR80() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR80))
+#define SET_H_SYS_GPR80(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR80), (x));\
+;} while (0)
+#define GET_H_SYS_GPR81() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR81))
+#define SET_H_SYS_GPR81(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR81), (x));\
+;} while (0)
+#define GET_H_SYS_GPR82() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR82))
+#define SET_H_SYS_GPR82(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR82), (x));\
+;} while (0)
+#define GET_H_SYS_GPR83() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR83))
+#define SET_H_SYS_GPR83(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR83), (x));\
+;} while (0)
+#define GET_H_SYS_GPR84() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR84))
+#define SET_H_SYS_GPR84(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR84), (x));\
+;} while (0)
+#define GET_H_SYS_GPR85() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR85))
+#define SET_H_SYS_GPR85(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR85), (x));\
+;} while (0)
+#define GET_H_SYS_GPR86() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR86))
+#define SET_H_SYS_GPR86(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR86), (x));\
+;} while (0)
+#define GET_H_SYS_GPR87() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR87))
+#define SET_H_SYS_GPR87(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR87), (x));\
+;} while (0)
+#define GET_H_SYS_GPR88() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR88))
+#define SET_H_SYS_GPR88(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR88), (x));\
+;} while (0)
+#define GET_H_SYS_GPR89() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR89))
+#define SET_H_SYS_GPR89(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR89), (x));\
+;} while (0)
+#define GET_H_SYS_GPR90() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR90))
+#define SET_H_SYS_GPR90(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR90), (x));\
+;} while (0)
+#define GET_H_SYS_GPR91() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR91))
+#define SET_H_SYS_GPR91(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR91), (x));\
+;} while (0)
+#define GET_H_SYS_GPR92() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR92))
+#define SET_H_SYS_GPR92(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR92), (x));\
+;} while (0)
+#define GET_H_SYS_GPR93() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR93))
+#define SET_H_SYS_GPR93(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR93), (x));\
+;} while (0)
+#define GET_H_SYS_GPR94() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR94))
+#define SET_H_SYS_GPR94(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR94), (x));\
+;} while (0)
+#define GET_H_SYS_GPR95() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR95))
+#define SET_H_SYS_GPR95(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR95), (x));\
+;} while (0)
+#define GET_H_SYS_GPR96() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR96))
+#define SET_H_SYS_GPR96(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR96), (x));\
+;} while (0)
+#define GET_H_SYS_GPR97() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR97))
+#define SET_H_SYS_GPR97(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR97), (x));\
+;} while (0)
+#define GET_H_SYS_GPR98() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR98))
+#define SET_H_SYS_GPR98(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR98), (x));\
+;} while (0)
+#define GET_H_SYS_GPR99() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR99))
+#define SET_H_SYS_GPR99(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR99), (x));\
+;} while (0)
+#define GET_H_SYS_GPR100() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR100))
+#define SET_H_SYS_GPR100(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR100), (x));\
+;} while (0)
+#define GET_H_SYS_GPR101() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR101))
+#define SET_H_SYS_GPR101(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR101), (x));\
+;} while (0)
+#define GET_H_SYS_GPR102() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR102))
+#define SET_H_SYS_GPR102(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR102), (x));\
+;} while (0)
+#define GET_H_SYS_GPR103() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR103))
+#define SET_H_SYS_GPR103(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR103), (x));\
+;} while (0)
+#define GET_H_SYS_GPR104() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR104))
+#define SET_H_SYS_GPR104(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR104), (x));\
+;} while (0)
+#define GET_H_SYS_GPR105() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR105))
+#define SET_H_SYS_GPR105(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR105), (x));\
+;} while (0)
+#define GET_H_SYS_GPR106() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR106))
+#define SET_H_SYS_GPR106(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR106), (x));\
+;} while (0)
+#define GET_H_SYS_GPR107() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR107))
+#define SET_H_SYS_GPR107(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR107), (x));\
+;} while (0)
+#define GET_H_SYS_GPR108() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR108))
+#define SET_H_SYS_GPR108(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR108), (x));\
+;} while (0)
+#define GET_H_SYS_GPR109() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR109))
+#define SET_H_SYS_GPR109(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR109), (x));\
+;} while (0)
+#define GET_H_SYS_GPR110() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR110))
+#define SET_H_SYS_GPR110(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR110), (x));\
+;} while (0)
+#define GET_H_SYS_GPR111() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR111))
+#define SET_H_SYS_GPR111(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR111), (x));\
+;} while (0)
+#define GET_H_SYS_GPR112() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR112))
+#define SET_H_SYS_GPR112(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR112), (x));\
+;} while (0)
+#define GET_H_SYS_GPR113() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR113))
+#define SET_H_SYS_GPR113(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR113), (x));\
+;} while (0)
+#define GET_H_SYS_GPR114() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR114))
+#define SET_H_SYS_GPR114(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR114), (x));\
+;} while (0)
+#define GET_H_SYS_GPR115() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR115))
+#define SET_H_SYS_GPR115(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR115), (x));\
+;} while (0)
+#define GET_H_SYS_GPR116() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR116))
+#define SET_H_SYS_GPR116(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR116), (x));\
+;} while (0)
+#define GET_H_SYS_GPR117() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR117))
+#define SET_H_SYS_GPR117(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR117), (x));\
+;} while (0)
+#define GET_H_SYS_GPR118() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR118))
+#define SET_H_SYS_GPR118(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR118), (x));\
+;} while (0)
+#define GET_H_SYS_GPR119() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR119))
+#define SET_H_SYS_GPR119(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR119), (x));\
+;} while (0)
+#define GET_H_SYS_GPR120() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR120))
+#define SET_H_SYS_GPR120(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR120), (x));\
+;} while (0)
+#define GET_H_SYS_GPR121() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR121))
+#define SET_H_SYS_GPR121(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR121), (x));\
+;} while (0)
+#define GET_H_SYS_GPR122() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR122))
+#define SET_H_SYS_GPR122(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR122), (x));\
+;} while (0)
+#define GET_H_SYS_GPR123() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR123))
+#define SET_H_SYS_GPR123(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR123), (x));\
+;} while (0)
+#define GET_H_SYS_GPR124() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR124))
+#define SET_H_SYS_GPR124(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR124), (x));\
+;} while (0)
+#define GET_H_SYS_GPR125() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR125))
+#define SET_H_SYS_GPR125(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR125), (x));\
+;} while (0)
+#define GET_H_SYS_GPR126() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR126))
+#define SET_H_SYS_GPR126(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR126), (x));\
+;} while (0)
+#define GET_H_SYS_GPR127() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR127))
+#define SET_H_SYS_GPR127(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR127), (x));\
+;} while (0)
+#define GET_H_SYS_GPR128() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR128))
+#define SET_H_SYS_GPR128(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR128), (x));\
+;} while (0)
+#define GET_H_SYS_GPR129() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR129))
+#define SET_H_SYS_GPR129(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR129), (x));\
+;} while (0)
+#define GET_H_SYS_GPR130() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR130))
+#define SET_H_SYS_GPR130(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR130), (x));\
+;} while (0)
+#define GET_H_SYS_GPR131() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR131))
+#define SET_H_SYS_GPR131(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR131), (x));\
+;} while (0)
+#define GET_H_SYS_GPR132() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR132))
+#define SET_H_SYS_GPR132(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR132), (x));\
+;} while (0)
+#define GET_H_SYS_GPR133() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR133))
+#define SET_H_SYS_GPR133(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR133), (x));\
+;} while (0)
+#define GET_H_SYS_GPR134() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR134))
+#define SET_H_SYS_GPR134(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR134), (x));\
+;} while (0)
+#define GET_H_SYS_GPR135() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR135))
+#define SET_H_SYS_GPR135(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR135), (x));\
+;} while (0)
+#define GET_H_SYS_GPR136() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR136))
+#define SET_H_SYS_GPR136(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR136), (x));\
+;} while (0)
+#define GET_H_SYS_GPR137() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR137))
+#define SET_H_SYS_GPR137(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR137), (x));\
+;} while (0)
+#define GET_H_SYS_GPR138() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR138))
+#define SET_H_SYS_GPR138(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR138), (x));\
+;} while (0)
+#define GET_H_SYS_GPR139() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR139))
+#define SET_H_SYS_GPR139(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR139), (x));\
+;} while (0)
+#define GET_H_SYS_GPR140() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR140))
+#define SET_H_SYS_GPR140(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR140), (x));\
+;} while (0)
+#define GET_H_SYS_GPR141() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR141))
+#define SET_H_SYS_GPR141(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR141), (x));\
+;} while (0)
+#define GET_H_SYS_GPR142() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR142))
+#define SET_H_SYS_GPR142(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR142), (x));\
+;} while (0)
+#define GET_H_SYS_GPR143() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR143))
+#define SET_H_SYS_GPR143(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR143), (x));\
+;} while (0)
+#define GET_H_SYS_GPR144() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR144))
+#define SET_H_SYS_GPR144(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR144), (x));\
+;} while (0)
+#define GET_H_SYS_GPR145() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR145))
+#define SET_H_SYS_GPR145(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR145), (x));\
+;} while (0)
+#define GET_H_SYS_GPR146() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR146))
+#define SET_H_SYS_GPR146(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR146), (x));\
+;} while (0)
+#define GET_H_SYS_GPR147() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR147))
+#define SET_H_SYS_GPR147(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR147), (x));\
+;} while (0)
+#define GET_H_SYS_GPR148() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR148))
+#define SET_H_SYS_GPR148(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR148), (x));\
+;} while (0)
+#define GET_H_SYS_GPR149() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR149))
+#define SET_H_SYS_GPR149(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR149), (x));\
+;} while (0)
+#define GET_H_SYS_GPR150() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR150))
+#define SET_H_SYS_GPR150(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR150), (x));\
+;} while (0)
+#define GET_H_SYS_GPR151() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR151))
+#define SET_H_SYS_GPR151(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR151), (x));\
+;} while (0)
+#define GET_H_SYS_GPR152() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR152))
+#define SET_H_SYS_GPR152(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR152), (x));\
+;} while (0)
+#define GET_H_SYS_GPR153() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR153))
+#define SET_H_SYS_GPR153(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR153), (x));\
+;} while (0)
+#define GET_H_SYS_GPR154() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR154))
+#define SET_H_SYS_GPR154(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR154), (x));\
+;} while (0)
+#define GET_H_SYS_GPR155() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR155))
+#define SET_H_SYS_GPR155(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR155), (x));\
+;} while (0)
+#define GET_H_SYS_GPR156() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR156))
+#define SET_H_SYS_GPR156(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR156), (x));\
+;} while (0)
+#define GET_H_SYS_GPR157() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR157))
+#define SET_H_SYS_GPR157(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR157), (x));\
+;} while (0)
+#define GET_H_SYS_GPR158() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR158))
+#define SET_H_SYS_GPR158(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR158), (x));\
+;} while (0)
+#define GET_H_SYS_GPR159() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR159))
+#define SET_H_SYS_GPR159(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR159), (x));\
+;} while (0)
+#define GET_H_SYS_GPR160() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR160))
+#define SET_H_SYS_GPR160(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR160), (x));\
+;} while (0)
+#define GET_H_SYS_GPR161() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR161))
+#define SET_H_SYS_GPR161(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR161), (x));\
+;} while (0)
+#define GET_H_SYS_GPR162() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR162))
+#define SET_H_SYS_GPR162(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR162), (x));\
+;} while (0)
+#define GET_H_SYS_GPR163() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR163))
+#define SET_H_SYS_GPR163(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR163), (x));\
+;} while (0)
+#define GET_H_SYS_GPR164() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR164))
+#define SET_H_SYS_GPR164(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR164), (x));\
+;} while (0)
+#define GET_H_SYS_GPR165() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR165))
+#define SET_H_SYS_GPR165(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR165), (x));\
+;} while (0)
+#define GET_H_SYS_GPR166() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR166))
+#define SET_H_SYS_GPR166(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR166), (x));\
+;} while (0)
+#define GET_H_SYS_GPR167() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR167))
+#define SET_H_SYS_GPR167(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR167), (x));\
+;} while (0)
+#define GET_H_SYS_GPR168() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR168))
+#define SET_H_SYS_GPR168(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR168), (x));\
+;} while (0)
+#define GET_H_SYS_GPR169() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR169))
+#define SET_H_SYS_GPR169(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR169), (x));\
+;} while (0)
+#define GET_H_SYS_GPR170() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR170))
+#define SET_H_SYS_GPR170(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR170), (x));\
+;} while (0)
+#define GET_H_SYS_GPR171() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR171))
+#define SET_H_SYS_GPR171(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR171), (x));\
+;} while (0)
+#define GET_H_SYS_GPR172() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR172))
+#define SET_H_SYS_GPR172(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR172), (x));\
+;} while (0)
+#define GET_H_SYS_GPR173() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR173))
+#define SET_H_SYS_GPR173(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR173), (x));\
+;} while (0)
+#define GET_H_SYS_GPR174() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR174))
+#define SET_H_SYS_GPR174(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR174), (x));\
+;} while (0)
+#define GET_H_SYS_GPR175() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR175))
+#define SET_H_SYS_GPR175(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR175), (x));\
+;} while (0)
+#define GET_H_SYS_GPR176() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR176))
+#define SET_H_SYS_GPR176(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR176), (x));\
+;} while (0)
+#define GET_H_SYS_GPR177() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR177))
+#define SET_H_SYS_GPR177(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR177), (x));\
+;} while (0)
+#define GET_H_SYS_GPR178() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR178))
+#define SET_H_SYS_GPR178(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR178), (x));\
+;} while (0)
+#define GET_H_SYS_GPR179() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR179))
+#define SET_H_SYS_GPR179(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR179), (x));\
+;} while (0)
+#define GET_H_SYS_GPR180() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR180))
+#define SET_H_SYS_GPR180(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR180), (x));\
+;} while (0)
+#define GET_H_SYS_GPR181() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR181))
+#define SET_H_SYS_GPR181(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR181), (x));\
+;} while (0)
+#define GET_H_SYS_GPR182() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR182))
+#define SET_H_SYS_GPR182(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR182), (x));\
+;} while (0)
+#define GET_H_SYS_GPR183() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR183))
+#define SET_H_SYS_GPR183(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR183), (x));\
+;} while (0)
+#define GET_H_SYS_GPR184() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR184))
+#define SET_H_SYS_GPR184(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR184), (x));\
+;} while (0)
+#define GET_H_SYS_GPR185() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR185))
+#define SET_H_SYS_GPR185(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR185), (x));\
+;} while (0)
+#define GET_H_SYS_GPR186() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR186))
+#define SET_H_SYS_GPR186(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR186), (x));\
+;} while (0)
+#define GET_H_SYS_GPR187() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR187))
+#define SET_H_SYS_GPR187(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR187), (x));\
+;} while (0)
+#define GET_H_SYS_GPR188() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR188))
+#define SET_H_SYS_GPR188(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR188), (x));\
+;} while (0)
+#define GET_H_SYS_GPR189() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR189))
+#define SET_H_SYS_GPR189(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR189), (x));\
+;} while (0)
+#define GET_H_SYS_GPR190() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR190))
+#define SET_H_SYS_GPR190(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR190), (x));\
+;} while (0)
+#define GET_H_SYS_GPR191() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR191))
+#define SET_H_SYS_GPR191(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR191), (x));\
+;} while (0)
+#define GET_H_SYS_GPR192() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR192))
+#define SET_H_SYS_GPR192(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR192), (x));\
+;} while (0)
+#define GET_H_SYS_GPR193() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR193))
+#define SET_H_SYS_GPR193(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR193), (x));\
+;} while (0)
+#define GET_H_SYS_GPR194() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR194))
+#define SET_H_SYS_GPR194(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR194), (x));\
+;} while (0)
+#define GET_H_SYS_GPR195() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR195))
+#define SET_H_SYS_GPR195(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR195), (x));\
+;} while (0)
+#define GET_H_SYS_GPR196() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR196))
+#define SET_H_SYS_GPR196(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR196), (x));\
+;} while (0)
+#define GET_H_SYS_GPR197() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR197))
+#define SET_H_SYS_GPR197(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR197), (x));\
+;} while (0)
+#define GET_H_SYS_GPR198() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR198))
+#define SET_H_SYS_GPR198(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR198), (x));\
+;} while (0)
+#define GET_H_SYS_GPR199() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR199))
+#define SET_H_SYS_GPR199(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR199), (x));\
+;} while (0)
+#define GET_H_SYS_GPR200() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR200))
+#define SET_H_SYS_GPR200(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR200), (x));\
+;} while (0)
+#define GET_H_SYS_GPR201() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR201))
+#define SET_H_SYS_GPR201(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR201), (x));\
+;} while (0)
+#define GET_H_SYS_GPR202() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR202))
+#define SET_H_SYS_GPR202(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR202), (x));\
+;} while (0)
+#define GET_H_SYS_GPR203() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR203))
+#define SET_H_SYS_GPR203(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR203), (x));\
+;} while (0)
+#define GET_H_SYS_GPR204() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR204))
+#define SET_H_SYS_GPR204(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR204), (x));\
+;} while (0)
+#define GET_H_SYS_GPR205() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR205))
+#define SET_H_SYS_GPR205(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR205), (x));\
+;} while (0)
+#define GET_H_SYS_GPR206() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR206))
+#define SET_H_SYS_GPR206(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR206), (x));\
+;} while (0)
+#define GET_H_SYS_GPR207() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR207))
+#define SET_H_SYS_GPR207(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR207), (x));\
+;} while (0)
+#define GET_H_SYS_GPR208() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR208))
+#define SET_H_SYS_GPR208(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR208), (x));\
+;} while (0)
+#define GET_H_SYS_GPR209() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR209))
+#define SET_H_SYS_GPR209(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR209), (x));\
+;} while (0)
+#define GET_H_SYS_GPR210() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR210))
+#define SET_H_SYS_GPR210(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR210), (x));\
+;} while (0)
+#define GET_H_SYS_GPR211() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR211))
+#define SET_H_SYS_GPR211(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR211), (x));\
+;} while (0)
+#define GET_H_SYS_GPR212() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR212))
+#define SET_H_SYS_GPR212(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR212), (x));\
+;} while (0)
+#define GET_H_SYS_GPR213() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR213))
+#define SET_H_SYS_GPR213(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR213), (x));\
+;} while (0)
+#define GET_H_SYS_GPR214() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR214))
+#define SET_H_SYS_GPR214(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR214), (x));\
+;} while (0)
+#define GET_H_SYS_GPR215() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR215))
+#define SET_H_SYS_GPR215(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR215), (x));\
+;} while (0)
+#define GET_H_SYS_GPR216() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR216))
+#define SET_H_SYS_GPR216(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR216), (x));\
+;} while (0)
+#define GET_H_SYS_GPR217() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR217))
+#define SET_H_SYS_GPR217(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR217), (x));\
+;} while (0)
+#define GET_H_SYS_GPR218() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR218))
+#define SET_H_SYS_GPR218(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR218), (x));\
+;} while (0)
+#define GET_H_SYS_GPR219() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR219))
+#define SET_H_SYS_GPR219(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR219), (x));\
+;} while (0)
+#define GET_H_SYS_GPR220() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR220))
+#define SET_H_SYS_GPR220(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR220), (x));\
+;} while (0)
+#define GET_H_SYS_GPR221() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR221))
+#define SET_H_SYS_GPR221(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR221), (x));\
+;} while (0)
+#define GET_H_SYS_GPR222() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR222))
+#define SET_H_SYS_GPR222(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR222), (x));\
+;} while (0)
+#define GET_H_SYS_GPR223() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR223))
+#define SET_H_SYS_GPR223(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR223), (x));\
+;} while (0)
+#define GET_H_SYS_GPR224() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR224))
+#define SET_H_SYS_GPR224(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR224), (x));\
+;} while (0)
+#define GET_H_SYS_GPR225() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR225))
+#define SET_H_SYS_GPR225(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR225), (x));\
+;} while (0)
+#define GET_H_SYS_GPR226() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR226))
+#define SET_H_SYS_GPR226(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR226), (x));\
+;} while (0)
+#define GET_H_SYS_GPR227() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR227))
+#define SET_H_SYS_GPR227(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR227), (x));\
+;} while (0)
+#define GET_H_SYS_GPR228() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR228))
+#define SET_H_SYS_GPR228(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR228), (x));\
+;} while (0)
+#define GET_H_SYS_GPR229() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR229))
+#define SET_H_SYS_GPR229(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR229), (x));\
+;} while (0)
+#define GET_H_SYS_GPR230() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR230))
+#define SET_H_SYS_GPR230(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR230), (x));\
+;} while (0)
+#define GET_H_SYS_GPR231() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR231))
+#define SET_H_SYS_GPR231(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR231), (x));\
+;} while (0)
+#define GET_H_SYS_GPR232() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR232))
+#define SET_H_SYS_GPR232(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR232), (x));\
+;} while (0)
+#define GET_H_SYS_GPR233() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR233))
+#define SET_H_SYS_GPR233(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR233), (x));\
+;} while (0)
+#define GET_H_SYS_GPR234() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR234))
+#define SET_H_SYS_GPR234(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR234), (x));\
+;} while (0)
+#define GET_H_SYS_GPR235() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR235))
+#define SET_H_SYS_GPR235(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR235), (x));\
+;} while (0)
+#define GET_H_SYS_GPR236() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR236))
+#define SET_H_SYS_GPR236(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR236), (x));\
+;} while (0)
+#define GET_H_SYS_GPR237() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR237))
+#define SET_H_SYS_GPR237(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR237), (x));\
+;} while (0)
+#define GET_H_SYS_GPR238() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR238))
+#define SET_H_SYS_GPR238(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR238), (x));\
+;} while (0)
+#define GET_H_SYS_GPR239() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR239))
+#define SET_H_SYS_GPR239(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR239), (x));\
+;} while (0)
+#define GET_H_SYS_GPR240() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR240))
+#define SET_H_SYS_GPR240(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR240), (x));\
+;} while (0)
+#define GET_H_SYS_GPR241() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR241))
+#define SET_H_SYS_GPR241(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR241), (x));\
+;} while (0)
+#define GET_H_SYS_GPR242() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR242))
+#define SET_H_SYS_GPR242(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR242), (x));\
+;} while (0)
+#define GET_H_SYS_GPR243() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR243))
+#define SET_H_SYS_GPR243(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR243), (x));\
+;} while (0)
+#define GET_H_SYS_GPR244() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR244))
+#define SET_H_SYS_GPR244(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR244), (x));\
+;} while (0)
+#define GET_H_SYS_GPR245() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR245))
+#define SET_H_SYS_GPR245(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR245), (x));\
+;} while (0)
+#define GET_H_SYS_GPR246() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR246))
+#define SET_H_SYS_GPR246(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR246), (x));\
+;} while (0)
+#define GET_H_SYS_GPR247() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR247))
+#define SET_H_SYS_GPR247(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR247), (x));\
+;} while (0)
+#define GET_H_SYS_GPR248() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR248))
+#define SET_H_SYS_GPR248(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR248), (x));\
+;} while (0)
+#define GET_H_SYS_GPR249() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR249))
+#define SET_H_SYS_GPR249(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR249), (x));\
+;} while (0)
+#define GET_H_SYS_GPR250() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR250))
+#define SET_H_SYS_GPR250(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR250), (x));\
+;} while (0)
+#define GET_H_SYS_GPR251() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR251))
+#define SET_H_SYS_GPR251(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR251), (x));\
+;} while (0)
+#define GET_H_SYS_GPR252() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR252))
+#define SET_H_SYS_GPR252(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR252), (x));\
+;} while (0)
+#define GET_H_SYS_GPR253() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR253))
+#define SET_H_SYS_GPR253(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR253), (x));\
+;} while (0)
+#define GET_H_SYS_GPR254() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR254))
+#define SET_H_SYS_GPR254(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR254), (x));\
+;} while (0)
+#define GET_H_SYS_GPR255() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR255))
+#define SET_H_SYS_GPR255(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR255), (x));\
+;} while (0)
+#define GET_H_SYS_GPR256() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR256))
+#define SET_H_SYS_GPR256(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR256), (x));\
+;} while (0)
+#define GET_H_SYS_GPR257() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR257))
+#define SET_H_SYS_GPR257(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR257), (x));\
+;} while (0)
+#define GET_H_SYS_GPR258() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR258))
+#define SET_H_SYS_GPR258(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR258), (x));\
+;} while (0)
+#define GET_H_SYS_GPR259() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR259))
+#define SET_H_SYS_GPR259(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR259), (x));\
+;} while (0)
+#define GET_H_SYS_GPR260() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR260))
+#define SET_H_SYS_GPR260(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR260), (x));\
+;} while (0)
+#define GET_H_SYS_GPR261() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR261))
+#define SET_H_SYS_GPR261(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR261), (x));\
+;} while (0)
+#define GET_H_SYS_GPR262() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR262))
+#define SET_H_SYS_GPR262(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR262), (x));\
+;} while (0)
+#define GET_H_SYS_GPR263() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR263))
+#define SET_H_SYS_GPR263(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR263), (x));\
+;} while (0)
+#define GET_H_SYS_GPR264() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR264))
+#define SET_H_SYS_GPR264(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR264), (x));\
+;} while (0)
+#define GET_H_SYS_GPR265() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR265))
+#define SET_H_SYS_GPR265(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR265), (x));\
+;} while (0)
+#define GET_H_SYS_GPR266() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR266))
+#define SET_H_SYS_GPR266(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR266), (x));\
+;} while (0)
+#define GET_H_SYS_GPR267() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR267))
+#define SET_H_SYS_GPR267(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR267), (x));\
+;} while (0)
+#define GET_H_SYS_GPR268() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR268))
+#define SET_H_SYS_GPR268(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR268), (x));\
+;} while (0)
+#define GET_H_SYS_GPR269() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR269))
+#define SET_H_SYS_GPR269(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR269), (x));\
+;} while (0)
+#define GET_H_SYS_GPR270() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR270))
+#define SET_H_SYS_GPR270(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR270), (x));\
+;} while (0)
+#define GET_H_SYS_GPR271() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR271))
+#define SET_H_SYS_GPR271(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR271), (x));\
+;} while (0)
+#define GET_H_SYS_GPR272() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR272))
+#define SET_H_SYS_GPR272(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR272), (x));\
+;} while (0)
+#define GET_H_SYS_GPR273() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR273))
+#define SET_H_SYS_GPR273(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR273), (x));\
+;} while (0)
+#define GET_H_SYS_GPR274() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR274))
+#define SET_H_SYS_GPR274(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR274), (x));\
+;} while (0)
+#define GET_H_SYS_GPR275() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR275))
+#define SET_H_SYS_GPR275(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR275), (x));\
+;} while (0)
+#define GET_H_SYS_GPR276() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR276))
+#define SET_H_SYS_GPR276(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR276), (x));\
+;} while (0)
+#define GET_H_SYS_GPR277() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR277))
+#define SET_H_SYS_GPR277(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR277), (x));\
+;} while (0)
+#define GET_H_SYS_GPR278() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR278))
+#define SET_H_SYS_GPR278(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR278), (x));\
+;} while (0)
+#define GET_H_SYS_GPR279() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR279))
+#define SET_H_SYS_GPR279(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR279), (x));\
+;} while (0)
+#define GET_H_SYS_GPR280() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR280))
+#define SET_H_SYS_GPR280(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR280), (x));\
+;} while (0)
+#define GET_H_SYS_GPR281() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR281))
+#define SET_H_SYS_GPR281(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR281), (x));\
+;} while (0)
+#define GET_H_SYS_GPR282() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR282))
+#define SET_H_SYS_GPR282(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR282), (x));\
+;} while (0)
+#define GET_H_SYS_GPR283() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR283))
+#define SET_H_SYS_GPR283(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR283), (x));\
+;} while (0)
+#define GET_H_SYS_GPR284() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR284))
+#define SET_H_SYS_GPR284(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR284), (x));\
+;} while (0)
+#define GET_H_SYS_GPR285() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR285))
+#define SET_H_SYS_GPR285(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR285), (x));\
+;} while (0)
+#define GET_H_SYS_GPR286() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR286))
+#define SET_H_SYS_GPR286(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR286), (x));\
+;} while (0)
+#define GET_H_SYS_GPR287() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR287))
+#define SET_H_SYS_GPR287(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR287), (x));\
+;} while (0)
+#define GET_H_SYS_GPR288() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR288))
+#define SET_H_SYS_GPR288(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR288), (x));\
+;} while (0)
+#define GET_H_SYS_GPR289() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR289))
+#define SET_H_SYS_GPR289(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR289), (x));\
+;} while (0)
+#define GET_H_SYS_GPR290() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR290))
+#define SET_H_SYS_GPR290(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR290), (x));\
+;} while (0)
+#define GET_H_SYS_GPR291() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR291))
+#define SET_H_SYS_GPR291(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR291), (x));\
+;} while (0)
+#define GET_H_SYS_GPR292() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR292))
+#define SET_H_SYS_GPR292(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR292), (x));\
+;} while (0)
+#define GET_H_SYS_GPR293() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR293))
+#define SET_H_SYS_GPR293(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR293), (x));\
+;} while (0)
+#define GET_H_SYS_GPR294() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR294))
+#define SET_H_SYS_GPR294(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR294), (x));\
+;} while (0)
+#define GET_H_SYS_GPR295() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR295))
+#define SET_H_SYS_GPR295(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR295), (x));\
+;} while (0)
+#define GET_H_SYS_GPR296() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR296))
+#define SET_H_SYS_GPR296(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR296), (x));\
+;} while (0)
+#define GET_H_SYS_GPR297() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR297))
+#define SET_H_SYS_GPR297(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR297), (x));\
+;} while (0)
+#define GET_H_SYS_GPR298() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR298))
+#define SET_H_SYS_GPR298(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR298), (x));\
+;} while (0)
+#define GET_H_SYS_GPR299() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR299))
+#define SET_H_SYS_GPR299(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR299), (x));\
+;} while (0)
+#define GET_H_SYS_GPR300() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR300))
+#define SET_H_SYS_GPR300(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR300), (x));\
+;} while (0)
+#define GET_H_SYS_GPR301() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR301))
+#define SET_H_SYS_GPR301(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR301), (x));\
+;} while (0)
+#define GET_H_SYS_GPR302() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR302))
+#define SET_H_SYS_GPR302(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR302), (x));\
+;} while (0)
+#define GET_H_SYS_GPR303() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR303))
+#define SET_H_SYS_GPR303(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR303), (x));\
+;} while (0)
+#define GET_H_SYS_GPR304() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR304))
+#define SET_H_SYS_GPR304(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR304), (x));\
+;} while (0)
+#define GET_H_SYS_GPR305() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR305))
+#define SET_H_SYS_GPR305(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR305), (x));\
+;} while (0)
+#define GET_H_SYS_GPR306() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR306))
+#define SET_H_SYS_GPR306(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR306), (x));\
+;} while (0)
+#define GET_H_SYS_GPR307() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR307))
+#define SET_H_SYS_GPR307(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR307), (x));\
+;} while (0)
+#define GET_H_SYS_GPR308() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR308))
+#define SET_H_SYS_GPR308(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR308), (x));\
+;} while (0)
+#define GET_H_SYS_GPR309() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR309))
+#define SET_H_SYS_GPR309(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR309), (x));\
+;} while (0)
+#define GET_H_SYS_GPR310() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR310))
+#define SET_H_SYS_GPR310(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR310), (x));\
+;} while (0)
+#define GET_H_SYS_GPR311() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR311))
+#define SET_H_SYS_GPR311(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR311), (x));\
+;} while (0)
+#define GET_H_SYS_GPR312() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR312))
+#define SET_H_SYS_GPR312(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR312), (x));\
+;} while (0)
+#define GET_H_SYS_GPR313() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR313))
+#define SET_H_SYS_GPR313(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR313), (x));\
+;} while (0)
+#define GET_H_SYS_GPR314() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR314))
+#define SET_H_SYS_GPR314(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR314), (x));\
+;} while (0)
+#define GET_H_SYS_GPR315() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR315))
+#define SET_H_SYS_GPR315(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR315), (x));\
+;} while (0)
+#define GET_H_SYS_GPR316() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR316))
+#define SET_H_SYS_GPR316(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR316), (x));\
+;} while (0)
+#define GET_H_SYS_GPR317() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR317))
+#define SET_H_SYS_GPR317(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR317), (x));\
+;} while (0)
+#define GET_H_SYS_GPR318() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR318))
+#define SET_H_SYS_GPR318(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR318), (x));\
+;} while (0)
+#define GET_H_SYS_GPR319() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR319))
+#define SET_H_SYS_GPR319(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR319), (x));\
+;} while (0)
+#define GET_H_SYS_GPR320() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR320))
+#define SET_H_SYS_GPR320(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR320), (x));\
+;} while (0)
+#define GET_H_SYS_GPR321() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR321))
+#define SET_H_SYS_GPR321(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR321), (x));\
+;} while (0)
+#define GET_H_SYS_GPR322() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR322))
+#define SET_H_SYS_GPR322(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR322), (x));\
+;} while (0)
+#define GET_H_SYS_GPR323() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR323))
+#define SET_H_SYS_GPR323(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR323), (x));\
+;} while (0)
+#define GET_H_SYS_GPR324() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR324))
+#define SET_H_SYS_GPR324(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR324), (x));\
+;} while (0)
+#define GET_H_SYS_GPR325() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR325))
+#define SET_H_SYS_GPR325(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR325), (x));\
+;} while (0)
+#define GET_H_SYS_GPR326() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR326))
+#define SET_H_SYS_GPR326(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR326), (x));\
+;} while (0)
+#define GET_H_SYS_GPR327() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR327))
+#define SET_H_SYS_GPR327(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR327), (x));\
+;} while (0)
+#define GET_H_SYS_GPR328() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR328))
+#define SET_H_SYS_GPR328(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR328), (x));\
+;} while (0)
+#define GET_H_SYS_GPR329() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR329))
+#define SET_H_SYS_GPR329(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR329), (x));\
+;} while (0)
+#define GET_H_SYS_GPR330() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR330))
+#define SET_H_SYS_GPR330(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR330), (x));\
+;} while (0)
+#define GET_H_SYS_GPR331() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR331))
+#define SET_H_SYS_GPR331(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR331), (x));\
+;} while (0)
+#define GET_H_SYS_GPR332() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR332))
+#define SET_H_SYS_GPR332(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR332), (x));\
+;} while (0)
+#define GET_H_SYS_GPR333() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR333))
+#define SET_H_SYS_GPR333(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR333), (x));\
+;} while (0)
+#define GET_H_SYS_GPR334() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR334))
+#define SET_H_SYS_GPR334(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR334), (x));\
+;} while (0)
+#define GET_H_SYS_GPR335() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR335))
+#define SET_H_SYS_GPR335(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR335), (x));\
+;} while (0)
+#define GET_H_SYS_GPR336() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR336))
+#define SET_H_SYS_GPR336(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR336), (x));\
+;} while (0)
+#define GET_H_SYS_GPR337() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR337))
+#define SET_H_SYS_GPR337(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR337), (x));\
+;} while (0)
+#define GET_H_SYS_GPR338() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR338))
+#define SET_H_SYS_GPR338(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR338), (x));\
+;} while (0)
+#define GET_H_SYS_GPR339() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR339))
+#define SET_H_SYS_GPR339(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR339), (x));\
+;} while (0)
+#define GET_H_SYS_GPR340() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR340))
+#define SET_H_SYS_GPR340(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR340), (x));\
+;} while (0)
+#define GET_H_SYS_GPR341() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR341))
+#define SET_H_SYS_GPR341(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR341), (x));\
+;} while (0)
+#define GET_H_SYS_GPR342() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR342))
+#define SET_H_SYS_GPR342(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR342), (x));\
+;} while (0)
+#define GET_H_SYS_GPR343() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR343))
+#define SET_H_SYS_GPR343(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR343), (x));\
+;} while (0)
+#define GET_H_SYS_GPR344() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR344))
+#define SET_H_SYS_GPR344(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR344), (x));\
+;} while (0)
+#define GET_H_SYS_GPR345() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR345))
+#define SET_H_SYS_GPR345(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR345), (x));\
+;} while (0)
+#define GET_H_SYS_GPR346() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR346))
+#define SET_H_SYS_GPR346(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR346), (x));\
+;} while (0)
+#define GET_H_SYS_GPR347() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR347))
+#define SET_H_SYS_GPR347(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR347), (x));\
+;} while (0)
+#define GET_H_SYS_GPR348() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR348))
+#define SET_H_SYS_GPR348(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR348), (x));\
+;} while (0)
+#define GET_H_SYS_GPR349() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR349))
+#define SET_H_SYS_GPR349(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR349), (x));\
+;} while (0)
+#define GET_H_SYS_GPR350() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR350))
+#define SET_H_SYS_GPR350(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR350), (x));\
+;} while (0)
+#define GET_H_SYS_GPR351() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR351))
+#define SET_H_SYS_GPR351(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR351), (x));\
+;} while (0)
+#define GET_H_SYS_GPR352() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR352))
+#define SET_H_SYS_GPR352(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR352), (x));\
+;} while (0)
+#define GET_H_SYS_GPR353() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR353))
+#define SET_H_SYS_GPR353(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR353), (x));\
+;} while (0)
+#define GET_H_SYS_GPR354() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR354))
+#define SET_H_SYS_GPR354(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR354), (x));\
+;} while (0)
+#define GET_H_SYS_GPR355() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR355))
+#define SET_H_SYS_GPR355(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR355), (x));\
+;} while (0)
+#define GET_H_SYS_GPR356() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR356))
+#define SET_H_SYS_GPR356(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR356), (x));\
+;} while (0)
+#define GET_H_SYS_GPR357() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR357))
+#define SET_H_SYS_GPR357(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR357), (x));\
+;} while (0)
+#define GET_H_SYS_GPR358() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR358))
+#define SET_H_SYS_GPR358(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR358), (x));\
+;} while (0)
+#define GET_H_SYS_GPR359() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR359))
+#define SET_H_SYS_GPR359(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR359), (x));\
+;} while (0)
+#define GET_H_SYS_GPR360() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR360))
+#define SET_H_SYS_GPR360(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR360), (x));\
+;} while (0)
+#define GET_H_SYS_GPR361() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR361))
+#define SET_H_SYS_GPR361(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR361), (x));\
+;} while (0)
+#define GET_H_SYS_GPR362() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR362))
+#define SET_H_SYS_GPR362(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR362), (x));\
+;} while (0)
+#define GET_H_SYS_GPR363() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR363))
+#define SET_H_SYS_GPR363(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR363), (x));\
+;} while (0)
+#define GET_H_SYS_GPR364() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR364))
+#define SET_H_SYS_GPR364(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR364), (x));\
+;} while (0)
+#define GET_H_SYS_GPR365() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR365))
+#define SET_H_SYS_GPR365(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR365), (x));\
+;} while (0)
+#define GET_H_SYS_GPR366() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR366))
+#define SET_H_SYS_GPR366(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR366), (x));\
+;} while (0)
+#define GET_H_SYS_GPR367() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR367))
+#define SET_H_SYS_GPR367(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR367), (x));\
+;} while (0)
+#define GET_H_SYS_GPR368() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR368))
+#define SET_H_SYS_GPR368(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR368), (x));\
+;} while (0)
+#define GET_H_SYS_GPR369() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR369))
+#define SET_H_SYS_GPR369(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR369), (x));\
+;} while (0)
+#define GET_H_SYS_GPR370() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR370))
+#define SET_H_SYS_GPR370(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR370), (x));\
+;} while (0)
+#define GET_H_SYS_GPR371() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR371))
+#define SET_H_SYS_GPR371(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR371), (x));\
+;} while (0)
+#define GET_H_SYS_GPR372() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR372))
+#define SET_H_SYS_GPR372(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR372), (x));\
+;} while (0)
+#define GET_H_SYS_GPR373() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR373))
+#define SET_H_SYS_GPR373(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR373), (x));\
+;} while (0)
+#define GET_H_SYS_GPR374() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR374))
+#define SET_H_SYS_GPR374(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR374), (x));\
+;} while (0)
+#define GET_H_SYS_GPR375() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR375))
+#define SET_H_SYS_GPR375(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR375), (x));\
+;} while (0)
+#define GET_H_SYS_GPR376() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR376))
+#define SET_H_SYS_GPR376(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR376), (x));\
+;} while (0)
+#define GET_H_SYS_GPR377() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR377))
+#define SET_H_SYS_GPR377(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR377), (x));\
+;} while (0)
+#define GET_H_SYS_GPR378() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR378))
+#define SET_H_SYS_GPR378(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR378), (x));\
+;} while (0)
+#define GET_H_SYS_GPR379() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR379))
+#define SET_H_SYS_GPR379(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR379), (x));\
+;} while (0)
+#define GET_H_SYS_GPR380() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR380))
+#define SET_H_SYS_GPR380(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR380), (x));\
+;} while (0)
+#define GET_H_SYS_GPR381() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR381))
+#define SET_H_SYS_GPR381(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR381), (x));\
+;} while (0)
+#define GET_H_SYS_GPR382() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR382))
+#define SET_H_SYS_GPR382(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR382), (x));\
+;} while (0)
+#define GET_H_SYS_GPR383() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR383))
+#define SET_H_SYS_GPR383(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR383), (x));\
+;} while (0)
+#define GET_H_SYS_GPR384() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR384))
+#define SET_H_SYS_GPR384(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR384), (x));\
+;} while (0)
+#define GET_H_SYS_GPR385() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR385))
+#define SET_H_SYS_GPR385(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR385), (x));\
+;} while (0)
+#define GET_H_SYS_GPR386() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR386))
+#define SET_H_SYS_GPR386(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR386), (x));\
+;} while (0)
+#define GET_H_SYS_GPR387() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR387))
+#define SET_H_SYS_GPR387(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR387), (x));\
+;} while (0)
+#define GET_H_SYS_GPR388() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR388))
+#define SET_H_SYS_GPR388(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR388), (x));\
+;} while (0)
+#define GET_H_SYS_GPR389() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR389))
+#define SET_H_SYS_GPR389(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR389), (x));\
+;} while (0)
+#define GET_H_SYS_GPR390() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR390))
+#define SET_H_SYS_GPR390(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR390), (x));\
+;} while (0)
+#define GET_H_SYS_GPR391() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR391))
+#define SET_H_SYS_GPR391(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR391), (x));\
+;} while (0)
+#define GET_H_SYS_GPR392() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR392))
+#define SET_H_SYS_GPR392(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR392), (x));\
+;} while (0)
+#define GET_H_SYS_GPR393() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR393))
+#define SET_H_SYS_GPR393(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR393), (x));\
+;} while (0)
+#define GET_H_SYS_GPR394() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR394))
+#define SET_H_SYS_GPR394(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR394), (x));\
+;} while (0)
+#define GET_H_SYS_GPR395() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR395))
+#define SET_H_SYS_GPR395(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR395), (x));\
+;} while (0)
+#define GET_H_SYS_GPR396() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR396))
+#define SET_H_SYS_GPR396(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR396), (x));\
+;} while (0)
+#define GET_H_SYS_GPR397() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR397))
+#define SET_H_SYS_GPR397(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR397), (x));\
+;} while (0)
+#define GET_H_SYS_GPR398() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR398))
+#define SET_H_SYS_GPR398(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR398), (x));\
+;} while (0)
+#define GET_H_SYS_GPR399() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR399))
+#define SET_H_SYS_GPR399(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR399), (x));\
+;} while (0)
+#define GET_H_SYS_GPR400() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR400))
+#define SET_H_SYS_GPR400(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR400), (x));\
+;} while (0)
+#define GET_H_SYS_GPR401() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR401))
+#define SET_H_SYS_GPR401(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR401), (x));\
+;} while (0)
+#define GET_H_SYS_GPR402() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR402))
+#define SET_H_SYS_GPR402(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR402), (x));\
+;} while (0)
+#define GET_H_SYS_GPR403() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR403))
+#define SET_H_SYS_GPR403(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR403), (x));\
+;} while (0)
+#define GET_H_SYS_GPR404() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR404))
+#define SET_H_SYS_GPR404(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR404), (x));\
+;} while (0)
+#define GET_H_SYS_GPR405() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR405))
+#define SET_H_SYS_GPR405(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR405), (x));\
+;} while (0)
+#define GET_H_SYS_GPR406() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR406))
+#define SET_H_SYS_GPR406(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR406), (x));\
+;} while (0)
+#define GET_H_SYS_GPR407() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR407))
+#define SET_H_SYS_GPR407(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR407), (x));\
+;} while (0)
+#define GET_H_SYS_GPR408() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR408))
+#define SET_H_SYS_GPR408(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR408), (x));\
+;} while (0)
+#define GET_H_SYS_GPR409() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR409))
+#define SET_H_SYS_GPR409(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR409), (x));\
+;} while (0)
+#define GET_H_SYS_GPR410() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR410))
+#define SET_H_SYS_GPR410(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR410), (x));\
+;} while (0)
+#define GET_H_SYS_GPR411() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR411))
+#define SET_H_SYS_GPR411(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR411), (x));\
+;} while (0)
+#define GET_H_SYS_GPR412() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR412))
+#define SET_H_SYS_GPR412(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR412), (x));\
+;} while (0)
+#define GET_H_SYS_GPR413() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR413))
+#define SET_H_SYS_GPR413(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR413), (x));\
+;} while (0)
+#define GET_H_SYS_GPR414() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR414))
+#define SET_H_SYS_GPR414(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR414), (x));\
+;} while (0)
+#define GET_H_SYS_GPR415() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR415))
+#define SET_H_SYS_GPR415(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR415), (x));\
+;} while (0)
+#define GET_H_SYS_GPR416() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR416))
+#define SET_H_SYS_GPR416(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR416), (x));\
+;} while (0)
+#define GET_H_SYS_GPR417() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR417))
+#define SET_H_SYS_GPR417(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR417), (x));\
+;} while (0)
+#define GET_H_SYS_GPR418() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR418))
+#define SET_H_SYS_GPR418(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR418), (x));\
+;} while (0)
+#define GET_H_SYS_GPR419() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR419))
+#define SET_H_SYS_GPR419(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR419), (x));\
+;} while (0)
+#define GET_H_SYS_GPR420() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR420))
+#define SET_H_SYS_GPR420(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR420), (x));\
+;} while (0)
+#define GET_H_SYS_GPR421() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR421))
+#define SET_H_SYS_GPR421(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR421), (x));\
+;} while (0)
+#define GET_H_SYS_GPR422() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR422))
+#define SET_H_SYS_GPR422(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR422), (x));\
+;} while (0)
+#define GET_H_SYS_GPR423() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR423))
+#define SET_H_SYS_GPR423(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR423), (x));\
+;} while (0)
+#define GET_H_SYS_GPR424() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR424))
+#define SET_H_SYS_GPR424(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR424), (x));\
+;} while (0)
+#define GET_H_SYS_GPR425() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR425))
+#define SET_H_SYS_GPR425(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR425), (x));\
+;} while (0)
+#define GET_H_SYS_GPR426() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR426))
+#define SET_H_SYS_GPR426(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR426), (x));\
+;} while (0)
+#define GET_H_SYS_GPR427() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR427))
+#define SET_H_SYS_GPR427(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR427), (x));\
+;} while (0)
+#define GET_H_SYS_GPR428() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR428))
+#define SET_H_SYS_GPR428(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR428), (x));\
+;} while (0)
+#define GET_H_SYS_GPR429() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR429))
+#define SET_H_SYS_GPR429(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR429), (x));\
+;} while (0)
+#define GET_H_SYS_GPR430() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR430))
+#define SET_H_SYS_GPR430(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR430), (x));\
+;} while (0)
+#define GET_H_SYS_GPR431() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR431))
+#define SET_H_SYS_GPR431(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR431), (x));\
+;} while (0)
+#define GET_H_SYS_GPR432() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR432))
+#define SET_H_SYS_GPR432(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR432), (x));\
+;} while (0)
+#define GET_H_SYS_GPR433() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR433))
+#define SET_H_SYS_GPR433(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR433), (x));\
+;} while (0)
+#define GET_H_SYS_GPR434() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR434))
+#define SET_H_SYS_GPR434(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR434), (x));\
+;} while (0)
+#define GET_H_SYS_GPR435() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR435))
+#define SET_H_SYS_GPR435(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR435), (x));\
+;} while (0)
+#define GET_H_SYS_GPR436() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR436))
+#define SET_H_SYS_GPR436(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR436), (x));\
+;} while (0)
+#define GET_H_SYS_GPR437() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR437))
+#define SET_H_SYS_GPR437(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR437), (x));\
+;} while (0)
+#define GET_H_SYS_GPR438() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR438))
+#define SET_H_SYS_GPR438(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR438), (x));\
+;} while (0)
+#define GET_H_SYS_GPR439() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR439))
+#define SET_H_SYS_GPR439(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR439), (x));\
+;} while (0)
+#define GET_H_SYS_GPR440() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR440))
+#define SET_H_SYS_GPR440(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR440), (x));\
+;} while (0)
+#define GET_H_SYS_GPR441() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR441))
+#define SET_H_SYS_GPR441(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR441), (x));\
+;} while (0)
+#define GET_H_SYS_GPR442() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR442))
+#define SET_H_SYS_GPR442(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR442), (x));\
+;} while (0)
+#define GET_H_SYS_GPR443() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR443))
+#define SET_H_SYS_GPR443(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR443), (x));\
+;} while (0)
+#define GET_H_SYS_GPR444() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR444))
+#define SET_H_SYS_GPR444(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR444), (x));\
+;} while (0)
+#define GET_H_SYS_GPR445() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR445))
+#define SET_H_SYS_GPR445(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR445), (x));\
+;} while (0)
+#define GET_H_SYS_GPR446() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR446))
+#define SET_H_SYS_GPR446(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR446), (x));\
+;} while (0)
+#define GET_H_SYS_GPR447() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR447))
+#define SET_H_SYS_GPR447(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR447), (x));\
+;} while (0)
+#define GET_H_SYS_GPR448() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR448))
+#define SET_H_SYS_GPR448(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR448), (x));\
+;} while (0)
+#define GET_H_SYS_GPR449() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR449))
+#define SET_H_SYS_GPR449(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR449), (x));\
+;} while (0)
+#define GET_H_SYS_GPR450() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR450))
+#define SET_H_SYS_GPR450(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR450), (x));\
+;} while (0)
+#define GET_H_SYS_GPR451() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR451))
+#define SET_H_SYS_GPR451(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR451), (x));\
+;} while (0)
+#define GET_H_SYS_GPR452() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR452))
+#define SET_H_SYS_GPR452(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR452), (x));\
+;} while (0)
+#define GET_H_SYS_GPR453() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR453))
+#define SET_H_SYS_GPR453(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR453), (x));\
+;} while (0)
+#define GET_H_SYS_GPR454() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR454))
+#define SET_H_SYS_GPR454(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR454), (x));\
+;} while (0)
+#define GET_H_SYS_GPR455() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR455))
+#define SET_H_SYS_GPR455(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR455), (x));\
+;} while (0)
+#define GET_H_SYS_GPR456() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR456))
+#define SET_H_SYS_GPR456(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR456), (x));\
+;} while (0)
+#define GET_H_SYS_GPR457() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR457))
+#define SET_H_SYS_GPR457(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR457), (x));\
+;} while (0)
+#define GET_H_SYS_GPR458() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR458))
+#define SET_H_SYS_GPR458(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR458), (x));\
+;} while (0)
+#define GET_H_SYS_GPR459() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR459))
+#define SET_H_SYS_GPR459(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR459), (x));\
+;} while (0)
+#define GET_H_SYS_GPR460() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR460))
+#define SET_H_SYS_GPR460(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR460), (x));\
+;} while (0)
+#define GET_H_SYS_GPR461() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR461))
+#define SET_H_SYS_GPR461(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR461), (x));\
+;} while (0)
+#define GET_H_SYS_GPR462() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR462))
+#define SET_H_SYS_GPR462(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR462), (x));\
+;} while (0)
+#define GET_H_SYS_GPR463() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR463))
+#define SET_H_SYS_GPR463(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR463), (x));\
+;} while (0)
+#define GET_H_SYS_GPR464() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR464))
+#define SET_H_SYS_GPR464(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR464), (x));\
+;} while (0)
+#define GET_H_SYS_GPR465() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR465))
+#define SET_H_SYS_GPR465(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR465), (x));\
+;} while (0)
+#define GET_H_SYS_GPR466() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR466))
+#define SET_H_SYS_GPR466(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR466), (x));\
+;} while (0)
+#define GET_H_SYS_GPR467() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR467))
+#define SET_H_SYS_GPR467(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR467), (x));\
+;} while (0)
+#define GET_H_SYS_GPR468() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR468))
+#define SET_H_SYS_GPR468(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR468), (x));\
+;} while (0)
+#define GET_H_SYS_GPR469() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR469))
+#define SET_H_SYS_GPR469(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR469), (x));\
+;} while (0)
+#define GET_H_SYS_GPR470() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR470))
+#define SET_H_SYS_GPR470(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR470), (x));\
+;} while (0)
+#define GET_H_SYS_GPR471() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR471))
+#define SET_H_SYS_GPR471(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR471), (x));\
+;} while (0)
+#define GET_H_SYS_GPR472() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR472))
+#define SET_H_SYS_GPR472(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR472), (x));\
+;} while (0)
+#define GET_H_SYS_GPR473() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR473))
+#define SET_H_SYS_GPR473(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR473), (x));\
+;} while (0)
+#define GET_H_SYS_GPR474() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR474))
+#define SET_H_SYS_GPR474(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR474), (x));\
+;} while (0)
+#define GET_H_SYS_GPR475() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR475))
+#define SET_H_SYS_GPR475(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR475), (x));\
+;} while (0)
+#define GET_H_SYS_GPR476() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR476))
+#define SET_H_SYS_GPR476(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR476), (x));\
+;} while (0)
+#define GET_H_SYS_GPR477() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR477))
+#define SET_H_SYS_GPR477(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR477), (x));\
+;} while (0)
+#define GET_H_SYS_GPR478() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR478))
+#define SET_H_SYS_GPR478(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR478), (x));\
+;} while (0)
+#define GET_H_SYS_GPR479() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR479))
+#define SET_H_SYS_GPR479(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR479), (x));\
+;} while (0)
+#define GET_H_SYS_GPR480() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR480))
+#define SET_H_SYS_GPR480(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR480), (x));\
+;} while (0)
+#define GET_H_SYS_GPR481() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR481))
+#define SET_H_SYS_GPR481(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR481), (x));\
+;} while (0)
+#define GET_H_SYS_GPR482() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR482))
+#define SET_H_SYS_GPR482(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR482), (x));\
+;} while (0)
+#define GET_H_SYS_GPR483() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR483))
+#define SET_H_SYS_GPR483(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR483), (x));\
+;} while (0)
+#define GET_H_SYS_GPR484() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR484))
+#define SET_H_SYS_GPR484(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR484), (x));\
+;} while (0)
+#define GET_H_SYS_GPR485() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR485))
+#define SET_H_SYS_GPR485(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR485), (x));\
+;} while (0)
+#define GET_H_SYS_GPR486() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR486))
+#define SET_H_SYS_GPR486(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR486), (x));\
+;} while (0)
+#define GET_H_SYS_GPR487() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR487))
+#define SET_H_SYS_GPR487(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR487), (x));\
+;} while (0)
+#define GET_H_SYS_GPR488() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR488))
+#define SET_H_SYS_GPR488(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR488), (x));\
+;} while (0)
+#define GET_H_SYS_GPR489() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR489))
+#define SET_H_SYS_GPR489(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR489), (x));\
+;} while (0)
+#define GET_H_SYS_GPR490() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR490))
+#define SET_H_SYS_GPR490(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR490), (x));\
+;} while (0)
+#define GET_H_SYS_GPR491() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR491))
+#define SET_H_SYS_GPR491(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR491), (x));\
+;} while (0)
+#define GET_H_SYS_GPR492() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR492))
+#define SET_H_SYS_GPR492(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR492), (x));\
+;} while (0)
+#define GET_H_SYS_GPR493() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR493))
+#define SET_H_SYS_GPR493(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR493), (x));\
+;} while (0)
+#define GET_H_SYS_GPR494() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR494))
+#define SET_H_SYS_GPR494(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR494), (x));\
+;} while (0)
+#define GET_H_SYS_GPR495() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR495))
+#define SET_H_SYS_GPR495(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR495), (x));\
+;} while (0)
+#define GET_H_SYS_GPR496() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR496))
+#define SET_H_SYS_GPR496(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR496), (x));\
+;} while (0)
+#define GET_H_SYS_GPR497() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR497))
+#define SET_H_SYS_GPR497(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR497), (x));\
+;} while (0)
+#define GET_H_SYS_GPR498() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR498))
+#define SET_H_SYS_GPR498(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR498), (x));\
+;} while (0)
+#define GET_H_SYS_GPR499() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR499))
+#define SET_H_SYS_GPR499(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR499), (x));\
+;} while (0)
+#define GET_H_SYS_GPR500() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR500))
+#define SET_H_SYS_GPR500(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR500), (x));\
+;} while (0)
+#define GET_H_SYS_GPR501() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR501))
+#define SET_H_SYS_GPR501(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR501), (x));\
+;} while (0)
+#define GET_H_SYS_GPR502() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR502))
+#define SET_H_SYS_GPR502(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR502), (x));\
+;} while (0)
+#define GET_H_SYS_GPR503() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR503))
+#define SET_H_SYS_GPR503(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR503), (x));\
+;} while (0)
+#define GET_H_SYS_GPR504() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR504))
+#define SET_H_SYS_GPR504(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR504), (x));\
+;} while (0)
+#define GET_H_SYS_GPR505() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR505))
+#define SET_H_SYS_GPR505(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR505), (x));\
+;} while (0)
+#define GET_H_SYS_GPR506() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR506))
+#define SET_H_SYS_GPR506(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR506), (x));\
+;} while (0)
+#define GET_H_SYS_GPR507() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR507))
+#define SET_H_SYS_GPR507(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR507), (x));\
+;} while (0)
+#define GET_H_SYS_GPR508() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR508))
+#define SET_H_SYS_GPR508(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR508), (x));\
+;} while (0)
+#define GET_H_SYS_GPR509() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR509))
+#define SET_H_SYS_GPR509(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR509), (x));\
+;} while (0)
+#define GET_H_SYS_GPR510() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR510))
+#define SET_H_SYS_GPR510(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR510), (x));\
+;} while (0)
+#define GET_H_SYS_GPR511() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR511))
+#define SET_H_SYS_GPR511(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR511), (x));\
+;} while (0)
+#define GET_H_MAC_MACLO() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACLO))
+#define SET_H_MAC_MACLO(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACLO), (x));\
+;} while (0)
+#define GET_H_MAC_MACHI() GET_H_SPR (ORSI (SLLSI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACHI))
+#define SET_H_MAC_MACHI(x) \
+do { \
+SET_H_SPR (ORSI (SLLSI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACHI), (x));\
+;} while (0)
+#define GET_H_SYS_VR_REV() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 5, 0)
+#define SET_H_SYS_VR_REV(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 5, 0, (x));\
+;} while (0)
+#define GET_H_SYS_VR_CFG() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 23, 16)
+#define SET_H_SYS_VR_CFG(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 23, 16, (x));\
+;} while (0)
+#define GET_H_SYS_VR_VER() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 31, 24)
+#define SET_H_SYS_VR_VER(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 31, 24, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_UP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 0, 0)
+#define SET_H_SYS_UPR_UP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 0, 0, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_DCP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 1, 1)
+#define SET_H_SYS_UPR_DCP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 1, 1, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_ICP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 2, 2)
+#define SET_H_SYS_UPR_ICP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 2, 2, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_DMP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 3, 3)
+#define SET_H_SYS_UPR_DMP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 3, 3, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_MP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 4, 4)
+#define SET_H_SYS_UPR_MP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_IMP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 5, 5)
+#define SET_H_SYS_UPR_IMP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_DUP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 6, 6)
+#define SET_H_SYS_UPR_DUP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_PCUP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 7, 7)
+#define SET_H_SYS_UPR_PCUP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_PICP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 8, 8)
+#define SET_H_SYS_UPR_PICP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_PMP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 9, 9)
+#define SET_H_SYS_UPR_PMP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_TTP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 10, 10)
+#define SET_H_SYS_UPR_TTP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_CUP() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 31, 24)
+#define SET_H_SYS_UPR_CUP(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 31, 24, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_NSGR() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 3, 0)
+#define SET_H_SYS_CPUCFGR_NSGR(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 3, 0, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_CGF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 4, 4)
+#define SET_H_SYS_CPUCFGR_CGF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OB32S() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 5, 5)
+#define SET_H_SYS_CPUCFGR_OB32S(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OB64S() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 6, 6)
+#define SET_H_SYS_CPUCFGR_OB64S(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OF32S() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 7, 7)
+#define SET_H_SYS_CPUCFGR_OF32S(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OF64S() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 8, 8)
+#define SET_H_SYS_CPUCFGR_OF64S(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OV64S() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 9, 9)
+#define SET_H_SYS_CPUCFGR_OV64S(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_ND() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 10, 10)
+#define SET_H_SYS_CPUCFGR_ND(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_SR_SM() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 0, 0)
+#define SET_H_SYS_SR_SM(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 0, 0, (x));\
+;} while (0)
+#define GET_H_SYS_SR_TEE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 1, 1)
+#define SET_H_SYS_SR_TEE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 1, 1, (x));\
+;} while (0)
+#define GET_H_SYS_SR_IEE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 2, 2)
+#define SET_H_SYS_SR_IEE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 2, 2, (x));\
+;} while (0)
+#define GET_H_SYS_SR_DCE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 3, 3)
+#define SET_H_SYS_SR_DCE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 3, 3, (x));\
+;} while (0)
+#define GET_H_SYS_SR_ICE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 4, 4)
+#define SET_H_SYS_SR_ICE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_SR_DME() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 5, 5)
+#define SET_H_SYS_SR_DME(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_SR_IME() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 6, 6)
+#define SET_H_SYS_SR_IME(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_SR_LEE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 7, 7)
+#define SET_H_SYS_SR_LEE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_SR_CE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 8, 8)
+#define SET_H_SYS_SR_CE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_SR_F() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 9, 9)
+#define SET_H_SYS_SR_F(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_SR_CY() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 10, 10)
+#define SET_H_SYS_SR_CY(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_SR_OV() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 11, 11)
+#define SET_H_SYS_SR_OV(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 11, 11, (x));\
+;} while (0)
+#define GET_H_SYS_SR_OVE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 12, 12)
+#define SET_H_SYS_SR_OVE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 12, 12, (x));\
+;} while (0)
+#define GET_H_SYS_SR_DSX() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 13, 13)
+#define SET_H_SYS_SR_DSX(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 13, 13, (x));\
+;} while (0)
+#define GET_H_SYS_SR_EPH() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 14, 14)
+#define SET_H_SYS_SR_EPH(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 14, 14, (x));\
+;} while (0)
+#define GET_H_SYS_SR_FO() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 15, 15)
+#define SET_H_SYS_SR_FO(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 15, 15, (x));\
+;} while (0)
+#define GET_H_SYS_SR_SUMRA() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 16, 16)
+#define SET_H_SYS_SR_SUMRA(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 16, 16, (x));\
+;} while (0)
+#define GET_H_SYS_SR_CID() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 31, 28)
+#define SET_H_SYS_SR_CID(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 31, 28, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_FPEE() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 0, 0)
+#define SET_H_SYS_FPCSR_FPEE(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 0, 0, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_RM() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 2, 1)
+#define SET_H_SYS_FPCSR_RM(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 2, 1, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_OVF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 3, 3)
+#define SET_H_SYS_FPCSR_OVF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 3, 3, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_UNF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 4, 4)
+#define SET_H_SYS_FPCSR_UNF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_SNF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 5, 5)
+#define SET_H_SYS_FPCSR_SNF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_QNF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 6, 6)
+#define SET_H_SYS_FPCSR_QNF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_ZF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 7, 7)
+#define SET_H_SYS_FPCSR_ZF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_IXF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 8, 8)
+#define SET_H_SYS_FPCSR_IXF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_IVF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 9, 9)
+#define SET_H_SYS_FPCSR_IVF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_INF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 10, 10)
+#define SET_H_SYS_FPCSR_INF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_DZF() or1k32bf_h_spr_field_get_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 11, 11)
+#define SET_H_SYS_FPCSR_DZF(x) \
+do { \
+or1k32bf_h_spr_field_set_raw (current_cpu, ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 11, 11, (x));\
+;} while (0)
+
+/* Cover fns for register access. */
+USI or1k32bf_h_pc_get (SIM_CPU *);
+void or1k32bf_h_pc_set (SIM_CPU *, USI);
+SF or1k32bf_h_fsr_get (SIM_CPU *, UINT);
+void or1k32bf_h_fsr_set (SIM_CPU *, UINT, SF);
+USI or1k32bf_h_spr_get (SIM_CPU *, UINT);
+void or1k32bf_h_spr_set (SIM_CPU *, UINT, USI);
+USI or1k32bf_h_gpr_get (SIM_CPU *, UINT);
+void or1k32bf_h_gpr_set (SIM_CPU *, UINT, USI);
+USI or1k32bf_h_sys_vr_get (SIM_CPU *);
+void or1k32bf_h_sys_vr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_dmmucfgr_get (SIM_CPU *);
+void or1k32bf_h_sys_dmmucfgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_immucfgr_get (SIM_CPU *);
+void or1k32bf_h_sys_immucfgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_dccfgr_get (SIM_CPU *);
+void or1k32bf_h_sys_dccfgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_iccfgr_get (SIM_CPU *);
+void or1k32bf_h_sys_iccfgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_dcfgr_get (SIM_CPU *);
+void or1k32bf_h_sys_dcfgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_pccfgr_get (SIM_CPU *);
+void or1k32bf_h_sys_pccfgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_npc_get (SIM_CPU *);
+void or1k32bf_h_sys_npc_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_ppc_get (SIM_CPU *);
+void or1k32bf_h_sys_ppc_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr0_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr0_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr1_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr1_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr2_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr2_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr3_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr3_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr4_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr4_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr5_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr5_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr6_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr6_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr7_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr7_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr8_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr8_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr9_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr9_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr10_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr10_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr11_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr11_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr12_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr12_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr13_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr13_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr14_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr14_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_epcr15_get (SIM_CPU *);
+void or1k32bf_h_sys_epcr15_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear0_get (SIM_CPU *);
+void or1k32bf_h_sys_eear0_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear1_get (SIM_CPU *);
+void or1k32bf_h_sys_eear1_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear2_get (SIM_CPU *);
+void or1k32bf_h_sys_eear2_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear3_get (SIM_CPU *);
+void or1k32bf_h_sys_eear3_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear4_get (SIM_CPU *);
+void or1k32bf_h_sys_eear4_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear5_get (SIM_CPU *);
+void or1k32bf_h_sys_eear5_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear6_get (SIM_CPU *);
+void or1k32bf_h_sys_eear6_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear7_get (SIM_CPU *);
+void or1k32bf_h_sys_eear7_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear8_get (SIM_CPU *);
+void or1k32bf_h_sys_eear8_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear9_get (SIM_CPU *);
+void or1k32bf_h_sys_eear9_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear10_get (SIM_CPU *);
+void or1k32bf_h_sys_eear10_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear11_get (SIM_CPU *);
+void or1k32bf_h_sys_eear11_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear12_get (SIM_CPU *);
+void or1k32bf_h_sys_eear12_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear13_get (SIM_CPU *);
+void or1k32bf_h_sys_eear13_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear14_get (SIM_CPU *);
+void or1k32bf_h_sys_eear14_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_eear15_get (SIM_CPU *);
+void or1k32bf_h_sys_eear15_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr0_get (SIM_CPU *);
+void or1k32bf_h_sys_esr0_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr1_get (SIM_CPU *);
+void or1k32bf_h_sys_esr1_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr2_get (SIM_CPU *);
+void or1k32bf_h_sys_esr2_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr3_get (SIM_CPU *);
+void or1k32bf_h_sys_esr3_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr4_get (SIM_CPU *);
+void or1k32bf_h_sys_esr4_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr5_get (SIM_CPU *);
+void or1k32bf_h_sys_esr5_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr6_get (SIM_CPU *);
+void or1k32bf_h_sys_esr6_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr7_get (SIM_CPU *);
+void or1k32bf_h_sys_esr7_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr8_get (SIM_CPU *);
+void or1k32bf_h_sys_esr8_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr9_get (SIM_CPU *);
+void or1k32bf_h_sys_esr9_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr10_get (SIM_CPU *);
+void or1k32bf_h_sys_esr10_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr11_get (SIM_CPU *);
+void or1k32bf_h_sys_esr11_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr12_get (SIM_CPU *);
+void or1k32bf_h_sys_esr12_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr13_get (SIM_CPU *);
+void or1k32bf_h_sys_esr13_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr14_get (SIM_CPU *);
+void or1k32bf_h_sys_esr14_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_esr15_get (SIM_CPU *);
+void or1k32bf_h_sys_esr15_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr0_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr0_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr1_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr1_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr2_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr2_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr3_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr3_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr4_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr4_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr5_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr5_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr6_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr6_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr7_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr7_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr8_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr8_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr9_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr9_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr10_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr10_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr11_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr11_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr12_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr12_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr13_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr13_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr14_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr14_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr15_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr15_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr16_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr16_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr17_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr17_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr18_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr18_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr19_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr19_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr20_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr20_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr21_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr21_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr22_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr22_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr23_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr23_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr24_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr24_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr25_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr25_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr26_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr26_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr27_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr27_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr28_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr28_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr29_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr29_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr30_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr30_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr31_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr31_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr32_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr32_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr33_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr33_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr34_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr34_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr35_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr35_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr36_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr36_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr37_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr37_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr38_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr38_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr39_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr39_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr40_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr40_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr41_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr41_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr42_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr42_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr43_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr43_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr44_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr44_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr45_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr45_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr46_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr46_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr47_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr47_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr48_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr48_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr49_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr49_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr50_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr50_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr51_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr51_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr52_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr52_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr53_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr53_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr54_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr54_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr55_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr55_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr56_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr56_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr57_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr57_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr58_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr58_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr59_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr59_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr60_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr60_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr61_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr61_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr62_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr62_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr63_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr63_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr64_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr64_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr65_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr65_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr66_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr66_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr67_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr67_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr68_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr68_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr69_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr69_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr70_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr70_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr71_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr71_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr72_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr72_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr73_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr73_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr74_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr74_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr75_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr75_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr76_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr76_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr77_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr77_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr78_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr78_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr79_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr79_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr80_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr80_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr81_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr81_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr82_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr82_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr83_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr83_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr84_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr84_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr85_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr85_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr86_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr86_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr87_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr87_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr88_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr88_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr89_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr89_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr90_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr90_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr91_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr91_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr92_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr92_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr93_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr93_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr94_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr94_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr95_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr95_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr96_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr96_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr97_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr97_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr98_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr98_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr99_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr99_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr100_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr100_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr101_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr101_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr102_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr102_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr103_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr103_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr104_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr104_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr105_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr105_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr106_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr106_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr107_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr107_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr108_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr108_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr109_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr109_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr110_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr110_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr111_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr111_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr112_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr112_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr113_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr113_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr114_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr114_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr115_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr115_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr116_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr116_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr117_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr117_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr118_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr118_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr119_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr119_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr120_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr120_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr121_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr121_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr122_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr122_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr123_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr123_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr124_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr124_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr125_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr125_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr126_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr126_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr127_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr127_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr128_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr128_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr129_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr129_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr130_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr130_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr131_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr131_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr132_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr132_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr133_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr133_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr134_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr134_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr135_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr135_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr136_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr136_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr137_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr137_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr138_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr138_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr139_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr139_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr140_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr140_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr141_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr141_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr142_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr142_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr143_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr143_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr144_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr144_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr145_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr145_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr146_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr146_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr147_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr147_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr148_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr148_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr149_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr149_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr150_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr150_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr151_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr151_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr152_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr152_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr153_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr153_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr154_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr154_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr155_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr155_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr156_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr156_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr157_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr157_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr158_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr158_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr159_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr159_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr160_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr160_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr161_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr161_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr162_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr162_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr163_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr163_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr164_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr164_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr165_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr165_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr166_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr166_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr167_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr167_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr168_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr168_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr169_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr169_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr170_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr170_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr171_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr171_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr172_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr172_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr173_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr173_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr174_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr174_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr175_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr175_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr176_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr176_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr177_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr177_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr178_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr178_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr179_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr179_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr180_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr180_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr181_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr181_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr182_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr182_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr183_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr183_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr184_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr184_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr185_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr185_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr186_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr186_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr187_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr187_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr188_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr188_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr189_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr189_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr190_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr190_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr191_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr191_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr192_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr192_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr193_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr193_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr194_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr194_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr195_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr195_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr196_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr196_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr197_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr197_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr198_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr198_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr199_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr199_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr200_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr200_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr201_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr201_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr202_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr202_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr203_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr203_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr204_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr204_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr205_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr205_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr206_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr206_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr207_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr207_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr208_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr208_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr209_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr209_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr210_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr210_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr211_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr211_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr212_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr212_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr213_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr213_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr214_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr214_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr215_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr215_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr216_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr216_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr217_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr217_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr218_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr218_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr219_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr219_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr220_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr220_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr221_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr221_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr222_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr222_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr223_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr223_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr224_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr224_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr225_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr225_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr226_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr226_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr227_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr227_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr228_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr228_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr229_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr229_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr230_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr230_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr231_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr231_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr232_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr232_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr233_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr233_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr234_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr234_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr235_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr235_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr236_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr236_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr237_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr237_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr238_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr238_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr239_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr239_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr240_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr240_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr241_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr241_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr242_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr242_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr243_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr243_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr244_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr244_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr245_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr245_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr246_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr246_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr247_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr247_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr248_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr248_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr249_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr249_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr250_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr250_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr251_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr251_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr252_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr252_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr253_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr253_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr254_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr254_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr255_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr255_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr256_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr256_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr257_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr257_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr258_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr258_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr259_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr259_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr260_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr260_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr261_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr261_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr262_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr262_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr263_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr263_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr264_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr264_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr265_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr265_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr266_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr266_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr267_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr267_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr268_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr268_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr269_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr269_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr270_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr270_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr271_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr271_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr272_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr272_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr273_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr273_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr274_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr274_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr275_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr275_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr276_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr276_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr277_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr277_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr278_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr278_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr279_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr279_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr280_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr280_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr281_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr281_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr282_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr282_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr283_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr283_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr284_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr284_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr285_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr285_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr286_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr286_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr287_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr287_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr288_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr288_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr289_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr289_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr290_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr290_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr291_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr291_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr292_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr292_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr293_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr293_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr294_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr294_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr295_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr295_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr296_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr296_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr297_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr297_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr298_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr298_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr299_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr299_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr300_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr300_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr301_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr301_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr302_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr302_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr303_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr303_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr304_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr304_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr305_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr305_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr306_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr306_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr307_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr307_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr308_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr308_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr309_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr309_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr310_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr310_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr311_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr311_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr312_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr312_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr313_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr313_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr314_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr314_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr315_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr315_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr316_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr316_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr317_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr317_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr318_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr318_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr319_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr319_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr320_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr320_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr321_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr321_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr322_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr322_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr323_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr323_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr324_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr324_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr325_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr325_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr326_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr326_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr327_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr327_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr328_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr328_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr329_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr329_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr330_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr330_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr331_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr331_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr332_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr332_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr333_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr333_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr334_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr334_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr335_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr335_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr336_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr336_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr337_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr337_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr338_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr338_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr339_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr339_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr340_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr340_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr341_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr341_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr342_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr342_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr343_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr343_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr344_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr344_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr345_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr345_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr346_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr346_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr347_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr347_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr348_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr348_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr349_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr349_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr350_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr350_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr351_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr351_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr352_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr352_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr353_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr353_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr354_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr354_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr355_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr355_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr356_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr356_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr357_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr357_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr358_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr358_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr359_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr359_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr360_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr360_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr361_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr361_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr362_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr362_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr363_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr363_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr364_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr364_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr365_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr365_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr366_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr366_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr367_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr367_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr368_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr368_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr369_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr369_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr370_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr370_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr371_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr371_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr372_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr372_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr373_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr373_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr374_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr374_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr375_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr375_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr376_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr376_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr377_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr377_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr378_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr378_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr379_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr379_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr380_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr380_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr381_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr381_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr382_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr382_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr383_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr383_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr384_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr384_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr385_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr385_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr386_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr386_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr387_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr387_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr388_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr388_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr389_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr389_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr390_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr390_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr391_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr391_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr392_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr392_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr393_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr393_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr394_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr394_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr395_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr395_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr396_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr396_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr397_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr397_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr398_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr398_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr399_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr399_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr400_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr400_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr401_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr401_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr402_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr402_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr403_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr403_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr404_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr404_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr405_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr405_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr406_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr406_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr407_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr407_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr408_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr408_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr409_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr409_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr410_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr410_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr411_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr411_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr412_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr412_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr413_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr413_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr414_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr414_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr415_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr415_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr416_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr416_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr417_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr417_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr418_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr418_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr419_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr419_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr420_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr420_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr421_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr421_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr422_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr422_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr423_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr423_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr424_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr424_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr425_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr425_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr426_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr426_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr427_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr427_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr428_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr428_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr429_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr429_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr430_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr430_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr431_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr431_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr432_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr432_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr433_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr433_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr434_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr434_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr435_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr435_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr436_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr436_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr437_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr437_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr438_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr438_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr439_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr439_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr440_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr440_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr441_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr441_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr442_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr442_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr443_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr443_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr444_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr444_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr445_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr445_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr446_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr446_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr447_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr447_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr448_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr448_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr449_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr449_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr450_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr450_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr451_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr451_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr452_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr452_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr453_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr453_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr454_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr454_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr455_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr455_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr456_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr456_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr457_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr457_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr458_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr458_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr459_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr459_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr460_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr460_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr461_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr461_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr462_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr462_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr463_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr463_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr464_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr464_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr465_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr465_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr466_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr466_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr467_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr467_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr468_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr468_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr469_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr469_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr470_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr470_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr471_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr471_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr472_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr472_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr473_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr473_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr474_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr474_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr475_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr475_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr476_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr476_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr477_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr477_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr478_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr478_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr479_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr479_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr480_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr480_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr481_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr481_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr482_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr482_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr483_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr483_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr484_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr484_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr485_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr485_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr486_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr486_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr487_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr487_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr488_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr488_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr489_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr489_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr490_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr490_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr491_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr491_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr492_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr492_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr493_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr493_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr494_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr494_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr495_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr495_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr496_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr496_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr497_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr497_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr498_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr498_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr499_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr499_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr500_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr500_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr501_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr501_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr502_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr502_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr503_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr503_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr504_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr504_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr505_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr505_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr506_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr506_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr507_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr507_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr508_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr508_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr509_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr509_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr510_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr510_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_gpr511_get (SIM_CPU *);
+void or1k32bf_h_sys_gpr511_set (SIM_CPU *, USI);
+USI or1k32bf_h_mac_maclo_get (SIM_CPU *);
+void or1k32bf_h_mac_maclo_set (SIM_CPU *, USI);
+USI or1k32bf_h_mac_machi_get (SIM_CPU *);
+void or1k32bf_h_mac_machi_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_vr_rev_get (SIM_CPU *);
+void or1k32bf_h_sys_vr_rev_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_vr_cfg_get (SIM_CPU *);
+void or1k32bf_h_sys_vr_cfg_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_vr_ver_get (SIM_CPU *);
+void or1k32bf_h_sys_vr_ver_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_up_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_up_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_dcp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_dcp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_icp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_icp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_dmp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_dmp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_mp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_mp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_imp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_imp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_dup_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_dup_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_pcup_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_pcup_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_picp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_picp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_pmp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_pmp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_ttp_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_ttp_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_upr_cup_get (SIM_CPU *);
+void or1k32bf_h_sys_upr_cup_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_nsgr_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_nsgr_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_cgf_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_cgf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_ob32s_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_ob32s_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_ob64s_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_ob64s_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_of32s_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_of32s_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_of64s_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_of64s_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_ov64s_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_ov64s_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_cpucfgr_nd_get (SIM_CPU *);
+void or1k32bf_h_sys_cpucfgr_nd_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_sm_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_sm_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_tee_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_tee_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_iee_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_iee_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_dce_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_dce_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_ice_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_ice_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_dme_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_dme_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_ime_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_ime_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_lee_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_lee_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_ce_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_ce_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_f_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_f_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_cy_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_cy_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_ov_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_ov_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_ove_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_ove_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_dsx_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_dsx_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_eph_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_eph_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_fo_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_fo_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_sumra_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_sumra_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_sr_cid_get (SIM_CPU *);
+void or1k32bf_h_sys_sr_cid_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_fpee_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_fpee_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_rm_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_rm_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_ovf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_ovf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_unf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_unf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_snf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_snf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_qnf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_qnf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_zf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_zf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_ixf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_ixf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_ivf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_ivf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_inf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_inf_set (SIM_CPU *, USI);
+USI or1k32bf_h_sys_fpcsr_dzf_get (SIM_CPU *);
+void or1k32bf_h_sys_fpcsr_dzf_set (SIM_CPU *, USI);
+
+/* These must be hand-written. */
+extern CPUREG_FETCH_FN or1k32bf_fetch_register;
+extern CPUREG_STORE_FN or1k32bf_store_register;
+
+typedef struct {
+ int empty;
+} MODEL_OR1200_DATA;
+
+typedef struct {
+ int empty;
+} MODEL_OR1200ND_DATA;
+
+/* Instruction argument buffer. */
+
+union sem_fields {
+ struct { /* no operands */
+ int empty;
+ } sfmt_empty;
+ struct { /* */
+ IADDR i_disp26;
+ } sfmt_l_j;
+ struct { /* */
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm6;
+ } sfmt_l_slli;
+ struct { /* */
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+ } sfmt_l_sll;
+ struct { /* */
+ INT f_simm16_split;
+ UINT f_r2;
+ UINT f_r3;
+ } sfmt_l_sw;
+ struct { /* */
+ INT f_simm16;
+ UINT f_r1;
+ UINT f_r2;
+ } sfmt_l_lwz;
+ struct { /* */
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_uimm16_split;
+ } sfmt_l_mtspr;
+ struct { /* */
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm16;
+ } sfmt_l_mfspr;
+#if WITH_SCACHE_PBB
+ /* Writeback handler. */
+ struct {
+ /* Pointer to argbuf entry for insn whose results need writing back. */
+ const struct argbuf *abuf;
+ } write;
+ /* x-before handler */
+ struct {
+ /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
+ int first_p;
+ } before;
+ /* x-after handler */
+ struct {
+ int empty;
+ } after;
+ /* This entry is used to terminate each pbb. */
+ struct {
+ /* Number of insns in pbb. */
+ int insn_count;
+ /* Next pbb to execute. */
+ SCACHE *next;
+ SCACHE *branch_target;
+ } chain;
+#endif
+};
+
+/* The ARGBUF struct. */
+struct argbuf {
+ /* These are the baseclass definitions. */
+ IADDR addr;
+ const IDESC *idesc;
+ char trace_p;
+ char profile_p;
+ /* ??? Temporary hack for skip insns. */
+ char skip_count;
+ char unused;
+ /* cpu specific data follows */
+ union sem semantic;
+ int written;
+ union sem_fields fields;
+};
+
+/* A cached insn.
+
+ ??? SCACHE used to contain more than just argbuf. We could delete the
+ type entirely and always just use ARGBUF, but for future concerns and as
+ a level of abstraction it is left in. */
+
+struct scache {
+ struct argbuf argbuf;
+};
+
+/* Macros to simplify extraction, reading and semantic code.
+ These define and assign the local vars that contain the insn's fields. */
+
+#define EXTRACT_IFMT_EMPTY_VARS \
+ unsigned int length;
+#define EXTRACT_IFMT_EMPTY_CODE \
+ length = 0; \
+
+#define EXTRACT_IFMT_L_J_VARS \
+ UINT f_opcode; \
+ USI f_disp26; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_J_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc)); \
+
+#define EXTRACT_IFMT_L_JR_VARS \
+ UINT f_opcode; \
+ UINT f_resv_25_10; \
+ UINT f_r3; \
+ UINT f_resv_10_11; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_JR_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_25_10 = EXTRACT_LSB0_UINT (insn, 32, 25, 10); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+
+#define EXTRACT_IFMT_L_TRAP_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_resv_20_5; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_TRAP_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_20_5 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_RFE_VARS \
+ UINT f_opcode; \
+ UINT f_resv_25_26; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_RFE_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_25_26 = EXTRACT_LSB0_UINT (insn, 32, 25, 26); \
+
+#define EXTRACT_IFMT_L_NOP_IMM_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_2; \
+ UINT f_resv_23_8; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_NOP_IMM_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_2 = EXTRACT_LSB0_UINT (insn, 32, 25, 2); \
+ f_resv_23_8 = EXTRACT_LSB0_UINT (insn, 32, 23, 8); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MOVHI_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_resv_20_4; \
+ UINT f_op_16_1; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MOVHI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_20_4 = EXTRACT_LSB0_UINT (insn, 32, 20, 4); \
+ f_op_16_1 = EXTRACT_LSB0_UINT (insn, 32, 16, 1); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MACRC_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_resv_20_4; \
+ UINT f_op_16_1; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MACRC_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_20_4 = EXTRACT_LSB0_UINT (insn, 32, 20, 4); \
+ f_op_16_1 = EXTRACT_LSB0_UINT (insn, 32, 16, 1); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MFSPR_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MFSPR_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MTSPR_VARS \
+ UINT f_opcode; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_imm16_25_5; \
+ UINT f_imm16_10_11; \
+ UINT f_uimm16_split; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MTSPR_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+ f_uimm16_split = ((UHI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));\
+
+#define EXTRACT_IFMT_L_LWZ_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ INT f_simm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_LWZ_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_SW_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r3; \
+ UINT f_imm16_25_5; \
+ UINT f_imm16_10_11; \
+ INT f_simm16_split; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SW_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));\
+
+#define EXTRACT_IFMT_L_SLL_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_2; \
+ UINT f_resv_5_2; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SLL_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_2 = EXTRACT_LSB0_UINT (insn, 32, 7, 2); \
+ f_resv_5_2 = EXTRACT_LSB0_UINT (insn, 32, 5, 2); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_SLLI_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_resv_15_8; \
+ UINT f_op_7_2; \
+ UINT f_uimm6; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SLLI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_resv_15_8 = EXTRACT_LSB0_UINT (insn, 32, 15, 8); \
+ f_op_7_2 = EXTRACT_LSB0_UINT (insn, 32, 7, 2); \
+ f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
+
+#define EXTRACT_IFMT_L_AND_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_7; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_AND_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_7 = EXTRACT_LSB0_UINT (insn, 32, 10, 7); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_EXTHS_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_resv_15_6; \
+ UINT f_op_9_4; \
+ UINT f_resv_5_2; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_EXTHS_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_resv_15_6 = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \
+ f_op_9_4 = EXTRACT_LSB0_UINT (insn, 32, 9, 4); \
+ f_resv_5_2 = EXTRACT_LSB0_UINT (insn, 32, 5, 2); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_CMOV_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_1; \
+ UINT f_op_9_2; \
+ UINT f_resv_7_4; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_CMOV_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_1 = EXTRACT_LSB0_UINT (insn, 32, 10, 1); \
+ f_op_9_2 = EXTRACT_LSB0_UINT (insn, 32, 9, 2); \
+ f_resv_7_4 = EXTRACT_LSB0_UINT (insn, 32, 7, 4); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_SFGTU_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_11; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SFGTU_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+
+#define EXTRACT_IFMT_L_SFGTUI_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SFGTUI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_SFGTSI_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ INT f_simm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SFGTSI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MAC_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_7; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MAC_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_7 = EXTRACT_LSB0_UINT (insn, 32, 10, 7); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_MACI_VARS \
+ UINT f_opcode; \
+ UINT f_resv_20_5; \
+ UINT f_r2; \
+ UINT f_imm16_25_5; \
+ UINT f_imm16_10_11; \
+ INT f_simm16_split; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MACI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_20_5 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));\
+
+#define EXTRACT_IFMT_LF_ADD_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_ADD_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_ITOF_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_ITOF_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_FTOI_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_FTOI_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_EQ_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_EQ_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_CUST1_S_VARS \
+ UINT f_opcode; \
+ UINT f_resv_25_5; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_CUST1_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+/* Collection of various things for the trace handler to use. */
+
+typedef struct trace_record {
+ IADDR pc;
+ /* FIXME:wip */
+} TRACE_RECORD;
+
+#endif /* CPU_OR1K32BF_H */
diff --git a/sim/or1k/cpu64.c b/sim/or1k/cpu64.c
new file mode 100644
index 0000000..1cb4487
--- /dev/null
+++ b/sim/or1k/cpu64.c
@@ -0,0 +1,10149 @@
+/* Misc. support for CPU family or1k64bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k64bf
+#define WANT_CPU_OR1K64BF
+
+#include "sim-main.h"
+#include "cgen-ops.h"
+
+/* Get the value of h-pc. */
+
+UDI
+or1k64bf_h_pc_get (SIM_CPU *current_cpu)
+{
+ return CPU (h_pc);
+}
+
+/* Set a value for h-pc. */
+
+void
+or1k64bf_h_pc_set (SIM_CPU *current_cpu, UDI newval)
+{
+ CPU (h_pc) = newval;
+}
+
+/* Get the value of h-fsr. */
+
+SF
+or1k64bf_h_fsr_get (SIM_CPU *current_cpu, UINT regno)
+{
+ return GET_H_FSR (regno);
+}
+
+/* Set a value for h-fsr. */
+
+void
+or1k64bf_h_fsr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
+{
+ SET_H_FSR (regno, newval);
+}
+
+/* Get the value of h-fdr. */
+
+DF
+or1k64bf_h_fdr_get (SIM_CPU *current_cpu, UINT regno)
+{
+ return GET_H_FDR (regno);
+}
+
+/* Set a value for h-fdr. */
+
+void
+or1k64bf_h_fdr_set (SIM_CPU *current_cpu, UINT regno, DF newval)
+{
+ SET_H_FDR (regno, newval);
+}
+
+/* Get the value of h-spr. */
+
+UDI
+or1k64bf_h_spr_get (SIM_CPU *current_cpu, UINT regno)
+{
+ return GET_H_SPR (regno);
+}
+
+/* Set a value for h-spr. */
+
+void
+or1k64bf_h_spr_set (SIM_CPU *current_cpu, UINT regno, UDI newval)
+{
+ SET_H_SPR (regno, newval);
+}
+
+/* Get the value of h-gpr. */
+
+UDI
+or1k64bf_h_gpr_get (SIM_CPU *current_cpu, UINT regno)
+{
+ return GET_H_GPR (regno);
+}
+
+/* Set a value for h-gpr. */
+
+void
+or1k64bf_h_gpr_set (SIM_CPU *current_cpu, UINT regno, UDI newval)
+{
+ SET_H_GPR (regno, newval);
+}
+
+/* Get the value of h-sys-vr. */
+
+UDI
+or1k64bf_h_sys_vr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR ();
+}
+
+/* Set a value for h-sys-vr. */
+
+void
+or1k64bf_h_sys_vr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_VR (newval);
+}
+
+/* Get the value of h-sys-upr. */
+
+UDI
+or1k64bf_h_sys_upr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR ();
+}
+
+/* Set a value for h-sys-upr. */
+
+void
+or1k64bf_h_sys_upr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR (newval);
+}
+
+/* Get the value of h-sys-cpucfgr. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR ();
+}
+
+/* Set a value for h-sys-cpucfgr. */
+
+void
+or1k64bf_h_sys_cpucfgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR (newval);
+}
+
+/* Get the value of h-sys-dmmucfgr. */
+
+UDI
+or1k64bf_h_sys_dmmucfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_DMMUCFGR ();
+}
+
+/* Set a value for h-sys-dmmucfgr. */
+
+void
+or1k64bf_h_sys_dmmucfgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_DMMUCFGR (newval);
+}
+
+/* Get the value of h-sys-immucfgr. */
+
+UDI
+or1k64bf_h_sys_immucfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_IMMUCFGR ();
+}
+
+/* Set a value for h-sys-immucfgr. */
+
+void
+or1k64bf_h_sys_immucfgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_IMMUCFGR (newval);
+}
+
+/* Get the value of h-sys-dccfgr. */
+
+UDI
+or1k64bf_h_sys_dccfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_DCCFGR ();
+}
+
+/* Set a value for h-sys-dccfgr. */
+
+void
+or1k64bf_h_sys_dccfgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_DCCFGR (newval);
+}
+
+/* Get the value of h-sys-iccfgr. */
+
+UDI
+or1k64bf_h_sys_iccfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ICCFGR ();
+}
+
+/* Set a value for h-sys-iccfgr. */
+
+void
+or1k64bf_h_sys_iccfgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ICCFGR (newval);
+}
+
+/* Get the value of h-sys-dcfgr. */
+
+UDI
+or1k64bf_h_sys_dcfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_DCFGR ();
+}
+
+/* Set a value for h-sys-dcfgr. */
+
+void
+or1k64bf_h_sys_dcfgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_DCFGR (newval);
+}
+
+/* Get the value of h-sys-pccfgr. */
+
+UDI
+or1k64bf_h_sys_pccfgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_PCCFGR ();
+}
+
+/* Set a value for h-sys-pccfgr. */
+
+void
+or1k64bf_h_sys_pccfgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_PCCFGR (newval);
+}
+
+/* Get the value of h-sys-npc. */
+
+UDI
+or1k64bf_h_sys_npc_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_NPC ();
+}
+
+/* Set a value for h-sys-npc. */
+
+void
+or1k64bf_h_sys_npc_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_NPC (newval);
+}
+
+/* Get the value of h-sys-sr. */
+
+UDI
+or1k64bf_h_sys_sr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR ();
+}
+
+/* Set a value for h-sys-sr. */
+
+void
+or1k64bf_h_sys_sr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR (newval);
+}
+
+/* Get the value of h-sys-ppc. */
+
+UDI
+or1k64bf_h_sys_ppc_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_PPC ();
+}
+
+/* Set a value for h-sys-ppc. */
+
+void
+or1k64bf_h_sys_ppc_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_PPC (newval);
+}
+
+/* Get the value of h-sys-fpcsr. */
+
+UDI
+or1k64bf_h_sys_fpcsr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR ();
+}
+
+/* Set a value for h-sys-fpcsr. */
+
+void
+or1k64bf_h_sys_fpcsr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR (newval);
+}
+
+/* Get the value of h-sys-epcr0. */
+
+UDI
+or1k64bf_h_sys_epcr0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR0 ();
+}
+
+/* Set a value for h-sys-epcr0. */
+
+void
+or1k64bf_h_sys_epcr0_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR0 (newval);
+}
+
+/* Get the value of h-sys-epcr1. */
+
+UDI
+or1k64bf_h_sys_epcr1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR1 ();
+}
+
+/* Set a value for h-sys-epcr1. */
+
+void
+or1k64bf_h_sys_epcr1_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR1 (newval);
+}
+
+/* Get the value of h-sys-epcr2. */
+
+UDI
+or1k64bf_h_sys_epcr2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR2 ();
+}
+
+/* Set a value for h-sys-epcr2. */
+
+void
+or1k64bf_h_sys_epcr2_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR2 (newval);
+}
+
+/* Get the value of h-sys-epcr3. */
+
+UDI
+or1k64bf_h_sys_epcr3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR3 ();
+}
+
+/* Set a value for h-sys-epcr3. */
+
+void
+or1k64bf_h_sys_epcr3_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR3 (newval);
+}
+
+/* Get the value of h-sys-epcr4. */
+
+UDI
+or1k64bf_h_sys_epcr4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR4 ();
+}
+
+/* Set a value for h-sys-epcr4. */
+
+void
+or1k64bf_h_sys_epcr4_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR4 (newval);
+}
+
+/* Get the value of h-sys-epcr5. */
+
+UDI
+or1k64bf_h_sys_epcr5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR5 ();
+}
+
+/* Set a value for h-sys-epcr5. */
+
+void
+or1k64bf_h_sys_epcr5_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR5 (newval);
+}
+
+/* Get the value of h-sys-epcr6. */
+
+UDI
+or1k64bf_h_sys_epcr6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR6 ();
+}
+
+/* Set a value for h-sys-epcr6. */
+
+void
+or1k64bf_h_sys_epcr6_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR6 (newval);
+}
+
+/* Get the value of h-sys-epcr7. */
+
+UDI
+or1k64bf_h_sys_epcr7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR7 ();
+}
+
+/* Set a value for h-sys-epcr7. */
+
+void
+or1k64bf_h_sys_epcr7_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR7 (newval);
+}
+
+/* Get the value of h-sys-epcr8. */
+
+UDI
+or1k64bf_h_sys_epcr8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR8 ();
+}
+
+/* Set a value for h-sys-epcr8. */
+
+void
+or1k64bf_h_sys_epcr8_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR8 (newval);
+}
+
+/* Get the value of h-sys-epcr9. */
+
+UDI
+or1k64bf_h_sys_epcr9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR9 ();
+}
+
+/* Set a value for h-sys-epcr9. */
+
+void
+or1k64bf_h_sys_epcr9_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR9 (newval);
+}
+
+/* Get the value of h-sys-epcr10. */
+
+UDI
+or1k64bf_h_sys_epcr10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR10 ();
+}
+
+/* Set a value for h-sys-epcr10. */
+
+void
+or1k64bf_h_sys_epcr10_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR10 (newval);
+}
+
+/* Get the value of h-sys-epcr11. */
+
+UDI
+or1k64bf_h_sys_epcr11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR11 ();
+}
+
+/* Set a value for h-sys-epcr11. */
+
+void
+or1k64bf_h_sys_epcr11_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR11 (newval);
+}
+
+/* Get the value of h-sys-epcr12. */
+
+UDI
+or1k64bf_h_sys_epcr12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR12 ();
+}
+
+/* Set a value for h-sys-epcr12. */
+
+void
+or1k64bf_h_sys_epcr12_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR12 (newval);
+}
+
+/* Get the value of h-sys-epcr13. */
+
+UDI
+or1k64bf_h_sys_epcr13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR13 ();
+}
+
+/* Set a value for h-sys-epcr13. */
+
+void
+or1k64bf_h_sys_epcr13_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR13 (newval);
+}
+
+/* Get the value of h-sys-epcr14. */
+
+UDI
+or1k64bf_h_sys_epcr14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR14 ();
+}
+
+/* Set a value for h-sys-epcr14. */
+
+void
+or1k64bf_h_sys_epcr14_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR14 (newval);
+}
+
+/* Get the value of h-sys-epcr15. */
+
+UDI
+or1k64bf_h_sys_epcr15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EPCR15 ();
+}
+
+/* Set a value for h-sys-epcr15. */
+
+void
+or1k64bf_h_sys_epcr15_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EPCR15 (newval);
+}
+
+/* Get the value of h-sys-eear0. */
+
+UDI
+or1k64bf_h_sys_eear0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR0 ();
+}
+
+/* Set a value for h-sys-eear0. */
+
+void
+or1k64bf_h_sys_eear0_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR0 (newval);
+}
+
+/* Get the value of h-sys-eear1. */
+
+UDI
+or1k64bf_h_sys_eear1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR1 ();
+}
+
+/* Set a value for h-sys-eear1. */
+
+void
+or1k64bf_h_sys_eear1_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR1 (newval);
+}
+
+/* Get the value of h-sys-eear2. */
+
+UDI
+or1k64bf_h_sys_eear2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR2 ();
+}
+
+/* Set a value for h-sys-eear2. */
+
+void
+or1k64bf_h_sys_eear2_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR2 (newval);
+}
+
+/* Get the value of h-sys-eear3. */
+
+UDI
+or1k64bf_h_sys_eear3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR3 ();
+}
+
+/* Set a value for h-sys-eear3. */
+
+void
+or1k64bf_h_sys_eear3_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR3 (newval);
+}
+
+/* Get the value of h-sys-eear4. */
+
+UDI
+or1k64bf_h_sys_eear4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR4 ();
+}
+
+/* Set a value for h-sys-eear4. */
+
+void
+or1k64bf_h_sys_eear4_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR4 (newval);
+}
+
+/* Get the value of h-sys-eear5. */
+
+UDI
+or1k64bf_h_sys_eear5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR5 ();
+}
+
+/* Set a value for h-sys-eear5. */
+
+void
+or1k64bf_h_sys_eear5_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR5 (newval);
+}
+
+/* Get the value of h-sys-eear6. */
+
+UDI
+or1k64bf_h_sys_eear6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR6 ();
+}
+
+/* Set a value for h-sys-eear6. */
+
+void
+or1k64bf_h_sys_eear6_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR6 (newval);
+}
+
+/* Get the value of h-sys-eear7. */
+
+UDI
+or1k64bf_h_sys_eear7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR7 ();
+}
+
+/* Set a value for h-sys-eear7. */
+
+void
+or1k64bf_h_sys_eear7_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR7 (newval);
+}
+
+/* Get the value of h-sys-eear8. */
+
+UDI
+or1k64bf_h_sys_eear8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR8 ();
+}
+
+/* Set a value for h-sys-eear8. */
+
+void
+or1k64bf_h_sys_eear8_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR8 (newval);
+}
+
+/* Get the value of h-sys-eear9. */
+
+UDI
+or1k64bf_h_sys_eear9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR9 ();
+}
+
+/* Set a value for h-sys-eear9. */
+
+void
+or1k64bf_h_sys_eear9_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR9 (newval);
+}
+
+/* Get the value of h-sys-eear10. */
+
+UDI
+or1k64bf_h_sys_eear10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR10 ();
+}
+
+/* Set a value for h-sys-eear10. */
+
+void
+or1k64bf_h_sys_eear10_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR10 (newval);
+}
+
+/* Get the value of h-sys-eear11. */
+
+UDI
+or1k64bf_h_sys_eear11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR11 ();
+}
+
+/* Set a value for h-sys-eear11. */
+
+void
+or1k64bf_h_sys_eear11_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR11 (newval);
+}
+
+/* Get the value of h-sys-eear12. */
+
+UDI
+or1k64bf_h_sys_eear12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR12 ();
+}
+
+/* Set a value for h-sys-eear12. */
+
+void
+or1k64bf_h_sys_eear12_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR12 (newval);
+}
+
+/* Get the value of h-sys-eear13. */
+
+UDI
+or1k64bf_h_sys_eear13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR13 ();
+}
+
+/* Set a value for h-sys-eear13. */
+
+void
+or1k64bf_h_sys_eear13_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR13 (newval);
+}
+
+/* Get the value of h-sys-eear14. */
+
+UDI
+or1k64bf_h_sys_eear14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR14 ();
+}
+
+/* Set a value for h-sys-eear14. */
+
+void
+or1k64bf_h_sys_eear14_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR14 (newval);
+}
+
+/* Get the value of h-sys-eear15. */
+
+UDI
+or1k64bf_h_sys_eear15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_EEAR15 ();
+}
+
+/* Set a value for h-sys-eear15. */
+
+void
+or1k64bf_h_sys_eear15_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_EEAR15 (newval);
+}
+
+/* Get the value of h-sys-esr0. */
+
+UDI
+or1k64bf_h_sys_esr0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR0 ();
+}
+
+/* Set a value for h-sys-esr0. */
+
+void
+or1k64bf_h_sys_esr0_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR0 (newval);
+}
+
+/* Get the value of h-sys-esr1. */
+
+UDI
+or1k64bf_h_sys_esr1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR1 ();
+}
+
+/* Set a value for h-sys-esr1. */
+
+void
+or1k64bf_h_sys_esr1_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR1 (newval);
+}
+
+/* Get the value of h-sys-esr2. */
+
+UDI
+or1k64bf_h_sys_esr2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR2 ();
+}
+
+/* Set a value for h-sys-esr2. */
+
+void
+or1k64bf_h_sys_esr2_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR2 (newval);
+}
+
+/* Get the value of h-sys-esr3. */
+
+UDI
+or1k64bf_h_sys_esr3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR3 ();
+}
+
+/* Set a value for h-sys-esr3. */
+
+void
+or1k64bf_h_sys_esr3_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR3 (newval);
+}
+
+/* Get the value of h-sys-esr4. */
+
+UDI
+or1k64bf_h_sys_esr4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR4 ();
+}
+
+/* Set a value for h-sys-esr4. */
+
+void
+or1k64bf_h_sys_esr4_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR4 (newval);
+}
+
+/* Get the value of h-sys-esr5. */
+
+UDI
+or1k64bf_h_sys_esr5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR5 ();
+}
+
+/* Set a value for h-sys-esr5. */
+
+void
+or1k64bf_h_sys_esr5_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR5 (newval);
+}
+
+/* Get the value of h-sys-esr6. */
+
+UDI
+or1k64bf_h_sys_esr6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR6 ();
+}
+
+/* Set a value for h-sys-esr6. */
+
+void
+or1k64bf_h_sys_esr6_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR6 (newval);
+}
+
+/* Get the value of h-sys-esr7. */
+
+UDI
+or1k64bf_h_sys_esr7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR7 ();
+}
+
+/* Set a value for h-sys-esr7. */
+
+void
+or1k64bf_h_sys_esr7_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR7 (newval);
+}
+
+/* Get the value of h-sys-esr8. */
+
+UDI
+or1k64bf_h_sys_esr8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR8 ();
+}
+
+/* Set a value for h-sys-esr8. */
+
+void
+or1k64bf_h_sys_esr8_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR8 (newval);
+}
+
+/* Get the value of h-sys-esr9. */
+
+UDI
+or1k64bf_h_sys_esr9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR9 ();
+}
+
+/* Set a value for h-sys-esr9. */
+
+void
+or1k64bf_h_sys_esr9_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR9 (newval);
+}
+
+/* Get the value of h-sys-esr10. */
+
+UDI
+or1k64bf_h_sys_esr10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR10 ();
+}
+
+/* Set a value for h-sys-esr10. */
+
+void
+or1k64bf_h_sys_esr10_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR10 (newval);
+}
+
+/* Get the value of h-sys-esr11. */
+
+UDI
+or1k64bf_h_sys_esr11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR11 ();
+}
+
+/* Set a value for h-sys-esr11. */
+
+void
+or1k64bf_h_sys_esr11_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR11 (newval);
+}
+
+/* Get the value of h-sys-esr12. */
+
+UDI
+or1k64bf_h_sys_esr12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR12 ();
+}
+
+/* Set a value for h-sys-esr12. */
+
+void
+or1k64bf_h_sys_esr12_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR12 (newval);
+}
+
+/* Get the value of h-sys-esr13. */
+
+UDI
+or1k64bf_h_sys_esr13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR13 ();
+}
+
+/* Set a value for h-sys-esr13. */
+
+void
+or1k64bf_h_sys_esr13_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR13 (newval);
+}
+
+/* Get the value of h-sys-esr14. */
+
+UDI
+or1k64bf_h_sys_esr14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR14 ();
+}
+
+/* Set a value for h-sys-esr14. */
+
+void
+or1k64bf_h_sys_esr14_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR14 (newval);
+}
+
+/* Get the value of h-sys-esr15. */
+
+UDI
+or1k64bf_h_sys_esr15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_ESR15 ();
+}
+
+/* Set a value for h-sys-esr15. */
+
+void
+or1k64bf_h_sys_esr15_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_ESR15 (newval);
+}
+
+/* Get the value of h-sys-gpr0. */
+
+UDI
+or1k64bf_h_sys_gpr0_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR0 ();
+}
+
+/* Set a value for h-sys-gpr0. */
+
+void
+or1k64bf_h_sys_gpr0_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR0 (newval);
+}
+
+/* Get the value of h-sys-gpr1. */
+
+UDI
+or1k64bf_h_sys_gpr1_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR1 ();
+}
+
+/* Set a value for h-sys-gpr1. */
+
+void
+or1k64bf_h_sys_gpr1_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR1 (newval);
+}
+
+/* Get the value of h-sys-gpr2. */
+
+UDI
+or1k64bf_h_sys_gpr2_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR2 ();
+}
+
+/* Set a value for h-sys-gpr2. */
+
+void
+or1k64bf_h_sys_gpr2_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR2 (newval);
+}
+
+/* Get the value of h-sys-gpr3. */
+
+UDI
+or1k64bf_h_sys_gpr3_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR3 ();
+}
+
+/* Set a value for h-sys-gpr3. */
+
+void
+or1k64bf_h_sys_gpr3_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR3 (newval);
+}
+
+/* Get the value of h-sys-gpr4. */
+
+UDI
+or1k64bf_h_sys_gpr4_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR4 ();
+}
+
+/* Set a value for h-sys-gpr4. */
+
+void
+or1k64bf_h_sys_gpr4_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR4 (newval);
+}
+
+/* Get the value of h-sys-gpr5. */
+
+UDI
+or1k64bf_h_sys_gpr5_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR5 ();
+}
+
+/* Set a value for h-sys-gpr5. */
+
+void
+or1k64bf_h_sys_gpr5_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR5 (newval);
+}
+
+/* Get the value of h-sys-gpr6. */
+
+UDI
+or1k64bf_h_sys_gpr6_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR6 ();
+}
+
+/* Set a value for h-sys-gpr6. */
+
+void
+or1k64bf_h_sys_gpr6_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR6 (newval);
+}
+
+/* Get the value of h-sys-gpr7. */
+
+UDI
+or1k64bf_h_sys_gpr7_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR7 ();
+}
+
+/* Set a value for h-sys-gpr7. */
+
+void
+or1k64bf_h_sys_gpr7_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR7 (newval);
+}
+
+/* Get the value of h-sys-gpr8. */
+
+UDI
+or1k64bf_h_sys_gpr8_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR8 ();
+}
+
+/* Set a value for h-sys-gpr8. */
+
+void
+or1k64bf_h_sys_gpr8_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR8 (newval);
+}
+
+/* Get the value of h-sys-gpr9. */
+
+UDI
+or1k64bf_h_sys_gpr9_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR9 ();
+}
+
+/* Set a value for h-sys-gpr9. */
+
+void
+or1k64bf_h_sys_gpr9_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR9 (newval);
+}
+
+/* Get the value of h-sys-gpr10. */
+
+UDI
+or1k64bf_h_sys_gpr10_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR10 ();
+}
+
+/* Set a value for h-sys-gpr10. */
+
+void
+or1k64bf_h_sys_gpr10_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR10 (newval);
+}
+
+/* Get the value of h-sys-gpr11. */
+
+UDI
+or1k64bf_h_sys_gpr11_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR11 ();
+}
+
+/* Set a value for h-sys-gpr11. */
+
+void
+or1k64bf_h_sys_gpr11_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR11 (newval);
+}
+
+/* Get the value of h-sys-gpr12. */
+
+UDI
+or1k64bf_h_sys_gpr12_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR12 ();
+}
+
+/* Set a value for h-sys-gpr12. */
+
+void
+or1k64bf_h_sys_gpr12_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR12 (newval);
+}
+
+/* Get the value of h-sys-gpr13. */
+
+UDI
+or1k64bf_h_sys_gpr13_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR13 ();
+}
+
+/* Set a value for h-sys-gpr13. */
+
+void
+or1k64bf_h_sys_gpr13_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR13 (newval);
+}
+
+/* Get the value of h-sys-gpr14. */
+
+UDI
+or1k64bf_h_sys_gpr14_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR14 ();
+}
+
+/* Set a value for h-sys-gpr14. */
+
+void
+or1k64bf_h_sys_gpr14_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR14 (newval);
+}
+
+/* Get the value of h-sys-gpr15. */
+
+UDI
+or1k64bf_h_sys_gpr15_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR15 ();
+}
+
+/* Set a value for h-sys-gpr15. */
+
+void
+or1k64bf_h_sys_gpr15_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR15 (newval);
+}
+
+/* Get the value of h-sys-gpr16. */
+
+UDI
+or1k64bf_h_sys_gpr16_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR16 ();
+}
+
+/* Set a value for h-sys-gpr16. */
+
+void
+or1k64bf_h_sys_gpr16_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR16 (newval);
+}
+
+/* Get the value of h-sys-gpr17. */
+
+UDI
+or1k64bf_h_sys_gpr17_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR17 ();
+}
+
+/* Set a value for h-sys-gpr17. */
+
+void
+or1k64bf_h_sys_gpr17_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR17 (newval);
+}
+
+/* Get the value of h-sys-gpr18. */
+
+UDI
+or1k64bf_h_sys_gpr18_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR18 ();
+}
+
+/* Set a value for h-sys-gpr18. */
+
+void
+or1k64bf_h_sys_gpr18_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR18 (newval);
+}
+
+/* Get the value of h-sys-gpr19. */
+
+UDI
+or1k64bf_h_sys_gpr19_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR19 ();
+}
+
+/* Set a value for h-sys-gpr19. */
+
+void
+or1k64bf_h_sys_gpr19_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR19 (newval);
+}
+
+/* Get the value of h-sys-gpr20. */
+
+UDI
+or1k64bf_h_sys_gpr20_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR20 ();
+}
+
+/* Set a value for h-sys-gpr20. */
+
+void
+or1k64bf_h_sys_gpr20_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR20 (newval);
+}
+
+/* Get the value of h-sys-gpr21. */
+
+UDI
+or1k64bf_h_sys_gpr21_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR21 ();
+}
+
+/* Set a value for h-sys-gpr21. */
+
+void
+or1k64bf_h_sys_gpr21_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR21 (newval);
+}
+
+/* Get the value of h-sys-gpr22. */
+
+UDI
+or1k64bf_h_sys_gpr22_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR22 ();
+}
+
+/* Set a value for h-sys-gpr22. */
+
+void
+or1k64bf_h_sys_gpr22_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR22 (newval);
+}
+
+/* Get the value of h-sys-gpr23. */
+
+UDI
+or1k64bf_h_sys_gpr23_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR23 ();
+}
+
+/* Set a value for h-sys-gpr23. */
+
+void
+or1k64bf_h_sys_gpr23_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR23 (newval);
+}
+
+/* Get the value of h-sys-gpr24. */
+
+UDI
+or1k64bf_h_sys_gpr24_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR24 ();
+}
+
+/* Set a value for h-sys-gpr24. */
+
+void
+or1k64bf_h_sys_gpr24_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR24 (newval);
+}
+
+/* Get the value of h-sys-gpr25. */
+
+UDI
+or1k64bf_h_sys_gpr25_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR25 ();
+}
+
+/* Set a value for h-sys-gpr25. */
+
+void
+or1k64bf_h_sys_gpr25_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR25 (newval);
+}
+
+/* Get the value of h-sys-gpr26. */
+
+UDI
+or1k64bf_h_sys_gpr26_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR26 ();
+}
+
+/* Set a value for h-sys-gpr26. */
+
+void
+or1k64bf_h_sys_gpr26_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR26 (newval);
+}
+
+/* Get the value of h-sys-gpr27. */
+
+UDI
+or1k64bf_h_sys_gpr27_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR27 ();
+}
+
+/* Set a value for h-sys-gpr27. */
+
+void
+or1k64bf_h_sys_gpr27_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR27 (newval);
+}
+
+/* Get the value of h-sys-gpr28. */
+
+UDI
+or1k64bf_h_sys_gpr28_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR28 ();
+}
+
+/* Set a value for h-sys-gpr28. */
+
+void
+or1k64bf_h_sys_gpr28_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR28 (newval);
+}
+
+/* Get the value of h-sys-gpr29. */
+
+UDI
+or1k64bf_h_sys_gpr29_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR29 ();
+}
+
+/* Set a value for h-sys-gpr29. */
+
+void
+or1k64bf_h_sys_gpr29_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR29 (newval);
+}
+
+/* Get the value of h-sys-gpr30. */
+
+UDI
+or1k64bf_h_sys_gpr30_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR30 ();
+}
+
+/* Set a value for h-sys-gpr30. */
+
+void
+or1k64bf_h_sys_gpr30_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR30 (newval);
+}
+
+/* Get the value of h-sys-gpr31. */
+
+UDI
+or1k64bf_h_sys_gpr31_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR31 ();
+}
+
+/* Set a value for h-sys-gpr31. */
+
+void
+or1k64bf_h_sys_gpr31_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR31 (newval);
+}
+
+/* Get the value of h-sys-gpr32. */
+
+UDI
+or1k64bf_h_sys_gpr32_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR32 ();
+}
+
+/* Set a value for h-sys-gpr32. */
+
+void
+or1k64bf_h_sys_gpr32_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR32 (newval);
+}
+
+/* Get the value of h-sys-gpr33. */
+
+UDI
+or1k64bf_h_sys_gpr33_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR33 ();
+}
+
+/* Set a value for h-sys-gpr33. */
+
+void
+or1k64bf_h_sys_gpr33_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR33 (newval);
+}
+
+/* Get the value of h-sys-gpr34. */
+
+UDI
+or1k64bf_h_sys_gpr34_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR34 ();
+}
+
+/* Set a value for h-sys-gpr34. */
+
+void
+or1k64bf_h_sys_gpr34_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR34 (newval);
+}
+
+/* Get the value of h-sys-gpr35. */
+
+UDI
+or1k64bf_h_sys_gpr35_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR35 ();
+}
+
+/* Set a value for h-sys-gpr35. */
+
+void
+or1k64bf_h_sys_gpr35_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR35 (newval);
+}
+
+/* Get the value of h-sys-gpr36. */
+
+UDI
+or1k64bf_h_sys_gpr36_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR36 ();
+}
+
+/* Set a value for h-sys-gpr36. */
+
+void
+or1k64bf_h_sys_gpr36_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR36 (newval);
+}
+
+/* Get the value of h-sys-gpr37. */
+
+UDI
+or1k64bf_h_sys_gpr37_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR37 ();
+}
+
+/* Set a value for h-sys-gpr37. */
+
+void
+or1k64bf_h_sys_gpr37_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR37 (newval);
+}
+
+/* Get the value of h-sys-gpr38. */
+
+UDI
+or1k64bf_h_sys_gpr38_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR38 ();
+}
+
+/* Set a value for h-sys-gpr38. */
+
+void
+or1k64bf_h_sys_gpr38_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR38 (newval);
+}
+
+/* Get the value of h-sys-gpr39. */
+
+UDI
+or1k64bf_h_sys_gpr39_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR39 ();
+}
+
+/* Set a value for h-sys-gpr39. */
+
+void
+or1k64bf_h_sys_gpr39_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR39 (newval);
+}
+
+/* Get the value of h-sys-gpr40. */
+
+UDI
+or1k64bf_h_sys_gpr40_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR40 ();
+}
+
+/* Set a value for h-sys-gpr40. */
+
+void
+or1k64bf_h_sys_gpr40_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR40 (newval);
+}
+
+/* Get the value of h-sys-gpr41. */
+
+UDI
+or1k64bf_h_sys_gpr41_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR41 ();
+}
+
+/* Set a value for h-sys-gpr41. */
+
+void
+or1k64bf_h_sys_gpr41_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR41 (newval);
+}
+
+/* Get the value of h-sys-gpr42. */
+
+UDI
+or1k64bf_h_sys_gpr42_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR42 ();
+}
+
+/* Set a value for h-sys-gpr42. */
+
+void
+or1k64bf_h_sys_gpr42_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR42 (newval);
+}
+
+/* Get the value of h-sys-gpr43. */
+
+UDI
+or1k64bf_h_sys_gpr43_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR43 ();
+}
+
+/* Set a value for h-sys-gpr43. */
+
+void
+or1k64bf_h_sys_gpr43_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR43 (newval);
+}
+
+/* Get the value of h-sys-gpr44. */
+
+UDI
+or1k64bf_h_sys_gpr44_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR44 ();
+}
+
+/* Set a value for h-sys-gpr44. */
+
+void
+or1k64bf_h_sys_gpr44_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR44 (newval);
+}
+
+/* Get the value of h-sys-gpr45. */
+
+UDI
+or1k64bf_h_sys_gpr45_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR45 ();
+}
+
+/* Set a value for h-sys-gpr45. */
+
+void
+or1k64bf_h_sys_gpr45_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR45 (newval);
+}
+
+/* Get the value of h-sys-gpr46. */
+
+UDI
+or1k64bf_h_sys_gpr46_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR46 ();
+}
+
+/* Set a value for h-sys-gpr46. */
+
+void
+or1k64bf_h_sys_gpr46_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR46 (newval);
+}
+
+/* Get the value of h-sys-gpr47. */
+
+UDI
+or1k64bf_h_sys_gpr47_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR47 ();
+}
+
+/* Set a value for h-sys-gpr47. */
+
+void
+or1k64bf_h_sys_gpr47_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR47 (newval);
+}
+
+/* Get the value of h-sys-gpr48. */
+
+UDI
+or1k64bf_h_sys_gpr48_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR48 ();
+}
+
+/* Set a value for h-sys-gpr48. */
+
+void
+or1k64bf_h_sys_gpr48_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR48 (newval);
+}
+
+/* Get the value of h-sys-gpr49. */
+
+UDI
+or1k64bf_h_sys_gpr49_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR49 ();
+}
+
+/* Set a value for h-sys-gpr49. */
+
+void
+or1k64bf_h_sys_gpr49_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR49 (newval);
+}
+
+/* Get the value of h-sys-gpr50. */
+
+UDI
+or1k64bf_h_sys_gpr50_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR50 ();
+}
+
+/* Set a value for h-sys-gpr50. */
+
+void
+or1k64bf_h_sys_gpr50_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR50 (newval);
+}
+
+/* Get the value of h-sys-gpr51. */
+
+UDI
+or1k64bf_h_sys_gpr51_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR51 ();
+}
+
+/* Set a value for h-sys-gpr51. */
+
+void
+or1k64bf_h_sys_gpr51_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR51 (newval);
+}
+
+/* Get the value of h-sys-gpr52. */
+
+UDI
+or1k64bf_h_sys_gpr52_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR52 ();
+}
+
+/* Set a value for h-sys-gpr52. */
+
+void
+or1k64bf_h_sys_gpr52_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR52 (newval);
+}
+
+/* Get the value of h-sys-gpr53. */
+
+UDI
+or1k64bf_h_sys_gpr53_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR53 ();
+}
+
+/* Set a value for h-sys-gpr53. */
+
+void
+or1k64bf_h_sys_gpr53_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR53 (newval);
+}
+
+/* Get the value of h-sys-gpr54. */
+
+UDI
+or1k64bf_h_sys_gpr54_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR54 ();
+}
+
+/* Set a value for h-sys-gpr54. */
+
+void
+or1k64bf_h_sys_gpr54_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR54 (newval);
+}
+
+/* Get the value of h-sys-gpr55. */
+
+UDI
+or1k64bf_h_sys_gpr55_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR55 ();
+}
+
+/* Set a value for h-sys-gpr55. */
+
+void
+or1k64bf_h_sys_gpr55_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR55 (newval);
+}
+
+/* Get the value of h-sys-gpr56. */
+
+UDI
+or1k64bf_h_sys_gpr56_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR56 ();
+}
+
+/* Set a value for h-sys-gpr56. */
+
+void
+or1k64bf_h_sys_gpr56_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR56 (newval);
+}
+
+/* Get the value of h-sys-gpr57. */
+
+UDI
+or1k64bf_h_sys_gpr57_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR57 ();
+}
+
+/* Set a value for h-sys-gpr57. */
+
+void
+or1k64bf_h_sys_gpr57_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR57 (newval);
+}
+
+/* Get the value of h-sys-gpr58. */
+
+UDI
+or1k64bf_h_sys_gpr58_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR58 ();
+}
+
+/* Set a value for h-sys-gpr58. */
+
+void
+or1k64bf_h_sys_gpr58_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR58 (newval);
+}
+
+/* Get the value of h-sys-gpr59. */
+
+UDI
+or1k64bf_h_sys_gpr59_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR59 ();
+}
+
+/* Set a value for h-sys-gpr59. */
+
+void
+or1k64bf_h_sys_gpr59_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR59 (newval);
+}
+
+/* Get the value of h-sys-gpr60. */
+
+UDI
+or1k64bf_h_sys_gpr60_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR60 ();
+}
+
+/* Set a value for h-sys-gpr60. */
+
+void
+or1k64bf_h_sys_gpr60_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR60 (newval);
+}
+
+/* Get the value of h-sys-gpr61. */
+
+UDI
+or1k64bf_h_sys_gpr61_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR61 ();
+}
+
+/* Set a value for h-sys-gpr61. */
+
+void
+or1k64bf_h_sys_gpr61_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR61 (newval);
+}
+
+/* Get the value of h-sys-gpr62. */
+
+UDI
+or1k64bf_h_sys_gpr62_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR62 ();
+}
+
+/* Set a value for h-sys-gpr62. */
+
+void
+or1k64bf_h_sys_gpr62_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR62 (newval);
+}
+
+/* Get the value of h-sys-gpr63. */
+
+UDI
+or1k64bf_h_sys_gpr63_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR63 ();
+}
+
+/* Set a value for h-sys-gpr63. */
+
+void
+or1k64bf_h_sys_gpr63_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR63 (newval);
+}
+
+/* Get the value of h-sys-gpr64. */
+
+UDI
+or1k64bf_h_sys_gpr64_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR64 ();
+}
+
+/* Set a value for h-sys-gpr64. */
+
+void
+or1k64bf_h_sys_gpr64_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR64 (newval);
+}
+
+/* Get the value of h-sys-gpr65. */
+
+UDI
+or1k64bf_h_sys_gpr65_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR65 ();
+}
+
+/* Set a value for h-sys-gpr65. */
+
+void
+or1k64bf_h_sys_gpr65_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR65 (newval);
+}
+
+/* Get the value of h-sys-gpr66. */
+
+UDI
+or1k64bf_h_sys_gpr66_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR66 ();
+}
+
+/* Set a value for h-sys-gpr66. */
+
+void
+or1k64bf_h_sys_gpr66_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR66 (newval);
+}
+
+/* Get the value of h-sys-gpr67. */
+
+UDI
+or1k64bf_h_sys_gpr67_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR67 ();
+}
+
+/* Set a value for h-sys-gpr67. */
+
+void
+or1k64bf_h_sys_gpr67_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR67 (newval);
+}
+
+/* Get the value of h-sys-gpr68. */
+
+UDI
+or1k64bf_h_sys_gpr68_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR68 ();
+}
+
+/* Set a value for h-sys-gpr68. */
+
+void
+or1k64bf_h_sys_gpr68_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR68 (newval);
+}
+
+/* Get the value of h-sys-gpr69. */
+
+UDI
+or1k64bf_h_sys_gpr69_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR69 ();
+}
+
+/* Set a value for h-sys-gpr69. */
+
+void
+or1k64bf_h_sys_gpr69_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR69 (newval);
+}
+
+/* Get the value of h-sys-gpr70. */
+
+UDI
+or1k64bf_h_sys_gpr70_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR70 ();
+}
+
+/* Set a value for h-sys-gpr70. */
+
+void
+or1k64bf_h_sys_gpr70_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR70 (newval);
+}
+
+/* Get the value of h-sys-gpr71. */
+
+UDI
+or1k64bf_h_sys_gpr71_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR71 ();
+}
+
+/* Set a value for h-sys-gpr71. */
+
+void
+or1k64bf_h_sys_gpr71_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR71 (newval);
+}
+
+/* Get the value of h-sys-gpr72. */
+
+UDI
+or1k64bf_h_sys_gpr72_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR72 ();
+}
+
+/* Set a value for h-sys-gpr72. */
+
+void
+or1k64bf_h_sys_gpr72_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR72 (newval);
+}
+
+/* Get the value of h-sys-gpr73. */
+
+UDI
+or1k64bf_h_sys_gpr73_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR73 ();
+}
+
+/* Set a value for h-sys-gpr73. */
+
+void
+or1k64bf_h_sys_gpr73_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR73 (newval);
+}
+
+/* Get the value of h-sys-gpr74. */
+
+UDI
+or1k64bf_h_sys_gpr74_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR74 ();
+}
+
+/* Set a value for h-sys-gpr74. */
+
+void
+or1k64bf_h_sys_gpr74_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR74 (newval);
+}
+
+/* Get the value of h-sys-gpr75. */
+
+UDI
+or1k64bf_h_sys_gpr75_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR75 ();
+}
+
+/* Set a value for h-sys-gpr75. */
+
+void
+or1k64bf_h_sys_gpr75_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR75 (newval);
+}
+
+/* Get the value of h-sys-gpr76. */
+
+UDI
+or1k64bf_h_sys_gpr76_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR76 ();
+}
+
+/* Set a value for h-sys-gpr76. */
+
+void
+or1k64bf_h_sys_gpr76_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR76 (newval);
+}
+
+/* Get the value of h-sys-gpr77. */
+
+UDI
+or1k64bf_h_sys_gpr77_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR77 ();
+}
+
+/* Set a value for h-sys-gpr77. */
+
+void
+or1k64bf_h_sys_gpr77_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR77 (newval);
+}
+
+/* Get the value of h-sys-gpr78. */
+
+UDI
+or1k64bf_h_sys_gpr78_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR78 ();
+}
+
+/* Set a value for h-sys-gpr78. */
+
+void
+or1k64bf_h_sys_gpr78_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR78 (newval);
+}
+
+/* Get the value of h-sys-gpr79. */
+
+UDI
+or1k64bf_h_sys_gpr79_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR79 ();
+}
+
+/* Set a value for h-sys-gpr79. */
+
+void
+or1k64bf_h_sys_gpr79_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR79 (newval);
+}
+
+/* Get the value of h-sys-gpr80. */
+
+UDI
+or1k64bf_h_sys_gpr80_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR80 ();
+}
+
+/* Set a value for h-sys-gpr80. */
+
+void
+or1k64bf_h_sys_gpr80_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR80 (newval);
+}
+
+/* Get the value of h-sys-gpr81. */
+
+UDI
+or1k64bf_h_sys_gpr81_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR81 ();
+}
+
+/* Set a value for h-sys-gpr81. */
+
+void
+or1k64bf_h_sys_gpr81_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR81 (newval);
+}
+
+/* Get the value of h-sys-gpr82. */
+
+UDI
+or1k64bf_h_sys_gpr82_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR82 ();
+}
+
+/* Set a value for h-sys-gpr82. */
+
+void
+or1k64bf_h_sys_gpr82_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR82 (newval);
+}
+
+/* Get the value of h-sys-gpr83. */
+
+UDI
+or1k64bf_h_sys_gpr83_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR83 ();
+}
+
+/* Set a value for h-sys-gpr83. */
+
+void
+or1k64bf_h_sys_gpr83_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR83 (newval);
+}
+
+/* Get the value of h-sys-gpr84. */
+
+UDI
+or1k64bf_h_sys_gpr84_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR84 ();
+}
+
+/* Set a value for h-sys-gpr84. */
+
+void
+or1k64bf_h_sys_gpr84_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR84 (newval);
+}
+
+/* Get the value of h-sys-gpr85. */
+
+UDI
+or1k64bf_h_sys_gpr85_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR85 ();
+}
+
+/* Set a value for h-sys-gpr85. */
+
+void
+or1k64bf_h_sys_gpr85_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR85 (newval);
+}
+
+/* Get the value of h-sys-gpr86. */
+
+UDI
+or1k64bf_h_sys_gpr86_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR86 ();
+}
+
+/* Set a value for h-sys-gpr86. */
+
+void
+or1k64bf_h_sys_gpr86_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR86 (newval);
+}
+
+/* Get the value of h-sys-gpr87. */
+
+UDI
+or1k64bf_h_sys_gpr87_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR87 ();
+}
+
+/* Set a value for h-sys-gpr87. */
+
+void
+or1k64bf_h_sys_gpr87_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR87 (newval);
+}
+
+/* Get the value of h-sys-gpr88. */
+
+UDI
+or1k64bf_h_sys_gpr88_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR88 ();
+}
+
+/* Set a value for h-sys-gpr88. */
+
+void
+or1k64bf_h_sys_gpr88_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR88 (newval);
+}
+
+/* Get the value of h-sys-gpr89. */
+
+UDI
+or1k64bf_h_sys_gpr89_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR89 ();
+}
+
+/* Set a value for h-sys-gpr89. */
+
+void
+or1k64bf_h_sys_gpr89_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR89 (newval);
+}
+
+/* Get the value of h-sys-gpr90. */
+
+UDI
+or1k64bf_h_sys_gpr90_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR90 ();
+}
+
+/* Set a value for h-sys-gpr90. */
+
+void
+or1k64bf_h_sys_gpr90_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR90 (newval);
+}
+
+/* Get the value of h-sys-gpr91. */
+
+UDI
+or1k64bf_h_sys_gpr91_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR91 ();
+}
+
+/* Set a value for h-sys-gpr91. */
+
+void
+or1k64bf_h_sys_gpr91_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR91 (newval);
+}
+
+/* Get the value of h-sys-gpr92. */
+
+UDI
+or1k64bf_h_sys_gpr92_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR92 ();
+}
+
+/* Set a value for h-sys-gpr92. */
+
+void
+or1k64bf_h_sys_gpr92_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR92 (newval);
+}
+
+/* Get the value of h-sys-gpr93. */
+
+UDI
+or1k64bf_h_sys_gpr93_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR93 ();
+}
+
+/* Set a value for h-sys-gpr93. */
+
+void
+or1k64bf_h_sys_gpr93_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR93 (newval);
+}
+
+/* Get the value of h-sys-gpr94. */
+
+UDI
+or1k64bf_h_sys_gpr94_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR94 ();
+}
+
+/* Set a value for h-sys-gpr94. */
+
+void
+or1k64bf_h_sys_gpr94_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR94 (newval);
+}
+
+/* Get the value of h-sys-gpr95. */
+
+UDI
+or1k64bf_h_sys_gpr95_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR95 ();
+}
+
+/* Set a value for h-sys-gpr95. */
+
+void
+or1k64bf_h_sys_gpr95_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR95 (newval);
+}
+
+/* Get the value of h-sys-gpr96. */
+
+UDI
+or1k64bf_h_sys_gpr96_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR96 ();
+}
+
+/* Set a value for h-sys-gpr96. */
+
+void
+or1k64bf_h_sys_gpr96_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR96 (newval);
+}
+
+/* Get the value of h-sys-gpr97. */
+
+UDI
+or1k64bf_h_sys_gpr97_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR97 ();
+}
+
+/* Set a value for h-sys-gpr97. */
+
+void
+or1k64bf_h_sys_gpr97_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR97 (newval);
+}
+
+/* Get the value of h-sys-gpr98. */
+
+UDI
+or1k64bf_h_sys_gpr98_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR98 ();
+}
+
+/* Set a value for h-sys-gpr98. */
+
+void
+or1k64bf_h_sys_gpr98_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR98 (newval);
+}
+
+/* Get the value of h-sys-gpr99. */
+
+UDI
+or1k64bf_h_sys_gpr99_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR99 ();
+}
+
+/* Set a value for h-sys-gpr99. */
+
+void
+or1k64bf_h_sys_gpr99_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR99 (newval);
+}
+
+/* Get the value of h-sys-gpr100. */
+
+UDI
+or1k64bf_h_sys_gpr100_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR100 ();
+}
+
+/* Set a value for h-sys-gpr100. */
+
+void
+or1k64bf_h_sys_gpr100_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR100 (newval);
+}
+
+/* Get the value of h-sys-gpr101. */
+
+UDI
+or1k64bf_h_sys_gpr101_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR101 ();
+}
+
+/* Set a value for h-sys-gpr101. */
+
+void
+or1k64bf_h_sys_gpr101_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR101 (newval);
+}
+
+/* Get the value of h-sys-gpr102. */
+
+UDI
+or1k64bf_h_sys_gpr102_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR102 ();
+}
+
+/* Set a value for h-sys-gpr102. */
+
+void
+or1k64bf_h_sys_gpr102_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR102 (newval);
+}
+
+/* Get the value of h-sys-gpr103. */
+
+UDI
+or1k64bf_h_sys_gpr103_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR103 ();
+}
+
+/* Set a value for h-sys-gpr103. */
+
+void
+or1k64bf_h_sys_gpr103_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR103 (newval);
+}
+
+/* Get the value of h-sys-gpr104. */
+
+UDI
+or1k64bf_h_sys_gpr104_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR104 ();
+}
+
+/* Set a value for h-sys-gpr104. */
+
+void
+or1k64bf_h_sys_gpr104_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR104 (newval);
+}
+
+/* Get the value of h-sys-gpr105. */
+
+UDI
+or1k64bf_h_sys_gpr105_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR105 ();
+}
+
+/* Set a value for h-sys-gpr105. */
+
+void
+or1k64bf_h_sys_gpr105_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR105 (newval);
+}
+
+/* Get the value of h-sys-gpr106. */
+
+UDI
+or1k64bf_h_sys_gpr106_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR106 ();
+}
+
+/* Set a value for h-sys-gpr106. */
+
+void
+or1k64bf_h_sys_gpr106_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR106 (newval);
+}
+
+/* Get the value of h-sys-gpr107. */
+
+UDI
+or1k64bf_h_sys_gpr107_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR107 ();
+}
+
+/* Set a value for h-sys-gpr107. */
+
+void
+or1k64bf_h_sys_gpr107_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR107 (newval);
+}
+
+/* Get the value of h-sys-gpr108. */
+
+UDI
+or1k64bf_h_sys_gpr108_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR108 ();
+}
+
+/* Set a value for h-sys-gpr108. */
+
+void
+or1k64bf_h_sys_gpr108_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR108 (newval);
+}
+
+/* Get the value of h-sys-gpr109. */
+
+UDI
+or1k64bf_h_sys_gpr109_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR109 ();
+}
+
+/* Set a value for h-sys-gpr109. */
+
+void
+or1k64bf_h_sys_gpr109_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR109 (newval);
+}
+
+/* Get the value of h-sys-gpr110. */
+
+UDI
+or1k64bf_h_sys_gpr110_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR110 ();
+}
+
+/* Set a value for h-sys-gpr110. */
+
+void
+or1k64bf_h_sys_gpr110_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR110 (newval);
+}
+
+/* Get the value of h-sys-gpr111. */
+
+UDI
+or1k64bf_h_sys_gpr111_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR111 ();
+}
+
+/* Set a value for h-sys-gpr111. */
+
+void
+or1k64bf_h_sys_gpr111_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR111 (newval);
+}
+
+/* Get the value of h-sys-gpr112. */
+
+UDI
+or1k64bf_h_sys_gpr112_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR112 ();
+}
+
+/* Set a value for h-sys-gpr112. */
+
+void
+or1k64bf_h_sys_gpr112_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR112 (newval);
+}
+
+/* Get the value of h-sys-gpr113. */
+
+UDI
+or1k64bf_h_sys_gpr113_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR113 ();
+}
+
+/* Set a value for h-sys-gpr113. */
+
+void
+or1k64bf_h_sys_gpr113_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR113 (newval);
+}
+
+/* Get the value of h-sys-gpr114. */
+
+UDI
+or1k64bf_h_sys_gpr114_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR114 ();
+}
+
+/* Set a value for h-sys-gpr114. */
+
+void
+or1k64bf_h_sys_gpr114_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR114 (newval);
+}
+
+/* Get the value of h-sys-gpr115. */
+
+UDI
+or1k64bf_h_sys_gpr115_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR115 ();
+}
+
+/* Set a value for h-sys-gpr115. */
+
+void
+or1k64bf_h_sys_gpr115_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR115 (newval);
+}
+
+/* Get the value of h-sys-gpr116. */
+
+UDI
+or1k64bf_h_sys_gpr116_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR116 ();
+}
+
+/* Set a value for h-sys-gpr116. */
+
+void
+or1k64bf_h_sys_gpr116_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR116 (newval);
+}
+
+/* Get the value of h-sys-gpr117. */
+
+UDI
+or1k64bf_h_sys_gpr117_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR117 ();
+}
+
+/* Set a value for h-sys-gpr117. */
+
+void
+or1k64bf_h_sys_gpr117_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR117 (newval);
+}
+
+/* Get the value of h-sys-gpr118. */
+
+UDI
+or1k64bf_h_sys_gpr118_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR118 ();
+}
+
+/* Set a value for h-sys-gpr118. */
+
+void
+or1k64bf_h_sys_gpr118_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR118 (newval);
+}
+
+/* Get the value of h-sys-gpr119. */
+
+UDI
+or1k64bf_h_sys_gpr119_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR119 ();
+}
+
+/* Set a value for h-sys-gpr119. */
+
+void
+or1k64bf_h_sys_gpr119_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR119 (newval);
+}
+
+/* Get the value of h-sys-gpr120. */
+
+UDI
+or1k64bf_h_sys_gpr120_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR120 ();
+}
+
+/* Set a value for h-sys-gpr120. */
+
+void
+or1k64bf_h_sys_gpr120_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR120 (newval);
+}
+
+/* Get the value of h-sys-gpr121. */
+
+UDI
+or1k64bf_h_sys_gpr121_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR121 ();
+}
+
+/* Set a value for h-sys-gpr121. */
+
+void
+or1k64bf_h_sys_gpr121_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR121 (newval);
+}
+
+/* Get the value of h-sys-gpr122. */
+
+UDI
+or1k64bf_h_sys_gpr122_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR122 ();
+}
+
+/* Set a value for h-sys-gpr122. */
+
+void
+or1k64bf_h_sys_gpr122_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR122 (newval);
+}
+
+/* Get the value of h-sys-gpr123. */
+
+UDI
+or1k64bf_h_sys_gpr123_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR123 ();
+}
+
+/* Set a value for h-sys-gpr123. */
+
+void
+or1k64bf_h_sys_gpr123_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR123 (newval);
+}
+
+/* Get the value of h-sys-gpr124. */
+
+UDI
+or1k64bf_h_sys_gpr124_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR124 ();
+}
+
+/* Set a value for h-sys-gpr124. */
+
+void
+or1k64bf_h_sys_gpr124_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR124 (newval);
+}
+
+/* Get the value of h-sys-gpr125. */
+
+UDI
+or1k64bf_h_sys_gpr125_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR125 ();
+}
+
+/* Set a value for h-sys-gpr125. */
+
+void
+or1k64bf_h_sys_gpr125_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR125 (newval);
+}
+
+/* Get the value of h-sys-gpr126. */
+
+UDI
+or1k64bf_h_sys_gpr126_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR126 ();
+}
+
+/* Set a value for h-sys-gpr126. */
+
+void
+or1k64bf_h_sys_gpr126_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR126 (newval);
+}
+
+/* Get the value of h-sys-gpr127. */
+
+UDI
+or1k64bf_h_sys_gpr127_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR127 ();
+}
+
+/* Set a value for h-sys-gpr127. */
+
+void
+or1k64bf_h_sys_gpr127_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR127 (newval);
+}
+
+/* Get the value of h-sys-gpr128. */
+
+UDI
+or1k64bf_h_sys_gpr128_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR128 ();
+}
+
+/* Set a value for h-sys-gpr128. */
+
+void
+or1k64bf_h_sys_gpr128_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR128 (newval);
+}
+
+/* Get the value of h-sys-gpr129. */
+
+UDI
+or1k64bf_h_sys_gpr129_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR129 ();
+}
+
+/* Set a value for h-sys-gpr129. */
+
+void
+or1k64bf_h_sys_gpr129_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR129 (newval);
+}
+
+/* Get the value of h-sys-gpr130. */
+
+UDI
+or1k64bf_h_sys_gpr130_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR130 ();
+}
+
+/* Set a value for h-sys-gpr130. */
+
+void
+or1k64bf_h_sys_gpr130_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR130 (newval);
+}
+
+/* Get the value of h-sys-gpr131. */
+
+UDI
+or1k64bf_h_sys_gpr131_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR131 ();
+}
+
+/* Set a value for h-sys-gpr131. */
+
+void
+or1k64bf_h_sys_gpr131_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR131 (newval);
+}
+
+/* Get the value of h-sys-gpr132. */
+
+UDI
+or1k64bf_h_sys_gpr132_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR132 ();
+}
+
+/* Set a value for h-sys-gpr132. */
+
+void
+or1k64bf_h_sys_gpr132_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR132 (newval);
+}
+
+/* Get the value of h-sys-gpr133. */
+
+UDI
+or1k64bf_h_sys_gpr133_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR133 ();
+}
+
+/* Set a value for h-sys-gpr133. */
+
+void
+or1k64bf_h_sys_gpr133_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR133 (newval);
+}
+
+/* Get the value of h-sys-gpr134. */
+
+UDI
+or1k64bf_h_sys_gpr134_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR134 ();
+}
+
+/* Set a value for h-sys-gpr134. */
+
+void
+or1k64bf_h_sys_gpr134_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR134 (newval);
+}
+
+/* Get the value of h-sys-gpr135. */
+
+UDI
+or1k64bf_h_sys_gpr135_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR135 ();
+}
+
+/* Set a value for h-sys-gpr135. */
+
+void
+or1k64bf_h_sys_gpr135_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR135 (newval);
+}
+
+/* Get the value of h-sys-gpr136. */
+
+UDI
+or1k64bf_h_sys_gpr136_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR136 ();
+}
+
+/* Set a value for h-sys-gpr136. */
+
+void
+or1k64bf_h_sys_gpr136_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR136 (newval);
+}
+
+/* Get the value of h-sys-gpr137. */
+
+UDI
+or1k64bf_h_sys_gpr137_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR137 ();
+}
+
+/* Set a value for h-sys-gpr137. */
+
+void
+or1k64bf_h_sys_gpr137_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR137 (newval);
+}
+
+/* Get the value of h-sys-gpr138. */
+
+UDI
+or1k64bf_h_sys_gpr138_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR138 ();
+}
+
+/* Set a value for h-sys-gpr138. */
+
+void
+or1k64bf_h_sys_gpr138_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR138 (newval);
+}
+
+/* Get the value of h-sys-gpr139. */
+
+UDI
+or1k64bf_h_sys_gpr139_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR139 ();
+}
+
+/* Set a value for h-sys-gpr139. */
+
+void
+or1k64bf_h_sys_gpr139_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR139 (newval);
+}
+
+/* Get the value of h-sys-gpr140. */
+
+UDI
+or1k64bf_h_sys_gpr140_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR140 ();
+}
+
+/* Set a value for h-sys-gpr140. */
+
+void
+or1k64bf_h_sys_gpr140_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR140 (newval);
+}
+
+/* Get the value of h-sys-gpr141. */
+
+UDI
+or1k64bf_h_sys_gpr141_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR141 ();
+}
+
+/* Set a value for h-sys-gpr141. */
+
+void
+or1k64bf_h_sys_gpr141_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR141 (newval);
+}
+
+/* Get the value of h-sys-gpr142. */
+
+UDI
+or1k64bf_h_sys_gpr142_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR142 ();
+}
+
+/* Set a value for h-sys-gpr142. */
+
+void
+or1k64bf_h_sys_gpr142_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR142 (newval);
+}
+
+/* Get the value of h-sys-gpr143. */
+
+UDI
+or1k64bf_h_sys_gpr143_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR143 ();
+}
+
+/* Set a value for h-sys-gpr143. */
+
+void
+or1k64bf_h_sys_gpr143_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR143 (newval);
+}
+
+/* Get the value of h-sys-gpr144. */
+
+UDI
+or1k64bf_h_sys_gpr144_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR144 ();
+}
+
+/* Set a value for h-sys-gpr144. */
+
+void
+or1k64bf_h_sys_gpr144_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR144 (newval);
+}
+
+/* Get the value of h-sys-gpr145. */
+
+UDI
+or1k64bf_h_sys_gpr145_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR145 ();
+}
+
+/* Set a value for h-sys-gpr145. */
+
+void
+or1k64bf_h_sys_gpr145_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR145 (newval);
+}
+
+/* Get the value of h-sys-gpr146. */
+
+UDI
+or1k64bf_h_sys_gpr146_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR146 ();
+}
+
+/* Set a value for h-sys-gpr146. */
+
+void
+or1k64bf_h_sys_gpr146_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR146 (newval);
+}
+
+/* Get the value of h-sys-gpr147. */
+
+UDI
+or1k64bf_h_sys_gpr147_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR147 ();
+}
+
+/* Set a value for h-sys-gpr147. */
+
+void
+or1k64bf_h_sys_gpr147_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR147 (newval);
+}
+
+/* Get the value of h-sys-gpr148. */
+
+UDI
+or1k64bf_h_sys_gpr148_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR148 ();
+}
+
+/* Set a value for h-sys-gpr148. */
+
+void
+or1k64bf_h_sys_gpr148_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR148 (newval);
+}
+
+/* Get the value of h-sys-gpr149. */
+
+UDI
+or1k64bf_h_sys_gpr149_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR149 ();
+}
+
+/* Set a value for h-sys-gpr149. */
+
+void
+or1k64bf_h_sys_gpr149_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR149 (newval);
+}
+
+/* Get the value of h-sys-gpr150. */
+
+UDI
+or1k64bf_h_sys_gpr150_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR150 ();
+}
+
+/* Set a value for h-sys-gpr150. */
+
+void
+or1k64bf_h_sys_gpr150_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR150 (newval);
+}
+
+/* Get the value of h-sys-gpr151. */
+
+UDI
+or1k64bf_h_sys_gpr151_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR151 ();
+}
+
+/* Set a value for h-sys-gpr151. */
+
+void
+or1k64bf_h_sys_gpr151_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR151 (newval);
+}
+
+/* Get the value of h-sys-gpr152. */
+
+UDI
+or1k64bf_h_sys_gpr152_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR152 ();
+}
+
+/* Set a value for h-sys-gpr152. */
+
+void
+or1k64bf_h_sys_gpr152_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR152 (newval);
+}
+
+/* Get the value of h-sys-gpr153. */
+
+UDI
+or1k64bf_h_sys_gpr153_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR153 ();
+}
+
+/* Set a value for h-sys-gpr153. */
+
+void
+or1k64bf_h_sys_gpr153_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR153 (newval);
+}
+
+/* Get the value of h-sys-gpr154. */
+
+UDI
+or1k64bf_h_sys_gpr154_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR154 ();
+}
+
+/* Set a value for h-sys-gpr154. */
+
+void
+or1k64bf_h_sys_gpr154_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR154 (newval);
+}
+
+/* Get the value of h-sys-gpr155. */
+
+UDI
+or1k64bf_h_sys_gpr155_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR155 ();
+}
+
+/* Set a value for h-sys-gpr155. */
+
+void
+or1k64bf_h_sys_gpr155_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR155 (newval);
+}
+
+/* Get the value of h-sys-gpr156. */
+
+UDI
+or1k64bf_h_sys_gpr156_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR156 ();
+}
+
+/* Set a value for h-sys-gpr156. */
+
+void
+or1k64bf_h_sys_gpr156_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR156 (newval);
+}
+
+/* Get the value of h-sys-gpr157. */
+
+UDI
+or1k64bf_h_sys_gpr157_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR157 ();
+}
+
+/* Set a value for h-sys-gpr157. */
+
+void
+or1k64bf_h_sys_gpr157_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR157 (newval);
+}
+
+/* Get the value of h-sys-gpr158. */
+
+UDI
+or1k64bf_h_sys_gpr158_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR158 ();
+}
+
+/* Set a value for h-sys-gpr158. */
+
+void
+or1k64bf_h_sys_gpr158_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR158 (newval);
+}
+
+/* Get the value of h-sys-gpr159. */
+
+UDI
+or1k64bf_h_sys_gpr159_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR159 ();
+}
+
+/* Set a value for h-sys-gpr159. */
+
+void
+or1k64bf_h_sys_gpr159_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR159 (newval);
+}
+
+/* Get the value of h-sys-gpr160. */
+
+UDI
+or1k64bf_h_sys_gpr160_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR160 ();
+}
+
+/* Set a value for h-sys-gpr160. */
+
+void
+or1k64bf_h_sys_gpr160_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR160 (newval);
+}
+
+/* Get the value of h-sys-gpr161. */
+
+UDI
+or1k64bf_h_sys_gpr161_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR161 ();
+}
+
+/* Set a value for h-sys-gpr161. */
+
+void
+or1k64bf_h_sys_gpr161_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR161 (newval);
+}
+
+/* Get the value of h-sys-gpr162. */
+
+UDI
+or1k64bf_h_sys_gpr162_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR162 ();
+}
+
+/* Set a value for h-sys-gpr162. */
+
+void
+or1k64bf_h_sys_gpr162_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR162 (newval);
+}
+
+/* Get the value of h-sys-gpr163. */
+
+UDI
+or1k64bf_h_sys_gpr163_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR163 ();
+}
+
+/* Set a value for h-sys-gpr163. */
+
+void
+or1k64bf_h_sys_gpr163_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR163 (newval);
+}
+
+/* Get the value of h-sys-gpr164. */
+
+UDI
+or1k64bf_h_sys_gpr164_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR164 ();
+}
+
+/* Set a value for h-sys-gpr164. */
+
+void
+or1k64bf_h_sys_gpr164_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR164 (newval);
+}
+
+/* Get the value of h-sys-gpr165. */
+
+UDI
+or1k64bf_h_sys_gpr165_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR165 ();
+}
+
+/* Set a value for h-sys-gpr165. */
+
+void
+or1k64bf_h_sys_gpr165_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR165 (newval);
+}
+
+/* Get the value of h-sys-gpr166. */
+
+UDI
+or1k64bf_h_sys_gpr166_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR166 ();
+}
+
+/* Set a value for h-sys-gpr166. */
+
+void
+or1k64bf_h_sys_gpr166_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR166 (newval);
+}
+
+/* Get the value of h-sys-gpr167. */
+
+UDI
+or1k64bf_h_sys_gpr167_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR167 ();
+}
+
+/* Set a value for h-sys-gpr167. */
+
+void
+or1k64bf_h_sys_gpr167_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR167 (newval);
+}
+
+/* Get the value of h-sys-gpr168. */
+
+UDI
+or1k64bf_h_sys_gpr168_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR168 ();
+}
+
+/* Set a value for h-sys-gpr168. */
+
+void
+or1k64bf_h_sys_gpr168_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR168 (newval);
+}
+
+/* Get the value of h-sys-gpr169. */
+
+UDI
+or1k64bf_h_sys_gpr169_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR169 ();
+}
+
+/* Set a value for h-sys-gpr169. */
+
+void
+or1k64bf_h_sys_gpr169_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR169 (newval);
+}
+
+/* Get the value of h-sys-gpr170. */
+
+UDI
+or1k64bf_h_sys_gpr170_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR170 ();
+}
+
+/* Set a value for h-sys-gpr170. */
+
+void
+or1k64bf_h_sys_gpr170_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR170 (newval);
+}
+
+/* Get the value of h-sys-gpr171. */
+
+UDI
+or1k64bf_h_sys_gpr171_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR171 ();
+}
+
+/* Set a value for h-sys-gpr171. */
+
+void
+or1k64bf_h_sys_gpr171_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR171 (newval);
+}
+
+/* Get the value of h-sys-gpr172. */
+
+UDI
+or1k64bf_h_sys_gpr172_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR172 ();
+}
+
+/* Set a value for h-sys-gpr172. */
+
+void
+or1k64bf_h_sys_gpr172_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR172 (newval);
+}
+
+/* Get the value of h-sys-gpr173. */
+
+UDI
+or1k64bf_h_sys_gpr173_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR173 ();
+}
+
+/* Set a value for h-sys-gpr173. */
+
+void
+or1k64bf_h_sys_gpr173_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR173 (newval);
+}
+
+/* Get the value of h-sys-gpr174. */
+
+UDI
+or1k64bf_h_sys_gpr174_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR174 ();
+}
+
+/* Set a value for h-sys-gpr174. */
+
+void
+or1k64bf_h_sys_gpr174_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR174 (newval);
+}
+
+/* Get the value of h-sys-gpr175. */
+
+UDI
+or1k64bf_h_sys_gpr175_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR175 ();
+}
+
+/* Set a value for h-sys-gpr175. */
+
+void
+or1k64bf_h_sys_gpr175_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR175 (newval);
+}
+
+/* Get the value of h-sys-gpr176. */
+
+UDI
+or1k64bf_h_sys_gpr176_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR176 ();
+}
+
+/* Set a value for h-sys-gpr176. */
+
+void
+or1k64bf_h_sys_gpr176_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR176 (newval);
+}
+
+/* Get the value of h-sys-gpr177. */
+
+UDI
+or1k64bf_h_sys_gpr177_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR177 ();
+}
+
+/* Set a value for h-sys-gpr177. */
+
+void
+or1k64bf_h_sys_gpr177_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR177 (newval);
+}
+
+/* Get the value of h-sys-gpr178. */
+
+UDI
+or1k64bf_h_sys_gpr178_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR178 ();
+}
+
+/* Set a value for h-sys-gpr178. */
+
+void
+or1k64bf_h_sys_gpr178_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR178 (newval);
+}
+
+/* Get the value of h-sys-gpr179. */
+
+UDI
+or1k64bf_h_sys_gpr179_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR179 ();
+}
+
+/* Set a value for h-sys-gpr179. */
+
+void
+or1k64bf_h_sys_gpr179_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR179 (newval);
+}
+
+/* Get the value of h-sys-gpr180. */
+
+UDI
+or1k64bf_h_sys_gpr180_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR180 ();
+}
+
+/* Set a value for h-sys-gpr180. */
+
+void
+or1k64bf_h_sys_gpr180_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR180 (newval);
+}
+
+/* Get the value of h-sys-gpr181. */
+
+UDI
+or1k64bf_h_sys_gpr181_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR181 ();
+}
+
+/* Set a value for h-sys-gpr181. */
+
+void
+or1k64bf_h_sys_gpr181_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR181 (newval);
+}
+
+/* Get the value of h-sys-gpr182. */
+
+UDI
+or1k64bf_h_sys_gpr182_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR182 ();
+}
+
+/* Set a value for h-sys-gpr182. */
+
+void
+or1k64bf_h_sys_gpr182_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR182 (newval);
+}
+
+/* Get the value of h-sys-gpr183. */
+
+UDI
+or1k64bf_h_sys_gpr183_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR183 ();
+}
+
+/* Set a value for h-sys-gpr183. */
+
+void
+or1k64bf_h_sys_gpr183_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR183 (newval);
+}
+
+/* Get the value of h-sys-gpr184. */
+
+UDI
+or1k64bf_h_sys_gpr184_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR184 ();
+}
+
+/* Set a value for h-sys-gpr184. */
+
+void
+or1k64bf_h_sys_gpr184_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR184 (newval);
+}
+
+/* Get the value of h-sys-gpr185. */
+
+UDI
+or1k64bf_h_sys_gpr185_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR185 ();
+}
+
+/* Set a value for h-sys-gpr185. */
+
+void
+or1k64bf_h_sys_gpr185_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR185 (newval);
+}
+
+/* Get the value of h-sys-gpr186. */
+
+UDI
+or1k64bf_h_sys_gpr186_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR186 ();
+}
+
+/* Set a value for h-sys-gpr186. */
+
+void
+or1k64bf_h_sys_gpr186_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR186 (newval);
+}
+
+/* Get the value of h-sys-gpr187. */
+
+UDI
+or1k64bf_h_sys_gpr187_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR187 ();
+}
+
+/* Set a value for h-sys-gpr187. */
+
+void
+or1k64bf_h_sys_gpr187_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR187 (newval);
+}
+
+/* Get the value of h-sys-gpr188. */
+
+UDI
+or1k64bf_h_sys_gpr188_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR188 ();
+}
+
+/* Set a value for h-sys-gpr188. */
+
+void
+or1k64bf_h_sys_gpr188_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR188 (newval);
+}
+
+/* Get the value of h-sys-gpr189. */
+
+UDI
+or1k64bf_h_sys_gpr189_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR189 ();
+}
+
+/* Set a value for h-sys-gpr189. */
+
+void
+or1k64bf_h_sys_gpr189_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR189 (newval);
+}
+
+/* Get the value of h-sys-gpr190. */
+
+UDI
+or1k64bf_h_sys_gpr190_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR190 ();
+}
+
+/* Set a value for h-sys-gpr190. */
+
+void
+or1k64bf_h_sys_gpr190_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR190 (newval);
+}
+
+/* Get the value of h-sys-gpr191. */
+
+UDI
+or1k64bf_h_sys_gpr191_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR191 ();
+}
+
+/* Set a value for h-sys-gpr191. */
+
+void
+or1k64bf_h_sys_gpr191_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR191 (newval);
+}
+
+/* Get the value of h-sys-gpr192. */
+
+UDI
+or1k64bf_h_sys_gpr192_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR192 ();
+}
+
+/* Set a value for h-sys-gpr192. */
+
+void
+or1k64bf_h_sys_gpr192_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR192 (newval);
+}
+
+/* Get the value of h-sys-gpr193. */
+
+UDI
+or1k64bf_h_sys_gpr193_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR193 ();
+}
+
+/* Set a value for h-sys-gpr193. */
+
+void
+or1k64bf_h_sys_gpr193_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR193 (newval);
+}
+
+/* Get the value of h-sys-gpr194. */
+
+UDI
+or1k64bf_h_sys_gpr194_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR194 ();
+}
+
+/* Set a value for h-sys-gpr194. */
+
+void
+or1k64bf_h_sys_gpr194_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR194 (newval);
+}
+
+/* Get the value of h-sys-gpr195. */
+
+UDI
+or1k64bf_h_sys_gpr195_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR195 ();
+}
+
+/* Set a value for h-sys-gpr195. */
+
+void
+or1k64bf_h_sys_gpr195_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR195 (newval);
+}
+
+/* Get the value of h-sys-gpr196. */
+
+UDI
+or1k64bf_h_sys_gpr196_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR196 ();
+}
+
+/* Set a value for h-sys-gpr196. */
+
+void
+or1k64bf_h_sys_gpr196_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR196 (newval);
+}
+
+/* Get the value of h-sys-gpr197. */
+
+UDI
+or1k64bf_h_sys_gpr197_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR197 ();
+}
+
+/* Set a value for h-sys-gpr197. */
+
+void
+or1k64bf_h_sys_gpr197_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR197 (newval);
+}
+
+/* Get the value of h-sys-gpr198. */
+
+UDI
+or1k64bf_h_sys_gpr198_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR198 ();
+}
+
+/* Set a value for h-sys-gpr198. */
+
+void
+or1k64bf_h_sys_gpr198_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR198 (newval);
+}
+
+/* Get the value of h-sys-gpr199. */
+
+UDI
+or1k64bf_h_sys_gpr199_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR199 ();
+}
+
+/* Set a value for h-sys-gpr199. */
+
+void
+or1k64bf_h_sys_gpr199_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR199 (newval);
+}
+
+/* Get the value of h-sys-gpr200. */
+
+UDI
+or1k64bf_h_sys_gpr200_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR200 ();
+}
+
+/* Set a value for h-sys-gpr200. */
+
+void
+or1k64bf_h_sys_gpr200_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR200 (newval);
+}
+
+/* Get the value of h-sys-gpr201. */
+
+UDI
+or1k64bf_h_sys_gpr201_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR201 ();
+}
+
+/* Set a value for h-sys-gpr201. */
+
+void
+or1k64bf_h_sys_gpr201_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR201 (newval);
+}
+
+/* Get the value of h-sys-gpr202. */
+
+UDI
+or1k64bf_h_sys_gpr202_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR202 ();
+}
+
+/* Set a value for h-sys-gpr202. */
+
+void
+or1k64bf_h_sys_gpr202_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR202 (newval);
+}
+
+/* Get the value of h-sys-gpr203. */
+
+UDI
+or1k64bf_h_sys_gpr203_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR203 ();
+}
+
+/* Set a value for h-sys-gpr203. */
+
+void
+or1k64bf_h_sys_gpr203_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR203 (newval);
+}
+
+/* Get the value of h-sys-gpr204. */
+
+UDI
+or1k64bf_h_sys_gpr204_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR204 ();
+}
+
+/* Set a value for h-sys-gpr204. */
+
+void
+or1k64bf_h_sys_gpr204_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR204 (newval);
+}
+
+/* Get the value of h-sys-gpr205. */
+
+UDI
+or1k64bf_h_sys_gpr205_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR205 ();
+}
+
+/* Set a value for h-sys-gpr205. */
+
+void
+or1k64bf_h_sys_gpr205_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR205 (newval);
+}
+
+/* Get the value of h-sys-gpr206. */
+
+UDI
+or1k64bf_h_sys_gpr206_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR206 ();
+}
+
+/* Set a value for h-sys-gpr206. */
+
+void
+or1k64bf_h_sys_gpr206_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR206 (newval);
+}
+
+/* Get the value of h-sys-gpr207. */
+
+UDI
+or1k64bf_h_sys_gpr207_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR207 ();
+}
+
+/* Set a value for h-sys-gpr207. */
+
+void
+or1k64bf_h_sys_gpr207_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR207 (newval);
+}
+
+/* Get the value of h-sys-gpr208. */
+
+UDI
+or1k64bf_h_sys_gpr208_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR208 ();
+}
+
+/* Set a value for h-sys-gpr208. */
+
+void
+or1k64bf_h_sys_gpr208_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR208 (newval);
+}
+
+/* Get the value of h-sys-gpr209. */
+
+UDI
+or1k64bf_h_sys_gpr209_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR209 ();
+}
+
+/* Set a value for h-sys-gpr209. */
+
+void
+or1k64bf_h_sys_gpr209_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR209 (newval);
+}
+
+/* Get the value of h-sys-gpr210. */
+
+UDI
+or1k64bf_h_sys_gpr210_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR210 ();
+}
+
+/* Set a value for h-sys-gpr210. */
+
+void
+or1k64bf_h_sys_gpr210_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR210 (newval);
+}
+
+/* Get the value of h-sys-gpr211. */
+
+UDI
+or1k64bf_h_sys_gpr211_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR211 ();
+}
+
+/* Set a value for h-sys-gpr211. */
+
+void
+or1k64bf_h_sys_gpr211_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR211 (newval);
+}
+
+/* Get the value of h-sys-gpr212. */
+
+UDI
+or1k64bf_h_sys_gpr212_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR212 ();
+}
+
+/* Set a value for h-sys-gpr212. */
+
+void
+or1k64bf_h_sys_gpr212_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR212 (newval);
+}
+
+/* Get the value of h-sys-gpr213. */
+
+UDI
+or1k64bf_h_sys_gpr213_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR213 ();
+}
+
+/* Set a value for h-sys-gpr213. */
+
+void
+or1k64bf_h_sys_gpr213_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR213 (newval);
+}
+
+/* Get the value of h-sys-gpr214. */
+
+UDI
+or1k64bf_h_sys_gpr214_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR214 ();
+}
+
+/* Set a value for h-sys-gpr214. */
+
+void
+or1k64bf_h_sys_gpr214_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR214 (newval);
+}
+
+/* Get the value of h-sys-gpr215. */
+
+UDI
+or1k64bf_h_sys_gpr215_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR215 ();
+}
+
+/* Set a value for h-sys-gpr215. */
+
+void
+or1k64bf_h_sys_gpr215_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR215 (newval);
+}
+
+/* Get the value of h-sys-gpr216. */
+
+UDI
+or1k64bf_h_sys_gpr216_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR216 ();
+}
+
+/* Set a value for h-sys-gpr216. */
+
+void
+or1k64bf_h_sys_gpr216_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR216 (newval);
+}
+
+/* Get the value of h-sys-gpr217. */
+
+UDI
+or1k64bf_h_sys_gpr217_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR217 ();
+}
+
+/* Set a value for h-sys-gpr217. */
+
+void
+or1k64bf_h_sys_gpr217_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR217 (newval);
+}
+
+/* Get the value of h-sys-gpr218. */
+
+UDI
+or1k64bf_h_sys_gpr218_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR218 ();
+}
+
+/* Set a value for h-sys-gpr218. */
+
+void
+or1k64bf_h_sys_gpr218_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR218 (newval);
+}
+
+/* Get the value of h-sys-gpr219. */
+
+UDI
+or1k64bf_h_sys_gpr219_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR219 ();
+}
+
+/* Set a value for h-sys-gpr219. */
+
+void
+or1k64bf_h_sys_gpr219_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR219 (newval);
+}
+
+/* Get the value of h-sys-gpr220. */
+
+UDI
+or1k64bf_h_sys_gpr220_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR220 ();
+}
+
+/* Set a value for h-sys-gpr220. */
+
+void
+or1k64bf_h_sys_gpr220_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR220 (newval);
+}
+
+/* Get the value of h-sys-gpr221. */
+
+UDI
+or1k64bf_h_sys_gpr221_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR221 ();
+}
+
+/* Set a value for h-sys-gpr221. */
+
+void
+or1k64bf_h_sys_gpr221_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR221 (newval);
+}
+
+/* Get the value of h-sys-gpr222. */
+
+UDI
+or1k64bf_h_sys_gpr222_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR222 ();
+}
+
+/* Set a value for h-sys-gpr222. */
+
+void
+or1k64bf_h_sys_gpr222_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR222 (newval);
+}
+
+/* Get the value of h-sys-gpr223. */
+
+UDI
+or1k64bf_h_sys_gpr223_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR223 ();
+}
+
+/* Set a value for h-sys-gpr223. */
+
+void
+or1k64bf_h_sys_gpr223_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR223 (newval);
+}
+
+/* Get the value of h-sys-gpr224. */
+
+UDI
+or1k64bf_h_sys_gpr224_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR224 ();
+}
+
+/* Set a value for h-sys-gpr224. */
+
+void
+or1k64bf_h_sys_gpr224_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR224 (newval);
+}
+
+/* Get the value of h-sys-gpr225. */
+
+UDI
+or1k64bf_h_sys_gpr225_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR225 ();
+}
+
+/* Set a value for h-sys-gpr225. */
+
+void
+or1k64bf_h_sys_gpr225_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR225 (newval);
+}
+
+/* Get the value of h-sys-gpr226. */
+
+UDI
+or1k64bf_h_sys_gpr226_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR226 ();
+}
+
+/* Set a value for h-sys-gpr226. */
+
+void
+or1k64bf_h_sys_gpr226_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR226 (newval);
+}
+
+/* Get the value of h-sys-gpr227. */
+
+UDI
+or1k64bf_h_sys_gpr227_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR227 ();
+}
+
+/* Set a value for h-sys-gpr227. */
+
+void
+or1k64bf_h_sys_gpr227_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR227 (newval);
+}
+
+/* Get the value of h-sys-gpr228. */
+
+UDI
+or1k64bf_h_sys_gpr228_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR228 ();
+}
+
+/* Set a value for h-sys-gpr228. */
+
+void
+or1k64bf_h_sys_gpr228_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR228 (newval);
+}
+
+/* Get the value of h-sys-gpr229. */
+
+UDI
+or1k64bf_h_sys_gpr229_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR229 ();
+}
+
+/* Set a value for h-sys-gpr229. */
+
+void
+or1k64bf_h_sys_gpr229_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR229 (newval);
+}
+
+/* Get the value of h-sys-gpr230. */
+
+UDI
+or1k64bf_h_sys_gpr230_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR230 ();
+}
+
+/* Set a value for h-sys-gpr230. */
+
+void
+or1k64bf_h_sys_gpr230_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR230 (newval);
+}
+
+/* Get the value of h-sys-gpr231. */
+
+UDI
+or1k64bf_h_sys_gpr231_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR231 ();
+}
+
+/* Set a value for h-sys-gpr231. */
+
+void
+or1k64bf_h_sys_gpr231_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR231 (newval);
+}
+
+/* Get the value of h-sys-gpr232. */
+
+UDI
+or1k64bf_h_sys_gpr232_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR232 ();
+}
+
+/* Set a value for h-sys-gpr232. */
+
+void
+or1k64bf_h_sys_gpr232_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR232 (newval);
+}
+
+/* Get the value of h-sys-gpr233. */
+
+UDI
+or1k64bf_h_sys_gpr233_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR233 ();
+}
+
+/* Set a value for h-sys-gpr233. */
+
+void
+or1k64bf_h_sys_gpr233_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR233 (newval);
+}
+
+/* Get the value of h-sys-gpr234. */
+
+UDI
+or1k64bf_h_sys_gpr234_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR234 ();
+}
+
+/* Set a value for h-sys-gpr234. */
+
+void
+or1k64bf_h_sys_gpr234_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR234 (newval);
+}
+
+/* Get the value of h-sys-gpr235. */
+
+UDI
+or1k64bf_h_sys_gpr235_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR235 ();
+}
+
+/* Set a value for h-sys-gpr235. */
+
+void
+or1k64bf_h_sys_gpr235_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR235 (newval);
+}
+
+/* Get the value of h-sys-gpr236. */
+
+UDI
+or1k64bf_h_sys_gpr236_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR236 ();
+}
+
+/* Set a value for h-sys-gpr236. */
+
+void
+or1k64bf_h_sys_gpr236_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR236 (newval);
+}
+
+/* Get the value of h-sys-gpr237. */
+
+UDI
+or1k64bf_h_sys_gpr237_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR237 ();
+}
+
+/* Set a value for h-sys-gpr237. */
+
+void
+or1k64bf_h_sys_gpr237_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR237 (newval);
+}
+
+/* Get the value of h-sys-gpr238. */
+
+UDI
+or1k64bf_h_sys_gpr238_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR238 ();
+}
+
+/* Set a value for h-sys-gpr238. */
+
+void
+or1k64bf_h_sys_gpr238_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR238 (newval);
+}
+
+/* Get the value of h-sys-gpr239. */
+
+UDI
+or1k64bf_h_sys_gpr239_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR239 ();
+}
+
+/* Set a value for h-sys-gpr239. */
+
+void
+or1k64bf_h_sys_gpr239_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR239 (newval);
+}
+
+/* Get the value of h-sys-gpr240. */
+
+UDI
+or1k64bf_h_sys_gpr240_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR240 ();
+}
+
+/* Set a value for h-sys-gpr240. */
+
+void
+or1k64bf_h_sys_gpr240_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR240 (newval);
+}
+
+/* Get the value of h-sys-gpr241. */
+
+UDI
+or1k64bf_h_sys_gpr241_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR241 ();
+}
+
+/* Set a value for h-sys-gpr241. */
+
+void
+or1k64bf_h_sys_gpr241_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR241 (newval);
+}
+
+/* Get the value of h-sys-gpr242. */
+
+UDI
+or1k64bf_h_sys_gpr242_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR242 ();
+}
+
+/* Set a value for h-sys-gpr242. */
+
+void
+or1k64bf_h_sys_gpr242_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR242 (newval);
+}
+
+/* Get the value of h-sys-gpr243. */
+
+UDI
+or1k64bf_h_sys_gpr243_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR243 ();
+}
+
+/* Set a value for h-sys-gpr243. */
+
+void
+or1k64bf_h_sys_gpr243_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR243 (newval);
+}
+
+/* Get the value of h-sys-gpr244. */
+
+UDI
+or1k64bf_h_sys_gpr244_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR244 ();
+}
+
+/* Set a value for h-sys-gpr244. */
+
+void
+or1k64bf_h_sys_gpr244_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR244 (newval);
+}
+
+/* Get the value of h-sys-gpr245. */
+
+UDI
+or1k64bf_h_sys_gpr245_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR245 ();
+}
+
+/* Set a value for h-sys-gpr245. */
+
+void
+or1k64bf_h_sys_gpr245_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR245 (newval);
+}
+
+/* Get the value of h-sys-gpr246. */
+
+UDI
+or1k64bf_h_sys_gpr246_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR246 ();
+}
+
+/* Set a value for h-sys-gpr246. */
+
+void
+or1k64bf_h_sys_gpr246_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR246 (newval);
+}
+
+/* Get the value of h-sys-gpr247. */
+
+UDI
+or1k64bf_h_sys_gpr247_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR247 ();
+}
+
+/* Set a value for h-sys-gpr247. */
+
+void
+or1k64bf_h_sys_gpr247_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR247 (newval);
+}
+
+/* Get the value of h-sys-gpr248. */
+
+UDI
+or1k64bf_h_sys_gpr248_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR248 ();
+}
+
+/* Set a value for h-sys-gpr248. */
+
+void
+or1k64bf_h_sys_gpr248_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR248 (newval);
+}
+
+/* Get the value of h-sys-gpr249. */
+
+UDI
+or1k64bf_h_sys_gpr249_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR249 ();
+}
+
+/* Set a value for h-sys-gpr249. */
+
+void
+or1k64bf_h_sys_gpr249_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR249 (newval);
+}
+
+/* Get the value of h-sys-gpr250. */
+
+UDI
+or1k64bf_h_sys_gpr250_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR250 ();
+}
+
+/* Set a value for h-sys-gpr250. */
+
+void
+or1k64bf_h_sys_gpr250_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR250 (newval);
+}
+
+/* Get the value of h-sys-gpr251. */
+
+UDI
+or1k64bf_h_sys_gpr251_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR251 ();
+}
+
+/* Set a value for h-sys-gpr251. */
+
+void
+or1k64bf_h_sys_gpr251_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR251 (newval);
+}
+
+/* Get the value of h-sys-gpr252. */
+
+UDI
+or1k64bf_h_sys_gpr252_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR252 ();
+}
+
+/* Set a value for h-sys-gpr252. */
+
+void
+or1k64bf_h_sys_gpr252_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR252 (newval);
+}
+
+/* Get the value of h-sys-gpr253. */
+
+UDI
+or1k64bf_h_sys_gpr253_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR253 ();
+}
+
+/* Set a value for h-sys-gpr253. */
+
+void
+or1k64bf_h_sys_gpr253_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR253 (newval);
+}
+
+/* Get the value of h-sys-gpr254. */
+
+UDI
+or1k64bf_h_sys_gpr254_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR254 ();
+}
+
+/* Set a value for h-sys-gpr254. */
+
+void
+or1k64bf_h_sys_gpr254_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR254 (newval);
+}
+
+/* Get the value of h-sys-gpr255. */
+
+UDI
+or1k64bf_h_sys_gpr255_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR255 ();
+}
+
+/* Set a value for h-sys-gpr255. */
+
+void
+or1k64bf_h_sys_gpr255_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR255 (newval);
+}
+
+/* Get the value of h-sys-gpr256. */
+
+UDI
+or1k64bf_h_sys_gpr256_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR256 ();
+}
+
+/* Set a value for h-sys-gpr256. */
+
+void
+or1k64bf_h_sys_gpr256_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR256 (newval);
+}
+
+/* Get the value of h-sys-gpr257. */
+
+UDI
+or1k64bf_h_sys_gpr257_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR257 ();
+}
+
+/* Set a value for h-sys-gpr257. */
+
+void
+or1k64bf_h_sys_gpr257_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR257 (newval);
+}
+
+/* Get the value of h-sys-gpr258. */
+
+UDI
+or1k64bf_h_sys_gpr258_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR258 ();
+}
+
+/* Set a value for h-sys-gpr258. */
+
+void
+or1k64bf_h_sys_gpr258_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR258 (newval);
+}
+
+/* Get the value of h-sys-gpr259. */
+
+UDI
+or1k64bf_h_sys_gpr259_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR259 ();
+}
+
+/* Set a value for h-sys-gpr259. */
+
+void
+or1k64bf_h_sys_gpr259_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR259 (newval);
+}
+
+/* Get the value of h-sys-gpr260. */
+
+UDI
+or1k64bf_h_sys_gpr260_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR260 ();
+}
+
+/* Set a value for h-sys-gpr260. */
+
+void
+or1k64bf_h_sys_gpr260_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR260 (newval);
+}
+
+/* Get the value of h-sys-gpr261. */
+
+UDI
+or1k64bf_h_sys_gpr261_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR261 ();
+}
+
+/* Set a value for h-sys-gpr261. */
+
+void
+or1k64bf_h_sys_gpr261_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR261 (newval);
+}
+
+/* Get the value of h-sys-gpr262. */
+
+UDI
+or1k64bf_h_sys_gpr262_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR262 ();
+}
+
+/* Set a value for h-sys-gpr262. */
+
+void
+or1k64bf_h_sys_gpr262_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR262 (newval);
+}
+
+/* Get the value of h-sys-gpr263. */
+
+UDI
+or1k64bf_h_sys_gpr263_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR263 ();
+}
+
+/* Set a value for h-sys-gpr263. */
+
+void
+or1k64bf_h_sys_gpr263_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR263 (newval);
+}
+
+/* Get the value of h-sys-gpr264. */
+
+UDI
+or1k64bf_h_sys_gpr264_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR264 ();
+}
+
+/* Set a value for h-sys-gpr264. */
+
+void
+or1k64bf_h_sys_gpr264_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR264 (newval);
+}
+
+/* Get the value of h-sys-gpr265. */
+
+UDI
+or1k64bf_h_sys_gpr265_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR265 ();
+}
+
+/* Set a value for h-sys-gpr265. */
+
+void
+or1k64bf_h_sys_gpr265_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR265 (newval);
+}
+
+/* Get the value of h-sys-gpr266. */
+
+UDI
+or1k64bf_h_sys_gpr266_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR266 ();
+}
+
+/* Set a value for h-sys-gpr266. */
+
+void
+or1k64bf_h_sys_gpr266_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR266 (newval);
+}
+
+/* Get the value of h-sys-gpr267. */
+
+UDI
+or1k64bf_h_sys_gpr267_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR267 ();
+}
+
+/* Set a value for h-sys-gpr267. */
+
+void
+or1k64bf_h_sys_gpr267_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR267 (newval);
+}
+
+/* Get the value of h-sys-gpr268. */
+
+UDI
+or1k64bf_h_sys_gpr268_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR268 ();
+}
+
+/* Set a value for h-sys-gpr268. */
+
+void
+or1k64bf_h_sys_gpr268_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR268 (newval);
+}
+
+/* Get the value of h-sys-gpr269. */
+
+UDI
+or1k64bf_h_sys_gpr269_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR269 ();
+}
+
+/* Set a value for h-sys-gpr269. */
+
+void
+or1k64bf_h_sys_gpr269_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR269 (newval);
+}
+
+/* Get the value of h-sys-gpr270. */
+
+UDI
+or1k64bf_h_sys_gpr270_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR270 ();
+}
+
+/* Set a value for h-sys-gpr270. */
+
+void
+or1k64bf_h_sys_gpr270_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR270 (newval);
+}
+
+/* Get the value of h-sys-gpr271. */
+
+UDI
+or1k64bf_h_sys_gpr271_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR271 ();
+}
+
+/* Set a value for h-sys-gpr271. */
+
+void
+or1k64bf_h_sys_gpr271_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR271 (newval);
+}
+
+/* Get the value of h-sys-gpr272. */
+
+UDI
+or1k64bf_h_sys_gpr272_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR272 ();
+}
+
+/* Set a value for h-sys-gpr272. */
+
+void
+or1k64bf_h_sys_gpr272_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR272 (newval);
+}
+
+/* Get the value of h-sys-gpr273. */
+
+UDI
+or1k64bf_h_sys_gpr273_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR273 ();
+}
+
+/* Set a value for h-sys-gpr273. */
+
+void
+or1k64bf_h_sys_gpr273_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR273 (newval);
+}
+
+/* Get the value of h-sys-gpr274. */
+
+UDI
+or1k64bf_h_sys_gpr274_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR274 ();
+}
+
+/* Set a value for h-sys-gpr274. */
+
+void
+or1k64bf_h_sys_gpr274_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR274 (newval);
+}
+
+/* Get the value of h-sys-gpr275. */
+
+UDI
+or1k64bf_h_sys_gpr275_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR275 ();
+}
+
+/* Set a value for h-sys-gpr275. */
+
+void
+or1k64bf_h_sys_gpr275_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR275 (newval);
+}
+
+/* Get the value of h-sys-gpr276. */
+
+UDI
+or1k64bf_h_sys_gpr276_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR276 ();
+}
+
+/* Set a value for h-sys-gpr276. */
+
+void
+or1k64bf_h_sys_gpr276_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR276 (newval);
+}
+
+/* Get the value of h-sys-gpr277. */
+
+UDI
+or1k64bf_h_sys_gpr277_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR277 ();
+}
+
+/* Set a value for h-sys-gpr277. */
+
+void
+or1k64bf_h_sys_gpr277_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR277 (newval);
+}
+
+/* Get the value of h-sys-gpr278. */
+
+UDI
+or1k64bf_h_sys_gpr278_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR278 ();
+}
+
+/* Set a value for h-sys-gpr278. */
+
+void
+or1k64bf_h_sys_gpr278_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR278 (newval);
+}
+
+/* Get the value of h-sys-gpr279. */
+
+UDI
+or1k64bf_h_sys_gpr279_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR279 ();
+}
+
+/* Set a value for h-sys-gpr279. */
+
+void
+or1k64bf_h_sys_gpr279_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR279 (newval);
+}
+
+/* Get the value of h-sys-gpr280. */
+
+UDI
+or1k64bf_h_sys_gpr280_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR280 ();
+}
+
+/* Set a value for h-sys-gpr280. */
+
+void
+or1k64bf_h_sys_gpr280_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR280 (newval);
+}
+
+/* Get the value of h-sys-gpr281. */
+
+UDI
+or1k64bf_h_sys_gpr281_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR281 ();
+}
+
+/* Set a value for h-sys-gpr281. */
+
+void
+or1k64bf_h_sys_gpr281_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR281 (newval);
+}
+
+/* Get the value of h-sys-gpr282. */
+
+UDI
+or1k64bf_h_sys_gpr282_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR282 ();
+}
+
+/* Set a value for h-sys-gpr282. */
+
+void
+or1k64bf_h_sys_gpr282_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR282 (newval);
+}
+
+/* Get the value of h-sys-gpr283. */
+
+UDI
+or1k64bf_h_sys_gpr283_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR283 ();
+}
+
+/* Set a value for h-sys-gpr283. */
+
+void
+or1k64bf_h_sys_gpr283_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR283 (newval);
+}
+
+/* Get the value of h-sys-gpr284. */
+
+UDI
+or1k64bf_h_sys_gpr284_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR284 ();
+}
+
+/* Set a value for h-sys-gpr284. */
+
+void
+or1k64bf_h_sys_gpr284_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR284 (newval);
+}
+
+/* Get the value of h-sys-gpr285. */
+
+UDI
+or1k64bf_h_sys_gpr285_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR285 ();
+}
+
+/* Set a value for h-sys-gpr285. */
+
+void
+or1k64bf_h_sys_gpr285_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR285 (newval);
+}
+
+/* Get the value of h-sys-gpr286. */
+
+UDI
+or1k64bf_h_sys_gpr286_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR286 ();
+}
+
+/* Set a value for h-sys-gpr286. */
+
+void
+or1k64bf_h_sys_gpr286_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR286 (newval);
+}
+
+/* Get the value of h-sys-gpr287. */
+
+UDI
+or1k64bf_h_sys_gpr287_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR287 ();
+}
+
+/* Set a value for h-sys-gpr287. */
+
+void
+or1k64bf_h_sys_gpr287_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR287 (newval);
+}
+
+/* Get the value of h-sys-gpr288. */
+
+UDI
+or1k64bf_h_sys_gpr288_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR288 ();
+}
+
+/* Set a value for h-sys-gpr288. */
+
+void
+or1k64bf_h_sys_gpr288_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR288 (newval);
+}
+
+/* Get the value of h-sys-gpr289. */
+
+UDI
+or1k64bf_h_sys_gpr289_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR289 ();
+}
+
+/* Set a value for h-sys-gpr289. */
+
+void
+or1k64bf_h_sys_gpr289_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR289 (newval);
+}
+
+/* Get the value of h-sys-gpr290. */
+
+UDI
+or1k64bf_h_sys_gpr290_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR290 ();
+}
+
+/* Set a value for h-sys-gpr290. */
+
+void
+or1k64bf_h_sys_gpr290_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR290 (newval);
+}
+
+/* Get the value of h-sys-gpr291. */
+
+UDI
+or1k64bf_h_sys_gpr291_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR291 ();
+}
+
+/* Set a value for h-sys-gpr291. */
+
+void
+or1k64bf_h_sys_gpr291_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR291 (newval);
+}
+
+/* Get the value of h-sys-gpr292. */
+
+UDI
+or1k64bf_h_sys_gpr292_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR292 ();
+}
+
+/* Set a value for h-sys-gpr292. */
+
+void
+or1k64bf_h_sys_gpr292_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR292 (newval);
+}
+
+/* Get the value of h-sys-gpr293. */
+
+UDI
+or1k64bf_h_sys_gpr293_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR293 ();
+}
+
+/* Set a value for h-sys-gpr293. */
+
+void
+or1k64bf_h_sys_gpr293_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR293 (newval);
+}
+
+/* Get the value of h-sys-gpr294. */
+
+UDI
+or1k64bf_h_sys_gpr294_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR294 ();
+}
+
+/* Set a value for h-sys-gpr294. */
+
+void
+or1k64bf_h_sys_gpr294_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR294 (newval);
+}
+
+/* Get the value of h-sys-gpr295. */
+
+UDI
+or1k64bf_h_sys_gpr295_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR295 ();
+}
+
+/* Set a value for h-sys-gpr295. */
+
+void
+or1k64bf_h_sys_gpr295_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR295 (newval);
+}
+
+/* Get the value of h-sys-gpr296. */
+
+UDI
+or1k64bf_h_sys_gpr296_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR296 ();
+}
+
+/* Set a value for h-sys-gpr296. */
+
+void
+or1k64bf_h_sys_gpr296_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR296 (newval);
+}
+
+/* Get the value of h-sys-gpr297. */
+
+UDI
+or1k64bf_h_sys_gpr297_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR297 ();
+}
+
+/* Set a value for h-sys-gpr297. */
+
+void
+or1k64bf_h_sys_gpr297_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR297 (newval);
+}
+
+/* Get the value of h-sys-gpr298. */
+
+UDI
+or1k64bf_h_sys_gpr298_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR298 ();
+}
+
+/* Set a value for h-sys-gpr298. */
+
+void
+or1k64bf_h_sys_gpr298_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR298 (newval);
+}
+
+/* Get the value of h-sys-gpr299. */
+
+UDI
+or1k64bf_h_sys_gpr299_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR299 ();
+}
+
+/* Set a value for h-sys-gpr299. */
+
+void
+or1k64bf_h_sys_gpr299_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR299 (newval);
+}
+
+/* Get the value of h-sys-gpr300. */
+
+UDI
+or1k64bf_h_sys_gpr300_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR300 ();
+}
+
+/* Set a value for h-sys-gpr300. */
+
+void
+or1k64bf_h_sys_gpr300_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR300 (newval);
+}
+
+/* Get the value of h-sys-gpr301. */
+
+UDI
+or1k64bf_h_sys_gpr301_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR301 ();
+}
+
+/* Set a value for h-sys-gpr301. */
+
+void
+or1k64bf_h_sys_gpr301_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR301 (newval);
+}
+
+/* Get the value of h-sys-gpr302. */
+
+UDI
+or1k64bf_h_sys_gpr302_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR302 ();
+}
+
+/* Set a value for h-sys-gpr302. */
+
+void
+or1k64bf_h_sys_gpr302_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR302 (newval);
+}
+
+/* Get the value of h-sys-gpr303. */
+
+UDI
+or1k64bf_h_sys_gpr303_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR303 ();
+}
+
+/* Set a value for h-sys-gpr303. */
+
+void
+or1k64bf_h_sys_gpr303_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR303 (newval);
+}
+
+/* Get the value of h-sys-gpr304. */
+
+UDI
+or1k64bf_h_sys_gpr304_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR304 ();
+}
+
+/* Set a value for h-sys-gpr304. */
+
+void
+or1k64bf_h_sys_gpr304_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR304 (newval);
+}
+
+/* Get the value of h-sys-gpr305. */
+
+UDI
+or1k64bf_h_sys_gpr305_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR305 ();
+}
+
+/* Set a value for h-sys-gpr305. */
+
+void
+or1k64bf_h_sys_gpr305_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR305 (newval);
+}
+
+/* Get the value of h-sys-gpr306. */
+
+UDI
+or1k64bf_h_sys_gpr306_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR306 ();
+}
+
+/* Set a value for h-sys-gpr306. */
+
+void
+or1k64bf_h_sys_gpr306_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR306 (newval);
+}
+
+/* Get the value of h-sys-gpr307. */
+
+UDI
+or1k64bf_h_sys_gpr307_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR307 ();
+}
+
+/* Set a value for h-sys-gpr307. */
+
+void
+or1k64bf_h_sys_gpr307_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR307 (newval);
+}
+
+/* Get the value of h-sys-gpr308. */
+
+UDI
+or1k64bf_h_sys_gpr308_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR308 ();
+}
+
+/* Set a value for h-sys-gpr308. */
+
+void
+or1k64bf_h_sys_gpr308_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR308 (newval);
+}
+
+/* Get the value of h-sys-gpr309. */
+
+UDI
+or1k64bf_h_sys_gpr309_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR309 ();
+}
+
+/* Set a value for h-sys-gpr309. */
+
+void
+or1k64bf_h_sys_gpr309_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR309 (newval);
+}
+
+/* Get the value of h-sys-gpr310. */
+
+UDI
+or1k64bf_h_sys_gpr310_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR310 ();
+}
+
+/* Set a value for h-sys-gpr310. */
+
+void
+or1k64bf_h_sys_gpr310_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR310 (newval);
+}
+
+/* Get the value of h-sys-gpr311. */
+
+UDI
+or1k64bf_h_sys_gpr311_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR311 ();
+}
+
+/* Set a value for h-sys-gpr311. */
+
+void
+or1k64bf_h_sys_gpr311_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR311 (newval);
+}
+
+/* Get the value of h-sys-gpr312. */
+
+UDI
+or1k64bf_h_sys_gpr312_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR312 ();
+}
+
+/* Set a value for h-sys-gpr312. */
+
+void
+or1k64bf_h_sys_gpr312_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR312 (newval);
+}
+
+/* Get the value of h-sys-gpr313. */
+
+UDI
+or1k64bf_h_sys_gpr313_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR313 ();
+}
+
+/* Set a value for h-sys-gpr313. */
+
+void
+or1k64bf_h_sys_gpr313_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR313 (newval);
+}
+
+/* Get the value of h-sys-gpr314. */
+
+UDI
+or1k64bf_h_sys_gpr314_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR314 ();
+}
+
+/* Set a value for h-sys-gpr314. */
+
+void
+or1k64bf_h_sys_gpr314_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR314 (newval);
+}
+
+/* Get the value of h-sys-gpr315. */
+
+UDI
+or1k64bf_h_sys_gpr315_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR315 ();
+}
+
+/* Set a value for h-sys-gpr315. */
+
+void
+or1k64bf_h_sys_gpr315_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR315 (newval);
+}
+
+/* Get the value of h-sys-gpr316. */
+
+UDI
+or1k64bf_h_sys_gpr316_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR316 ();
+}
+
+/* Set a value for h-sys-gpr316. */
+
+void
+or1k64bf_h_sys_gpr316_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR316 (newval);
+}
+
+/* Get the value of h-sys-gpr317. */
+
+UDI
+or1k64bf_h_sys_gpr317_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR317 ();
+}
+
+/* Set a value for h-sys-gpr317. */
+
+void
+or1k64bf_h_sys_gpr317_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR317 (newval);
+}
+
+/* Get the value of h-sys-gpr318. */
+
+UDI
+or1k64bf_h_sys_gpr318_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR318 ();
+}
+
+/* Set a value for h-sys-gpr318. */
+
+void
+or1k64bf_h_sys_gpr318_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR318 (newval);
+}
+
+/* Get the value of h-sys-gpr319. */
+
+UDI
+or1k64bf_h_sys_gpr319_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR319 ();
+}
+
+/* Set a value for h-sys-gpr319. */
+
+void
+or1k64bf_h_sys_gpr319_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR319 (newval);
+}
+
+/* Get the value of h-sys-gpr320. */
+
+UDI
+or1k64bf_h_sys_gpr320_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR320 ();
+}
+
+/* Set a value for h-sys-gpr320. */
+
+void
+or1k64bf_h_sys_gpr320_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR320 (newval);
+}
+
+/* Get the value of h-sys-gpr321. */
+
+UDI
+or1k64bf_h_sys_gpr321_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR321 ();
+}
+
+/* Set a value for h-sys-gpr321. */
+
+void
+or1k64bf_h_sys_gpr321_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR321 (newval);
+}
+
+/* Get the value of h-sys-gpr322. */
+
+UDI
+or1k64bf_h_sys_gpr322_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR322 ();
+}
+
+/* Set a value for h-sys-gpr322. */
+
+void
+or1k64bf_h_sys_gpr322_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR322 (newval);
+}
+
+/* Get the value of h-sys-gpr323. */
+
+UDI
+or1k64bf_h_sys_gpr323_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR323 ();
+}
+
+/* Set a value for h-sys-gpr323. */
+
+void
+or1k64bf_h_sys_gpr323_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR323 (newval);
+}
+
+/* Get the value of h-sys-gpr324. */
+
+UDI
+or1k64bf_h_sys_gpr324_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR324 ();
+}
+
+/* Set a value for h-sys-gpr324. */
+
+void
+or1k64bf_h_sys_gpr324_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR324 (newval);
+}
+
+/* Get the value of h-sys-gpr325. */
+
+UDI
+or1k64bf_h_sys_gpr325_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR325 ();
+}
+
+/* Set a value for h-sys-gpr325. */
+
+void
+or1k64bf_h_sys_gpr325_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR325 (newval);
+}
+
+/* Get the value of h-sys-gpr326. */
+
+UDI
+or1k64bf_h_sys_gpr326_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR326 ();
+}
+
+/* Set a value for h-sys-gpr326. */
+
+void
+or1k64bf_h_sys_gpr326_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR326 (newval);
+}
+
+/* Get the value of h-sys-gpr327. */
+
+UDI
+or1k64bf_h_sys_gpr327_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR327 ();
+}
+
+/* Set a value for h-sys-gpr327. */
+
+void
+or1k64bf_h_sys_gpr327_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR327 (newval);
+}
+
+/* Get the value of h-sys-gpr328. */
+
+UDI
+or1k64bf_h_sys_gpr328_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR328 ();
+}
+
+/* Set a value for h-sys-gpr328. */
+
+void
+or1k64bf_h_sys_gpr328_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR328 (newval);
+}
+
+/* Get the value of h-sys-gpr329. */
+
+UDI
+or1k64bf_h_sys_gpr329_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR329 ();
+}
+
+/* Set a value for h-sys-gpr329. */
+
+void
+or1k64bf_h_sys_gpr329_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR329 (newval);
+}
+
+/* Get the value of h-sys-gpr330. */
+
+UDI
+or1k64bf_h_sys_gpr330_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR330 ();
+}
+
+/* Set a value for h-sys-gpr330. */
+
+void
+or1k64bf_h_sys_gpr330_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR330 (newval);
+}
+
+/* Get the value of h-sys-gpr331. */
+
+UDI
+or1k64bf_h_sys_gpr331_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR331 ();
+}
+
+/* Set a value for h-sys-gpr331. */
+
+void
+or1k64bf_h_sys_gpr331_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR331 (newval);
+}
+
+/* Get the value of h-sys-gpr332. */
+
+UDI
+or1k64bf_h_sys_gpr332_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR332 ();
+}
+
+/* Set a value for h-sys-gpr332. */
+
+void
+or1k64bf_h_sys_gpr332_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR332 (newval);
+}
+
+/* Get the value of h-sys-gpr333. */
+
+UDI
+or1k64bf_h_sys_gpr333_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR333 ();
+}
+
+/* Set a value for h-sys-gpr333. */
+
+void
+or1k64bf_h_sys_gpr333_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR333 (newval);
+}
+
+/* Get the value of h-sys-gpr334. */
+
+UDI
+or1k64bf_h_sys_gpr334_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR334 ();
+}
+
+/* Set a value for h-sys-gpr334. */
+
+void
+or1k64bf_h_sys_gpr334_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR334 (newval);
+}
+
+/* Get the value of h-sys-gpr335. */
+
+UDI
+or1k64bf_h_sys_gpr335_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR335 ();
+}
+
+/* Set a value for h-sys-gpr335. */
+
+void
+or1k64bf_h_sys_gpr335_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR335 (newval);
+}
+
+/* Get the value of h-sys-gpr336. */
+
+UDI
+or1k64bf_h_sys_gpr336_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR336 ();
+}
+
+/* Set a value for h-sys-gpr336. */
+
+void
+or1k64bf_h_sys_gpr336_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR336 (newval);
+}
+
+/* Get the value of h-sys-gpr337. */
+
+UDI
+or1k64bf_h_sys_gpr337_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR337 ();
+}
+
+/* Set a value for h-sys-gpr337. */
+
+void
+or1k64bf_h_sys_gpr337_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR337 (newval);
+}
+
+/* Get the value of h-sys-gpr338. */
+
+UDI
+or1k64bf_h_sys_gpr338_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR338 ();
+}
+
+/* Set a value for h-sys-gpr338. */
+
+void
+or1k64bf_h_sys_gpr338_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR338 (newval);
+}
+
+/* Get the value of h-sys-gpr339. */
+
+UDI
+or1k64bf_h_sys_gpr339_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR339 ();
+}
+
+/* Set a value for h-sys-gpr339. */
+
+void
+or1k64bf_h_sys_gpr339_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR339 (newval);
+}
+
+/* Get the value of h-sys-gpr340. */
+
+UDI
+or1k64bf_h_sys_gpr340_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR340 ();
+}
+
+/* Set a value for h-sys-gpr340. */
+
+void
+or1k64bf_h_sys_gpr340_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR340 (newval);
+}
+
+/* Get the value of h-sys-gpr341. */
+
+UDI
+or1k64bf_h_sys_gpr341_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR341 ();
+}
+
+/* Set a value for h-sys-gpr341. */
+
+void
+or1k64bf_h_sys_gpr341_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR341 (newval);
+}
+
+/* Get the value of h-sys-gpr342. */
+
+UDI
+or1k64bf_h_sys_gpr342_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR342 ();
+}
+
+/* Set a value for h-sys-gpr342. */
+
+void
+or1k64bf_h_sys_gpr342_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR342 (newval);
+}
+
+/* Get the value of h-sys-gpr343. */
+
+UDI
+or1k64bf_h_sys_gpr343_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR343 ();
+}
+
+/* Set a value for h-sys-gpr343. */
+
+void
+or1k64bf_h_sys_gpr343_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR343 (newval);
+}
+
+/* Get the value of h-sys-gpr344. */
+
+UDI
+or1k64bf_h_sys_gpr344_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR344 ();
+}
+
+/* Set a value for h-sys-gpr344. */
+
+void
+or1k64bf_h_sys_gpr344_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR344 (newval);
+}
+
+/* Get the value of h-sys-gpr345. */
+
+UDI
+or1k64bf_h_sys_gpr345_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR345 ();
+}
+
+/* Set a value for h-sys-gpr345. */
+
+void
+or1k64bf_h_sys_gpr345_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR345 (newval);
+}
+
+/* Get the value of h-sys-gpr346. */
+
+UDI
+or1k64bf_h_sys_gpr346_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR346 ();
+}
+
+/* Set a value for h-sys-gpr346. */
+
+void
+or1k64bf_h_sys_gpr346_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR346 (newval);
+}
+
+/* Get the value of h-sys-gpr347. */
+
+UDI
+or1k64bf_h_sys_gpr347_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR347 ();
+}
+
+/* Set a value for h-sys-gpr347. */
+
+void
+or1k64bf_h_sys_gpr347_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR347 (newval);
+}
+
+/* Get the value of h-sys-gpr348. */
+
+UDI
+or1k64bf_h_sys_gpr348_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR348 ();
+}
+
+/* Set a value for h-sys-gpr348. */
+
+void
+or1k64bf_h_sys_gpr348_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR348 (newval);
+}
+
+/* Get the value of h-sys-gpr349. */
+
+UDI
+or1k64bf_h_sys_gpr349_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR349 ();
+}
+
+/* Set a value for h-sys-gpr349. */
+
+void
+or1k64bf_h_sys_gpr349_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR349 (newval);
+}
+
+/* Get the value of h-sys-gpr350. */
+
+UDI
+or1k64bf_h_sys_gpr350_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR350 ();
+}
+
+/* Set a value for h-sys-gpr350. */
+
+void
+or1k64bf_h_sys_gpr350_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR350 (newval);
+}
+
+/* Get the value of h-sys-gpr351. */
+
+UDI
+or1k64bf_h_sys_gpr351_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR351 ();
+}
+
+/* Set a value for h-sys-gpr351. */
+
+void
+or1k64bf_h_sys_gpr351_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR351 (newval);
+}
+
+/* Get the value of h-sys-gpr352. */
+
+UDI
+or1k64bf_h_sys_gpr352_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR352 ();
+}
+
+/* Set a value for h-sys-gpr352. */
+
+void
+or1k64bf_h_sys_gpr352_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR352 (newval);
+}
+
+/* Get the value of h-sys-gpr353. */
+
+UDI
+or1k64bf_h_sys_gpr353_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR353 ();
+}
+
+/* Set a value for h-sys-gpr353. */
+
+void
+or1k64bf_h_sys_gpr353_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR353 (newval);
+}
+
+/* Get the value of h-sys-gpr354. */
+
+UDI
+or1k64bf_h_sys_gpr354_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR354 ();
+}
+
+/* Set a value for h-sys-gpr354. */
+
+void
+or1k64bf_h_sys_gpr354_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR354 (newval);
+}
+
+/* Get the value of h-sys-gpr355. */
+
+UDI
+or1k64bf_h_sys_gpr355_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR355 ();
+}
+
+/* Set a value for h-sys-gpr355. */
+
+void
+or1k64bf_h_sys_gpr355_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR355 (newval);
+}
+
+/* Get the value of h-sys-gpr356. */
+
+UDI
+or1k64bf_h_sys_gpr356_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR356 ();
+}
+
+/* Set a value for h-sys-gpr356. */
+
+void
+or1k64bf_h_sys_gpr356_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR356 (newval);
+}
+
+/* Get the value of h-sys-gpr357. */
+
+UDI
+or1k64bf_h_sys_gpr357_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR357 ();
+}
+
+/* Set a value for h-sys-gpr357. */
+
+void
+or1k64bf_h_sys_gpr357_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR357 (newval);
+}
+
+/* Get the value of h-sys-gpr358. */
+
+UDI
+or1k64bf_h_sys_gpr358_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR358 ();
+}
+
+/* Set a value for h-sys-gpr358. */
+
+void
+or1k64bf_h_sys_gpr358_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR358 (newval);
+}
+
+/* Get the value of h-sys-gpr359. */
+
+UDI
+or1k64bf_h_sys_gpr359_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR359 ();
+}
+
+/* Set a value for h-sys-gpr359. */
+
+void
+or1k64bf_h_sys_gpr359_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR359 (newval);
+}
+
+/* Get the value of h-sys-gpr360. */
+
+UDI
+or1k64bf_h_sys_gpr360_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR360 ();
+}
+
+/* Set a value for h-sys-gpr360. */
+
+void
+or1k64bf_h_sys_gpr360_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR360 (newval);
+}
+
+/* Get the value of h-sys-gpr361. */
+
+UDI
+or1k64bf_h_sys_gpr361_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR361 ();
+}
+
+/* Set a value for h-sys-gpr361. */
+
+void
+or1k64bf_h_sys_gpr361_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR361 (newval);
+}
+
+/* Get the value of h-sys-gpr362. */
+
+UDI
+or1k64bf_h_sys_gpr362_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR362 ();
+}
+
+/* Set a value for h-sys-gpr362. */
+
+void
+or1k64bf_h_sys_gpr362_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR362 (newval);
+}
+
+/* Get the value of h-sys-gpr363. */
+
+UDI
+or1k64bf_h_sys_gpr363_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR363 ();
+}
+
+/* Set a value for h-sys-gpr363. */
+
+void
+or1k64bf_h_sys_gpr363_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR363 (newval);
+}
+
+/* Get the value of h-sys-gpr364. */
+
+UDI
+or1k64bf_h_sys_gpr364_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR364 ();
+}
+
+/* Set a value for h-sys-gpr364. */
+
+void
+or1k64bf_h_sys_gpr364_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR364 (newval);
+}
+
+/* Get the value of h-sys-gpr365. */
+
+UDI
+or1k64bf_h_sys_gpr365_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR365 ();
+}
+
+/* Set a value for h-sys-gpr365. */
+
+void
+or1k64bf_h_sys_gpr365_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR365 (newval);
+}
+
+/* Get the value of h-sys-gpr366. */
+
+UDI
+or1k64bf_h_sys_gpr366_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR366 ();
+}
+
+/* Set a value for h-sys-gpr366. */
+
+void
+or1k64bf_h_sys_gpr366_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR366 (newval);
+}
+
+/* Get the value of h-sys-gpr367. */
+
+UDI
+or1k64bf_h_sys_gpr367_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR367 ();
+}
+
+/* Set a value for h-sys-gpr367. */
+
+void
+or1k64bf_h_sys_gpr367_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR367 (newval);
+}
+
+/* Get the value of h-sys-gpr368. */
+
+UDI
+or1k64bf_h_sys_gpr368_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR368 ();
+}
+
+/* Set a value for h-sys-gpr368. */
+
+void
+or1k64bf_h_sys_gpr368_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR368 (newval);
+}
+
+/* Get the value of h-sys-gpr369. */
+
+UDI
+or1k64bf_h_sys_gpr369_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR369 ();
+}
+
+/* Set a value for h-sys-gpr369. */
+
+void
+or1k64bf_h_sys_gpr369_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR369 (newval);
+}
+
+/* Get the value of h-sys-gpr370. */
+
+UDI
+or1k64bf_h_sys_gpr370_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR370 ();
+}
+
+/* Set a value for h-sys-gpr370. */
+
+void
+or1k64bf_h_sys_gpr370_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR370 (newval);
+}
+
+/* Get the value of h-sys-gpr371. */
+
+UDI
+or1k64bf_h_sys_gpr371_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR371 ();
+}
+
+/* Set a value for h-sys-gpr371. */
+
+void
+or1k64bf_h_sys_gpr371_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR371 (newval);
+}
+
+/* Get the value of h-sys-gpr372. */
+
+UDI
+or1k64bf_h_sys_gpr372_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR372 ();
+}
+
+/* Set a value for h-sys-gpr372. */
+
+void
+or1k64bf_h_sys_gpr372_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR372 (newval);
+}
+
+/* Get the value of h-sys-gpr373. */
+
+UDI
+or1k64bf_h_sys_gpr373_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR373 ();
+}
+
+/* Set a value for h-sys-gpr373. */
+
+void
+or1k64bf_h_sys_gpr373_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR373 (newval);
+}
+
+/* Get the value of h-sys-gpr374. */
+
+UDI
+or1k64bf_h_sys_gpr374_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR374 ();
+}
+
+/* Set a value for h-sys-gpr374. */
+
+void
+or1k64bf_h_sys_gpr374_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR374 (newval);
+}
+
+/* Get the value of h-sys-gpr375. */
+
+UDI
+or1k64bf_h_sys_gpr375_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR375 ();
+}
+
+/* Set a value for h-sys-gpr375. */
+
+void
+or1k64bf_h_sys_gpr375_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR375 (newval);
+}
+
+/* Get the value of h-sys-gpr376. */
+
+UDI
+or1k64bf_h_sys_gpr376_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR376 ();
+}
+
+/* Set a value for h-sys-gpr376. */
+
+void
+or1k64bf_h_sys_gpr376_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR376 (newval);
+}
+
+/* Get the value of h-sys-gpr377. */
+
+UDI
+or1k64bf_h_sys_gpr377_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR377 ();
+}
+
+/* Set a value for h-sys-gpr377. */
+
+void
+or1k64bf_h_sys_gpr377_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR377 (newval);
+}
+
+/* Get the value of h-sys-gpr378. */
+
+UDI
+or1k64bf_h_sys_gpr378_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR378 ();
+}
+
+/* Set a value for h-sys-gpr378. */
+
+void
+or1k64bf_h_sys_gpr378_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR378 (newval);
+}
+
+/* Get the value of h-sys-gpr379. */
+
+UDI
+or1k64bf_h_sys_gpr379_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR379 ();
+}
+
+/* Set a value for h-sys-gpr379. */
+
+void
+or1k64bf_h_sys_gpr379_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR379 (newval);
+}
+
+/* Get the value of h-sys-gpr380. */
+
+UDI
+or1k64bf_h_sys_gpr380_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR380 ();
+}
+
+/* Set a value for h-sys-gpr380. */
+
+void
+or1k64bf_h_sys_gpr380_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR380 (newval);
+}
+
+/* Get the value of h-sys-gpr381. */
+
+UDI
+or1k64bf_h_sys_gpr381_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR381 ();
+}
+
+/* Set a value for h-sys-gpr381. */
+
+void
+or1k64bf_h_sys_gpr381_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR381 (newval);
+}
+
+/* Get the value of h-sys-gpr382. */
+
+UDI
+or1k64bf_h_sys_gpr382_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR382 ();
+}
+
+/* Set a value for h-sys-gpr382. */
+
+void
+or1k64bf_h_sys_gpr382_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR382 (newval);
+}
+
+/* Get the value of h-sys-gpr383. */
+
+UDI
+or1k64bf_h_sys_gpr383_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR383 ();
+}
+
+/* Set a value for h-sys-gpr383. */
+
+void
+or1k64bf_h_sys_gpr383_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR383 (newval);
+}
+
+/* Get the value of h-sys-gpr384. */
+
+UDI
+or1k64bf_h_sys_gpr384_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR384 ();
+}
+
+/* Set a value for h-sys-gpr384. */
+
+void
+or1k64bf_h_sys_gpr384_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR384 (newval);
+}
+
+/* Get the value of h-sys-gpr385. */
+
+UDI
+or1k64bf_h_sys_gpr385_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR385 ();
+}
+
+/* Set a value for h-sys-gpr385. */
+
+void
+or1k64bf_h_sys_gpr385_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR385 (newval);
+}
+
+/* Get the value of h-sys-gpr386. */
+
+UDI
+or1k64bf_h_sys_gpr386_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR386 ();
+}
+
+/* Set a value for h-sys-gpr386. */
+
+void
+or1k64bf_h_sys_gpr386_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR386 (newval);
+}
+
+/* Get the value of h-sys-gpr387. */
+
+UDI
+or1k64bf_h_sys_gpr387_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR387 ();
+}
+
+/* Set a value for h-sys-gpr387. */
+
+void
+or1k64bf_h_sys_gpr387_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR387 (newval);
+}
+
+/* Get the value of h-sys-gpr388. */
+
+UDI
+or1k64bf_h_sys_gpr388_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR388 ();
+}
+
+/* Set a value for h-sys-gpr388. */
+
+void
+or1k64bf_h_sys_gpr388_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR388 (newval);
+}
+
+/* Get the value of h-sys-gpr389. */
+
+UDI
+or1k64bf_h_sys_gpr389_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR389 ();
+}
+
+/* Set a value for h-sys-gpr389. */
+
+void
+or1k64bf_h_sys_gpr389_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR389 (newval);
+}
+
+/* Get the value of h-sys-gpr390. */
+
+UDI
+or1k64bf_h_sys_gpr390_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR390 ();
+}
+
+/* Set a value for h-sys-gpr390. */
+
+void
+or1k64bf_h_sys_gpr390_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR390 (newval);
+}
+
+/* Get the value of h-sys-gpr391. */
+
+UDI
+or1k64bf_h_sys_gpr391_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR391 ();
+}
+
+/* Set a value for h-sys-gpr391. */
+
+void
+or1k64bf_h_sys_gpr391_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR391 (newval);
+}
+
+/* Get the value of h-sys-gpr392. */
+
+UDI
+or1k64bf_h_sys_gpr392_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR392 ();
+}
+
+/* Set a value for h-sys-gpr392. */
+
+void
+or1k64bf_h_sys_gpr392_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR392 (newval);
+}
+
+/* Get the value of h-sys-gpr393. */
+
+UDI
+or1k64bf_h_sys_gpr393_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR393 ();
+}
+
+/* Set a value for h-sys-gpr393. */
+
+void
+or1k64bf_h_sys_gpr393_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR393 (newval);
+}
+
+/* Get the value of h-sys-gpr394. */
+
+UDI
+or1k64bf_h_sys_gpr394_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR394 ();
+}
+
+/* Set a value for h-sys-gpr394. */
+
+void
+or1k64bf_h_sys_gpr394_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR394 (newval);
+}
+
+/* Get the value of h-sys-gpr395. */
+
+UDI
+or1k64bf_h_sys_gpr395_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR395 ();
+}
+
+/* Set a value for h-sys-gpr395. */
+
+void
+or1k64bf_h_sys_gpr395_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR395 (newval);
+}
+
+/* Get the value of h-sys-gpr396. */
+
+UDI
+or1k64bf_h_sys_gpr396_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR396 ();
+}
+
+/* Set a value for h-sys-gpr396. */
+
+void
+or1k64bf_h_sys_gpr396_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR396 (newval);
+}
+
+/* Get the value of h-sys-gpr397. */
+
+UDI
+or1k64bf_h_sys_gpr397_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR397 ();
+}
+
+/* Set a value for h-sys-gpr397. */
+
+void
+or1k64bf_h_sys_gpr397_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR397 (newval);
+}
+
+/* Get the value of h-sys-gpr398. */
+
+UDI
+or1k64bf_h_sys_gpr398_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR398 ();
+}
+
+/* Set a value for h-sys-gpr398. */
+
+void
+or1k64bf_h_sys_gpr398_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR398 (newval);
+}
+
+/* Get the value of h-sys-gpr399. */
+
+UDI
+or1k64bf_h_sys_gpr399_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR399 ();
+}
+
+/* Set a value for h-sys-gpr399. */
+
+void
+or1k64bf_h_sys_gpr399_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR399 (newval);
+}
+
+/* Get the value of h-sys-gpr400. */
+
+UDI
+or1k64bf_h_sys_gpr400_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR400 ();
+}
+
+/* Set a value for h-sys-gpr400. */
+
+void
+or1k64bf_h_sys_gpr400_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR400 (newval);
+}
+
+/* Get the value of h-sys-gpr401. */
+
+UDI
+or1k64bf_h_sys_gpr401_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR401 ();
+}
+
+/* Set a value for h-sys-gpr401. */
+
+void
+or1k64bf_h_sys_gpr401_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR401 (newval);
+}
+
+/* Get the value of h-sys-gpr402. */
+
+UDI
+or1k64bf_h_sys_gpr402_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR402 ();
+}
+
+/* Set a value for h-sys-gpr402. */
+
+void
+or1k64bf_h_sys_gpr402_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR402 (newval);
+}
+
+/* Get the value of h-sys-gpr403. */
+
+UDI
+or1k64bf_h_sys_gpr403_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR403 ();
+}
+
+/* Set a value for h-sys-gpr403. */
+
+void
+or1k64bf_h_sys_gpr403_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR403 (newval);
+}
+
+/* Get the value of h-sys-gpr404. */
+
+UDI
+or1k64bf_h_sys_gpr404_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR404 ();
+}
+
+/* Set a value for h-sys-gpr404. */
+
+void
+or1k64bf_h_sys_gpr404_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR404 (newval);
+}
+
+/* Get the value of h-sys-gpr405. */
+
+UDI
+or1k64bf_h_sys_gpr405_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR405 ();
+}
+
+/* Set a value for h-sys-gpr405. */
+
+void
+or1k64bf_h_sys_gpr405_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR405 (newval);
+}
+
+/* Get the value of h-sys-gpr406. */
+
+UDI
+or1k64bf_h_sys_gpr406_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR406 ();
+}
+
+/* Set a value for h-sys-gpr406. */
+
+void
+or1k64bf_h_sys_gpr406_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR406 (newval);
+}
+
+/* Get the value of h-sys-gpr407. */
+
+UDI
+or1k64bf_h_sys_gpr407_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR407 ();
+}
+
+/* Set a value for h-sys-gpr407. */
+
+void
+or1k64bf_h_sys_gpr407_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR407 (newval);
+}
+
+/* Get the value of h-sys-gpr408. */
+
+UDI
+or1k64bf_h_sys_gpr408_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR408 ();
+}
+
+/* Set a value for h-sys-gpr408. */
+
+void
+or1k64bf_h_sys_gpr408_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR408 (newval);
+}
+
+/* Get the value of h-sys-gpr409. */
+
+UDI
+or1k64bf_h_sys_gpr409_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR409 ();
+}
+
+/* Set a value for h-sys-gpr409. */
+
+void
+or1k64bf_h_sys_gpr409_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR409 (newval);
+}
+
+/* Get the value of h-sys-gpr410. */
+
+UDI
+or1k64bf_h_sys_gpr410_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR410 ();
+}
+
+/* Set a value for h-sys-gpr410. */
+
+void
+or1k64bf_h_sys_gpr410_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR410 (newval);
+}
+
+/* Get the value of h-sys-gpr411. */
+
+UDI
+or1k64bf_h_sys_gpr411_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR411 ();
+}
+
+/* Set a value for h-sys-gpr411. */
+
+void
+or1k64bf_h_sys_gpr411_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR411 (newval);
+}
+
+/* Get the value of h-sys-gpr412. */
+
+UDI
+or1k64bf_h_sys_gpr412_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR412 ();
+}
+
+/* Set a value for h-sys-gpr412. */
+
+void
+or1k64bf_h_sys_gpr412_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR412 (newval);
+}
+
+/* Get the value of h-sys-gpr413. */
+
+UDI
+or1k64bf_h_sys_gpr413_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR413 ();
+}
+
+/* Set a value for h-sys-gpr413. */
+
+void
+or1k64bf_h_sys_gpr413_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR413 (newval);
+}
+
+/* Get the value of h-sys-gpr414. */
+
+UDI
+or1k64bf_h_sys_gpr414_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR414 ();
+}
+
+/* Set a value for h-sys-gpr414. */
+
+void
+or1k64bf_h_sys_gpr414_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR414 (newval);
+}
+
+/* Get the value of h-sys-gpr415. */
+
+UDI
+or1k64bf_h_sys_gpr415_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR415 ();
+}
+
+/* Set a value for h-sys-gpr415. */
+
+void
+or1k64bf_h_sys_gpr415_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR415 (newval);
+}
+
+/* Get the value of h-sys-gpr416. */
+
+UDI
+or1k64bf_h_sys_gpr416_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR416 ();
+}
+
+/* Set a value for h-sys-gpr416. */
+
+void
+or1k64bf_h_sys_gpr416_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR416 (newval);
+}
+
+/* Get the value of h-sys-gpr417. */
+
+UDI
+or1k64bf_h_sys_gpr417_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR417 ();
+}
+
+/* Set a value for h-sys-gpr417. */
+
+void
+or1k64bf_h_sys_gpr417_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR417 (newval);
+}
+
+/* Get the value of h-sys-gpr418. */
+
+UDI
+or1k64bf_h_sys_gpr418_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR418 ();
+}
+
+/* Set a value for h-sys-gpr418. */
+
+void
+or1k64bf_h_sys_gpr418_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR418 (newval);
+}
+
+/* Get the value of h-sys-gpr419. */
+
+UDI
+or1k64bf_h_sys_gpr419_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR419 ();
+}
+
+/* Set a value for h-sys-gpr419. */
+
+void
+or1k64bf_h_sys_gpr419_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR419 (newval);
+}
+
+/* Get the value of h-sys-gpr420. */
+
+UDI
+or1k64bf_h_sys_gpr420_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR420 ();
+}
+
+/* Set a value for h-sys-gpr420. */
+
+void
+or1k64bf_h_sys_gpr420_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR420 (newval);
+}
+
+/* Get the value of h-sys-gpr421. */
+
+UDI
+or1k64bf_h_sys_gpr421_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR421 ();
+}
+
+/* Set a value for h-sys-gpr421. */
+
+void
+or1k64bf_h_sys_gpr421_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR421 (newval);
+}
+
+/* Get the value of h-sys-gpr422. */
+
+UDI
+or1k64bf_h_sys_gpr422_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR422 ();
+}
+
+/* Set a value for h-sys-gpr422. */
+
+void
+or1k64bf_h_sys_gpr422_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR422 (newval);
+}
+
+/* Get the value of h-sys-gpr423. */
+
+UDI
+or1k64bf_h_sys_gpr423_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR423 ();
+}
+
+/* Set a value for h-sys-gpr423. */
+
+void
+or1k64bf_h_sys_gpr423_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR423 (newval);
+}
+
+/* Get the value of h-sys-gpr424. */
+
+UDI
+or1k64bf_h_sys_gpr424_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR424 ();
+}
+
+/* Set a value for h-sys-gpr424. */
+
+void
+or1k64bf_h_sys_gpr424_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR424 (newval);
+}
+
+/* Get the value of h-sys-gpr425. */
+
+UDI
+or1k64bf_h_sys_gpr425_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR425 ();
+}
+
+/* Set a value for h-sys-gpr425. */
+
+void
+or1k64bf_h_sys_gpr425_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR425 (newval);
+}
+
+/* Get the value of h-sys-gpr426. */
+
+UDI
+or1k64bf_h_sys_gpr426_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR426 ();
+}
+
+/* Set a value for h-sys-gpr426. */
+
+void
+or1k64bf_h_sys_gpr426_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR426 (newval);
+}
+
+/* Get the value of h-sys-gpr427. */
+
+UDI
+or1k64bf_h_sys_gpr427_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR427 ();
+}
+
+/* Set a value for h-sys-gpr427. */
+
+void
+or1k64bf_h_sys_gpr427_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR427 (newval);
+}
+
+/* Get the value of h-sys-gpr428. */
+
+UDI
+or1k64bf_h_sys_gpr428_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR428 ();
+}
+
+/* Set a value for h-sys-gpr428. */
+
+void
+or1k64bf_h_sys_gpr428_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR428 (newval);
+}
+
+/* Get the value of h-sys-gpr429. */
+
+UDI
+or1k64bf_h_sys_gpr429_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR429 ();
+}
+
+/* Set a value for h-sys-gpr429. */
+
+void
+or1k64bf_h_sys_gpr429_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR429 (newval);
+}
+
+/* Get the value of h-sys-gpr430. */
+
+UDI
+or1k64bf_h_sys_gpr430_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR430 ();
+}
+
+/* Set a value for h-sys-gpr430. */
+
+void
+or1k64bf_h_sys_gpr430_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR430 (newval);
+}
+
+/* Get the value of h-sys-gpr431. */
+
+UDI
+or1k64bf_h_sys_gpr431_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR431 ();
+}
+
+/* Set a value for h-sys-gpr431. */
+
+void
+or1k64bf_h_sys_gpr431_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR431 (newval);
+}
+
+/* Get the value of h-sys-gpr432. */
+
+UDI
+or1k64bf_h_sys_gpr432_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR432 ();
+}
+
+/* Set a value for h-sys-gpr432. */
+
+void
+or1k64bf_h_sys_gpr432_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR432 (newval);
+}
+
+/* Get the value of h-sys-gpr433. */
+
+UDI
+or1k64bf_h_sys_gpr433_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR433 ();
+}
+
+/* Set a value for h-sys-gpr433. */
+
+void
+or1k64bf_h_sys_gpr433_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR433 (newval);
+}
+
+/* Get the value of h-sys-gpr434. */
+
+UDI
+or1k64bf_h_sys_gpr434_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR434 ();
+}
+
+/* Set a value for h-sys-gpr434. */
+
+void
+or1k64bf_h_sys_gpr434_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR434 (newval);
+}
+
+/* Get the value of h-sys-gpr435. */
+
+UDI
+or1k64bf_h_sys_gpr435_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR435 ();
+}
+
+/* Set a value for h-sys-gpr435. */
+
+void
+or1k64bf_h_sys_gpr435_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR435 (newval);
+}
+
+/* Get the value of h-sys-gpr436. */
+
+UDI
+or1k64bf_h_sys_gpr436_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR436 ();
+}
+
+/* Set a value for h-sys-gpr436. */
+
+void
+or1k64bf_h_sys_gpr436_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR436 (newval);
+}
+
+/* Get the value of h-sys-gpr437. */
+
+UDI
+or1k64bf_h_sys_gpr437_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR437 ();
+}
+
+/* Set a value for h-sys-gpr437. */
+
+void
+or1k64bf_h_sys_gpr437_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR437 (newval);
+}
+
+/* Get the value of h-sys-gpr438. */
+
+UDI
+or1k64bf_h_sys_gpr438_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR438 ();
+}
+
+/* Set a value for h-sys-gpr438. */
+
+void
+or1k64bf_h_sys_gpr438_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR438 (newval);
+}
+
+/* Get the value of h-sys-gpr439. */
+
+UDI
+or1k64bf_h_sys_gpr439_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR439 ();
+}
+
+/* Set a value for h-sys-gpr439. */
+
+void
+or1k64bf_h_sys_gpr439_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR439 (newval);
+}
+
+/* Get the value of h-sys-gpr440. */
+
+UDI
+or1k64bf_h_sys_gpr440_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR440 ();
+}
+
+/* Set a value for h-sys-gpr440. */
+
+void
+or1k64bf_h_sys_gpr440_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR440 (newval);
+}
+
+/* Get the value of h-sys-gpr441. */
+
+UDI
+or1k64bf_h_sys_gpr441_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR441 ();
+}
+
+/* Set a value for h-sys-gpr441. */
+
+void
+or1k64bf_h_sys_gpr441_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR441 (newval);
+}
+
+/* Get the value of h-sys-gpr442. */
+
+UDI
+or1k64bf_h_sys_gpr442_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR442 ();
+}
+
+/* Set a value for h-sys-gpr442. */
+
+void
+or1k64bf_h_sys_gpr442_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR442 (newval);
+}
+
+/* Get the value of h-sys-gpr443. */
+
+UDI
+or1k64bf_h_sys_gpr443_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR443 ();
+}
+
+/* Set a value for h-sys-gpr443. */
+
+void
+or1k64bf_h_sys_gpr443_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR443 (newval);
+}
+
+/* Get the value of h-sys-gpr444. */
+
+UDI
+or1k64bf_h_sys_gpr444_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR444 ();
+}
+
+/* Set a value for h-sys-gpr444. */
+
+void
+or1k64bf_h_sys_gpr444_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR444 (newval);
+}
+
+/* Get the value of h-sys-gpr445. */
+
+UDI
+or1k64bf_h_sys_gpr445_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR445 ();
+}
+
+/* Set a value for h-sys-gpr445. */
+
+void
+or1k64bf_h_sys_gpr445_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR445 (newval);
+}
+
+/* Get the value of h-sys-gpr446. */
+
+UDI
+or1k64bf_h_sys_gpr446_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR446 ();
+}
+
+/* Set a value for h-sys-gpr446. */
+
+void
+or1k64bf_h_sys_gpr446_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR446 (newval);
+}
+
+/* Get the value of h-sys-gpr447. */
+
+UDI
+or1k64bf_h_sys_gpr447_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR447 ();
+}
+
+/* Set a value for h-sys-gpr447. */
+
+void
+or1k64bf_h_sys_gpr447_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR447 (newval);
+}
+
+/* Get the value of h-sys-gpr448. */
+
+UDI
+or1k64bf_h_sys_gpr448_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR448 ();
+}
+
+/* Set a value for h-sys-gpr448. */
+
+void
+or1k64bf_h_sys_gpr448_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR448 (newval);
+}
+
+/* Get the value of h-sys-gpr449. */
+
+UDI
+or1k64bf_h_sys_gpr449_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR449 ();
+}
+
+/* Set a value for h-sys-gpr449. */
+
+void
+or1k64bf_h_sys_gpr449_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR449 (newval);
+}
+
+/* Get the value of h-sys-gpr450. */
+
+UDI
+or1k64bf_h_sys_gpr450_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR450 ();
+}
+
+/* Set a value for h-sys-gpr450. */
+
+void
+or1k64bf_h_sys_gpr450_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR450 (newval);
+}
+
+/* Get the value of h-sys-gpr451. */
+
+UDI
+or1k64bf_h_sys_gpr451_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR451 ();
+}
+
+/* Set a value for h-sys-gpr451. */
+
+void
+or1k64bf_h_sys_gpr451_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR451 (newval);
+}
+
+/* Get the value of h-sys-gpr452. */
+
+UDI
+or1k64bf_h_sys_gpr452_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR452 ();
+}
+
+/* Set a value for h-sys-gpr452. */
+
+void
+or1k64bf_h_sys_gpr452_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR452 (newval);
+}
+
+/* Get the value of h-sys-gpr453. */
+
+UDI
+or1k64bf_h_sys_gpr453_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR453 ();
+}
+
+/* Set a value for h-sys-gpr453. */
+
+void
+or1k64bf_h_sys_gpr453_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR453 (newval);
+}
+
+/* Get the value of h-sys-gpr454. */
+
+UDI
+or1k64bf_h_sys_gpr454_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR454 ();
+}
+
+/* Set a value for h-sys-gpr454. */
+
+void
+or1k64bf_h_sys_gpr454_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR454 (newval);
+}
+
+/* Get the value of h-sys-gpr455. */
+
+UDI
+or1k64bf_h_sys_gpr455_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR455 ();
+}
+
+/* Set a value for h-sys-gpr455. */
+
+void
+or1k64bf_h_sys_gpr455_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR455 (newval);
+}
+
+/* Get the value of h-sys-gpr456. */
+
+UDI
+or1k64bf_h_sys_gpr456_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR456 ();
+}
+
+/* Set a value for h-sys-gpr456. */
+
+void
+or1k64bf_h_sys_gpr456_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR456 (newval);
+}
+
+/* Get the value of h-sys-gpr457. */
+
+UDI
+or1k64bf_h_sys_gpr457_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR457 ();
+}
+
+/* Set a value for h-sys-gpr457. */
+
+void
+or1k64bf_h_sys_gpr457_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR457 (newval);
+}
+
+/* Get the value of h-sys-gpr458. */
+
+UDI
+or1k64bf_h_sys_gpr458_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR458 ();
+}
+
+/* Set a value for h-sys-gpr458. */
+
+void
+or1k64bf_h_sys_gpr458_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR458 (newval);
+}
+
+/* Get the value of h-sys-gpr459. */
+
+UDI
+or1k64bf_h_sys_gpr459_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR459 ();
+}
+
+/* Set a value for h-sys-gpr459. */
+
+void
+or1k64bf_h_sys_gpr459_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR459 (newval);
+}
+
+/* Get the value of h-sys-gpr460. */
+
+UDI
+or1k64bf_h_sys_gpr460_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR460 ();
+}
+
+/* Set a value for h-sys-gpr460. */
+
+void
+or1k64bf_h_sys_gpr460_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR460 (newval);
+}
+
+/* Get the value of h-sys-gpr461. */
+
+UDI
+or1k64bf_h_sys_gpr461_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR461 ();
+}
+
+/* Set a value for h-sys-gpr461. */
+
+void
+or1k64bf_h_sys_gpr461_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR461 (newval);
+}
+
+/* Get the value of h-sys-gpr462. */
+
+UDI
+or1k64bf_h_sys_gpr462_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR462 ();
+}
+
+/* Set a value for h-sys-gpr462. */
+
+void
+or1k64bf_h_sys_gpr462_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR462 (newval);
+}
+
+/* Get the value of h-sys-gpr463. */
+
+UDI
+or1k64bf_h_sys_gpr463_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR463 ();
+}
+
+/* Set a value for h-sys-gpr463. */
+
+void
+or1k64bf_h_sys_gpr463_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR463 (newval);
+}
+
+/* Get the value of h-sys-gpr464. */
+
+UDI
+or1k64bf_h_sys_gpr464_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR464 ();
+}
+
+/* Set a value for h-sys-gpr464. */
+
+void
+or1k64bf_h_sys_gpr464_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR464 (newval);
+}
+
+/* Get the value of h-sys-gpr465. */
+
+UDI
+or1k64bf_h_sys_gpr465_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR465 ();
+}
+
+/* Set a value for h-sys-gpr465. */
+
+void
+or1k64bf_h_sys_gpr465_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR465 (newval);
+}
+
+/* Get the value of h-sys-gpr466. */
+
+UDI
+or1k64bf_h_sys_gpr466_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR466 ();
+}
+
+/* Set a value for h-sys-gpr466. */
+
+void
+or1k64bf_h_sys_gpr466_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR466 (newval);
+}
+
+/* Get the value of h-sys-gpr467. */
+
+UDI
+or1k64bf_h_sys_gpr467_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR467 ();
+}
+
+/* Set a value for h-sys-gpr467. */
+
+void
+or1k64bf_h_sys_gpr467_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR467 (newval);
+}
+
+/* Get the value of h-sys-gpr468. */
+
+UDI
+or1k64bf_h_sys_gpr468_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR468 ();
+}
+
+/* Set a value for h-sys-gpr468. */
+
+void
+or1k64bf_h_sys_gpr468_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR468 (newval);
+}
+
+/* Get the value of h-sys-gpr469. */
+
+UDI
+or1k64bf_h_sys_gpr469_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR469 ();
+}
+
+/* Set a value for h-sys-gpr469. */
+
+void
+or1k64bf_h_sys_gpr469_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR469 (newval);
+}
+
+/* Get the value of h-sys-gpr470. */
+
+UDI
+or1k64bf_h_sys_gpr470_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR470 ();
+}
+
+/* Set a value for h-sys-gpr470. */
+
+void
+or1k64bf_h_sys_gpr470_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR470 (newval);
+}
+
+/* Get the value of h-sys-gpr471. */
+
+UDI
+or1k64bf_h_sys_gpr471_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR471 ();
+}
+
+/* Set a value for h-sys-gpr471. */
+
+void
+or1k64bf_h_sys_gpr471_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR471 (newval);
+}
+
+/* Get the value of h-sys-gpr472. */
+
+UDI
+or1k64bf_h_sys_gpr472_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR472 ();
+}
+
+/* Set a value for h-sys-gpr472. */
+
+void
+or1k64bf_h_sys_gpr472_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR472 (newval);
+}
+
+/* Get the value of h-sys-gpr473. */
+
+UDI
+or1k64bf_h_sys_gpr473_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR473 ();
+}
+
+/* Set a value for h-sys-gpr473. */
+
+void
+or1k64bf_h_sys_gpr473_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR473 (newval);
+}
+
+/* Get the value of h-sys-gpr474. */
+
+UDI
+or1k64bf_h_sys_gpr474_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR474 ();
+}
+
+/* Set a value for h-sys-gpr474. */
+
+void
+or1k64bf_h_sys_gpr474_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR474 (newval);
+}
+
+/* Get the value of h-sys-gpr475. */
+
+UDI
+or1k64bf_h_sys_gpr475_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR475 ();
+}
+
+/* Set a value for h-sys-gpr475. */
+
+void
+or1k64bf_h_sys_gpr475_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR475 (newval);
+}
+
+/* Get the value of h-sys-gpr476. */
+
+UDI
+or1k64bf_h_sys_gpr476_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR476 ();
+}
+
+/* Set a value for h-sys-gpr476. */
+
+void
+or1k64bf_h_sys_gpr476_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR476 (newval);
+}
+
+/* Get the value of h-sys-gpr477. */
+
+UDI
+or1k64bf_h_sys_gpr477_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR477 ();
+}
+
+/* Set a value for h-sys-gpr477. */
+
+void
+or1k64bf_h_sys_gpr477_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR477 (newval);
+}
+
+/* Get the value of h-sys-gpr478. */
+
+UDI
+or1k64bf_h_sys_gpr478_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR478 ();
+}
+
+/* Set a value for h-sys-gpr478. */
+
+void
+or1k64bf_h_sys_gpr478_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR478 (newval);
+}
+
+/* Get the value of h-sys-gpr479. */
+
+UDI
+or1k64bf_h_sys_gpr479_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR479 ();
+}
+
+/* Set a value for h-sys-gpr479. */
+
+void
+or1k64bf_h_sys_gpr479_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR479 (newval);
+}
+
+/* Get the value of h-sys-gpr480. */
+
+UDI
+or1k64bf_h_sys_gpr480_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR480 ();
+}
+
+/* Set a value for h-sys-gpr480. */
+
+void
+or1k64bf_h_sys_gpr480_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR480 (newval);
+}
+
+/* Get the value of h-sys-gpr481. */
+
+UDI
+or1k64bf_h_sys_gpr481_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR481 ();
+}
+
+/* Set a value for h-sys-gpr481. */
+
+void
+or1k64bf_h_sys_gpr481_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR481 (newval);
+}
+
+/* Get the value of h-sys-gpr482. */
+
+UDI
+or1k64bf_h_sys_gpr482_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR482 ();
+}
+
+/* Set a value for h-sys-gpr482. */
+
+void
+or1k64bf_h_sys_gpr482_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR482 (newval);
+}
+
+/* Get the value of h-sys-gpr483. */
+
+UDI
+or1k64bf_h_sys_gpr483_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR483 ();
+}
+
+/* Set a value for h-sys-gpr483. */
+
+void
+or1k64bf_h_sys_gpr483_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR483 (newval);
+}
+
+/* Get the value of h-sys-gpr484. */
+
+UDI
+or1k64bf_h_sys_gpr484_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR484 ();
+}
+
+/* Set a value for h-sys-gpr484. */
+
+void
+or1k64bf_h_sys_gpr484_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR484 (newval);
+}
+
+/* Get the value of h-sys-gpr485. */
+
+UDI
+or1k64bf_h_sys_gpr485_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR485 ();
+}
+
+/* Set a value for h-sys-gpr485. */
+
+void
+or1k64bf_h_sys_gpr485_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR485 (newval);
+}
+
+/* Get the value of h-sys-gpr486. */
+
+UDI
+or1k64bf_h_sys_gpr486_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR486 ();
+}
+
+/* Set a value for h-sys-gpr486. */
+
+void
+or1k64bf_h_sys_gpr486_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR486 (newval);
+}
+
+/* Get the value of h-sys-gpr487. */
+
+UDI
+or1k64bf_h_sys_gpr487_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR487 ();
+}
+
+/* Set a value for h-sys-gpr487. */
+
+void
+or1k64bf_h_sys_gpr487_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR487 (newval);
+}
+
+/* Get the value of h-sys-gpr488. */
+
+UDI
+or1k64bf_h_sys_gpr488_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR488 ();
+}
+
+/* Set a value for h-sys-gpr488. */
+
+void
+or1k64bf_h_sys_gpr488_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR488 (newval);
+}
+
+/* Get the value of h-sys-gpr489. */
+
+UDI
+or1k64bf_h_sys_gpr489_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR489 ();
+}
+
+/* Set a value for h-sys-gpr489. */
+
+void
+or1k64bf_h_sys_gpr489_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR489 (newval);
+}
+
+/* Get the value of h-sys-gpr490. */
+
+UDI
+or1k64bf_h_sys_gpr490_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR490 ();
+}
+
+/* Set a value for h-sys-gpr490. */
+
+void
+or1k64bf_h_sys_gpr490_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR490 (newval);
+}
+
+/* Get the value of h-sys-gpr491. */
+
+UDI
+or1k64bf_h_sys_gpr491_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR491 ();
+}
+
+/* Set a value for h-sys-gpr491. */
+
+void
+or1k64bf_h_sys_gpr491_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR491 (newval);
+}
+
+/* Get the value of h-sys-gpr492. */
+
+UDI
+or1k64bf_h_sys_gpr492_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR492 ();
+}
+
+/* Set a value for h-sys-gpr492. */
+
+void
+or1k64bf_h_sys_gpr492_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR492 (newval);
+}
+
+/* Get the value of h-sys-gpr493. */
+
+UDI
+or1k64bf_h_sys_gpr493_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR493 ();
+}
+
+/* Set a value for h-sys-gpr493. */
+
+void
+or1k64bf_h_sys_gpr493_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR493 (newval);
+}
+
+/* Get the value of h-sys-gpr494. */
+
+UDI
+or1k64bf_h_sys_gpr494_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR494 ();
+}
+
+/* Set a value for h-sys-gpr494. */
+
+void
+or1k64bf_h_sys_gpr494_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR494 (newval);
+}
+
+/* Get the value of h-sys-gpr495. */
+
+UDI
+or1k64bf_h_sys_gpr495_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR495 ();
+}
+
+/* Set a value for h-sys-gpr495. */
+
+void
+or1k64bf_h_sys_gpr495_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR495 (newval);
+}
+
+/* Get the value of h-sys-gpr496. */
+
+UDI
+or1k64bf_h_sys_gpr496_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR496 ();
+}
+
+/* Set a value for h-sys-gpr496. */
+
+void
+or1k64bf_h_sys_gpr496_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR496 (newval);
+}
+
+/* Get the value of h-sys-gpr497. */
+
+UDI
+or1k64bf_h_sys_gpr497_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR497 ();
+}
+
+/* Set a value for h-sys-gpr497. */
+
+void
+or1k64bf_h_sys_gpr497_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR497 (newval);
+}
+
+/* Get the value of h-sys-gpr498. */
+
+UDI
+or1k64bf_h_sys_gpr498_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR498 ();
+}
+
+/* Set a value for h-sys-gpr498. */
+
+void
+or1k64bf_h_sys_gpr498_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR498 (newval);
+}
+
+/* Get the value of h-sys-gpr499. */
+
+UDI
+or1k64bf_h_sys_gpr499_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR499 ();
+}
+
+/* Set a value for h-sys-gpr499. */
+
+void
+or1k64bf_h_sys_gpr499_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR499 (newval);
+}
+
+/* Get the value of h-sys-gpr500. */
+
+UDI
+or1k64bf_h_sys_gpr500_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR500 ();
+}
+
+/* Set a value for h-sys-gpr500. */
+
+void
+or1k64bf_h_sys_gpr500_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR500 (newval);
+}
+
+/* Get the value of h-sys-gpr501. */
+
+UDI
+or1k64bf_h_sys_gpr501_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR501 ();
+}
+
+/* Set a value for h-sys-gpr501. */
+
+void
+or1k64bf_h_sys_gpr501_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR501 (newval);
+}
+
+/* Get the value of h-sys-gpr502. */
+
+UDI
+or1k64bf_h_sys_gpr502_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR502 ();
+}
+
+/* Set a value for h-sys-gpr502. */
+
+void
+or1k64bf_h_sys_gpr502_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR502 (newval);
+}
+
+/* Get the value of h-sys-gpr503. */
+
+UDI
+or1k64bf_h_sys_gpr503_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR503 ();
+}
+
+/* Set a value for h-sys-gpr503. */
+
+void
+or1k64bf_h_sys_gpr503_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR503 (newval);
+}
+
+/* Get the value of h-sys-gpr504. */
+
+UDI
+or1k64bf_h_sys_gpr504_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR504 ();
+}
+
+/* Set a value for h-sys-gpr504. */
+
+void
+or1k64bf_h_sys_gpr504_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR504 (newval);
+}
+
+/* Get the value of h-sys-gpr505. */
+
+UDI
+or1k64bf_h_sys_gpr505_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR505 ();
+}
+
+/* Set a value for h-sys-gpr505. */
+
+void
+or1k64bf_h_sys_gpr505_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR505 (newval);
+}
+
+/* Get the value of h-sys-gpr506. */
+
+UDI
+or1k64bf_h_sys_gpr506_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR506 ();
+}
+
+/* Set a value for h-sys-gpr506. */
+
+void
+or1k64bf_h_sys_gpr506_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR506 (newval);
+}
+
+/* Get the value of h-sys-gpr507. */
+
+UDI
+or1k64bf_h_sys_gpr507_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR507 ();
+}
+
+/* Set a value for h-sys-gpr507. */
+
+void
+or1k64bf_h_sys_gpr507_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR507 (newval);
+}
+
+/* Get the value of h-sys-gpr508. */
+
+UDI
+or1k64bf_h_sys_gpr508_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR508 ();
+}
+
+/* Set a value for h-sys-gpr508. */
+
+void
+or1k64bf_h_sys_gpr508_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR508 (newval);
+}
+
+/* Get the value of h-sys-gpr509. */
+
+UDI
+or1k64bf_h_sys_gpr509_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR509 ();
+}
+
+/* Set a value for h-sys-gpr509. */
+
+void
+or1k64bf_h_sys_gpr509_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR509 (newval);
+}
+
+/* Get the value of h-sys-gpr510. */
+
+UDI
+or1k64bf_h_sys_gpr510_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR510 ();
+}
+
+/* Set a value for h-sys-gpr510. */
+
+void
+or1k64bf_h_sys_gpr510_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR510 (newval);
+}
+
+/* Get the value of h-sys-gpr511. */
+
+UDI
+or1k64bf_h_sys_gpr511_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_GPR511 ();
+}
+
+/* Set a value for h-sys-gpr511. */
+
+void
+or1k64bf_h_sys_gpr511_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_GPR511 (newval);
+}
+
+/* Get the value of h-mac-maclo. */
+
+UDI
+or1k64bf_h_mac_maclo_get (SIM_CPU *current_cpu)
+{
+ return GET_H_MAC_MACLO ();
+}
+
+/* Set a value for h-mac-maclo. */
+
+void
+or1k64bf_h_mac_maclo_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_MAC_MACLO (newval);
+}
+
+/* Get the value of h-mac-machi. */
+
+UDI
+or1k64bf_h_mac_machi_get (SIM_CPU *current_cpu)
+{
+ return GET_H_MAC_MACHI ();
+}
+
+/* Set a value for h-mac-machi. */
+
+void
+or1k64bf_h_mac_machi_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_MAC_MACHI (newval);
+}
+
+/* Get the value of h-sys-vr-rev. */
+
+UDI
+or1k64bf_h_sys_vr_rev_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR_REV ();
+}
+
+/* Set a value for h-sys-vr-rev. */
+
+void
+or1k64bf_h_sys_vr_rev_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_VR_REV (newval);
+}
+
+/* Get the value of h-sys-vr-cfg. */
+
+UDI
+or1k64bf_h_sys_vr_cfg_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR_CFG ();
+}
+
+/* Set a value for h-sys-vr-cfg. */
+
+void
+or1k64bf_h_sys_vr_cfg_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_VR_CFG (newval);
+}
+
+/* Get the value of h-sys-vr-ver. */
+
+UDI
+or1k64bf_h_sys_vr_ver_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_VR_VER ();
+}
+
+/* Set a value for h-sys-vr-ver. */
+
+void
+or1k64bf_h_sys_vr_ver_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_VR_VER (newval);
+}
+
+/* Get the value of h-sys-upr-up. */
+
+UDI
+or1k64bf_h_sys_upr_up_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_UP ();
+}
+
+/* Set a value for h-sys-upr-up. */
+
+void
+or1k64bf_h_sys_upr_up_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_UP (newval);
+}
+
+/* Get the value of h-sys-upr-dcp. */
+
+UDI
+or1k64bf_h_sys_upr_dcp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_DCP ();
+}
+
+/* Set a value for h-sys-upr-dcp. */
+
+void
+or1k64bf_h_sys_upr_dcp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_DCP (newval);
+}
+
+/* Get the value of h-sys-upr-icp. */
+
+UDI
+or1k64bf_h_sys_upr_icp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_ICP ();
+}
+
+/* Set a value for h-sys-upr-icp. */
+
+void
+or1k64bf_h_sys_upr_icp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_ICP (newval);
+}
+
+/* Get the value of h-sys-upr-dmp. */
+
+UDI
+or1k64bf_h_sys_upr_dmp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_DMP ();
+}
+
+/* Set a value for h-sys-upr-dmp. */
+
+void
+or1k64bf_h_sys_upr_dmp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_DMP (newval);
+}
+
+/* Get the value of h-sys-upr-mp. */
+
+UDI
+or1k64bf_h_sys_upr_mp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_MP ();
+}
+
+/* Set a value for h-sys-upr-mp. */
+
+void
+or1k64bf_h_sys_upr_mp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_MP (newval);
+}
+
+/* Get the value of h-sys-upr-imp. */
+
+UDI
+or1k64bf_h_sys_upr_imp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_IMP ();
+}
+
+/* Set a value for h-sys-upr-imp. */
+
+void
+or1k64bf_h_sys_upr_imp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_IMP (newval);
+}
+
+/* Get the value of h-sys-upr-dup. */
+
+UDI
+or1k64bf_h_sys_upr_dup_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_DUP ();
+}
+
+/* Set a value for h-sys-upr-dup. */
+
+void
+or1k64bf_h_sys_upr_dup_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_DUP (newval);
+}
+
+/* Get the value of h-sys-upr-pcup. */
+
+UDI
+or1k64bf_h_sys_upr_pcup_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_PCUP ();
+}
+
+/* Set a value for h-sys-upr-pcup. */
+
+void
+or1k64bf_h_sys_upr_pcup_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_PCUP (newval);
+}
+
+/* Get the value of h-sys-upr-picp. */
+
+UDI
+or1k64bf_h_sys_upr_picp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_PICP ();
+}
+
+/* Set a value for h-sys-upr-picp. */
+
+void
+or1k64bf_h_sys_upr_picp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_PICP (newval);
+}
+
+/* Get the value of h-sys-upr-pmp. */
+
+UDI
+or1k64bf_h_sys_upr_pmp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_PMP ();
+}
+
+/* Set a value for h-sys-upr-pmp. */
+
+void
+or1k64bf_h_sys_upr_pmp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_PMP (newval);
+}
+
+/* Get the value of h-sys-upr-ttp. */
+
+UDI
+or1k64bf_h_sys_upr_ttp_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_TTP ();
+}
+
+/* Set a value for h-sys-upr-ttp. */
+
+void
+or1k64bf_h_sys_upr_ttp_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_TTP (newval);
+}
+
+/* Get the value of h-sys-upr-cup. */
+
+UDI
+or1k64bf_h_sys_upr_cup_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_UPR_CUP ();
+}
+
+/* Set a value for h-sys-upr-cup. */
+
+void
+or1k64bf_h_sys_upr_cup_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_UPR_CUP (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-nsgr. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_nsgr_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_NSGR ();
+}
+
+/* Set a value for h-sys-cpucfgr-nsgr. */
+
+void
+or1k64bf_h_sys_cpucfgr_nsgr_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_NSGR (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-cgf. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_cgf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_CGF ();
+}
+
+/* Set a value for h-sys-cpucfgr-cgf. */
+
+void
+or1k64bf_h_sys_cpucfgr_cgf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_CGF (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-ob32s. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_ob32s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OB32S ();
+}
+
+/* Set a value for h-sys-cpucfgr-ob32s. */
+
+void
+or1k64bf_h_sys_cpucfgr_ob32s_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_OB32S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-ob64s. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_ob64s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OB64S ();
+}
+
+/* Set a value for h-sys-cpucfgr-ob64s. */
+
+void
+or1k64bf_h_sys_cpucfgr_ob64s_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_OB64S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-of32s. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_of32s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OF32S ();
+}
+
+/* Set a value for h-sys-cpucfgr-of32s. */
+
+void
+or1k64bf_h_sys_cpucfgr_of32s_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_OF32S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-of64s. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_of64s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OF64S ();
+}
+
+/* Set a value for h-sys-cpucfgr-of64s. */
+
+void
+or1k64bf_h_sys_cpucfgr_of64s_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_OF64S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-ov64s. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_ov64s_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_OV64S ();
+}
+
+/* Set a value for h-sys-cpucfgr-ov64s. */
+
+void
+or1k64bf_h_sys_cpucfgr_ov64s_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_OV64S (newval);
+}
+
+/* Get the value of h-sys-cpucfgr-nd. */
+
+UDI
+or1k64bf_h_sys_cpucfgr_nd_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_CPUCFGR_ND ();
+}
+
+/* Set a value for h-sys-cpucfgr-nd. */
+
+void
+or1k64bf_h_sys_cpucfgr_nd_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_CPUCFGR_ND (newval);
+}
+
+/* Get the value of h-sys-sr-sm. */
+
+UDI
+or1k64bf_h_sys_sr_sm_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_SM ();
+}
+
+/* Set a value for h-sys-sr-sm. */
+
+void
+or1k64bf_h_sys_sr_sm_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_SM (newval);
+}
+
+/* Get the value of h-sys-sr-tee. */
+
+UDI
+or1k64bf_h_sys_sr_tee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_TEE ();
+}
+
+/* Set a value for h-sys-sr-tee. */
+
+void
+or1k64bf_h_sys_sr_tee_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_TEE (newval);
+}
+
+/* Get the value of h-sys-sr-iee. */
+
+UDI
+or1k64bf_h_sys_sr_iee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_IEE ();
+}
+
+/* Set a value for h-sys-sr-iee. */
+
+void
+or1k64bf_h_sys_sr_iee_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_IEE (newval);
+}
+
+/* Get the value of h-sys-sr-dce. */
+
+UDI
+or1k64bf_h_sys_sr_dce_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_DCE ();
+}
+
+/* Set a value for h-sys-sr-dce. */
+
+void
+or1k64bf_h_sys_sr_dce_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_DCE (newval);
+}
+
+/* Get the value of h-sys-sr-ice. */
+
+UDI
+or1k64bf_h_sys_sr_ice_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_ICE ();
+}
+
+/* Set a value for h-sys-sr-ice. */
+
+void
+or1k64bf_h_sys_sr_ice_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_ICE (newval);
+}
+
+/* Get the value of h-sys-sr-dme. */
+
+UDI
+or1k64bf_h_sys_sr_dme_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_DME ();
+}
+
+/* Set a value for h-sys-sr-dme. */
+
+void
+or1k64bf_h_sys_sr_dme_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_DME (newval);
+}
+
+/* Get the value of h-sys-sr-ime. */
+
+UDI
+or1k64bf_h_sys_sr_ime_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_IME ();
+}
+
+/* Set a value for h-sys-sr-ime. */
+
+void
+or1k64bf_h_sys_sr_ime_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_IME (newval);
+}
+
+/* Get the value of h-sys-sr-lee. */
+
+UDI
+or1k64bf_h_sys_sr_lee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_LEE ();
+}
+
+/* Set a value for h-sys-sr-lee. */
+
+void
+or1k64bf_h_sys_sr_lee_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_LEE (newval);
+}
+
+/* Get the value of h-sys-sr-ce. */
+
+UDI
+or1k64bf_h_sys_sr_ce_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_CE ();
+}
+
+/* Set a value for h-sys-sr-ce. */
+
+void
+or1k64bf_h_sys_sr_ce_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_CE (newval);
+}
+
+/* Get the value of h-sys-sr-f. */
+
+UDI
+or1k64bf_h_sys_sr_f_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_F ();
+}
+
+/* Set a value for h-sys-sr-f. */
+
+void
+or1k64bf_h_sys_sr_f_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_F (newval);
+}
+
+/* Get the value of h-sys-sr-cy. */
+
+UDI
+or1k64bf_h_sys_sr_cy_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_CY ();
+}
+
+/* Set a value for h-sys-sr-cy. */
+
+void
+or1k64bf_h_sys_sr_cy_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_CY (newval);
+}
+
+/* Get the value of h-sys-sr-ov. */
+
+UDI
+or1k64bf_h_sys_sr_ov_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_OV ();
+}
+
+/* Set a value for h-sys-sr-ov. */
+
+void
+or1k64bf_h_sys_sr_ov_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_OV (newval);
+}
+
+/* Get the value of h-sys-sr-ove. */
+
+UDI
+or1k64bf_h_sys_sr_ove_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_OVE ();
+}
+
+/* Set a value for h-sys-sr-ove. */
+
+void
+or1k64bf_h_sys_sr_ove_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_OVE (newval);
+}
+
+/* Get the value of h-sys-sr-dsx. */
+
+UDI
+or1k64bf_h_sys_sr_dsx_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_DSX ();
+}
+
+/* Set a value for h-sys-sr-dsx. */
+
+void
+or1k64bf_h_sys_sr_dsx_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_DSX (newval);
+}
+
+/* Get the value of h-sys-sr-eph. */
+
+UDI
+or1k64bf_h_sys_sr_eph_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_EPH ();
+}
+
+/* Set a value for h-sys-sr-eph. */
+
+void
+or1k64bf_h_sys_sr_eph_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_EPH (newval);
+}
+
+/* Get the value of h-sys-sr-fo. */
+
+UDI
+or1k64bf_h_sys_sr_fo_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_FO ();
+}
+
+/* Set a value for h-sys-sr-fo. */
+
+void
+or1k64bf_h_sys_sr_fo_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_FO (newval);
+}
+
+/* Get the value of h-sys-sr-sumra. */
+
+UDI
+or1k64bf_h_sys_sr_sumra_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_SUMRA ();
+}
+
+/* Set a value for h-sys-sr-sumra. */
+
+void
+or1k64bf_h_sys_sr_sumra_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_SUMRA (newval);
+}
+
+/* Get the value of h-sys-sr-cid. */
+
+UDI
+or1k64bf_h_sys_sr_cid_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_SR_CID ();
+}
+
+/* Set a value for h-sys-sr-cid. */
+
+void
+or1k64bf_h_sys_sr_cid_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_SR_CID (newval);
+}
+
+/* Get the value of h-sys-fpcsr-fpee. */
+
+UDI
+or1k64bf_h_sys_fpcsr_fpee_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_FPEE ();
+}
+
+/* Set a value for h-sys-fpcsr-fpee. */
+
+void
+or1k64bf_h_sys_fpcsr_fpee_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_FPEE (newval);
+}
+
+/* Get the value of h-sys-fpcsr-rm. */
+
+UDI
+or1k64bf_h_sys_fpcsr_rm_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_RM ();
+}
+
+/* Set a value for h-sys-fpcsr-rm. */
+
+void
+or1k64bf_h_sys_fpcsr_rm_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_RM (newval);
+}
+
+/* Get the value of h-sys-fpcsr-ovf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_ovf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_OVF ();
+}
+
+/* Set a value for h-sys-fpcsr-ovf. */
+
+void
+or1k64bf_h_sys_fpcsr_ovf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_OVF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-unf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_unf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_UNF ();
+}
+
+/* Set a value for h-sys-fpcsr-unf. */
+
+void
+or1k64bf_h_sys_fpcsr_unf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_UNF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-snf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_snf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_SNF ();
+}
+
+/* Set a value for h-sys-fpcsr-snf. */
+
+void
+or1k64bf_h_sys_fpcsr_snf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_SNF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-qnf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_qnf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_QNF ();
+}
+
+/* Set a value for h-sys-fpcsr-qnf. */
+
+void
+or1k64bf_h_sys_fpcsr_qnf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_QNF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-zf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_zf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_ZF ();
+}
+
+/* Set a value for h-sys-fpcsr-zf. */
+
+void
+or1k64bf_h_sys_fpcsr_zf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_ZF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-ixf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_ixf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_IXF ();
+}
+
+/* Set a value for h-sys-fpcsr-ixf. */
+
+void
+or1k64bf_h_sys_fpcsr_ixf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_IXF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-ivf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_ivf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_IVF ();
+}
+
+/* Set a value for h-sys-fpcsr-ivf. */
+
+void
+or1k64bf_h_sys_fpcsr_ivf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_IVF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-inf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_inf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_INF ();
+}
+
+/* Set a value for h-sys-fpcsr-inf. */
+
+void
+or1k64bf_h_sys_fpcsr_inf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_INF (newval);
+}
+
+/* Get the value of h-sys-fpcsr-dzf. */
+
+UDI
+or1k64bf_h_sys_fpcsr_dzf_get (SIM_CPU *current_cpu)
+{
+ return GET_H_SYS_FPCSR_DZF ();
+}
+
+/* Set a value for h-sys-fpcsr-dzf. */
+
+void
+or1k64bf_h_sys_fpcsr_dzf_set (SIM_CPU *current_cpu, UDI newval)
+{
+ SET_H_SYS_FPCSR_DZF (newval);
+}
+
+/* Record trace results for INSN. */
+
+void
+or1k64bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
+ int *indices, TRACE_RECORD *tr)
+{
+}
diff --git a/sim/or1k/cpu64.h b/sim/or1k/cpu64.h
new file mode 100644
index 0000000..c17c960
--- /dev/null
+++ b/sim/or1k/cpu64.h
@@ -0,0 +1,5042 @@
+/* CPU family header for or1k64bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef CPU_OR1K64BF_H
+#define CPU_OR1K64BF_H
+
+/* Maximum number of instructions that are fetched@a time.
+ This is for LIW type instructions sets (e.g. m32r). */
+#define MAX_LIW_INSNS 1
+
+/* Maximum number of instructions that can be executed in parallel. */
+#define MAX_PARALLEL_INSNS 1
+
+/* The size of an "int" needed to hold an instruction word.
+ This is usually 32 bits, but some architectures needs 64 bits. */
+typedef CGEN_INSN_INT CGEN_INSN_WORD;
+
+#include "cgen-engine.h"
+
+/* CPU state information. */
+typedef struct {
+ /* Hardware elements. */
+ struct {
+ /* program counter */
+ UDI h_pc;
+#define GET_H_PC() CPU (h_pc)
+#define SET_H_PC(x) (CPU (h_pc) = (x))
+ /* general registers */
+ UDI h_gpr[32];
+#define GET_H_GPR(index) GET_H_SPR (((index) + (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0))))
+#define SET_H_GPR(index, x) \
+do { \
+SET_H_SPR ((((index)) + (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0))), (x));\
+;} while (0)
+ } hardware;
+#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+} OR1K64BF_CPU_DATA;
+
+/* Virtual regs. */
+
+#define GET_H_FSR(index) SUBWORDSISF (TRUNCDISI (GET_H_GPR (index)))
+#define SET_H_FSR(index, x) \
+do { \
+SET_H_GPR ((index), ZEXTSIDI (SUBWORDSFSI ((x))));\
+;} while (0)
+#define GET_H_FDR(index) SUBWORDDIDF (TRUNCDIDI (GET_H_GPR (index)))
+#define SET_H_FDR(index, x) \
+do { \
+SET_H_GPR ((index), ZEXTDIDI (SUBWORDDFDI ((x))));\
+;} while (0)
+#define GET_H_SPR(index) or1k64bf_h_spr_get_raw (current_cpu, index)
+#define SET_H_SPR(index, x) \
+do { \
+or1k64bf_h_spr_set_raw (current_cpu, (index), (x));\
+;} while (0)
+#define GET_H_SYS_VR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR))
+#define SET_H_SYS_VR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), (x));\
+;} while (0)
+#define GET_H_SYS_UPR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR))
+#define SET_H_SYS_UPR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR))
+#define SET_H_SYS_CPUCFGR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_DMMUCFGR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DMMUCFGR))
+#define SET_H_SYS_DMMUCFGR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DMMUCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_IMMUCFGR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_IMMUCFGR))
+#define SET_H_SYS_IMMUCFGR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_IMMUCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_DCCFGR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCCFGR))
+#define SET_H_SYS_DCCFGR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_ICCFGR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ICCFGR))
+#define SET_H_SYS_ICCFGR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ICCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_DCFGR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCFGR))
+#define SET_H_SYS_DCFGR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_DCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_PCCFGR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PCCFGR))
+#define SET_H_SYS_PCCFGR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PCCFGR), (x));\
+;} while (0)
+#define GET_H_SYS_NPC() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_NPC))
+#define SET_H_SYS_NPC(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_NPC), (x));\
+;} while (0)
+#define GET_H_SYS_SR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR))
+#define SET_H_SYS_SR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), (x));\
+;} while (0)
+#define GET_H_SYS_PPC() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PPC))
+#define SET_H_SYS_PPC(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_PPC), (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR))
+#define SET_H_SYS_FPCSR(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR0() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR0))
+#define SET_H_SYS_EPCR0(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR0), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR1() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR1))
+#define SET_H_SYS_EPCR1(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR1), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR2() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR2))
+#define SET_H_SYS_EPCR2(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR2), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR3() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR3))
+#define SET_H_SYS_EPCR3(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR3), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR4() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR4))
+#define SET_H_SYS_EPCR4(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR4), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR5() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR5))
+#define SET_H_SYS_EPCR5(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR5), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR6() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR6))
+#define SET_H_SYS_EPCR6(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR6), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR7() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR7))
+#define SET_H_SYS_EPCR7(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR7), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR8() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR8))
+#define SET_H_SYS_EPCR8(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR8), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR9() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR9))
+#define SET_H_SYS_EPCR9(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR9), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR10() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR10))
+#define SET_H_SYS_EPCR10(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR10), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR11() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR11))
+#define SET_H_SYS_EPCR11(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR11), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR12() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR12))
+#define SET_H_SYS_EPCR12(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR12), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR13() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR13))
+#define SET_H_SYS_EPCR13(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR13), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR14() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR14))
+#define SET_H_SYS_EPCR14(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR14), (x));\
+;} while (0)
+#define GET_H_SYS_EPCR15() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR15))
+#define SET_H_SYS_EPCR15(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EPCR15), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR0() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR0))
+#define SET_H_SYS_EEAR0(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR0), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR1() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR1))
+#define SET_H_SYS_EEAR1(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR1), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR2() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR2))
+#define SET_H_SYS_EEAR2(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR2), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR3() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR3))
+#define SET_H_SYS_EEAR3(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR3), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR4() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR4))
+#define SET_H_SYS_EEAR4(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR4), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR5() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR5))
+#define SET_H_SYS_EEAR5(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR5), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR6() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR6))
+#define SET_H_SYS_EEAR6(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR6), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR7() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR7))
+#define SET_H_SYS_EEAR7(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR7), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR8() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR8))
+#define SET_H_SYS_EEAR8(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR8), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR9() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR9))
+#define SET_H_SYS_EEAR9(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR9), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR10() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR10))
+#define SET_H_SYS_EEAR10(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR10), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR11() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR11))
+#define SET_H_SYS_EEAR11(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR11), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR12() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR12))
+#define SET_H_SYS_EEAR12(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR12), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR13() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR13))
+#define SET_H_SYS_EEAR13(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR13), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR14() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR14))
+#define SET_H_SYS_EEAR14(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR14), (x));\
+;} while (0)
+#define GET_H_SYS_EEAR15() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR15))
+#define SET_H_SYS_EEAR15(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_EEAR15), (x));\
+;} while (0)
+#define GET_H_SYS_ESR0() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR0))
+#define SET_H_SYS_ESR0(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR0), (x));\
+;} while (0)
+#define GET_H_SYS_ESR1() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR1))
+#define SET_H_SYS_ESR1(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR1), (x));\
+;} while (0)
+#define GET_H_SYS_ESR2() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR2))
+#define SET_H_SYS_ESR2(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR2), (x));\
+;} while (0)
+#define GET_H_SYS_ESR3() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR3))
+#define SET_H_SYS_ESR3(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR3), (x));\
+;} while (0)
+#define GET_H_SYS_ESR4() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR4))
+#define SET_H_SYS_ESR4(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR4), (x));\
+;} while (0)
+#define GET_H_SYS_ESR5() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR5))
+#define SET_H_SYS_ESR5(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR5), (x));\
+;} while (0)
+#define GET_H_SYS_ESR6() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR6))
+#define SET_H_SYS_ESR6(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR6), (x));\
+;} while (0)
+#define GET_H_SYS_ESR7() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR7))
+#define SET_H_SYS_ESR7(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR7), (x));\
+;} while (0)
+#define GET_H_SYS_ESR8() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR8))
+#define SET_H_SYS_ESR8(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR8), (x));\
+;} while (0)
+#define GET_H_SYS_ESR9() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR9))
+#define SET_H_SYS_ESR9(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR9), (x));\
+;} while (0)
+#define GET_H_SYS_ESR10() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR10))
+#define SET_H_SYS_ESR10(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR10), (x));\
+;} while (0)
+#define GET_H_SYS_ESR11() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR11))
+#define SET_H_SYS_ESR11(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR11), (x));\
+;} while (0)
+#define GET_H_SYS_ESR12() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR12))
+#define SET_H_SYS_ESR12(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR12), (x));\
+;} while (0)
+#define GET_H_SYS_ESR13() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR13))
+#define SET_H_SYS_ESR13(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR13), (x));\
+;} while (0)
+#define GET_H_SYS_ESR14() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR14))
+#define SET_H_SYS_ESR14(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR14), (x));\
+;} while (0)
+#define GET_H_SYS_ESR15() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR15))
+#define SET_H_SYS_ESR15(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_ESR15), (x));\
+;} while (0)
+#define GET_H_SYS_GPR0() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0))
+#define SET_H_SYS_GPR0(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0), (x));\
+;} while (0)
+#define GET_H_SYS_GPR1() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR1))
+#define SET_H_SYS_GPR1(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR1), (x));\
+;} while (0)
+#define GET_H_SYS_GPR2() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR2))
+#define SET_H_SYS_GPR2(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR2), (x));\
+;} while (0)
+#define GET_H_SYS_GPR3() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR3))
+#define SET_H_SYS_GPR3(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR3), (x));\
+;} while (0)
+#define GET_H_SYS_GPR4() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR4))
+#define SET_H_SYS_GPR4(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR4), (x));\
+;} while (0)
+#define GET_H_SYS_GPR5() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR5))
+#define SET_H_SYS_GPR5(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR5), (x));\
+;} while (0)
+#define GET_H_SYS_GPR6() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR6))
+#define SET_H_SYS_GPR6(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR6), (x));\
+;} while (0)
+#define GET_H_SYS_GPR7() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR7))
+#define SET_H_SYS_GPR7(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR7), (x));\
+;} while (0)
+#define GET_H_SYS_GPR8() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR8))
+#define SET_H_SYS_GPR8(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR8), (x));\
+;} while (0)
+#define GET_H_SYS_GPR9() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR9))
+#define SET_H_SYS_GPR9(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR9), (x));\
+;} while (0)
+#define GET_H_SYS_GPR10() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR10))
+#define SET_H_SYS_GPR10(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR10), (x));\
+;} while (0)
+#define GET_H_SYS_GPR11() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR11))
+#define SET_H_SYS_GPR11(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR11), (x));\
+;} while (0)
+#define GET_H_SYS_GPR12() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR12))
+#define SET_H_SYS_GPR12(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR12), (x));\
+;} while (0)
+#define GET_H_SYS_GPR13() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR13))
+#define SET_H_SYS_GPR13(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR13), (x));\
+;} while (0)
+#define GET_H_SYS_GPR14() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR14))
+#define SET_H_SYS_GPR14(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR14), (x));\
+;} while (0)
+#define GET_H_SYS_GPR15() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR15))
+#define SET_H_SYS_GPR15(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR15), (x));\
+;} while (0)
+#define GET_H_SYS_GPR16() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR16))
+#define SET_H_SYS_GPR16(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR16), (x));\
+;} while (0)
+#define GET_H_SYS_GPR17() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR17))
+#define SET_H_SYS_GPR17(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR17), (x));\
+;} while (0)
+#define GET_H_SYS_GPR18() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR18))
+#define SET_H_SYS_GPR18(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR18), (x));\
+;} while (0)
+#define GET_H_SYS_GPR19() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR19))
+#define SET_H_SYS_GPR19(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR19), (x));\
+;} while (0)
+#define GET_H_SYS_GPR20() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR20))
+#define SET_H_SYS_GPR20(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR20), (x));\
+;} while (0)
+#define GET_H_SYS_GPR21() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR21))
+#define SET_H_SYS_GPR21(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR21), (x));\
+;} while (0)
+#define GET_H_SYS_GPR22() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR22))
+#define SET_H_SYS_GPR22(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR22), (x));\
+;} while (0)
+#define GET_H_SYS_GPR23() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR23))
+#define SET_H_SYS_GPR23(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR23), (x));\
+;} while (0)
+#define GET_H_SYS_GPR24() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR24))
+#define SET_H_SYS_GPR24(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR24), (x));\
+;} while (0)
+#define GET_H_SYS_GPR25() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR25))
+#define SET_H_SYS_GPR25(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR25), (x));\
+;} while (0)
+#define GET_H_SYS_GPR26() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR26))
+#define SET_H_SYS_GPR26(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR26), (x));\
+;} while (0)
+#define GET_H_SYS_GPR27() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR27))
+#define SET_H_SYS_GPR27(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR27), (x));\
+;} while (0)
+#define GET_H_SYS_GPR28() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR28))
+#define SET_H_SYS_GPR28(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR28), (x));\
+;} while (0)
+#define GET_H_SYS_GPR29() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR29))
+#define SET_H_SYS_GPR29(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR29), (x));\
+;} while (0)
+#define GET_H_SYS_GPR30() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR30))
+#define SET_H_SYS_GPR30(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR30), (x));\
+;} while (0)
+#define GET_H_SYS_GPR31() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR31))
+#define SET_H_SYS_GPR31(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR31), (x));\
+;} while (0)
+#define GET_H_SYS_GPR32() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR32))
+#define SET_H_SYS_GPR32(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR32), (x));\
+;} while (0)
+#define GET_H_SYS_GPR33() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR33))
+#define SET_H_SYS_GPR33(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR33), (x));\
+;} while (0)
+#define GET_H_SYS_GPR34() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR34))
+#define SET_H_SYS_GPR34(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR34), (x));\
+;} while (0)
+#define GET_H_SYS_GPR35() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR35))
+#define SET_H_SYS_GPR35(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR35), (x));\
+;} while (0)
+#define GET_H_SYS_GPR36() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR36))
+#define SET_H_SYS_GPR36(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR36), (x));\
+;} while (0)
+#define GET_H_SYS_GPR37() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR37))
+#define SET_H_SYS_GPR37(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR37), (x));\
+;} while (0)
+#define GET_H_SYS_GPR38() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR38))
+#define SET_H_SYS_GPR38(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR38), (x));\
+;} while (0)
+#define GET_H_SYS_GPR39() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR39))
+#define SET_H_SYS_GPR39(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR39), (x));\
+;} while (0)
+#define GET_H_SYS_GPR40() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR40))
+#define SET_H_SYS_GPR40(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR40), (x));\
+;} while (0)
+#define GET_H_SYS_GPR41() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR41))
+#define SET_H_SYS_GPR41(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR41), (x));\
+;} while (0)
+#define GET_H_SYS_GPR42() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR42))
+#define SET_H_SYS_GPR42(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR42), (x));\
+;} while (0)
+#define GET_H_SYS_GPR43() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR43))
+#define SET_H_SYS_GPR43(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR43), (x));\
+;} while (0)
+#define GET_H_SYS_GPR44() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR44))
+#define SET_H_SYS_GPR44(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR44), (x));\
+;} while (0)
+#define GET_H_SYS_GPR45() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR45))
+#define SET_H_SYS_GPR45(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR45), (x));\
+;} while (0)
+#define GET_H_SYS_GPR46() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR46))
+#define SET_H_SYS_GPR46(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR46), (x));\
+;} while (0)
+#define GET_H_SYS_GPR47() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR47))
+#define SET_H_SYS_GPR47(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR47), (x));\
+;} while (0)
+#define GET_H_SYS_GPR48() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR48))
+#define SET_H_SYS_GPR48(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR48), (x));\
+;} while (0)
+#define GET_H_SYS_GPR49() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR49))
+#define SET_H_SYS_GPR49(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR49), (x));\
+;} while (0)
+#define GET_H_SYS_GPR50() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR50))
+#define SET_H_SYS_GPR50(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR50), (x));\
+;} while (0)
+#define GET_H_SYS_GPR51() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR51))
+#define SET_H_SYS_GPR51(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR51), (x));\
+;} while (0)
+#define GET_H_SYS_GPR52() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR52))
+#define SET_H_SYS_GPR52(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR52), (x));\
+;} while (0)
+#define GET_H_SYS_GPR53() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR53))
+#define SET_H_SYS_GPR53(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR53), (x));\
+;} while (0)
+#define GET_H_SYS_GPR54() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR54))
+#define SET_H_SYS_GPR54(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR54), (x));\
+;} while (0)
+#define GET_H_SYS_GPR55() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR55))
+#define SET_H_SYS_GPR55(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR55), (x));\
+;} while (0)
+#define GET_H_SYS_GPR56() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR56))
+#define SET_H_SYS_GPR56(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR56), (x));\
+;} while (0)
+#define GET_H_SYS_GPR57() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR57))
+#define SET_H_SYS_GPR57(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR57), (x));\
+;} while (0)
+#define GET_H_SYS_GPR58() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR58))
+#define SET_H_SYS_GPR58(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR58), (x));\
+;} while (0)
+#define GET_H_SYS_GPR59() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR59))
+#define SET_H_SYS_GPR59(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR59), (x));\
+;} while (0)
+#define GET_H_SYS_GPR60() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR60))
+#define SET_H_SYS_GPR60(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR60), (x));\
+;} while (0)
+#define GET_H_SYS_GPR61() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR61))
+#define SET_H_SYS_GPR61(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR61), (x));\
+;} while (0)
+#define GET_H_SYS_GPR62() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR62))
+#define SET_H_SYS_GPR62(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR62), (x));\
+;} while (0)
+#define GET_H_SYS_GPR63() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR63))
+#define SET_H_SYS_GPR63(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR63), (x));\
+;} while (0)
+#define GET_H_SYS_GPR64() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR64))
+#define SET_H_SYS_GPR64(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR64), (x));\
+;} while (0)
+#define GET_H_SYS_GPR65() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR65))
+#define SET_H_SYS_GPR65(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR65), (x));\
+;} while (0)
+#define GET_H_SYS_GPR66() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR66))
+#define SET_H_SYS_GPR66(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR66), (x));\
+;} while (0)
+#define GET_H_SYS_GPR67() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR67))
+#define SET_H_SYS_GPR67(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR67), (x));\
+;} while (0)
+#define GET_H_SYS_GPR68() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR68))
+#define SET_H_SYS_GPR68(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR68), (x));\
+;} while (0)
+#define GET_H_SYS_GPR69() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR69))
+#define SET_H_SYS_GPR69(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR69), (x));\
+;} while (0)
+#define GET_H_SYS_GPR70() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR70))
+#define SET_H_SYS_GPR70(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR70), (x));\
+;} while (0)
+#define GET_H_SYS_GPR71() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR71))
+#define SET_H_SYS_GPR71(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR71), (x));\
+;} while (0)
+#define GET_H_SYS_GPR72() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR72))
+#define SET_H_SYS_GPR72(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR72), (x));\
+;} while (0)
+#define GET_H_SYS_GPR73() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR73))
+#define SET_H_SYS_GPR73(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR73), (x));\
+;} while (0)
+#define GET_H_SYS_GPR74() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR74))
+#define SET_H_SYS_GPR74(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR74), (x));\
+;} while (0)
+#define GET_H_SYS_GPR75() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR75))
+#define SET_H_SYS_GPR75(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR75), (x));\
+;} while (0)
+#define GET_H_SYS_GPR76() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR76))
+#define SET_H_SYS_GPR76(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR76), (x));\
+;} while (0)
+#define GET_H_SYS_GPR77() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR77))
+#define SET_H_SYS_GPR77(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR77), (x));\
+;} while (0)
+#define GET_H_SYS_GPR78() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR78))
+#define SET_H_SYS_GPR78(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR78), (x));\
+;} while (0)
+#define GET_H_SYS_GPR79() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR79))
+#define SET_H_SYS_GPR79(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR79), (x));\
+;} while (0)
+#define GET_H_SYS_GPR80() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR80))
+#define SET_H_SYS_GPR80(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR80), (x));\
+;} while (0)
+#define GET_H_SYS_GPR81() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR81))
+#define SET_H_SYS_GPR81(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR81), (x));\
+;} while (0)
+#define GET_H_SYS_GPR82() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR82))
+#define SET_H_SYS_GPR82(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR82), (x));\
+;} while (0)
+#define GET_H_SYS_GPR83() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR83))
+#define SET_H_SYS_GPR83(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR83), (x));\
+;} while (0)
+#define GET_H_SYS_GPR84() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR84))
+#define SET_H_SYS_GPR84(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR84), (x));\
+;} while (0)
+#define GET_H_SYS_GPR85() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR85))
+#define SET_H_SYS_GPR85(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR85), (x));\
+;} while (0)
+#define GET_H_SYS_GPR86() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR86))
+#define SET_H_SYS_GPR86(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR86), (x));\
+;} while (0)
+#define GET_H_SYS_GPR87() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR87))
+#define SET_H_SYS_GPR87(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR87), (x));\
+;} while (0)
+#define GET_H_SYS_GPR88() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR88))
+#define SET_H_SYS_GPR88(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR88), (x));\
+;} while (0)
+#define GET_H_SYS_GPR89() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR89))
+#define SET_H_SYS_GPR89(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR89), (x));\
+;} while (0)
+#define GET_H_SYS_GPR90() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR90))
+#define SET_H_SYS_GPR90(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR90), (x));\
+;} while (0)
+#define GET_H_SYS_GPR91() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR91))
+#define SET_H_SYS_GPR91(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR91), (x));\
+;} while (0)
+#define GET_H_SYS_GPR92() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR92))
+#define SET_H_SYS_GPR92(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR92), (x));\
+;} while (0)
+#define GET_H_SYS_GPR93() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR93))
+#define SET_H_SYS_GPR93(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR93), (x));\
+;} while (0)
+#define GET_H_SYS_GPR94() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR94))
+#define SET_H_SYS_GPR94(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR94), (x));\
+;} while (0)
+#define GET_H_SYS_GPR95() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR95))
+#define SET_H_SYS_GPR95(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR95), (x));\
+;} while (0)
+#define GET_H_SYS_GPR96() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR96))
+#define SET_H_SYS_GPR96(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR96), (x));\
+;} while (0)
+#define GET_H_SYS_GPR97() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR97))
+#define SET_H_SYS_GPR97(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR97), (x));\
+;} while (0)
+#define GET_H_SYS_GPR98() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR98))
+#define SET_H_SYS_GPR98(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR98), (x));\
+;} while (0)
+#define GET_H_SYS_GPR99() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR99))
+#define SET_H_SYS_GPR99(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR99), (x));\
+;} while (0)
+#define GET_H_SYS_GPR100() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR100))
+#define SET_H_SYS_GPR100(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR100), (x));\
+;} while (0)
+#define GET_H_SYS_GPR101() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR101))
+#define SET_H_SYS_GPR101(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR101), (x));\
+;} while (0)
+#define GET_H_SYS_GPR102() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR102))
+#define SET_H_SYS_GPR102(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR102), (x));\
+;} while (0)
+#define GET_H_SYS_GPR103() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR103))
+#define SET_H_SYS_GPR103(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR103), (x));\
+;} while (0)
+#define GET_H_SYS_GPR104() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR104))
+#define SET_H_SYS_GPR104(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR104), (x));\
+;} while (0)
+#define GET_H_SYS_GPR105() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR105))
+#define SET_H_SYS_GPR105(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR105), (x));\
+;} while (0)
+#define GET_H_SYS_GPR106() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR106))
+#define SET_H_SYS_GPR106(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR106), (x));\
+;} while (0)
+#define GET_H_SYS_GPR107() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR107))
+#define SET_H_SYS_GPR107(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR107), (x));\
+;} while (0)
+#define GET_H_SYS_GPR108() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR108))
+#define SET_H_SYS_GPR108(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR108), (x));\
+;} while (0)
+#define GET_H_SYS_GPR109() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR109))
+#define SET_H_SYS_GPR109(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR109), (x));\
+;} while (0)
+#define GET_H_SYS_GPR110() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR110))
+#define SET_H_SYS_GPR110(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR110), (x));\
+;} while (0)
+#define GET_H_SYS_GPR111() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR111))
+#define SET_H_SYS_GPR111(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR111), (x));\
+;} while (0)
+#define GET_H_SYS_GPR112() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR112))
+#define SET_H_SYS_GPR112(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR112), (x));\
+;} while (0)
+#define GET_H_SYS_GPR113() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR113))
+#define SET_H_SYS_GPR113(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR113), (x));\
+;} while (0)
+#define GET_H_SYS_GPR114() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR114))
+#define SET_H_SYS_GPR114(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR114), (x));\
+;} while (0)
+#define GET_H_SYS_GPR115() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR115))
+#define SET_H_SYS_GPR115(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR115), (x));\
+;} while (0)
+#define GET_H_SYS_GPR116() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR116))
+#define SET_H_SYS_GPR116(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR116), (x));\
+;} while (0)
+#define GET_H_SYS_GPR117() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR117))
+#define SET_H_SYS_GPR117(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR117), (x));\
+;} while (0)
+#define GET_H_SYS_GPR118() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR118))
+#define SET_H_SYS_GPR118(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR118), (x));\
+;} while (0)
+#define GET_H_SYS_GPR119() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR119))
+#define SET_H_SYS_GPR119(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR119), (x));\
+;} while (0)
+#define GET_H_SYS_GPR120() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR120))
+#define SET_H_SYS_GPR120(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR120), (x));\
+;} while (0)
+#define GET_H_SYS_GPR121() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR121))
+#define SET_H_SYS_GPR121(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR121), (x));\
+;} while (0)
+#define GET_H_SYS_GPR122() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR122))
+#define SET_H_SYS_GPR122(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR122), (x));\
+;} while (0)
+#define GET_H_SYS_GPR123() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR123))
+#define SET_H_SYS_GPR123(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR123), (x));\
+;} while (0)
+#define GET_H_SYS_GPR124() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR124))
+#define SET_H_SYS_GPR124(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR124), (x));\
+;} while (0)
+#define GET_H_SYS_GPR125() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR125))
+#define SET_H_SYS_GPR125(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR125), (x));\
+;} while (0)
+#define GET_H_SYS_GPR126() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR126))
+#define SET_H_SYS_GPR126(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR126), (x));\
+;} while (0)
+#define GET_H_SYS_GPR127() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR127))
+#define SET_H_SYS_GPR127(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR127), (x));\
+;} while (0)
+#define GET_H_SYS_GPR128() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR128))
+#define SET_H_SYS_GPR128(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR128), (x));\
+;} while (0)
+#define GET_H_SYS_GPR129() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR129))
+#define SET_H_SYS_GPR129(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR129), (x));\
+;} while (0)
+#define GET_H_SYS_GPR130() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR130))
+#define SET_H_SYS_GPR130(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR130), (x));\
+;} while (0)
+#define GET_H_SYS_GPR131() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR131))
+#define SET_H_SYS_GPR131(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR131), (x));\
+;} while (0)
+#define GET_H_SYS_GPR132() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR132))
+#define SET_H_SYS_GPR132(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR132), (x));\
+;} while (0)
+#define GET_H_SYS_GPR133() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR133))
+#define SET_H_SYS_GPR133(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR133), (x));\
+;} while (0)
+#define GET_H_SYS_GPR134() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR134))
+#define SET_H_SYS_GPR134(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR134), (x));\
+;} while (0)
+#define GET_H_SYS_GPR135() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR135))
+#define SET_H_SYS_GPR135(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR135), (x));\
+;} while (0)
+#define GET_H_SYS_GPR136() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR136))
+#define SET_H_SYS_GPR136(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR136), (x));\
+;} while (0)
+#define GET_H_SYS_GPR137() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR137))
+#define SET_H_SYS_GPR137(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR137), (x));\
+;} while (0)
+#define GET_H_SYS_GPR138() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR138))
+#define SET_H_SYS_GPR138(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR138), (x));\
+;} while (0)
+#define GET_H_SYS_GPR139() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR139))
+#define SET_H_SYS_GPR139(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR139), (x));\
+;} while (0)
+#define GET_H_SYS_GPR140() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR140))
+#define SET_H_SYS_GPR140(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR140), (x));\
+;} while (0)
+#define GET_H_SYS_GPR141() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR141))
+#define SET_H_SYS_GPR141(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR141), (x));\
+;} while (0)
+#define GET_H_SYS_GPR142() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR142))
+#define SET_H_SYS_GPR142(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR142), (x));\
+;} while (0)
+#define GET_H_SYS_GPR143() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR143))
+#define SET_H_SYS_GPR143(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR143), (x));\
+;} while (0)
+#define GET_H_SYS_GPR144() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR144))
+#define SET_H_SYS_GPR144(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR144), (x));\
+;} while (0)
+#define GET_H_SYS_GPR145() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR145))
+#define SET_H_SYS_GPR145(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR145), (x));\
+;} while (0)
+#define GET_H_SYS_GPR146() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR146))
+#define SET_H_SYS_GPR146(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR146), (x));\
+;} while (0)
+#define GET_H_SYS_GPR147() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR147))
+#define SET_H_SYS_GPR147(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR147), (x));\
+;} while (0)
+#define GET_H_SYS_GPR148() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR148))
+#define SET_H_SYS_GPR148(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR148), (x));\
+;} while (0)
+#define GET_H_SYS_GPR149() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR149))
+#define SET_H_SYS_GPR149(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR149), (x));\
+;} while (0)
+#define GET_H_SYS_GPR150() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR150))
+#define SET_H_SYS_GPR150(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR150), (x));\
+;} while (0)
+#define GET_H_SYS_GPR151() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR151))
+#define SET_H_SYS_GPR151(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR151), (x));\
+;} while (0)
+#define GET_H_SYS_GPR152() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR152))
+#define SET_H_SYS_GPR152(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR152), (x));\
+;} while (0)
+#define GET_H_SYS_GPR153() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR153))
+#define SET_H_SYS_GPR153(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR153), (x));\
+;} while (0)
+#define GET_H_SYS_GPR154() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR154))
+#define SET_H_SYS_GPR154(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR154), (x));\
+;} while (0)
+#define GET_H_SYS_GPR155() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR155))
+#define SET_H_SYS_GPR155(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR155), (x));\
+;} while (0)
+#define GET_H_SYS_GPR156() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR156))
+#define SET_H_SYS_GPR156(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR156), (x));\
+;} while (0)
+#define GET_H_SYS_GPR157() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR157))
+#define SET_H_SYS_GPR157(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR157), (x));\
+;} while (0)
+#define GET_H_SYS_GPR158() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR158))
+#define SET_H_SYS_GPR158(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR158), (x));\
+;} while (0)
+#define GET_H_SYS_GPR159() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR159))
+#define SET_H_SYS_GPR159(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR159), (x));\
+;} while (0)
+#define GET_H_SYS_GPR160() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR160))
+#define SET_H_SYS_GPR160(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR160), (x));\
+;} while (0)
+#define GET_H_SYS_GPR161() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR161))
+#define SET_H_SYS_GPR161(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR161), (x));\
+;} while (0)
+#define GET_H_SYS_GPR162() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR162))
+#define SET_H_SYS_GPR162(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR162), (x));\
+;} while (0)
+#define GET_H_SYS_GPR163() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR163))
+#define SET_H_SYS_GPR163(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR163), (x));\
+;} while (0)
+#define GET_H_SYS_GPR164() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR164))
+#define SET_H_SYS_GPR164(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR164), (x));\
+;} while (0)
+#define GET_H_SYS_GPR165() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR165))
+#define SET_H_SYS_GPR165(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR165), (x));\
+;} while (0)
+#define GET_H_SYS_GPR166() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR166))
+#define SET_H_SYS_GPR166(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR166), (x));\
+;} while (0)
+#define GET_H_SYS_GPR167() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR167))
+#define SET_H_SYS_GPR167(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR167), (x));\
+;} while (0)
+#define GET_H_SYS_GPR168() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR168))
+#define SET_H_SYS_GPR168(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR168), (x));\
+;} while (0)
+#define GET_H_SYS_GPR169() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR169))
+#define SET_H_SYS_GPR169(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR169), (x));\
+;} while (0)
+#define GET_H_SYS_GPR170() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR170))
+#define SET_H_SYS_GPR170(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR170), (x));\
+;} while (0)
+#define GET_H_SYS_GPR171() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR171))
+#define SET_H_SYS_GPR171(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR171), (x));\
+;} while (0)
+#define GET_H_SYS_GPR172() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR172))
+#define SET_H_SYS_GPR172(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR172), (x));\
+;} while (0)
+#define GET_H_SYS_GPR173() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR173))
+#define SET_H_SYS_GPR173(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR173), (x));\
+;} while (0)
+#define GET_H_SYS_GPR174() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR174))
+#define SET_H_SYS_GPR174(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR174), (x));\
+;} while (0)
+#define GET_H_SYS_GPR175() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR175))
+#define SET_H_SYS_GPR175(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR175), (x));\
+;} while (0)
+#define GET_H_SYS_GPR176() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR176))
+#define SET_H_SYS_GPR176(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR176), (x));\
+;} while (0)
+#define GET_H_SYS_GPR177() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR177))
+#define SET_H_SYS_GPR177(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR177), (x));\
+;} while (0)
+#define GET_H_SYS_GPR178() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR178))
+#define SET_H_SYS_GPR178(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR178), (x));\
+;} while (0)
+#define GET_H_SYS_GPR179() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR179))
+#define SET_H_SYS_GPR179(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR179), (x));\
+;} while (0)
+#define GET_H_SYS_GPR180() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR180))
+#define SET_H_SYS_GPR180(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR180), (x));\
+;} while (0)
+#define GET_H_SYS_GPR181() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR181))
+#define SET_H_SYS_GPR181(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR181), (x));\
+;} while (0)
+#define GET_H_SYS_GPR182() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR182))
+#define SET_H_SYS_GPR182(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR182), (x));\
+;} while (0)
+#define GET_H_SYS_GPR183() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR183))
+#define SET_H_SYS_GPR183(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR183), (x));\
+;} while (0)
+#define GET_H_SYS_GPR184() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR184))
+#define SET_H_SYS_GPR184(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR184), (x));\
+;} while (0)
+#define GET_H_SYS_GPR185() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR185))
+#define SET_H_SYS_GPR185(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR185), (x));\
+;} while (0)
+#define GET_H_SYS_GPR186() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR186))
+#define SET_H_SYS_GPR186(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR186), (x));\
+;} while (0)
+#define GET_H_SYS_GPR187() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR187))
+#define SET_H_SYS_GPR187(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR187), (x));\
+;} while (0)
+#define GET_H_SYS_GPR188() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR188))
+#define SET_H_SYS_GPR188(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR188), (x));\
+;} while (0)
+#define GET_H_SYS_GPR189() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR189))
+#define SET_H_SYS_GPR189(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR189), (x));\
+;} while (0)
+#define GET_H_SYS_GPR190() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR190))
+#define SET_H_SYS_GPR190(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR190), (x));\
+;} while (0)
+#define GET_H_SYS_GPR191() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR191))
+#define SET_H_SYS_GPR191(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR191), (x));\
+;} while (0)
+#define GET_H_SYS_GPR192() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR192))
+#define SET_H_SYS_GPR192(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR192), (x));\
+;} while (0)
+#define GET_H_SYS_GPR193() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR193))
+#define SET_H_SYS_GPR193(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR193), (x));\
+;} while (0)
+#define GET_H_SYS_GPR194() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR194))
+#define SET_H_SYS_GPR194(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR194), (x));\
+;} while (0)
+#define GET_H_SYS_GPR195() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR195))
+#define SET_H_SYS_GPR195(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR195), (x));\
+;} while (0)
+#define GET_H_SYS_GPR196() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR196))
+#define SET_H_SYS_GPR196(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR196), (x));\
+;} while (0)
+#define GET_H_SYS_GPR197() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR197))
+#define SET_H_SYS_GPR197(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR197), (x));\
+;} while (0)
+#define GET_H_SYS_GPR198() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR198))
+#define SET_H_SYS_GPR198(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR198), (x));\
+;} while (0)
+#define GET_H_SYS_GPR199() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR199))
+#define SET_H_SYS_GPR199(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR199), (x));\
+;} while (0)
+#define GET_H_SYS_GPR200() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR200))
+#define SET_H_SYS_GPR200(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR200), (x));\
+;} while (0)
+#define GET_H_SYS_GPR201() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR201))
+#define SET_H_SYS_GPR201(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR201), (x));\
+;} while (0)
+#define GET_H_SYS_GPR202() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR202))
+#define SET_H_SYS_GPR202(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR202), (x));\
+;} while (0)
+#define GET_H_SYS_GPR203() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR203))
+#define SET_H_SYS_GPR203(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR203), (x));\
+;} while (0)
+#define GET_H_SYS_GPR204() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR204))
+#define SET_H_SYS_GPR204(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR204), (x));\
+;} while (0)
+#define GET_H_SYS_GPR205() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR205))
+#define SET_H_SYS_GPR205(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR205), (x));\
+;} while (0)
+#define GET_H_SYS_GPR206() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR206))
+#define SET_H_SYS_GPR206(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR206), (x));\
+;} while (0)
+#define GET_H_SYS_GPR207() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR207))
+#define SET_H_SYS_GPR207(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR207), (x));\
+;} while (0)
+#define GET_H_SYS_GPR208() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR208))
+#define SET_H_SYS_GPR208(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR208), (x));\
+;} while (0)
+#define GET_H_SYS_GPR209() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR209))
+#define SET_H_SYS_GPR209(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR209), (x));\
+;} while (0)
+#define GET_H_SYS_GPR210() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR210))
+#define SET_H_SYS_GPR210(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR210), (x));\
+;} while (0)
+#define GET_H_SYS_GPR211() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR211))
+#define SET_H_SYS_GPR211(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR211), (x));\
+;} while (0)
+#define GET_H_SYS_GPR212() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR212))
+#define SET_H_SYS_GPR212(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR212), (x));\
+;} while (0)
+#define GET_H_SYS_GPR213() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR213))
+#define SET_H_SYS_GPR213(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR213), (x));\
+;} while (0)
+#define GET_H_SYS_GPR214() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR214))
+#define SET_H_SYS_GPR214(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR214), (x));\
+;} while (0)
+#define GET_H_SYS_GPR215() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR215))
+#define SET_H_SYS_GPR215(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR215), (x));\
+;} while (0)
+#define GET_H_SYS_GPR216() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR216))
+#define SET_H_SYS_GPR216(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR216), (x));\
+;} while (0)
+#define GET_H_SYS_GPR217() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR217))
+#define SET_H_SYS_GPR217(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR217), (x));\
+;} while (0)
+#define GET_H_SYS_GPR218() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR218))
+#define SET_H_SYS_GPR218(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR218), (x));\
+;} while (0)
+#define GET_H_SYS_GPR219() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR219))
+#define SET_H_SYS_GPR219(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR219), (x));\
+;} while (0)
+#define GET_H_SYS_GPR220() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR220))
+#define SET_H_SYS_GPR220(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR220), (x));\
+;} while (0)
+#define GET_H_SYS_GPR221() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR221))
+#define SET_H_SYS_GPR221(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR221), (x));\
+;} while (0)
+#define GET_H_SYS_GPR222() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR222))
+#define SET_H_SYS_GPR222(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR222), (x));\
+;} while (0)
+#define GET_H_SYS_GPR223() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR223))
+#define SET_H_SYS_GPR223(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR223), (x));\
+;} while (0)
+#define GET_H_SYS_GPR224() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR224))
+#define SET_H_SYS_GPR224(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR224), (x));\
+;} while (0)
+#define GET_H_SYS_GPR225() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR225))
+#define SET_H_SYS_GPR225(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR225), (x));\
+;} while (0)
+#define GET_H_SYS_GPR226() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR226))
+#define SET_H_SYS_GPR226(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR226), (x));\
+;} while (0)
+#define GET_H_SYS_GPR227() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR227))
+#define SET_H_SYS_GPR227(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR227), (x));\
+;} while (0)
+#define GET_H_SYS_GPR228() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR228))
+#define SET_H_SYS_GPR228(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR228), (x));\
+;} while (0)
+#define GET_H_SYS_GPR229() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR229))
+#define SET_H_SYS_GPR229(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR229), (x));\
+;} while (0)
+#define GET_H_SYS_GPR230() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR230))
+#define SET_H_SYS_GPR230(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR230), (x));\
+;} while (0)
+#define GET_H_SYS_GPR231() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR231))
+#define SET_H_SYS_GPR231(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR231), (x));\
+;} while (0)
+#define GET_H_SYS_GPR232() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR232))
+#define SET_H_SYS_GPR232(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR232), (x));\
+;} while (0)
+#define GET_H_SYS_GPR233() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR233))
+#define SET_H_SYS_GPR233(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR233), (x));\
+;} while (0)
+#define GET_H_SYS_GPR234() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR234))
+#define SET_H_SYS_GPR234(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR234), (x));\
+;} while (0)
+#define GET_H_SYS_GPR235() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR235))
+#define SET_H_SYS_GPR235(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR235), (x));\
+;} while (0)
+#define GET_H_SYS_GPR236() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR236))
+#define SET_H_SYS_GPR236(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR236), (x));\
+;} while (0)
+#define GET_H_SYS_GPR237() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR237))
+#define SET_H_SYS_GPR237(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR237), (x));\
+;} while (0)
+#define GET_H_SYS_GPR238() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR238))
+#define SET_H_SYS_GPR238(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR238), (x));\
+;} while (0)
+#define GET_H_SYS_GPR239() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR239))
+#define SET_H_SYS_GPR239(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR239), (x));\
+;} while (0)
+#define GET_H_SYS_GPR240() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR240))
+#define SET_H_SYS_GPR240(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR240), (x));\
+;} while (0)
+#define GET_H_SYS_GPR241() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR241))
+#define SET_H_SYS_GPR241(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR241), (x));\
+;} while (0)
+#define GET_H_SYS_GPR242() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR242))
+#define SET_H_SYS_GPR242(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR242), (x));\
+;} while (0)
+#define GET_H_SYS_GPR243() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR243))
+#define SET_H_SYS_GPR243(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR243), (x));\
+;} while (0)
+#define GET_H_SYS_GPR244() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR244))
+#define SET_H_SYS_GPR244(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR244), (x));\
+;} while (0)
+#define GET_H_SYS_GPR245() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR245))
+#define SET_H_SYS_GPR245(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR245), (x));\
+;} while (0)
+#define GET_H_SYS_GPR246() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR246))
+#define SET_H_SYS_GPR246(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR246), (x));\
+;} while (0)
+#define GET_H_SYS_GPR247() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR247))
+#define SET_H_SYS_GPR247(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR247), (x));\
+;} while (0)
+#define GET_H_SYS_GPR248() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR248))
+#define SET_H_SYS_GPR248(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR248), (x));\
+;} while (0)
+#define GET_H_SYS_GPR249() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR249))
+#define SET_H_SYS_GPR249(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR249), (x));\
+;} while (0)
+#define GET_H_SYS_GPR250() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR250))
+#define SET_H_SYS_GPR250(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR250), (x));\
+;} while (0)
+#define GET_H_SYS_GPR251() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR251))
+#define SET_H_SYS_GPR251(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR251), (x));\
+;} while (0)
+#define GET_H_SYS_GPR252() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR252))
+#define SET_H_SYS_GPR252(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR252), (x));\
+;} while (0)
+#define GET_H_SYS_GPR253() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR253))
+#define SET_H_SYS_GPR253(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR253), (x));\
+;} while (0)
+#define GET_H_SYS_GPR254() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR254))
+#define SET_H_SYS_GPR254(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR254), (x));\
+;} while (0)
+#define GET_H_SYS_GPR255() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR255))
+#define SET_H_SYS_GPR255(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR255), (x));\
+;} while (0)
+#define GET_H_SYS_GPR256() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR256))
+#define SET_H_SYS_GPR256(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR256), (x));\
+;} while (0)
+#define GET_H_SYS_GPR257() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR257))
+#define SET_H_SYS_GPR257(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR257), (x));\
+;} while (0)
+#define GET_H_SYS_GPR258() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR258))
+#define SET_H_SYS_GPR258(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR258), (x));\
+;} while (0)
+#define GET_H_SYS_GPR259() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR259))
+#define SET_H_SYS_GPR259(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR259), (x));\
+;} while (0)
+#define GET_H_SYS_GPR260() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR260))
+#define SET_H_SYS_GPR260(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR260), (x));\
+;} while (0)
+#define GET_H_SYS_GPR261() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR261))
+#define SET_H_SYS_GPR261(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR261), (x));\
+;} while (0)
+#define GET_H_SYS_GPR262() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR262))
+#define SET_H_SYS_GPR262(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR262), (x));\
+;} while (0)
+#define GET_H_SYS_GPR263() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR263))
+#define SET_H_SYS_GPR263(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR263), (x));\
+;} while (0)
+#define GET_H_SYS_GPR264() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR264))
+#define SET_H_SYS_GPR264(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR264), (x));\
+;} while (0)
+#define GET_H_SYS_GPR265() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR265))
+#define SET_H_SYS_GPR265(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR265), (x));\
+;} while (0)
+#define GET_H_SYS_GPR266() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR266))
+#define SET_H_SYS_GPR266(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR266), (x));\
+;} while (0)
+#define GET_H_SYS_GPR267() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR267))
+#define SET_H_SYS_GPR267(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR267), (x));\
+;} while (0)
+#define GET_H_SYS_GPR268() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR268))
+#define SET_H_SYS_GPR268(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR268), (x));\
+;} while (0)
+#define GET_H_SYS_GPR269() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR269))
+#define SET_H_SYS_GPR269(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR269), (x));\
+;} while (0)
+#define GET_H_SYS_GPR270() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR270))
+#define SET_H_SYS_GPR270(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR270), (x));\
+;} while (0)
+#define GET_H_SYS_GPR271() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR271))
+#define SET_H_SYS_GPR271(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR271), (x));\
+;} while (0)
+#define GET_H_SYS_GPR272() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR272))
+#define SET_H_SYS_GPR272(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR272), (x));\
+;} while (0)
+#define GET_H_SYS_GPR273() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR273))
+#define SET_H_SYS_GPR273(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR273), (x));\
+;} while (0)
+#define GET_H_SYS_GPR274() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR274))
+#define SET_H_SYS_GPR274(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR274), (x));\
+;} while (0)
+#define GET_H_SYS_GPR275() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR275))
+#define SET_H_SYS_GPR275(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR275), (x));\
+;} while (0)
+#define GET_H_SYS_GPR276() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR276))
+#define SET_H_SYS_GPR276(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR276), (x));\
+;} while (0)
+#define GET_H_SYS_GPR277() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR277))
+#define SET_H_SYS_GPR277(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR277), (x));\
+;} while (0)
+#define GET_H_SYS_GPR278() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR278))
+#define SET_H_SYS_GPR278(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR278), (x));\
+;} while (0)
+#define GET_H_SYS_GPR279() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR279))
+#define SET_H_SYS_GPR279(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR279), (x));\
+;} while (0)
+#define GET_H_SYS_GPR280() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR280))
+#define SET_H_SYS_GPR280(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR280), (x));\
+;} while (0)
+#define GET_H_SYS_GPR281() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR281))
+#define SET_H_SYS_GPR281(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR281), (x));\
+;} while (0)
+#define GET_H_SYS_GPR282() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR282))
+#define SET_H_SYS_GPR282(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR282), (x));\
+;} while (0)
+#define GET_H_SYS_GPR283() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR283))
+#define SET_H_SYS_GPR283(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR283), (x));\
+;} while (0)
+#define GET_H_SYS_GPR284() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR284))
+#define SET_H_SYS_GPR284(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR284), (x));\
+;} while (0)
+#define GET_H_SYS_GPR285() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR285))
+#define SET_H_SYS_GPR285(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR285), (x));\
+;} while (0)
+#define GET_H_SYS_GPR286() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR286))
+#define SET_H_SYS_GPR286(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR286), (x));\
+;} while (0)
+#define GET_H_SYS_GPR287() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR287))
+#define SET_H_SYS_GPR287(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR287), (x));\
+;} while (0)
+#define GET_H_SYS_GPR288() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR288))
+#define SET_H_SYS_GPR288(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR288), (x));\
+;} while (0)
+#define GET_H_SYS_GPR289() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR289))
+#define SET_H_SYS_GPR289(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR289), (x));\
+;} while (0)
+#define GET_H_SYS_GPR290() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR290))
+#define SET_H_SYS_GPR290(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR290), (x));\
+;} while (0)
+#define GET_H_SYS_GPR291() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR291))
+#define SET_H_SYS_GPR291(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR291), (x));\
+;} while (0)
+#define GET_H_SYS_GPR292() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR292))
+#define SET_H_SYS_GPR292(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR292), (x));\
+;} while (0)
+#define GET_H_SYS_GPR293() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR293))
+#define SET_H_SYS_GPR293(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR293), (x));\
+;} while (0)
+#define GET_H_SYS_GPR294() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR294))
+#define SET_H_SYS_GPR294(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR294), (x));\
+;} while (0)
+#define GET_H_SYS_GPR295() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR295))
+#define SET_H_SYS_GPR295(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR295), (x));\
+;} while (0)
+#define GET_H_SYS_GPR296() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR296))
+#define SET_H_SYS_GPR296(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR296), (x));\
+;} while (0)
+#define GET_H_SYS_GPR297() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR297))
+#define SET_H_SYS_GPR297(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR297), (x));\
+;} while (0)
+#define GET_H_SYS_GPR298() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR298))
+#define SET_H_SYS_GPR298(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR298), (x));\
+;} while (0)
+#define GET_H_SYS_GPR299() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR299))
+#define SET_H_SYS_GPR299(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR299), (x));\
+;} while (0)
+#define GET_H_SYS_GPR300() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR300))
+#define SET_H_SYS_GPR300(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR300), (x));\
+;} while (0)
+#define GET_H_SYS_GPR301() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR301))
+#define SET_H_SYS_GPR301(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR301), (x));\
+;} while (0)
+#define GET_H_SYS_GPR302() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR302))
+#define SET_H_SYS_GPR302(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR302), (x));\
+;} while (0)
+#define GET_H_SYS_GPR303() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR303))
+#define SET_H_SYS_GPR303(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR303), (x));\
+;} while (0)
+#define GET_H_SYS_GPR304() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR304))
+#define SET_H_SYS_GPR304(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR304), (x));\
+;} while (0)
+#define GET_H_SYS_GPR305() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR305))
+#define SET_H_SYS_GPR305(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR305), (x));\
+;} while (0)
+#define GET_H_SYS_GPR306() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR306))
+#define SET_H_SYS_GPR306(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR306), (x));\
+;} while (0)
+#define GET_H_SYS_GPR307() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR307))
+#define SET_H_SYS_GPR307(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR307), (x));\
+;} while (0)
+#define GET_H_SYS_GPR308() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR308))
+#define SET_H_SYS_GPR308(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR308), (x));\
+;} while (0)
+#define GET_H_SYS_GPR309() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR309))
+#define SET_H_SYS_GPR309(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR309), (x));\
+;} while (0)
+#define GET_H_SYS_GPR310() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR310))
+#define SET_H_SYS_GPR310(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR310), (x));\
+;} while (0)
+#define GET_H_SYS_GPR311() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR311))
+#define SET_H_SYS_GPR311(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR311), (x));\
+;} while (0)
+#define GET_H_SYS_GPR312() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR312))
+#define SET_H_SYS_GPR312(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR312), (x));\
+;} while (0)
+#define GET_H_SYS_GPR313() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR313))
+#define SET_H_SYS_GPR313(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR313), (x));\
+;} while (0)
+#define GET_H_SYS_GPR314() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR314))
+#define SET_H_SYS_GPR314(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR314), (x));\
+;} while (0)
+#define GET_H_SYS_GPR315() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR315))
+#define SET_H_SYS_GPR315(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR315), (x));\
+;} while (0)
+#define GET_H_SYS_GPR316() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR316))
+#define SET_H_SYS_GPR316(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR316), (x));\
+;} while (0)
+#define GET_H_SYS_GPR317() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR317))
+#define SET_H_SYS_GPR317(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR317), (x));\
+;} while (0)
+#define GET_H_SYS_GPR318() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR318))
+#define SET_H_SYS_GPR318(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR318), (x));\
+;} while (0)
+#define GET_H_SYS_GPR319() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR319))
+#define SET_H_SYS_GPR319(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR319), (x));\
+;} while (0)
+#define GET_H_SYS_GPR320() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR320))
+#define SET_H_SYS_GPR320(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR320), (x));\
+;} while (0)
+#define GET_H_SYS_GPR321() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR321))
+#define SET_H_SYS_GPR321(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR321), (x));\
+;} while (0)
+#define GET_H_SYS_GPR322() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR322))
+#define SET_H_SYS_GPR322(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR322), (x));\
+;} while (0)
+#define GET_H_SYS_GPR323() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR323))
+#define SET_H_SYS_GPR323(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR323), (x));\
+;} while (0)
+#define GET_H_SYS_GPR324() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR324))
+#define SET_H_SYS_GPR324(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR324), (x));\
+;} while (0)
+#define GET_H_SYS_GPR325() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR325))
+#define SET_H_SYS_GPR325(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR325), (x));\
+;} while (0)
+#define GET_H_SYS_GPR326() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR326))
+#define SET_H_SYS_GPR326(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR326), (x));\
+;} while (0)
+#define GET_H_SYS_GPR327() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR327))
+#define SET_H_SYS_GPR327(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR327), (x));\
+;} while (0)
+#define GET_H_SYS_GPR328() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR328))
+#define SET_H_SYS_GPR328(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR328), (x));\
+;} while (0)
+#define GET_H_SYS_GPR329() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR329))
+#define SET_H_SYS_GPR329(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR329), (x));\
+;} while (0)
+#define GET_H_SYS_GPR330() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR330))
+#define SET_H_SYS_GPR330(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR330), (x));\
+;} while (0)
+#define GET_H_SYS_GPR331() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR331))
+#define SET_H_SYS_GPR331(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR331), (x));\
+;} while (0)
+#define GET_H_SYS_GPR332() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR332))
+#define SET_H_SYS_GPR332(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR332), (x));\
+;} while (0)
+#define GET_H_SYS_GPR333() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR333))
+#define SET_H_SYS_GPR333(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR333), (x));\
+;} while (0)
+#define GET_H_SYS_GPR334() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR334))
+#define SET_H_SYS_GPR334(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR334), (x));\
+;} while (0)
+#define GET_H_SYS_GPR335() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR335))
+#define SET_H_SYS_GPR335(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR335), (x));\
+;} while (0)
+#define GET_H_SYS_GPR336() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR336))
+#define SET_H_SYS_GPR336(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR336), (x));\
+;} while (0)
+#define GET_H_SYS_GPR337() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR337))
+#define SET_H_SYS_GPR337(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR337), (x));\
+;} while (0)
+#define GET_H_SYS_GPR338() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR338))
+#define SET_H_SYS_GPR338(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR338), (x));\
+;} while (0)
+#define GET_H_SYS_GPR339() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR339))
+#define SET_H_SYS_GPR339(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR339), (x));\
+;} while (0)
+#define GET_H_SYS_GPR340() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR340))
+#define SET_H_SYS_GPR340(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR340), (x));\
+;} while (0)
+#define GET_H_SYS_GPR341() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR341))
+#define SET_H_SYS_GPR341(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR341), (x));\
+;} while (0)
+#define GET_H_SYS_GPR342() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR342))
+#define SET_H_SYS_GPR342(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR342), (x));\
+;} while (0)
+#define GET_H_SYS_GPR343() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR343))
+#define SET_H_SYS_GPR343(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR343), (x));\
+;} while (0)
+#define GET_H_SYS_GPR344() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR344))
+#define SET_H_SYS_GPR344(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR344), (x));\
+;} while (0)
+#define GET_H_SYS_GPR345() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR345))
+#define SET_H_SYS_GPR345(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR345), (x));\
+;} while (0)
+#define GET_H_SYS_GPR346() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR346))
+#define SET_H_SYS_GPR346(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR346), (x));\
+;} while (0)
+#define GET_H_SYS_GPR347() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR347))
+#define SET_H_SYS_GPR347(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR347), (x));\
+;} while (0)
+#define GET_H_SYS_GPR348() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR348))
+#define SET_H_SYS_GPR348(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR348), (x));\
+;} while (0)
+#define GET_H_SYS_GPR349() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR349))
+#define SET_H_SYS_GPR349(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR349), (x));\
+;} while (0)
+#define GET_H_SYS_GPR350() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR350))
+#define SET_H_SYS_GPR350(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR350), (x));\
+;} while (0)
+#define GET_H_SYS_GPR351() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR351))
+#define SET_H_SYS_GPR351(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR351), (x));\
+;} while (0)
+#define GET_H_SYS_GPR352() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR352))
+#define SET_H_SYS_GPR352(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR352), (x));\
+;} while (0)
+#define GET_H_SYS_GPR353() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR353))
+#define SET_H_SYS_GPR353(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR353), (x));\
+;} while (0)
+#define GET_H_SYS_GPR354() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR354))
+#define SET_H_SYS_GPR354(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR354), (x));\
+;} while (0)
+#define GET_H_SYS_GPR355() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR355))
+#define SET_H_SYS_GPR355(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR355), (x));\
+;} while (0)
+#define GET_H_SYS_GPR356() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR356))
+#define SET_H_SYS_GPR356(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR356), (x));\
+;} while (0)
+#define GET_H_SYS_GPR357() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR357))
+#define SET_H_SYS_GPR357(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR357), (x));\
+;} while (0)
+#define GET_H_SYS_GPR358() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR358))
+#define SET_H_SYS_GPR358(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR358), (x));\
+;} while (0)
+#define GET_H_SYS_GPR359() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR359))
+#define SET_H_SYS_GPR359(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR359), (x));\
+;} while (0)
+#define GET_H_SYS_GPR360() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR360))
+#define SET_H_SYS_GPR360(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR360), (x));\
+;} while (0)
+#define GET_H_SYS_GPR361() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR361))
+#define SET_H_SYS_GPR361(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR361), (x));\
+;} while (0)
+#define GET_H_SYS_GPR362() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR362))
+#define SET_H_SYS_GPR362(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR362), (x));\
+;} while (0)
+#define GET_H_SYS_GPR363() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR363))
+#define SET_H_SYS_GPR363(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR363), (x));\
+;} while (0)
+#define GET_H_SYS_GPR364() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR364))
+#define SET_H_SYS_GPR364(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR364), (x));\
+;} while (0)
+#define GET_H_SYS_GPR365() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR365))
+#define SET_H_SYS_GPR365(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR365), (x));\
+;} while (0)
+#define GET_H_SYS_GPR366() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR366))
+#define SET_H_SYS_GPR366(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR366), (x));\
+;} while (0)
+#define GET_H_SYS_GPR367() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR367))
+#define SET_H_SYS_GPR367(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR367), (x));\
+;} while (0)
+#define GET_H_SYS_GPR368() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR368))
+#define SET_H_SYS_GPR368(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR368), (x));\
+;} while (0)
+#define GET_H_SYS_GPR369() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR369))
+#define SET_H_SYS_GPR369(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR369), (x));\
+;} while (0)
+#define GET_H_SYS_GPR370() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR370))
+#define SET_H_SYS_GPR370(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR370), (x));\
+;} while (0)
+#define GET_H_SYS_GPR371() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR371))
+#define SET_H_SYS_GPR371(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR371), (x));\
+;} while (0)
+#define GET_H_SYS_GPR372() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR372))
+#define SET_H_SYS_GPR372(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR372), (x));\
+;} while (0)
+#define GET_H_SYS_GPR373() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR373))
+#define SET_H_SYS_GPR373(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR373), (x));\
+;} while (0)
+#define GET_H_SYS_GPR374() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR374))
+#define SET_H_SYS_GPR374(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR374), (x));\
+;} while (0)
+#define GET_H_SYS_GPR375() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR375))
+#define SET_H_SYS_GPR375(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR375), (x));\
+;} while (0)
+#define GET_H_SYS_GPR376() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR376))
+#define SET_H_SYS_GPR376(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR376), (x));\
+;} while (0)
+#define GET_H_SYS_GPR377() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR377))
+#define SET_H_SYS_GPR377(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR377), (x));\
+;} while (0)
+#define GET_H_SYS_GPR378() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR378))
+#define SET_H_SYS_GPR378(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR378), (x));\
+;} while (0)
+#define GET_H_SYS_GPR379() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR379))
+#define SET_H_SYS_GPR379(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR379), (x));\
+;} while (0)
+#define GET_H_SYS_GPR380() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR380))
+#define SET_H_SYS_GPR380(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR380), (x));\
+;} while (0)
+#define GET_H_SYS_GPR381() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR381))
+#define SET_H_SYS_GPR381(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR381), (x));\
+;} while (0)
+#define GET_H_SYS_GPR382() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR382))
+#define SET_H_SYS_GPR382(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR382), (x));\
+;} while (0)
+#define GET_H_SYS_GPR383() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR383))
+#define SET_H_SYS_GPR383(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR383), (x));\
+;} while (0)
+#define GET_H_SYS_GPR384() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR384))
+#define SET_H_SYS_GPR384(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR384), (x));\
+;} while (0)
+#define GET_H_SYS_GPR385() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR385))
+#define SET_H_SYS_GPR385(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR385), (x));\
+;} while (0)
+#define GET_H_SYS_GPR386() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR386))
+#define SET_H_SYS_GPR386(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR386), (x));\
+;} while (0)
+#define GET_H_SYS_GPR387() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR387))
+#define SET_H_SYS_GPR387(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR387), (x));\
+;} while (0)
+#define GET_H_SYS_GPR388() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR388))
+#define SET_H_SYS_GPR388(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR388), (x));\
+;} while (0)
+#define GET_H_SYS_GPR389() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR389))
+#define SET_H_SYS_GPR389(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR389), (x));\
+;} while (0)
+#define GET_H_SYS_GPR390() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR390))
+#define SET_H_SYS_GPR390(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR390), (x));\
+;} while (0)
+#define GET_H_SYS_GPR391() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR391))
+#define SET_H_SYS_GPR391(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR391), (x));\
+;} while (0)
+#define GET_H_SYS_GPR392() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR392))
+#define SET_H_SYS_GPR392(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR392), (x));\
+;} while (0)
+#define GET_H_SYS_GPR393() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR393))
+#define SET_H_SYS_GPR393(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR393), (x));\
+;} while (0)
+#define GET_H_SYS_GPR394() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR394))
+#define SET_H_SYS_GPR394(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR394), (x));\
+;} while (0)
+#define GET_H_SYS_GPR395() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR395))
+#define SET_H_SYS_GPR395(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR395), (x));\
+;} while (0)
+#define GET_H_SYS_GPR396() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR396))
+#define SET_H_SYS_GPR396(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR396), (x));\
+;} while (0)
+#define GET_H_SYS_GPR397() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR397))
+#define SET_H_SYS_GPR397(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR397), (x));\
+;} while (0)
+#define GET_H_SYS_GPR398() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR398))
+#define SET_H_SYS_GPR398(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR398), (x));\
+;} while (0)
+#define GET_H_SYS_GPR399() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR399))
+#define SET_H_SYS_GPR399(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR399), (x));\
+;} while (0)
+#define GET_H_SYS_GPR400() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR400))
+#define SET_H_SYS_GPR400(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR400), (x));\
+;} while (0)
+#define GET_H_SYS_GPR401() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR401))
+#define SET_H_SYS_GPR401(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR401), (x));\
+;} while (0)
+#define GET_H_SYS_GPR402() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR402))
+#define SET_H_SYS_GPR402(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR402), (x));\
+;} while (0)
+#define GET_H_SYS_GPR403() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR403))
+#define SET_H_SYS_GPR403(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR403), (x));\
+;} while (0)
+#define GET_H_SYS_GPR404() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR404))
+#define SET_H_SYS_GPR404(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR404), (x));\
+;} while (0)
+#define GET_H_SYS_GPR405() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR405))
+#define SET_H_SYS_GPR405(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR405), (x));\
+;} while (0)
+#define GET_H_SYS_GPR406() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR406))
+#define SET_H_SYS_GPR406(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR406), (x));\
+;} while (0)
+#define GET_H_SYS_GPR407() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR407))
+#define SET_H_SYS_GPR407(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR407), (x));\
+;} while (0)
+#define GET_H_SYS_GPR408() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR408))
+#define SET_H_SYS_GPR408(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR408), (x));\
+;} while (0)
+#define GET_H_SYS_GPR409() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR409))
+#define SET_H_SYS_GPR409(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR409), (x));\
+;} while (0)
+#define GET_H_SYS_GPR410() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR410))
+#define SET_H_SYS_GPR410(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR410), (x));\
+;} while (0)
+#define GET_H_SYS_GPR411() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR411))
+#define SET_H_SYS_GPR411(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR411), (x));\
+;} while (0)
+#define GET_H_SYS_GPR412() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR412))
+#define SET_H_SYS_GPR412(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR412), (x));\
+;} while (0)
+#define GET_H_SYS_GPR413() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR413))
+#define SET_H_SYS_GPR413(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR413), (x));\
+;} while (0)
+#define GET_H_SYS_GPR414() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR414))
+#define SET_H_SYS_GPR414(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR414), (x));\
+;} while (0)
+#define GET_H_SYS_GPR415() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR415))
+#define SET_H_SYS_GPR415(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR415), (x));\
+;} while (0)
+#define GET_H_SYS_GPR416() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR416))
+#define SET_H_SYS_GPR416(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR416), (x));\
+;} while (0)
+#define GET_H_SYS_GPR417() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR417))
+#define SET_H_SYS_GPR417(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR417), (x));\
+;} while (0)
+#define GET_H_SYS_GPR418() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR418))
+#define SET_H_SYS_GPR418(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR418), (x));\
+;} while (0)
+#define GET_H_SYS_GPR419() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR419))
+#define SET_H_SYS_GPR419(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR419), (x));\
+;} while (0)
+#define GET_H_SYS_GPR420() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR420))
+#define SET_H_SYS_GPR420(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR420), (x));\
+;} while (0)
+#define GET_H_SYS_GPR421() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR421))
+#define SET_H_SYS_GPR421(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR421), (x));\
+;} while (0)
+#define GET_H_SYS_GPR422() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR422))
+#define SET_H_SYS_GPR422(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR422), (x));\
+;} while (0)
+#define GET_H_SYS_GPR423() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR423))
+#define SET_H_SYS_GPR423(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR423), (x));\
+;} while (0)
+#define GET_H_SYS_GPR424() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR424))
+#define SET_H_SYS_GPR424(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR424), (x));\
+;} while (0)
+#define GET_H_SYS_GPR425() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR425))
+#define SET_H_SYS_GPR425(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR425), (x));\
+;} while (0)
+#define GET_H_SYS_GPR426() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR426))
+#define SET_H_SYS_GPR426(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR426), (x));\
+;} while (0)
+#define GET_H_SYS_GPR427() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR427))
+#define SET_H_SYS_GPR427(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR427), (x));\
+;} while (0)
+#define GET_H_SYS_GPR428() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR428))
+#define SET_H_SYS_GPR428(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR428), (x));\
+;} while (0)
+#define GET_H_SYS_GPR429() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR429))
+#define SET_H_SYS_GPR429(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR429), (x));\
+;} while (0)
+#define GET_H_SYS_GPR430() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR430))
+#define SET_H_SYS_GPR430(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR430), (x));\
+;} while (0)
+#define GET_H_SYS_GPR431() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR431))
+#define SET_H_SYS_GPR431(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR431), (x));\
+;} while (0)
+#define GET_H_SYS_GPR432() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR432))
+#define SET_H_SYS_GPR432(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR432), (x));\
+;} while (0)
+#define GET_H_SYS_GPR433() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR433))
+#define SET_H_SYS_GPR433(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR433), (x));\
+;} while (0)
+#define GET_H_SYS_GPR434() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR434))
+#define SET_H_SYS_GPR434(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR434), (x));\
+;} while (0)
+#define GET_H_SYS_GPR435() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR435))
+#define SET_H_SYS_GPR435(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR435), (x));\
+;} while (0)
+#define GET_H_SYS_GPR436() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR436))
+#define SET_H_SYS_GPR436(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR436), (x));\
+;} while (0)
+#define GET_H_SYS_GPR437() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR437))
+#define SET_H_SYS_GPR437(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR437), (x));\
+;} while (0)
+#define GET_H_SYS_GPR438() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR438))
+#define SET_H_SYS_GPR438(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR438), (x));\
+;} while (0)
+#define GET_H_SYS_GPR439() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR439))
+#define SET_H_SYS_GPR439(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR439), (x));\
+;} while (0)
+#define GET_H_SYS_GPR440() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR440))
+#define SET_H_SYS_GPR440(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR440), (x));\
+;} while (0)
+#define GET_H_SYS_GPR441() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR441))
+#define SET_H_SYS_GPR441(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR441), (x));\
+;} while (0)
+#define GET_H_SYS_GPR442() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR442))
+#define SET_H_SYS_GPR442(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR442), (x));\
+;} while (0)
+#define GET_H_SYS_GPR443() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR443))
+#define SET_H_SYS_GPR443(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR443), (x));\
+;} while (0)
+#define GET_H_SYS_GPR444() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR444))
+#define SET_H_SYS_GPR444(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR444), (x));\
+;} while (0)
+#define GET_H_SYS_GPR445() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR445))
+#define SET_H_SYS_GPR445(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR445), (x));\
+;} while (0)
+#define GET_H_SYS_GPR446() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR446))
+#define SET_H_SYS_GPR446(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR446), (x));\
+;} while (0)
+#define GET_H_SYS_GPR447() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR447))
+#define SET_H_SYS_GPR447(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR447), (x));\
+;} while (0)
+#define GET_H_SYS_GPR448() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR448))
+#define SET_H_SYS_GPR448(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR448), (x));\
+;} while (0)
+#define GET_H_SYS_GPR449() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR449))
+#define SET_H_SYS_GPR449(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR449), (x));\
+;} while (0)
+#define GET_H_SYS_GPR450() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR450))
+#define SET_H_SYS_GPR450(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR450), (x));\
+;} while (0)
+#define GET_H_SYS_GPR451() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR451))
+#define SET_H_SYS_GPR451(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR451), (x));\
+;} while (0)
+#define GET_H_SYS_GPR452() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR452))
+#define SET_H_SYS_GPR452(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR452), (x));\
+;} while (0)
+#define GET_H_SYS_GPR453() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR453))
+#define SET_H_SYS_GPR453(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR453), (x));\
+;} while (0)
+#define GET_H_SYS_GPR454() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR454))
+#define SET_H_SYS_GPR454(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR454), (x));\
+;} while (0)
+#define GET_H_SYS_GPR455() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR455))
+#define SET_H_SYS_GPR455(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR455), (x));\
+;} while (0)
+#define GET_H_SYS_GPR456() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR456))
+#define SET_H_SYS_GPR456(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR456), (x));\
+;} while (0)
+#define GET_H_SYS_GPR457() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR457))
+#define SET_H_SYS_GPR457(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR457), (x));\
+;} while (0)
+#define GET_H_SYS_GPR458() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR458))
+#define SET_H_SYS_GPR458(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR458), (x));\
+;} while (0)
+#define GET_H_SYS_GPR459() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR459))
+#define SET_H_SYS_GPR459(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR459), (x));\
+;} while (0)
+#define GET_H_SYS_GPR460() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR460))
+#define SET_H_SYS_GPR460(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR460), (x));\
+;} while (0)
+#define GET_H_SYS_GPR461() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR461))
+#define SET_H_SYS_GPR461(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR461), (x));\
+;} while (0)
+#define GET_H_SYS_GPR462() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR462))
+#define SET_H_SYS_GPR462(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR462), (x));\
+;} while (0)
+#define GET_H_SYS_GPR463() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR463))
+#define SET_H_SYS_GPR463(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR463), (x));\
+;} while (0)
+#define GET_H_SYS_GPR464() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR464))
+#define SET_H_SYS_GPR464(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR464), (x));\
+;} while (0)
+#define GET_H_SYS_GPR465() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR465))
+#define SET_H_SYS_GPR465(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR465), (x));\
+;} while (0)
+#define GET_H_SYS_GPR466() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR466))
+#define SET_H_SYS_GPR466(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR466), (x));\
+;} while (0)
+#define GET_H_SYS_GPR467() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR467))
+#define SET_H_SYS_GPR467(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR467), (x));\
+;} while (0)
+#define GET_H_SYS_GPR468() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR468))
+#define SET_H_SYS_GPR468(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR468), (x));\
+;} while (0)
+#define GET_H_SYS_GPR469() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR469))
+#define SET_H_SYS_GPR469(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR469), (x));\
+;} while (0)
+#define GET_H_SYS_GPR470() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR470))
+#define SET_H_SYS_GPR470(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR470), (x));\
+;} while (0)
+#define GET_H_SYS_GPR471() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR471))
+#define SET_H_SYS_GPR471(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR471), (x));\
+;} while (0)
+#define GET_H_SYS_GPR472() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR472))
+#define SET_H_SYS_GPR472(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR472), (x));\
+;} while (0)
+#define GET_H_SYS_GPR473() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR473))
+#define SET_H_SYS_GPR473(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR473), (x));\
+;} while (0)
+#define GET_H_SYS_GPR474() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR474))
+#define SET_H_SYS_GPR474(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR474), (x));\
+;} while (0)
+#define GET_H_SYS_GPR475() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR475))
+#define SET_H_SYS_GPR475(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR475), (x));\
+;} while (0)
+#define GET_H_SYS_GPR476() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR476))
+#define SET_H_SYS_GPR476(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR476), (x));\
+;} while (0)
+#define GET_H_SYS_GPR477() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR477))
+#define SET_H_SYS_GPR477(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR477), (x));\
+;} while (0)
+#define GET_H_SYS_GPR478() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR478))
+#define SET_H_SYS_GPR478(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR478), (x));\
+;} while (0)
+#define GET_H_SYS_GPR479() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR479))
+#define SET_H_SYS_GPR479(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR479), (x));\
+;} while (0)
+#define GET_H_SYS_GPR480() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR480))
+#define SET_H_SYS_GPR480(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR480), (x));\
+;} while (0)
+#define GET_H_SYS_GPR481() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR481))
+#define SET_H_SYS_GPR481(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR481), (x));\
+;} while (0)
+#define GET_H_SYS_GPR482() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR482))
+#define SET_H_SYS_GPR482(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR482), (x));\
+;} while (0)
+#define GET_H_SYS_GPR483() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR483))
+#define SET_H_SYS_GPR483(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR483), (x));\
+;} while (0)
+#define GET_H_SYS_GPR484() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR484))
+#define SET_H_SYS_GPR484(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR484), (x));\
+;} while (0)
+#define GET_H_SYS_GPR485() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR485))
+#define SET_H_SYS_GPR485(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR485), (x));\
+;} while (0)
+#define GET_H_SYS_GPR486() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR486))
+#define SET_H_SYS_GPR486(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR486), (x));\
+;} while (0)
+#define GET_H_SYS_GPR487() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR487))
+#define SET_H_SYS_GPR487(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR487), (x));\
+;} while (0)
+#define GET_H_SYS_GPR488() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR488))
+#define SET_H_SYS_GPR488(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR488), (x));\
+;} while (0)
+#define GET_H_SYS_GPR489() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR489))
+#define SET_H_SYS_GPR489(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR489), (x));\
+;} while (0)
+#define GET_H_SYS_GPR490() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR490))
+#define SET_H_SYS_GPR490(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR490), (x));\
+;} while (0)
+#define GET_H_SYS_GPR491() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR491))
+#define SET_H_SYS_GPR491(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR491), (x));\
+;} while (0)
+#define GET_H_SYS_GPR492() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR492))
+#define SET_H_SYS_GPR492(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR492), (x));\
+;} while (0)
+#define GET_H_SYS_GPR493() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR493))
+#define SET_H_SYS_GPR493(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR493), (x));\
+;} while (0)
+#define GET_H_SYS_GPR494() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR494))
+#define SET_H_SYS_GPR494(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR494), (x));\
+;} while (0)
+#define GET_H_SYS_GPR495() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR495))
+#define SET_H_SYS_GPR495(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR495), (x));\
+;} while (0)
+#define GET_H_SYS_GPR496() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR496))
+#define SET_H_SYS_GPR496(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR496), (x));\
+;} while (0)
+#define GET_H_SYS_GPR497() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR497))
+#define SET_H_SYS_GPR497(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR497), (x));\
+;} while (0)
+#define GET_H_SYS_GPR498() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR498))
+#define SET_H_SYS_GPR498(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR498), (x));\
+;} while (0)
+#define GET_H_SYS_GPR499() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR499))
+#define SET_H_SYS_GPR499(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR499), (x));\
+;} while (0)
+#define GET_H_SYS_GPR500() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR500))
+#define SET_H_SYS_GPR500(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR500), (x));\
+;} while (0)
+#define GET_H_SYS_GPR501() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR501))
+#define SET_H_SYS_GPR501(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR501), (x));\
+;} while (0)
+#define GET_H_SYS_GPR502() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR502))
+#define SET_H_SYS_GPR502(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR502), (x));\
+;} while (0)
+#define GET_H_SYS_GPR503() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR503))
+#define SET_H_SYS_GPR503(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR503), (x));\
+;} while (0)
+#define GET_H_SYS_GPR504() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR504))
+#define SET_H_SYS_GPR504(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR504), (x));\
+;} while (0)
+#define GET_H_SYS_GPR505() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR505))
+#define SET_H_SYS_GPR505(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR505), (x));\
+;} while (0)
+#define GET_H_SYS_GPR506() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR506))
+#define SET_H_SYS_GPR506(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR506), (x));\
+;} while (0)
+#define GET_H_SYS_GPR507() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR507))
+#define SET_H_SYS_GPR507(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR507), (x));\
+;} while (0)
+#define GET_H_SYS_GPR508() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR508))
+#define SET_H_SYS_GPR508(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR508), (x));\
+;} while (0)
+#define GET_H_SYS_GPR509() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR509))
+#define SET_H_SYS_GPR509(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR509), (x));\
+;} while (0)
+#define GET_H_SYS_GPR510() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR510))
+#define SET_H_SYS_GPR510(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR510), (x));\
+;} while (0)
+#define GET_H_SYS_GPR511() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR511))
+#define SET_H_SYS_GPR511(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR511), (x));\
+;} while (0)
+#define GET_H_MAC_MACLO() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACLO))
+#define SET_H_MAC_MACLO(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACLO), (x));\
+;} while (0)
+#define GET_H_MAC_MACHI() GET_H_SPR (ORDI (SLLDI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACHI))
+#define SET_H_MAC_MACHI(x) \
+do { \
+SET_H_SPR (ORDI (SLLDI (SPR_GROUP_MAC, 11), SPR_INDEX_MAC_MACHI), (x));\
+;} while (0)
+#define GET_H_SYS_VR_REV() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 5, 0)
+#define SET_H_SYS_VR_REV(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 5, 0, (x));\
+;} while (0)
+#define GET_H_SYS_VR_CFG() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 23, 16)
+#define SET_H_SYS_VR_CFG(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 23, 16, (x));\
+;} while (0)
+#define GET_H_SYS_VR_VER() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 31, 24)
+#define SET_H_SYS_VR_VER(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_VR), 31, 24, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_UP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 0, 0)
+#define SET_H_SYS_UPR_UP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 0, 0, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_DCP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 1, 1)
+#define SET_H_SYS_UPR_DCP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 1, 1, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_ICP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 2, 2)
+#define SET_H_SYS_UPR_ICP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 2, 2, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_DMP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 3, 3)
+#define SET_H_SYS_UPR_DMP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 3, 3, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_MP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 4, 4)
+#define SET_H_SYS_UPR_MP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_IMP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 5, 5)
+#define SET_H_SYS_UPR_IMP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_DUP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 6, 6)
+#define SET_H_SYS_UPR_DUP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_PCUP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 7, 7)
+#define SET_H_SYS_UPR_PCUP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_PICP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 8, 8)
+#define SET_H_SYS_UPR_PICP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_PMP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 9, 9)
+#define SET_H_SYS_UPR_PMP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_TTP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 10, 10)
+#define SET_H_SYS_UPR_TTP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_UPR_CUP() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 31, 24)
+#define SET_H_SYS_UPR_CUP(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_UPR), 31, 24, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_NSGR() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 3, 0)
+#define SET_H_SYS_CPUCFGR_NSGR(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 3, 0, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_CGF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 4, 4)
+#define SET_H_SYS_CPUCFGR_CGF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OB32S() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 5, 5)
+#define SET_H_SYS_CPUCFGR_OB32S(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OB64S() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 6, 6)
+#define SET_H_SYS_CPUCFGR_OB64S(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OF32S() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 7, 7)
+#define SET_H_SYS_CPUCFGR_OF32S(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OF64S() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 8, 8)
+#define SET_H_SYS_CPUCFGR_OF64S(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_OV64S() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 9, 9)
+#define SET_H_SYS_CPUCFGR_OV64S(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_CPUCFGR_ND() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 10, 10)
+#define SET_H_SYS_CPUCFGR_ND(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_CPUCFGR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_SR_SM() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 0, 0)
+#define SET_H_SYS_SR_SM(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 0, 0, (x));\
+;} while (0)
+#define GET_H_SYS_SR_TEE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 1, 1)
+#define SET_H_SYS_SR_TEE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 1, 1, (x));\
+;} while (0)
+#define GET_H_SYS_SR_IEE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 2, 2)
+#define SET_H_SYS_SR_IEE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 2, 2, (x));\
+;} while (0)
+#define GET_H_SYS_SR_DCE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 3, 3)
+#define SET_H_SYS_SR_DCE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 3, 3, (x));\
+;} while (0)
+#define GET_H_SYS_SR_ICE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 4, 4)
+#define SET_H_SYS_SR_ICE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_SR_DME() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 5, 5)
+#define SET_H_SYS_SR_DME(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_SR_IME() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 6, 6)
+#define SET_H_SYS_SR_IME(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_SR_LEE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 7, 7)
+#define SET_H_SYS_SR_LEE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_SR_CE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 8, 8)
+#define SET_H_SYS_SR_CE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_SR_F() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 9, 9)
+#define SET_H_SYS_SR_F(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_SR_CY() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 10, 10)
+#define SET_H_SYS_SR_CY(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_SR_OV() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 11, 11)
+#define SET_H_SYS_SR_OV(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 11, 11, (x));\
+;} while (0)
+#define GET_H_SYS_SR_OVE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 12, 12)
+#define SET_H_SYS_SR_OVE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 12, 12, (x));\
+;} while (0)
+#define GET_H_SYS_SR_DSX() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 13, 13)
+#define SET_H_SYS_SR_DSX(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 13, 13, (x));\
+;} while (0)
+#define GET_H_SYS_SR_EPH() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 14, 14)
+#define SET_H_SYS_SR_EPH(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 14, 14, (x));\
+;} while (0)
+#define GET_H_SYS_SR_FO() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 15, 15)
+#define SET_H_SYS_SR_FO(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 15, 15, (x));\
+;} while (0)
+#define GET_H_SYS_SR_SUMRA() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 16, 16)
+#define SET_H_SYS_SR_SUMRA(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 16, 16, (x));\
+;} while (0)
+#define GET_H_SYS_SR_CID() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 31, 28)
+#define SET_H_SYS_SR_CID(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_SR), 31, 28, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_FPEE() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 0, 0)
+#define SET_H_SYS_FPCSR_FPEE(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 0, 0, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_RM() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 2, 1)
+#define SET_H_SYS_FPCSR_RM(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 2, 1, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_OVF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 3, 3)
+#define SET_H_SYS_FPCSR_OVF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 3, 3, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_UNF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 4, 4)
+#define SET_H_SYS_FPCSR_UNF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 4, 4, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_SNF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 5, 5)
+#define SET_H_SYS_FPCSR_SNF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 5, 5, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_QNF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 6, 6)
+#define SET_H_SYS_FPCSR_QNF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 6, 6, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_ZF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 7, 7)
+#define SET_H_SYS_FPCSR_ZF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 7, 7, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_IXF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 8, 8)
+#define SET_H_SYS_FPCSR_IXF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 8, 8, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_IVF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 9, 9)
+#define SET_H_SYS_FPCSR_IVF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 9, 9, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_INF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 10, 10)
+#define SET_H_SYS_FPCSR_INF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 10, 10, (x));\
+;} while (0)
+#define GET_H_SYS_FPCSR_DZF() or1k64bf_h_spr_field_get_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 11, 11)
+#define SET_H_SYS_FPCSR_DZF(x) \
+do { \
+or1k64bf_h_spr_field_set_raw (current_cpu, ORDI (SLLDI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_FPCSR), 11, 11, (x));\
+;} while (0)
+
+/* Cover fns for register access. */
+UDI or1k64bf_h_pc_get (SIM_CPU *);
+void or1k64bf_h_pc_set (SIM_CPU *, UDI);
+SF or1k64bf_h_fsr_get (SIM_CPU *, UINT);
+void or1k64bf_h_fsr_set (SIM_CPU *, UINT, SF);
+DF or1k64bf_h_fdr_get (SIM_CPU *, UINT);
+void or1k64bf_h_fdr_set (SIM_CPU *, UINT, DF);
+UDI or1k64bf_h_spr_get (SIM_CPU *, UINT);
+void or1k64bf_h_spr_set (SIM_CPU *, UINT, UDI);
+UDI or1k64bf_h_gpr_get (SIM_CPU *, UINT);
+void or1k64bf_h_gpr_set (SIM_CPU *, UINT, UDI);
+UDI or1k64bf_h_sys_vr_get (SIM_CPU *);
+void or1k64bf_h_sys_vr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_dmmucfgr_get (SIM_CPU *);
+void or1k64bf_h_sys_dmmucfgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_immucfgr_get (SIM_CPU *);
+void or1k64bf_h_sys_immucfgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_dccfgr_get (SIM_CPU *);
+void or1k64bf_h_sys_dccfgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_iccfgr_get (SIM_CPU *);
+void or1k64bf_h_sys_iccfgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_dcfgr_get (SIM_CPU *);
+void or1k64bf_h_sys_dcfgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_pccfgr_get (SIM_CPU *);
+void or1k64bf_h_sys_pccfgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_npc_get (SIM_CPU *);
+void or1k64bf_h_sys_npc_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_ppc_get (SIM_CPU *);
+void or1k64bf_h_sys_ppc_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr0_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr0_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr1_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr1_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr2_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr2_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr3_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr3_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr4_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr4_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr5_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr5_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr6_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr6_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr7_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr7_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr8_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr8_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr9_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr9_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr10_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr10_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr11_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr11_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr12_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr12_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr13_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr13_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr14_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr14_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_epcr15_get (SIM_CPU *);
+void or1k64bf_h_sys_epcr15_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear0_get (SIM_CPU *);
+void or1k64bf_h_sys_eear0_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear1_get (SIM_CPU *);
+void or1k64bf_h_sys_eear1_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear2_get (SIM_CPU *);
+void or1k64bf_h_sys_eear2_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear3_get (SIM_CPU *);
+void or1k64bf_h_sys_eear3_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear4_get (SIM_CPU *);
+void or1k64bf_h_sys_eear4_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear5_get (SIM_CPU *);
+void or1k64bf_h_sys_eear5_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear6_get (SIM_CPU *);
+void or1k64bf_h_sys_eear6_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear7_get (SIM_CPU *);
+void or1k64bf_h_sys_eear7_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear8_get (SIM_CPU *);
+void or1k64bf_h_sys_eear8_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear9_get (SIM_CPU *);
+void or1k64bf_h_sys_eear9_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear10_get (SIM_CPU *);
+void or1k64bf_h_sys_eear10_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear11_get (SIM_CPU *);
+void or1k64bf_h_sys_eear11_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear12_get (SIM_CPU *);
+void or1k64bf_h_sys_eear12_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear13_get (SIM_CPU *);
+void or1k64bf_h_sys_eear13_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear14_get (SIM_CPU *);
+void or1k64bf_h_sys_eear14_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_eear15_get (SIM_CPU *);
+void or1k64bf_h_sys_eear15_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr0_get (SIM_CPU *);
+void or1k64bf_h_sys_esr0_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr1_get (SIM_CPU *);
+void or1k64bf_h_sys_esr1_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr2_get (SIM_CPU *);
+void or1k64bf_h_sys_esr2_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr3_get (SIM_CPU *);
+void or1k64bf_h_sys_esr3_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr4_get (SIM_CPU *);
+void or1k64bf_h_sys_esr4_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr5_get (SIM_CPU *);
+void or1k64bf_h_sys_esr5_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr6_get (SIM_CPU *);
+void or1k64bf_h_sys_esr6_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr7_get (SIM_CPU *);
+void or1k64bf_h_sys_esr7_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr8_get (SIM_CPU *);
+void or1k64bf_h_sys_esr8_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr9_get (SIM_CPU *);
+void or1k64bf_h_sys_esr9_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr10_get (SIM_CPU *);
+void or1k64bf_h_sys_esr10_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr11_get (SIM_CPU *);
+void or1k64bf_h_sys_esr11_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr12_get (SIM_CPU *);
+void or1k64bf_h_sys_esr12_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr13_get (SIM_CPU *);
+void or1k64bf_h_sys_esr13_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr14_get (SIM_CPU *);
+void or1k64bf_h_sys_esr14_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_esr15_get (SIM_CPU *);
+void or1k64bf_h_sys_esr15_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr0_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr0_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr1_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr1_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr2_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr2_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr3_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr3_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr4_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr4_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr5_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr5_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr6_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr6_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr7_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr7_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr8_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr8_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr9_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr9_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr10_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr10_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr11_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr11_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr12_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr12_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr13_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr13_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr14_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr14_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr15_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr15_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr16_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr16_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr17_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr17_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr18_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr18_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr19_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr19_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr20_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr20_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr21_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr21_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr22_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr22_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr23_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr23_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr24_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr24_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr25_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr25_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr26_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr26_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr27_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr27_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr28_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr28_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr29_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr29_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr30_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr30_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr31_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr31_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr32_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr32_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr33_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr33_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr34_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr34_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr35_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr35_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr36_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr36_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr37_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr37_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr38_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr38_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr39_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr39_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr40_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr40_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr41_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr41_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr42_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr42_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr43_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr43_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr44_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr44_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr45_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr45_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr46_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr46_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr47_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr47_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr48_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr48_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr49_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr49_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr50_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr50_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr51_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr51_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr52_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr52_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr53_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr53_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr54_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr54_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr55_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr55_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr56_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr56_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr57_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr57_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr58_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr58_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr59_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr59_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr60_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr60_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr61_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr61_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr62_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr62_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr63_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr63_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr64_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr64_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr65_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr65_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr66_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr66_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr67_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr67_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr68_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr68_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr69_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr69_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr70_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr70_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr71_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr71_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr72_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr72_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr73_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr73_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr74_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr74_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr75_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr75_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr76_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr76_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr77_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr77_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr78_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr78_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr79_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr79_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr80_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr80_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr81_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr81_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr82_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr82_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr83_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr83_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr84_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr84_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr85_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr85_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr86_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr86_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr87_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr87_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr88_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr88_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr89_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr89_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr90_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr90_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr91_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr91_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr92_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr92_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr93_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr93_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr94_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr94_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr95_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr95_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr96_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr96_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr97_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr97_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr98_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr98_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr99_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr99_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr100_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr100_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr101_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr101_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr102_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr102_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr103_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr103_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr104_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr104_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr105_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr105_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr106_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr106_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr107_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr107_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr108_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr108_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr109_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr109_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr110_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr110_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr111_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr111_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr112_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr112_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr113_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr113_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr114_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr114_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr115_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr115_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr116_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr116_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr117_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr117_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr118_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr118_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr119_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr119_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr120_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr120_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr121_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr121_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr122_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr122_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr123_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr123_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr124_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr124_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr125_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr125_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr126_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr126_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr127_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr127_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr128_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr128_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr129_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr129_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr130_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr130_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr131_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr131_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr132_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr132_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr133_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr133_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr134_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr134_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr135_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr135_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr136_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr136_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr137_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr137_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr138_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr138_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr139_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr139_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr140_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr140_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr141_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr141_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr142_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr142_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr143_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr143_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr144_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr144_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr145_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr145_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr146_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr146_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr147_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr147_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr148_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr148_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr149_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr149_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr150_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr150_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr151_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr151_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr152_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr152_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr153_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr153_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr154_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr154_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr155_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr155_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr156_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr156_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr157_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr157_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr158_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr158_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr159_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr159_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr160_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr160_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr161_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr161_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr162_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr162_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr163_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr163_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr164_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr164_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr165_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr165_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr166_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr166_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr167_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr167_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr168_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr168_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr169_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr169_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr170_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr170_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr171_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr171_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr172_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr172_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr173_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr173_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr174_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr174_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr175_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr175_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr176_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr176_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr177_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr177_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr178_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr178_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr179_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr179_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr180_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr180_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr181_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr181_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr182_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr182_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr183_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr183_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr184_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr184_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr185_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr185_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr186_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr186_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr187_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr187_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr188_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr188_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr189_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr189_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr190_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr190_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr191_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr191_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr192_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr192_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr193_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr193_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr194_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr194_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr195_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr195_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr196_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr196_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr197_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr197_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr198_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr198_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr199_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr199_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr200_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr200_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr201_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr201_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr202_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr202_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr203_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr203_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr204_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr204_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr205_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr205_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr206_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr206_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr207_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr207_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr208_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr208_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr209_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr209_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr210_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr210_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr211_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr211_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr212_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr212_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr213_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr213_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr214_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr214_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr215_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr215_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr216_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr216_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr217_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr217_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr218_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr218_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr219_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr219_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr220_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr220_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr221_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr221_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr222_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr222_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr223_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr223_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr224_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr224_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr225_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr225_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr226_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr226_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr227_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr227_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr228_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr228_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr229_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr229_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr230_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr230_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr231_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr231_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr232_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr232_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr233_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr233_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr234_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr234_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr235_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr235_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr236_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr236_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr237_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr237_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr238_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr238_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr239_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr239_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr240_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr240_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr241_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr241_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr242_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr242_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr243_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr243_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr244_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr244_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr245_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr245_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr246_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr246_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr247_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr247_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr248_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr248_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr249_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr249_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr250_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr250_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr251_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr251_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr252_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr252_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr253_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr253_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr254_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr254_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr255_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr255_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr256_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr256_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr257_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr257_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr258_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr258_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr259_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr259_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr260_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr260_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr261_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr261_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr262_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr262_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr263_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr263_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr264_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr264_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr265_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr265_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr266_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr266_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr267_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr267_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr268_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr268_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr269_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr269_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr270_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr270_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr271_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr271_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr272_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr272_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr273_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr273_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr274_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr274_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr275_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr275_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr276_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr276_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr277_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr277_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr278_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr278_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr279_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr279_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr280_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr280_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr281_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr281_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr282_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr282_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr283_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr283_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr284_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr284_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr285_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr285_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr286_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr286_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr287_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr287_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr288_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr288_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr289_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr289_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr290_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr290_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr291_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr291_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr292_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr292_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr293_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr293_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr294_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr294_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr295_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr295_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr296_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr296_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr297_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr297_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr298_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr298_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr299_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr299_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr300_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr300_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr301_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr301_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr302_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr302_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr303_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr303_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr304_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr304_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr305_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr305_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr306_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr306_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr307_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr307_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr308_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr308_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr309_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr309_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr310_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr310_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr311_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr311_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr312_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr312_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr313_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr313_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr314_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr314_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr315_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr315_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr316_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr316_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr317_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr317_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr318_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr318_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr319_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr319_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr320_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr320_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr321_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr321_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr322_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr322_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr323_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr323_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr324_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr324_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr325_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr325_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr326_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr326_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr327_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr327_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr328_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr328_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr329_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr329_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr330_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr330_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr331_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr331_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr332_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr332_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr333_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr333_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr334_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr334_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr335_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr335_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr336_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr336_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr337_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr337_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr338_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr338_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr339_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr339_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr340_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr340_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr341_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr341_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr342_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr342_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr343_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr343_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr344_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr344_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr345_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr345_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr346_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr346_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr347_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr347_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr348_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr348_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr349_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr349_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr350_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr350_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr351_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr351_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr352_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr352_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr353_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr353_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr354_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr354_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr355_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr355_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr356_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr356_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr357_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr357_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr358_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr358_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr359_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr359_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr360_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr360_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr361_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr361_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr362_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr362_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr363_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr363_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr364_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr364_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr365_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr365_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr366_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr366_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr367_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr367_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr368_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr368_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr369_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr369_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr370_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr370_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr371_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr371_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr372_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr372_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr373_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr373_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr374_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr374_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr375_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr375_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr376_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr376_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr377_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr377_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr378_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr378_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr379_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr379_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr380_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr380_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr381_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr381_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr382_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr382_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr383_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr383_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr384_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr384_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr385_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr385_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr386_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr386_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr387_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr387_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr388_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr388_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr389_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr389_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr390_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr390_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr391_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr391_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr392_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr392_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr393_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr393_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr394_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr394_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr395_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr395_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr396_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr396_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr397_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr397_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr398_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr398_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr399_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr399_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr400_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr400_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr401_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr401_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr402_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr402_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr403_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr403_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr404_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr404_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr405_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr405_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr406_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr406_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr407_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr407_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr408_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr408_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr409_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr409_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr410_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr410_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr411_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr411_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr412_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr412_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr413_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr413_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr414_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr414_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr415_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr415_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr416_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr416_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr417_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr417_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr418_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr418_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr419_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr419_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr420_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr420_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr421_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr421_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr422_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr422_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr423_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr423_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr424_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr424_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr425_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr425_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr426_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr426_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr427_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr427_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr428_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr428_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr429_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr429_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr430_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr430_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr431_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr431_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr432_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr432_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr433_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr433_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr434_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr434_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr435_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr435_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr436_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr436_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr437_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr437_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr438_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr438_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr439_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr439_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr440_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr440_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr441_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr441_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr442_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr442_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr443_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr443_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr444_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr444_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr445_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr445_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr446_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr446_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr447_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr447_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr448_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr448_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr449_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr449_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr450_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr450_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr451_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr451_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr452_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr452_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr453_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr453_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr454_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr454_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr455_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr455_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr456_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr456_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr457_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr457_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr458_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr458_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr459_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr459_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr460_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr460_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr461_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr461_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr462_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr462_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr463_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr463_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr464_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr464_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr465_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr465_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr466_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr466_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr467_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr467_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr468_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr468_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr469_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr469_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr470_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr470_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr471_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr471_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr472_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr472_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr473_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr473_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr474_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr474_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr475_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr475_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr476_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr476_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr477_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr477_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr478_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr478_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr479_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr479_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr480_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr480_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr481_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr481_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr482_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr482_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr483_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr483_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr484_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr484_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr485_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr485_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr486_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr486_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr487_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr487_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr488_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr488_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr489_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr489_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr490_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr490_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr491_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr491_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr492_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr492_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr493_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr493_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr494_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr494_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr495_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr495_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr496_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr496_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr497_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr497_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr498_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr498_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr499_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr499_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr500_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr500_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr501_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr501_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr502_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr502_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr503_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr503_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr504_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr504_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr505_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr505_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr506_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr506_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr507_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr507_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr508_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr508_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr509_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr509_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr510_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr510_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_gpr511_get (SIM_CPU *);
+void or1k64bf_h_sys_gpr511_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_mac_maclo_get (SIM_CPU *);
+void or1k64bf_h_mac_maclo_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_mac_machi_get (SIM_CPU *);
+void or1k64bf_h_mac_machi_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_vr_rev_get (SIM_CPU *);
+void or1k64bf_h_sys_vr_rev_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_vr_cfg_get (SIM_CPU *);
+void or1k64bf_h_sys_vr_cfg_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_vr_ver_get (SIM_CPU *);
+void or1k64bf_h_sys_vr_ver_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_up_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_up_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_dcp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_dcp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_icp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_icp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_dmp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_dmp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_mp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_mp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_imp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_imp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_dup_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_dup_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_pcup_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_pcup_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_picp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_picp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_pmp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_pmp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_ttp_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_ttp_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_upr_cup_get (SIM_CPU *);
+void or1k64bf_h_sys_upr_cup_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_nsgr_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_nsgr_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_cgf_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_cgf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_ob32s_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_ob32s_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_ob64s_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_ob64s_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_of32s_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_of32s_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_of64s_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_of64s_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_ov64s_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_ov64s_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_cpucfgr_nd_get (SIM_CPU *);
+void or1k64bf_h_sys_cpucfgr_nd_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_sm_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_sm_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_tee_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_tee_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_iee_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_iee_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_dce_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_dce_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_ice_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_ice_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_dme_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_dme_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_ime_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_ime_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_lee_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_lee_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_ce_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_ce_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_f_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_f_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_cy_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_cy_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_ov_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_ov_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_ove_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_ove_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_dsx_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_dsx_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_eph_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_eph_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_fo_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_fo_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_sumra_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_sumra_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_sr_cid_get (SIM_CPU *);
+void or1k64bf_h_sys_sr_cid_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_fpee_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_fpee_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_rm_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_rm_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_ovf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_ovf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_unf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_unf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_snf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_snf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_qnf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_qnf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_zf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_zf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_ixf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_ixf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_ivf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_ivf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_inf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_inf_set (SIM_CPU *, UDI);
+UDI or1k64bf_h_sys_fpcsr_dzf_get (SIM_CPU *);
+void or1k64bf_h_sys_fpcsr_dzf_set (SIM_CPU *, UDI);
+
+/* These must be hand-written. */
+extern CPUREG_FETCH_FN or1k64bf_fetch_register;
+extern CPUREG_STORE_FN or1k64bf_store_register;
+
+/* Instruction argument buffer. */
+
+union sem_fields {
+ struct { /* no operands */
+ int empty;
+ } sfmt_empty;
+ struct { /* */
+ IADDR i_disp26;
+ } sfmt_l_j;
+ struct { /* */
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm6;
+ } sfmt_l_slli;
+ struct { /* */
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+ } sfmt_l_sll;
+ struct { /* */
+ INT f_simm16_split;
+ UINT f_r2;
+ UINT f_r3;
+ } sfmt_l_sw;
+ struct { /* */
+ INT f_simm16;
+ UINT f_r1;
+ UINT f_r2;
+ } sfmt_l_lwz;
+ struct { /* */
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_uimm16_split;
+ } sfmt_l_mtspr;
+ struct { /* */
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm16;
+ } sfmt_l_mfspr;
+#if WITH_SCACHE_PBB
+ /* Writeback handler. */
+ struct {
+ /* Pointer to argbuf entry for insn whose results need writing back. */
+ const struct argbuf *abuf;
+ } write;
+ /* x-before handler */
+ struct {
+ /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
+ int first_p;
+ } before;
+ /* x-after handler */
+ struct {
+ int empty;
+ } after;
+ /* This entry is used to terminate each pbb. */
+ struct {
+ /* Number of insns in pbb. */
+ int insn_count;
+ /* Next pbb to execute. */
+ SCACHE *next;
+ SCACHE *branch_target;
+ } chain;
+#endif
+};
+
+/* The ARGBUF struct. */
+struct argbuf {
+ /* These are the baseclass definitions. */
+ IADDR addr;
+ const IDESC *idesc;
+ char trace_p;
+ char profile_p;
+ /* ??? Temporary hack for skip insns. */
+ char skip_count;
+ char unused;
+ /* cpu specific data follows */
+ union sem semantic;
+ int written;
+ union sem_fields fields;
+};
+
+/* A cached insn.
+
+ ??? SCACHE used to contain more than just argbuf. We could delete the
+ type entirely and always just use ARGBUF, but for future concerns and as
+ a level of abstraction it is left in. */
+
+struct scache {
+ struct argbuf argbuf;
+};
+
+/* Macros to simplify extraction, reading and semantic code.
+ These define and assign the local vars that contain the insn's fields. */
+
+#define EXTRACT_IFMT_EMPTY_VARS \
+ unsigned int length;
+#define EXTRACT_IFMT_EMPTY_CODE \
+ length = 0; \
+
+#define EXTRACT_IFMT_L_J_VARS \
+ UINT f_opcode; \
+ UDI f_disp26; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_J_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc)); \
+
+#define EXTRACT_IFMT_L_JR_VARS \
+ UINT f_opcode; \
+ UINT f_resv_25_10; \
+ UINT f_r3; \
+ UINT f_resv_10_11; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_JR_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_25_10 = EXTRACT_LSB0_UINT (insn, 32, 25, 10); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+
+#define EXTRACT_IFMT_L_TRAP_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_resv_20_5; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_TRAP_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_20_5 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_RFE_VARS \
+ UINT f_opcode; \
+ UINT f_resv_25_26; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_RFE_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_25_26 = EXTRACT_LSB0_UINT (insn, 32, 25, 26); \
+
+#define EXTRACT_IFMT_L_NOP_IMM_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_2; \
+ UINT f_resv_23_8; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_NOP_IMM_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_2 = EXTRACT_LSB0_UINT (insn, 32, 25, 2); \
+ f_resv_23_8 = EXTRACT_LSB0_UINT (insn, 32, 23, 8); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MOVHI_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_resv_20_4; \
+ UINT f_op_16_1; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MOVHI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_20_4 = EXTRACT_LSB0_UINT (insn, 32, 20, 4); \
+ f_op_16_1 = EXTRACT_LSB0_UINT (insn, 32, 16, 1); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MACRC_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_resv_20_4; \
+ UINT f_op_16_1; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MACRC_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_20_4 = EXTRACT_LSB0_UINT (insn, 32, 20, 4); \
+ f_op_16_1 = EXTRACT_LSB0_UINT (insn, 32, 16, 1); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MFSPR_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MFSPR_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MTSPR_VARS \
+ UINT f_opcode; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_imm16_25_5; \
+ UINT f_imm16_10_11; \
+ UINT f_uimm16_split; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MTSPR_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+ f_uimm16_split = ((UHI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));\
+
+#define EXTRACT_IFMT_L_LWZ_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ INT f_simm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_LWZ_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_SW_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r3; \
+ UINT f_imm16_25_5; \
+ UINT f_imm16_10_11; \
+ INT f_simm16_split; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SW_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));\
+
+#define EXTRACT_IFMT_L_SLL_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_2; \
+ UINT f_resv_5_2; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SLL_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_2 = EXTRACT_LSB0_UINT (insn, 32, 7, 2); \
+ f_resv_5_2 = EXTRACT_LSB0_UINT (insn, 32, 5, 2); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_SLLI_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_resv_15_8; \
+ UINT f_op_7_2; \
+ UINT f_uimm6; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SLLI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_resv_15_8 = EXTRACT_LSB0_UINT (insn, 32, 15, 8); \
+ f_op_7_2 = EXTRACT_LSB0_UINT (insn, 32, 7, 2); \
+ f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
+
+#define EXTRACT_IFMT_L_AND_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_7; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_AND_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_7 = EXTRACT_LSB0_UINT (insn, 32, 10, 7); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_EXTHS_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_resv_15_6; \
+ UINT f_op_9_4; \
+ UINT f_resv_5_2; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_EXTHS_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_resv_15_6 = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \
+ f_op_9_4 = EXTRACT_LSB0_UINT (insn, 32, 9, 4); \
+ f_resv_5_2 = EXTRACT_LSB0_UINT (insn, 32, 5, 2); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_CMOV_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_1; \
+ UINT f_op_9_2; \
+ UINT f_resv_7_4; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_CMOV_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_1 = EXTRACT_LSB0_UINT (insn, 32, 10, 1); \
+ f_op_9_2 = EXTRACT_LSB0_UINT (insn, 32, 9, 2); \
+ f_resv_7_4 = EXTRACT_LSB0_UINT (insn, 32, 7, 4); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_SFGTU_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_11; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SFGTU_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+
+#define EXTRACT_IFMT_L_SFGTUI_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ UINT f_uimm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SFGTUI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_SFGTSI_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ INT f_simm16; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_SFGTSI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); \
+
+#define EXTRACT_IFMT_L_MAC_VARS \
+ UINT f_opcode; \
+ UINT f_op_25_5; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_7; \
+ UINT f_op_3_4; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MAC_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_op_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_7 = EXTRACT_LSB0_UINT (insn, 32, 10, 7); \
+ f_op_3_4 = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \
+
+#define EXTRACT_IFMT_L_MACI_VARS \
+ UINT f_opcode; \
+ UINT f_resv_20_5; \
+ UINT f_r2; \
+ UINT f_imm16_25_5; \
+ UINT f_imm16_10_11; \
+ INT f_simm16_split; \
+ unsigned int length;
+#define EXTRACT_IFMT_L_MACI_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_20_5 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));\
+
+#define EXTRACT_IFMT_LF_ADD_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_ADD_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_ADD_D_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r1; \
+ UINT f_r1; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_ADD_D_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_ITOF_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_ITOF_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_FTOI_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_FTOI_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_FTOI_D_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r1; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_FTOI_D_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_EQ_S_VARS \
+ UINT f_opcode; \
+ UINT f_r1; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_EQ_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_CUST1_S_VARS \
+ UINT f_opcode; \
+ UINT f_resv_25_5; \
+ UINT f_r2; \
+ UINT f_r3; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_CUST1_S_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+#define EXTRACT_IFMT_LF_CUST1_D_VARS \
+ UINT f_opcode; \
+ UINT f_resv_25_5; \
+ UINT f_r1; \
+ UINT f_r1; \
+ UINT f_resv_10_3; \
+ UINT f_op_7_8; \
+ unsigned int length;
+#define EXTRACT_IFMT_LF_CUST1_D_CODE \
+ length = 4; \
+ f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
+ f_resv_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
+ f_resv_10_3 = EXTRACT_LSB0_UINT (insn, 32, 10, 3); \
+ f_op_7_8 = EXTRACT_LSB0_UINT (insn, 32, 7, 8); \
+
+/* Collection of various things for the trace handler to use. */
+
+typedef struct trace_record {
+ IADDR pc;
+ /* FIXME:wip */
+} TRACE_RECORD;
+
+#endif /* CPU_OR1K64BF_H */
diff --git a/sim/or1k/cpuall.h b/sim/or1k/cpuall.h
new file mode 100644
index 0000000..be6f87b
--- /dev/null
+++ b/sim/or1k/cpuall.h
@@ -0,0 +1,5 @@
+#ifndef WANT_OR1K64
+#include "cpuall32.h"
+#else
+#include "cpuall64.h"
+#endif
diff --git a/sim/or1k/cpuall32.h b/sim/or1k/cpuall32.h
new file mode 100644
index 0000000..182bc74
--- /dev/null
+++ b/sim/or1k/cpuall32.h
@@ -0,0 +1,66 @@
+/* Simulator CPU header for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K_CPUALL_H
+#define OR1K_CPUALL_H
+
+/* Include files for each cpu family. */
+
+#ifdef WANT_CPU_OR1K32BF
+#include "eng.h"
+#include "cpu.h"
+#include "decode.h"
+#endif
+
+extern const MACH or32_mach;
+extern const MACH or32nd_mach;
+
+#ifndef WANT_CPU
+/* The ARGBUF struct. */
+struct argbuf {
+ /* These are the baseclass definitions. */
+ IADDR addr;
+ const IDESC *idesc;
+ char trace_p;
+ char profile_p;
+ /* ??? Temporary hack for skip insns. */
+ char skip_count;
+ char unused;
+ /* cpu specific data follows */
+};
+#endif
+
+#ifndef WANT_CPU
+/* A cached insn.
+
+ ??? SCACHE used to contain more than just argbuf. We could delete the
+ type entirely and always just use ARGBUF, but for future concerns and as
+ a level of abstraction it is left in. */
+
+struct scache {
+ struct argbuf argbuf;
+};
+#endif
+
+#endif /* OR1K_CPUALL_H */
diff --git a/sim/or1k/cpuall64.h b/sim/or1k/cpuall64.h
new file mode 100644
index 0000000..8207d8b
--- /dev/null
+++ b/sim/or1k/cpuall64.h
@@ -0,0 +1,66 @@
+/* Simulator CPU header for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K_CPUALL_H
+#define OR1K_CPUALL_H
+
+/* Include files for each cpu family. */
+
+#ifdef WANT_CPU_OR1K64BF
+#include "eng64.h"
+#include "cpu64.h"
+#include "decode64.h"
+#endif
+
+extern const MACH or64_mach;
+extern const MACH or64nd_mach;
+
+#ifndef WANT_CPU
+/* The ARGBUF struct. */
+struct argbuf {
+ /* These are the baseclass definitions. */
+ IADDR addr;
+ const IDESC *idesc;
+ char trace_p;
+ char profile_p;
+ /* ??? Temporary hack for skip insns. */
+ char skip_count;
+ char unused;
+ /* cpu specific data follows */
+};
+#endif
+
+#ifndef WANT_CPU
+/* A cached insn.
+
+ ??? SCACHE used to contain more than just argbuf. We could delete the
+ type entirely and always just use ARGBUF, but for future concerns and as
+ a level of abstraction it is left in. */
+
+struct scache {
+ struct argbuf argbuf;
+};
+#endif
+
+#endif /* OR1K_CPUALL_H */
diff --git a/sim/or1k/decode.h b/sim/or1k/decode.h
new file mode 100644
index 0000000..fe96fbb
--- /dev/null
+++ b/sim/or1k/decode.h
@@ -0,0 +1,5 @@
+#ifndef WANT_OR1K64
+#include "decode32.h"
+#else
+#include "decode64.h"
+#endif
diff --git a/sim/or1k/decode32.c b/sim/or1k/decode32.c
new file mode 100644
index 0000000..b04bfb4
--- /dev/null
+++ b/sim/or1k/decode32.c
@@ -0,0 +1,2460 @@
+/* Simulator instruction decoder for or1k32bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k32bf
+#define WANT_CPU_OR1K32BF
+
+#include "sim-main.h"
+#include "sim-assert.h"
+
+/* The instruction descriptor array.
+ This is computed@runtime. Space for it is not malloc'd to save a
+ teensy bit of cpu in the decoder. Moving it to malloc space is trivial
+ but won't be done until necessary (we don't currently support the runtime
+ addition of instructions nor an SMP machine with different cpus). */
+static IDESC or1k32bf_insn_data[OR1K32BF_INSN__MAX];
+
+/* Commas between elements are contained in the macros.
+ Some of these are conditionally compiled out. */
+
+static const struct insn_sem or1k32bf_insn_sem[] =
+{
+ { VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_AFTER, OR1K32BF_INSN_X_AFTER, OR1K32BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_BEFORE, OR1K32BF_INSN_X_BEFORE, OR1K32BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_CTI_CHAIN, OR1K32BF_INSN_X_CTI_CHAIN, OR1K32BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_CHAIN, OR1K32BF_INSN_X_CHAIN, OR1K32BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_BEGIN, OR1K32BF_INSN_X_BEGIN, OR1K32BF_SFMT_EMPTY },
+ { OR1K_INSN_L_J, OR1K32BF_INSN_L_J, OR1K32BF_SFMT_L_J },
+ { OR1K_INSN_L_JAL, OR1K32BF_INSN_L_JAL, OR1K32BF_SFMT_L_JAL },
+ { OR1K_INSN_L_JR, OR1K32BF_INSN_L_JR, OR1K32BF_SFMT_L_JR },
+ { OR1K_INSN_L_JALR, OR1K32BF_INSN_L_JALR, OR1K32BF_SFMT_L_JALR },
+ { OR1K_INSN_L_BNF, OR1K32BF_INSN_L_BNF, OR1K32BF_SFMT_L_BNF },
+ { OR1K_INSN_L_BF, OR1K32BF_INSN_L_BF, OR1K32BF_SFMT_L_BNF },
+ { OR1K_INSN_L_TRAP, OR1K32BF_INSN_L_TRAP, OR1K32BF_SFMT_L_TRAP },
+ { OR1K_INSN_L_SYS, OR1K32BF_INSN_L_SYS, OR1K32BF_SFMT_L_TRAP },
+ { OR1K_INSN_L_RFE, OR1K32BF_INSN_L_RFE, OR1K32BF_SFMT_L_TRAP },
+ { OR1K_INSN_L_NOP_IMM, OR1K32BF_INSN_L_NOP_IMM, OR1K32BF_SFMT_L_NOP_IMM },
+ { OR1K_INSN_L_MOVHI, OR1K32BF_INSN_L_MOVHI, OR1K32BF_SFMT_L_MOVHI },
+ { OR1K_INSN_L_MACRC, OR1K32BF_INSN_L_MACRC, OR1K32BF_SFMT_L_MACRC },
+ { OR1K_INSN_L_MFSPR, OR1K32BF_INSN_L_MFSPR, OR1K32BF_SFMT_L_MFSPR },
+ { OR1K_INSN_L_MTSPR, OR1K32BF_INSN_L_MTSPR, OR1K32BF_SFMT_L_MTSPR },
+ { OR1K_INSN_L_LWZ, OR1K32BF_INSN_L_LWZ, OR1K32BF_SFMT_L_LWZ },
+ { OR1K_INSN_L_LWS, OR1K32BF_INSN_L_LWS, OR1K32BF_SFMT_L_LWS },
+ { OR1K_INSN_L_LBZ, OR1K32BF_INSN_L_LBZ, OR1K32BF_SFMT_L_LBZ },
+ { OR1K_INSN_L_LBS, OR1K32BF_INSN_L_LBS, OR1K32BF_SFMT_L_LBS },
+ { OR1K_INSN_L_LHZ, OR1K32BF_INSN_L_LHZ, OR1K32BF_SFMT_L_LHZ },
+ { OR1K_INSN_L_LHS, OR1K32BF_INSN_L_LHS, OR1K32BF_SFMT_L_LHS },
+ { OR1K_INSN_L_SW, OR1K32BF_INSN_L_SW, OR1K32BF_SFMT_L_SW },
+ { OR1K_INSN_L_SB, OR1K32BF_INSN_L_SB, OR1K32BF_SFMT_L_SB },
+ { OR1K_INSN_L_SH, OR1K32BF_INSN_L_SH, OR1K32BF_SFMT_L_SH },
+ { OR1K_INSN_L_SLL, OR1K32BF_INSN_L_SLL, OR1K32BF_SFMT_L_SLL },
+ { OR1K_INSN_L_SLLI, OR1K32BF_INSN_L_SLLI, OR1K32BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_SRL, OR1K32BF_INSN_L_SRL, OR1K32BF_SFMT_L_SLL },
+ { OR1K_INSN_L_SRLI, OR1K32BF_INSN_L_SRLI, OR1K32BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_SRA, OR1K32BF_INSN_L_SRA, OR1K32BF_SFMT_L_SLL },
+ { OR1K_INSN_L_SRAI, OR1K32BF_INSN_L_SRAI, OR1K32BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_ROR, OR1K32BF_INSN_L_ROR, OR1K32BF_SFMT_L_SLL },
+ { OR1K_INSN_L_RORI, OR1K32BF_INSN_L_RORI, OR1K32BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_AND, OR1K32BF_INSN_L_AND, OR1K32BF_SFMT_L_AND },
+ { OR1K_INSN_L_OR, OR1K32BF_INSN_L_OR, OR1K32BF_SFMT_L_AND },
+ { OR1K_INSN_L_XOR, OR1K32BF_INSN_L_XOR, OR1K32BF_SFMT_L_AND },
+ { OR1K_INSN_L_ADD, OR1K32BF_INSN_L_ADD, OR1K32BF_SFMT_L_ADD },
+ { OR1K_INSN_L_SUB, OR1K32BF_INSN_L_SUB, OR1K32BF_SFMT_L_ADD },
+ { OR1K_INSN_L_ADDC, OR1K32BF_INSN_L_ADDC, OR1K32BF_SFMT_L_ADDC },
+ { OR1K_INSN_L_MUL, OR1K32BF_INSN_L_MUL, OR1K32BF_SFMT_L_ADD },
+ { OR1K_INSN_L_MULU, OR1K32BF_INSN_L_MULU, OR1K32BF_SFMT_L_ADD },
+ { OR1K_INSN_L_DIV, OR1K32BF_INSN_L_DIV, OR1K32BF_SFMT_L_DIV },
+ { OR1K_INSN_L_DIVU, OR1K32BF_INSN_L_DIVU, OR1K32BF_SFMT_L_DIV },
+ { OR1K_INSN_L_FF1, OR1K32BF_INSN_L_FF1, OR1K32BF_SFMT_L_FF1 },
+ { OR1K_INSN_L_FL1, OR1K32BF_INSN_L_FL1, OR1K32BF_SFMT_L_FF1 },
+ { OR1K_INSN_L_ANDI, OR1K32BF_INSN_L_ANDI, OR1K32BF_SFMT_L_ANDI },
+ { OR1K_INSN_L_ORI, OR1K32BF_INSN_L_ORI, OR1K32BF_SFMT_L_ANDI },
+ { OR1K_INSN_L_XORI, OR1K32BF_INSN_L_XORI, OR1K32BF_SFMT_L_XORI },
+ { OR1K_INSN_L_ADDI, OR1K32BF_INSN_L_ADDI, OR1K32BF_SFMT_L_ADDI },
+ { OR1K_INSN_L_ADDIC, OR1K32BF_INSN_L_ADDIC, OR1K32BF_SFMT_L_ADDIC },
+ { OR1K_INSN_L_MULI, OR1K32BF_INSN_L_MULI, OR1K32BF_SFMT_L_ADDI },
+ { OR1K_INSN_L_EXTHS, OR1K32BF_INSN_L_EXTHS, OR1K32BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTBS, OR1K32BF_INSN_L_EXTBS, OR1K32BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTHZ, OR1K32BF_INSN_L_EXTHZ, OR1K32BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTBZ, OR1K32BF_INSN_L_EXTBZ, OR1K32BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTWS, OR1K32BF_INSN_L_EXTWS, OR1K32BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTWZ, OR1K32BF_INSN_L_EXTWZ, OR1K32BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_CMOV, OR1K32BF_INSN_L_CMOV, OR1K32BF_SFMT_L_CMOV },
+ { OR1K_INSN_L_SFGTU, OR1K32BF_INSN_L_SFGTU, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGEU, OR1K32BF_INSN_L_SFGEU, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLTU, OR1K32BF_INSN_L_SFLTU, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLEU, OR1K32BF_INSN_L_SFLEU, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGTS, OR1K32BF_INSN_L_SFGTS, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGES, OR1K32BF_INSN_L_SFGES, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLTS, OR1K32BF_INSN_L_SFLTS, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLES, OR1K32BF_INSN_L_SFLES, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGTUI, OR1K32BF_INSN_L_SFGTUI, OR1K32BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFGEUI, OR1K32BF_INSN_L_SFGEUI, OR1K32BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFLTUI, OR1K32BF_INSN_L_SFLTUI, OR1K32BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFLEUI, OR1K32BF_INSN_L_SFLEUI, OR1K32BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFGTSI, OR1K32BF_INSN_L_SFGTSI, OR1K32BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFGESI, OR1K32BF_INSN_L_SFGESI, OR1K32BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFLTSI, OR1K32BF_INSN_L_SFLTSI, OR1K32BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFLESI, OR1K32BF_INSN_L_SFLESI, OR1K32BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFEQ, OR1K32BF_INSN_L_SFEQ, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFEQI, OR1K32BF_INSN_L_SFEQI, OR1K32BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFNE, OR1K32BF_INSN_L_SFNE, OR1K32BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFNEI, OR1K32BF_INSN_L_SFNEI, OR1K32BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_MAC, OR1K32BF_INSN_L_MAC, OR1K32BF_SFMT_L_MAC },
+ { OR1K_INSN_L_MSB, OR1K32BF_INSN_L_MSB, OR1K32BF_SFMT_L_MAC },
+ { OR1K_INSN_L_MACI, OR1K32BF_INSN_L_MACI, OR1K32BF_SFMT_L_MACI },
+ { OR1K_INSN_L_CUST1, OR1K32BF_INSN_L_CUST1, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST2, OR1K32BF_INSN_L_CUST2, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST3, OR1K32BF_INSN_L_CUST3, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST4, OR1K32BF_INSN_L_CUST4, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST5, OR1K32BF_INSN_L_CUST5, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST6, OR1K32BF_INSN_L_CUST6, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST7, OR1K32BF_INSN_L_CUST7, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST8, OR1K32BF_INSN_L_CUST8, OR1K32BF_SFMT_L_CUST1 },
+ { OR1K_INSN_LF_ADD_S, OR1K32BF_INSN_LF_ADD_S, OR1K32BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_SUB_S, OR1K32BF_INSN_LF_SUB_S, OR1K32BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_MUL_S, OR1K32BF_INSN_LF_MUL_S, OR1K32BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_DIV_S, OR1K32BF_INSN_LF_DIV_S, OR1K32BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_REM_S, OR1K32BF_INSN_LF_REM_S, OR1K32BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_ITOF_S, OR1K32BF_INSN_LF_ITOF_S, OR1K32BF_SFMT_LF_ITOF_S },
+ { OR1K_INSN_LF_FTOI_S, OR1K32BF_INSN_LF_FTOI_S, OR1K32BF_SFMT_LF_FTOI_S },
+ { OR1K_INSN_LF_EQ_S, OR1K32BF_INSN_LF_EQ_S, OR1K32BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_NE_S, OR1K32BF_INSN_LF_NE_S, OR1K32BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_GE_S, OR1K32BF_INSN_LF_GE_S, OR1K32BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_GT_S, OR1K32BF_INSN_LF_GT_S, OR1K32BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_LT_S, OR1K32BF_INSN_LF_LT_S, OR1K32BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_LE_S, OR1K32BF_INSN_LF_LE_S, OR1K32BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_MADD_S, OR1K32BF_INSN_LF_MADD_S, OR1K32BF_SFMT_LF_MADD_S },
+ { OR1K_INSN_LF_CUST1_S, OR1K32BF_INSN_LF_CUST1_S, OR1K32BF_SFMT_L_CUST1 },
+};
+
+static const struct insn_sem or1k32bf_insn_sem_invalid =
+{
+ VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY
+};
+
+/* Initialize an IDESC from the compile-time computable parts. */
+
+static INLINE void
+init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
+{
+ const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
+
+ id->num = t->index;
+ id->sfmt = t->sfmt;
+ if ((int) t->type <= 0)
+ id->idata = & cgen_virtual_insn_table[- (int) t->type];
+ else
+ id->idata = & insn_table[t->type];
+ id->attrs = CGEN_INSN_ATTRS (id->idata);
+ /* Oh my god, a magic number. */
+ id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
+
+#if WITH_PROFILE_MODEL_P
+ id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
+ {
+ SIM_DESC sd = CPU_STATE (cpu);
+ SIM_ASSERT (t->index == id->timing->num);
+ }
+#endif
+
+ /* Semantic pointers are initialized elsewhere. */
+}
+
+/* Initialize the instruction descriptor table. */
+
+void
+or1k32bf_init_idesc_table (SIM_CPU *cpu)
+{
+ IDESC *id,*tabend;
+ const struct insn_sem *t,*tend;
+ int tabsize = OR1K32BF_INSN__MAX;
+ IDESC *table = or1k32bf_insn_data;
+
+ memset (table, 0, tabsize * sizeof (IDESC));
+
+ /* First set all entries to the `invalid insn'. */
+ t = & or1k32bf_insn_sem_invalid;
+ for (id = table, tabend = table + tabsize; id < tabend; ++id)
+ init_idesc (cpu, id, t);
+
+ /* Now fill in the values for the chosen cpu. */
+ for (t = or1k32bf_insn_sem, tend = t + sizeof (or1k32bf_insn_sem) / sizeof (*t);
+ t != tend; ++t)
+ {
+ init_idesc (cpu, & table[t->index], t);
+ }
+
+ /* Link the IDESC table into the cpu. */
+ CPU_IDESC (cpu) = table;
+}
+
+/* Given an instruction, return a pointer to its IDESC entry. */
+
+const IDESC *
+or1k32bf_decode (SIM_CPU *current_cpu, IADDR pc,
+ CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn,
+ ARGBUF *abuf)
+{
+ /* Result of decoder. */
+ OR1K32BF_INSN_TYPE itype;
+
+ {
+ CGEN_INSN_WORD insn = base_insn;
+
+ {
+ unsigned int val = (((insn >> 21) & (63 << 5)) | ((insn >> 2) & (1 << 4)) | ((insn >> 0) & (15 << 0)));
+ switch (val)
+ {
+ case 0 : /* fall through */
+ case 1 : /* fall through */
+ case 2 : /* fall through */
+ case 3 : /* fall through */
+ case 4 : /* fall through */
+ case 5 : /* fall through */
+ case 6 : /* fall through */
+ case 7 : /* fall through */
+ case 8 : /* fall through */
+ case 9 : /* fall through */
+ case 10 : /* fall through */
+ case 11 : /* fall through */
+ case 12 : /* fall through */
+ case 13 : /* fall through */
+ case 14 : /* fall through */
+ case 15 : /* fall through */
+ case 16 : /* fall through */
+ case 17 : /* fall through */
+ case 18 : /* fall through */
+ case 19 : /* fall through */
+ case 20 : /* fall through */
+ case 21 : /* fall through */
+ case 22 : /* fall through */
+ case 23 : /* fall through */
+ case 24 : /* fall through */
+ case 25 : /* fall through */
+ case 26 : /* fall through */
+ case 27 : /* fall through */
+ case 28 : /* fall through */
+ case 29 : /* fall through */
+ case 30 : /* fall through */
+ case 31 : itype = OR1K32BF_INSN_L_J; goto extract_sfmt_l_j;
+ case 32 : /* fall through */
+ case 33 : /* fall through */
+ case 34 : /* fall through */
+ case 35 : /* fall through */
+ case 36 : /* fall through */
+ case 37 : /* fall through */
+ case 38 : /* fall through */
+ case 39 : /* fall through */
+ case 40 : /* fall through */
+ case 41 : /* fall through */
+ case 42 : /* fall through */
+ case 43 : /* fall through */
+ case 44 : /* fall through */
+ case 45 : /* fall through */
+ case 46 : /* fall through */
+ case 47 : /* fall through */
+ case 48 : /* fall through */
+ case 49 : /* fall through */
+ case 50 : /* fall through */
+ case 51 : /* fall through */
+ case 52 : /* fall through */
+ case 53 : /* fall through */
+ case 54 : /* fall through */
+ case 55 : /* fall through */
+ case 56 : /* fall through */
+ case 57 : /* fall through */
+ case 58 : /* fall through */
+ case 59 : /* fall through */
+ case 60 : /* fall through */
+ case 61 : /* fall through */
+ case 62 : /* fall through */
+ case 63 : itype = OR1K32BF_INSN_L_JAL; goto extract_sfmt_l_jal;
+ case 96 : /* fall through */
+ case 97 : /* fall through */
+ case 98 : /* fall through */
+ case 99 : /* fall through */
+ case 100 : /* fall through */
+ case 101 : /* fall through */
+ case 102 : /* fall through */
+ case 103 : /* fall through */
+ case 104 : /* fall through */
+ case 105 : /* fall through */
+ case 106 : /* fall through */
+ case 107 : /* fall through */
+ case 108 : /* fall through */
+ case 109 : /* fall through */
+ case 110 : /* fall through */
+ case 111 : /* fall through */
+ case 112 : /* fall through */
+ case 113 : /* fall through */
+ case 114 : /* fall through */
+ case 115 : /* fall through */
+ case 116 : /* fall through */
+ case 117 : /* fall through */
+ case 118 : /* fall through */
+ case 119 : /* fall through */
+ case 120 : /* fall through */
+ case 121 : /* fall through */
+ case 122 : /* fall through */
+ case 123 : /* fall through */
+ case 124 : /* fall through */
+ case 125 : /* fall through */
+ case 126 : /* fall through */
+ case 127 : itype = OR1K32BF_INSN_L_BNF; goto extract_sfmt_l_bnf;
+ case 128 : /* fall through */
+ case 129 : /* fall through */
+ case 130 : /* fall through */
+ case 131 : /* fall through */
+ case 132 : /* fall through */
+ case 133 : /* fall through */
+ case 134 : /* fall through */
+ case 135 : /* fall through */
+ case 136 : /* fall through */
+ case 137 : /* fall through */
+ case 138 : /* fall through */
+ case 139 : /* fall through */
+ case 140 : /* fall through */
+ case 141 : /* fall through */
+ case 142 : /* fall through */
+ case 143 : /* fall through */
+ case 144 : /* fall through */
+ case 145 : /* fall through */
+ case 146 : /* fall through */
+ case 147 : /* fall through */
+ case 148 : /* fall through */
+ case 149 : /* fall through */
+ case 150 : /* fall through */
+ case 151 : /* fall through */
+ case 152 : /* fall through */
+ case 153 : /* fall through */
+ case 154 : /* fall through */
+ case 155 : /* fall through */
+ case 156 : /* fall through */
+ case 157 : /* fall through */
+ case 158 : /* fall through */
+ case 159 : itype = OR1K32BF_INSN_L_BF; goto extract_sfmt_l_bnf;
+ case 160 : /* fall through */
+ case 161 : /* fall through */
+ case 162 : /* fall through */
+ case 163 : /* fall through */
+ case 164 : /* fall through */
+ case 165 : /* fall through */
+ case 166 : /* fall through */
+ case 167 : /* fall through */
+ case 168 : /* fall through */
+ case 169 : /* fall through */
+ case 170 : /* fall through */
+ case 171 : /* fall through */
+ case 172 : /* fall through */
+ case 173 : /* fall through */
+ case 174 : /* fall through */
+ case 175 : /* fall through */
+ case 176 : /* fall through */
+ case 177 : /* fall through */
+ case 178 : /* fall through */
+ case 179 : /* fall through */
+ case 180 : /* fall through */
+ case 181 : /* fall through */
+ case 182 : /* fall through */
+ case 183 : /* fall through */
+ case 184 : /* fall through */
+ case 185 : /* fall through */
+ case 186 : /* fall through */
+ case 187 : /* fall through */
+ case 188 : /* fall through */
+ case 189 : /* fall through */
+ case 190 : /* fall through */
+ case 191 :
+ if ((entire_insn & 0xffff0000) == 0x15000000)
+ { itype = OR1K32BF_INSN_L_NOP_IMM; goto extract_sfmt_l_nop_imm; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 192 :
+ {
+ unsigned int val = (((insn >> 16) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc1f0000) == 0x18000000)
+ { itype = OR1K32BF_INSN_L_MOVHI; goto extract_sfmt_l_movhi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc1fffff) == 0x18010000)
+ { itype = OR1K32BF_INSN_L_MACRC; goto extract_sfmt_l_macrc; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 193 : /* fall through */
+ case 194 : /* fall through */
+ case 195 : /* fall through */
+ case 196 : /* fall through */
+ case 197 : /* fall through */
+ case 198 : /* fall through */
+ case 199 : /* fall through */
+ case 200 : /* fall through */
+ case 201 : /* fall through */
+ case 202 : /* fall through */
+ case 203 : /* fall through */
+ case 204 : /* fall through */
+ case 205 : /* fall through */
+ case 206 : /* fall through */
+ case 207 : /* fall through */
+ case 208 : /* fall through */
+ case 209 : /* fall through */
+ case 210 : /* fall through */
+ case 211 : /* fall through */
+ case 212 : /* fall through */
+ case 213 : /* fall through */
+ case 214 : /* fall through */
+ case 215 : /* fall through */
+ case 216 : /* fall through */
+ case 217 : /* fall through */
+ case 218 : /* fall through */
+ case 219 : /* fall through */
+ case 220 : /* fall through */
+ case 221 : /* fall through */
+ case 222 : /* fall through */
+ case 223 :
+ if ((entire_insn & 0xfc1f0000) == 0x18000000)
+ { itype = OR1K32BF_INSN_L_MOVHI; goto extract_sfmt_l_movhi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 256 : /* fall through */
+ case 257 : /* fall through */
+ case 258 : /* fall through */
+ case 259 : /* fall through */
+ case 260 : /* fall through */
+ case 261 : /* fall through */
+ case 262 : /* fall through */
+ case 263 : /* fall through */
+ case 264 : /* fall through */
+ case 265 : /* fall through */
+ case 266 : /* fall through */
+ case 267 : /* fall through */
+ case 268 : /* fall through */
+ case 269 : /* fall through */
+ case 270 : /* fall through */
+ case 271 : /* fall through */
+ case 272 : /* fall through */
+ case 273 : /* fall through */
+ case 274 : /* fall through */
+ case 275 : /* fall through */
+ case 276 : /* fall through */
+ case 277 : /* fall through */
+ case 278 : /* fall through */
+ case 279 : /* fall through */
+ case 280 : /* fall through */
+ case 281 : /* fall through */
+ case 282 : /* fall through */
+ case 283 : /* fall through */
+ case 284 : /* fall through */
+ case 285 : /* fall through */
+ case 286 : /* fall through */
+ case 287 :
+ {
+ unsigned int val = (((insn >> 24) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xffff0000) == 0x20000000)
+ { itype = OR1K32BF_INSN_L_SYS; goto extract_sfmt_l_trap; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xffff0000) == 0x21000000)
+ { itype = OR1K32BF_INSN_L_TRAP; goto extract_sfmt_l_trap; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 288 :
+ if ((entire_insn & 0xffffffff) == 0x24000000)
+ { itype = OR1K32BF_INSN_L_RFE; goto extract_sfmt_l_trap; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 544 :
+ if ((entire_insn & 0xffff07ff) == 0x44000000)
+ { itype = OR1K32BF_INSN_L_JR; goto extract_sfmt_l_jr; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 576 :
+ if ((entire_insn & 0xffff07ff) == 0x48000000)
+ { itype = OR1K32BF_INSN_L_JALR; goto extract_sfmt_l_jalr; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 608 : /* fall through */
+ case 609 : /* fall through */
+ case 610 : /* fall through */
+ case 611 : /* fall through */
+ case 612 : /* fall through */
+ case 613 : /* fall through */
+ case 614 : /* fall through */
+ case 615 : /* fall through */
+ case 616 : /* fall through */
+ case 617 : /* fall through */
+ case 618 : /* fall through */
+ case 619 : /* fall through */
+ case 620 : /* fall through */
+ case 621 : /* fall through */
+ case 622 : /* fall through */
+ case 623 : /* fall through */
+ case 624 : /* fall through */
+ case 625 : /* fall through */
+ case 626 : /* fall through */
+ case 627 : /* fall through */
+ case 628 : /* fall through */
+ case 629 : /* fall through */
+ case 630 : /* fall through */
+ case 631 : /* fall through */
+ case 632 : /* fall through */
+ case 633 : /* fall through */
+ case 634 : /* fall through */
+ case 635 : /* fall through */
+ case 636 : /* fall through */
+ case 637 : /* fall through */
+ case 638 : /* fall through */
+ case 639 :
+ if ((entire_insn & 0xfc1f0000) == 0x4c000000)
+ { itype = OR1K32BF_INSN_L_MACI; goto extract_sfmt_l_maci; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 896 :
+ if ((entire_insn & 0xffffffff) == 0x70000000)
+ { itype = OR1K32BF_INSN_L_CUST1; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 928 :
+ if ((entire_insn & 0xffffffff) == 0x74000000)
+ { itype = OR1K32BF_INSN_L_CUST2; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 960 :
+ if ((entire_insn & 0xffffffff) == 0x78000000)
+ { itype = OR1K32BF_INSN_L_CUST3; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 992 :
+ if ((entire_insn & 0xffffffff) == 0x7c000000)
+ { itype = OR1K32BF_INSN_L_CUST4; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1056 : /* fall through */
+ case 1057 : /* fall through */
+ case 1058 : /* fall through */
+ case 1059 : /* fall through */
+ case 1060 : /* fall through */
+ case 1061 : /* fall through */
+ case 1062 : /* fall through */
+ case 1063 : /* fall through */
+ case 1064 : /* fall through */
+ case 1065 : /* fall through */
+ case 1066 : /* fall through */
+ case 1067 : /* fall through */
+ case 1068 : /* fall through */
+ case 1069 : /* fall through */
+ case 1070 : /* fall through */
+ case 1071 : /* fall through */
+ case 1072 : /* fall through */
+ case 1073 : /* fall through */
+ case 1074 : /* fall through */
+ case 1075 : /* fall through */
+ case 1076 : /* fall through */
+ case 1077 : /* fall through */
+ case 1078 : /* fall through */
+ case 1079 : /* fall through */
+ case 1080 : /* fall through */
+ case 1081 : /* fall through */
+ case 1082 : /* fall through */
+ case 1083 : /* fall through */
+ case 1084 : /* fall through */
+ case 1085 : /* fall through */
+ case 1086 : /* fall through */
+ case 1087 : itype = OR1K32BF_INSN_L_LWZ; goto extract_sfmt_l_lwz;
+ case 1088 : /* fall through */
+ case 1089 : /* fall through */
+ case 1090 : /* fall through */
+ case 1091 : /* fall through */
+ case 1092 : /* fall through */
+ case 1093 : /* fall through */
+ case 1094 : /* fall through */
+ case 1095 : /* fall through */
+ case 1096 : /* fall through */
+ case 1097 : /* fall through */
+ case 1098 : /* fall through */
+ case 1099 : /* fall through */
+ case 1100 : /* fall through */
+ case 1101 : /* fall through */
+ case 1102 : /* fall through */
+ case 1103 : /* fall through */
+ case 1104 : /* fall through */
+ case 1105 : /* fall through */
+ case 1106 : /* fall through */
+ case 1107 : /* fall through */
+ case 1108 : /* fall through */
+ case 1109 : /* fall through */
+ case 1110 : /* fall through */
+ case 1111 : /* fall through */
+ case 1112 : /* fall through */
+ case 1113 : /* fall through */
+ case 1114 : /* fall through */
+ case 1115 : /* fall through */
+ case 1116 : /* fall through */
+ case 1117 : /* fall through */
+ case 1118 : /* fall through */
+ case 1119 : itype = OR1K32BF_INSN_L_LWS; goto extract_sfmt_l_lws;
+ case 1120 : /* fall through */
+ case 1121 : /* fall through */
+ case 1122 : /* fall through */
+ case 1123 : /* fall through */
+ case 1124 : /* fall through */
+ case 1125 : /* fall through */
+ case 1126 : /* fall through */
+ case 1127 : /* fall through */
+ case 1128 : /* fall through */
+ case 1129 : /* fall through */
+ case 1130 : /* fall through */
+ case 1131 : /* fall through */
+ case 1132 : /* fall through */
+ case 1133 : /* fall through */
+ case 1134 : /* fall through */
+ case 1135 : /* fall through */
+ case 1136 : /* fall through */
+ case 1137 : /* fall through */
+ case 1138 : /* fall through */
+ case 1139 : /* fall through */
+ case 1140 : /* fall through */
+ case 1141 : /* fall through */
+ case 1142 : /* fall through */
+ case 1143 : /* fall through */
+ case 1144 : /* fall through */
+ case 1145 : /* fall through */
+ case 1146 : /* fall through */
+ case 1147 : /* fall through */
+ case 1148 : /* fall through */
+ case 1149 : /* fall through */
+ case 1150 : /* fall through */
+ case 1151 : itype = OR1K32BF_INSN_L_LBZ; goto extract_sfmt_l_lbz;
+ case 1152 : /* fall through */
+ case 1153 : /* fall through */
+ case 1154 : /* fall through */
+ case 1155 : /* fall through */
+ case 1156 : /* fall through */
+ case 1157 : /* fall through */
+ case 1158 : /* fall through */
+ case 1159 : /* fall through */
+ case 1160 : /* fall through */
+ case 1161 : /* fall through */
+ case 1162 : /* fall through */
+ case 1163 : /* fall through */
+ case 1164 : /* fall through */
+ case 1165 : /* fall through */
+ case 1166 : /* fall through */
+ case 1167 : /* fall through */
+ case 1168 : /* fall through */
+ case 1169 : /* fall through */
+ case 1170 : /* fall through */
+ case 1171 : /* fall through */
+ case 1172 : /* fall through */
+ case 1173 : /* fall through */
+ case 1174 : /* fall through */
+ case 1175 : /* fall through */
+ case 1176 : /* fall through */
+ case 1177 : /* fall through */
+ case 1178 : /* fall through */
+ case 1179 : /* fall through */
+ case 1180 : /* fall through */
+ case 1181 : /* fall through */
+ case 1182 : /* fall through */
+ case 1183 : itype = OR1K32BF_INSN_L_LBS; goto extract_sfmt_l_lbs;
+ case 1184 : /* fall through */
+ case 1185 : /* fall through */
+ case 1186 : /* fall through */
+ case 1187 : /* fall through */
+ case 1188 : /* fall through */
+ case 1189 : /* fall through */
+ case 1190 : /* fall through */
+ case 1191 : /* fall through */
+ case 1192 : /* fall through */
+ case 1193 : /* fall through */
+ case 1194 : /* fall through */
+ case 1195 : /* fall through */
+ case 1196 : /* fall through */
+ case 1197 : /* fall through */
+ case 1198 : /* fall through */
+ case 1199 : /* fall through */
+ case 1200 : /* fall through */
+ case 1201 : /* fall through */
+ case 1202 : /* fall through */
+ case 1203 : /* fall through */
+ case 1204 : /* fall through */
+ case 1205 : /* fall through */
+ case 1206 : /* fall through */
+ case 1207 : /* fall through */
+ case 1208 : /* fall through */
+ case 1209 : /* fall through */
+ case 1210 : /* fall through */
+ case 1211 : /* fall through */
+ case 1212 : /* fall through */
+ case 1213 : /* fall through */
+ case 1214 : /* fall through */
+ case 1215 : itype = OR1K32BF_INSN_L_LHZ; goto extract_sfmt_l_lhz;
+ case 1216 : /* fall through */
+ case 1217 : /* fall through */
+ case 1218 : /* fall through */
+ case 1219 : /* fall through */
+ case 1220 : /* fall through */
+ case 1221 : /* fall through */
+ case 1222 : /* fall through */
+ case 1223 : /* fall through */
+ case 1224 : /* fall through */
+ case 1225 : /* fall through */
+ case 1226 : /* fall through */
+ case 1227 : /* fall through */
+ case 1228 : /* fall through */
+ case 1229 : /* fall through */
+ case 1230 : /* fall through */
+ case 1231 : /* fall through */
+ case 1232 : /* fall through */
+ case 1233 : /* fall through */
+ case 1234 : /* fall through */
+ case 1235 : /* fall through */
+ case 1236 : /* fall through */
+ case 1237 : /* fall through */
+ case 1238 : /* fall through */
+ case 1239 : /* fall through */
+ case 1240 : /* fall through */
+ case 1241 : /* fall through */
+ case 1242 : /* fall through */
+ case 1243 : /* fall through */
+ case 1244 : /* fall through */
+ case 1245 : /* fall through */
+ case 1246 : /* fall through */
+ case 1247 : itype = OR1K32BF_INSN_L_LHS; goto extract_sfmt_l_lhs;
+ case 1248 : /* fall through */
+ case 1249 : /* fall through */
+ case 1250 : /* fall through */
+ case 1251 : /* fall through */
+ case 1252 : /* fall through */
+ case 1253 : /* fall through */
+ case 1254 : /* fall through */
+ case 1255 : /* fall through */
+ case 1256 : /* fall through */
+ case 1257 : /* fall through */
+ case 1258 : /* fall through */
+ case 1259 : /* fall through */
+ case 1260 : /* fall through */
+ case 1261 : /* fall through */
+ case 1262 : /* fall through */
+ case 1263 : /* fall through */
+ case 1264 : /* fall through */
+ case 1265 : /* fall through */
+ case 1266 : /* fall through */
+ case 1267 : /* fall through */
+ case 1268 : /* fall through */
+ case 1269 : /* fall through */
+ case 1270 : /* fall through */
+ case 1271 : /* fall through */
+ case 1272 : /* fall through */
+ case 1273 : /* fall through */
+ case 1274 : /* fall through */
+ case 1275 : /* fall through */
+ case 1276 : /* fall through */
+ case 1277 : /* fall through */
+ case 1278 : /* fall through */
+ case 1279 : itype = OR1K32BF_INSN_L_ADDI; goto extract_sfmt_l_addi;
+ case 1280 : /* fall through */
+ case 1281 : /* fall through */
+ case 1282 : /* fall through */
+ case 1283 : /* fall through */
+ case 1284 : /* fall through */
+ case 1285 : /* fall through */
+ case 1286 : /* fall through */
+ case 1287 : /* fall through */
+ case 1288 : /* fall through */
+ case 1289 : /* fall through */
+ case 1290 : /* fall through */
+ case 1291 : /* fall through */
+ case 1292 : /* fall through */
+ case 1293 : /* fall through */
+ case 1294 : /* fall through */
+ case 1295 : /* fall through */
+ case 1296 : /* fall through */
+ case 1297 : /* fall through */
+ case 1298 : /* fall through */
+ case 1299 : /* fall through */
+ case 1300 : /* fall through */
+ case 1301 : /* fall through */
+ case 1302 : /* fall through */
+ case 1303 : /* fall through */
+ case 1304 : /* fall through */
+ case 1305 : /* fall through */
+ case 1306 : /* fall through */
+ case 1307 : /* fall through */
+ case 1308 : /* fall through */
+ case 1309 : /* fall through */
+ case 1310 : /* fall through */
+ case 1311 : itype = OR1K32BF_INSN_L_ADDIC; goto extract_sfmt_l_addic;
+ case 1312 : /* fall through */
+ case 1313 : /* fall through */
+ case 1314 : /* fall through */
+ case 1315 : /* fall through */
+ case 1316 : /* fall through */
+ case 1317 : /* fall through */
+ case 1318 : /* fall through */
+ case 1319 : /* fall through */
+ case 1320 : /* fall through */
+ case 1321 : /* fall through */
+ case 1322 : /* fall through */
+ case 1323 : /* fall through */
+ case 1324 : /* fall through */
+ case 1325 : /* fall through */
+ case 1326 : /* fall through */
+ case 1327 : /* fall through */
+ case 1328 : /* fall through */
+ case 1329 : /* fall through */
+ case 1330 : /* fall through */
+ case 1331 : /* fall through */
+ case 1332 : /* fall through */
+ case 1333 : /* fall through */
+ case 1334 : /* fall through */
+ case 1335 : /* fall through */
+ case 1336 : /* fall through */
+ case 1337 : /* fall through */
+ case 1338 : /* fall through */
+ case 1339 : /* fall through */
+ case 1340 : /* fall through */
+ case 1341 : /* fall through */
+ case 1342 : /* fall through */
+ case 1343 : itype = OR1K32BF_INSN_L_ANDI; goto extract_sfmt_l_andi;
+ case 1344 : /* fall through */
+ case 1345 : /* fall through */
+ case 1346 : /* fall through */
+ case 1347 : /* fall through */
+ case 1348 : /* fall through */
+ case 1349 : /* fall through */
+ case 1350 : /* fall through */
+ case 1351 : /* fall through */
+ case 1352 : /* fall through */
+ case 1353 : /* fall through */
+ case 1354 : /* fall through */
+ case 1355 : /* fall through */
+ case 1356 : /* fall through */
+ case 1357 : /* fall through */
+ case 1358 : /* fall through */
+ case 1359 : /* fall through */
+ case 1360 : /* fall through */
+ case 1361 : /* fall through */
+ case 1362 : /* fall through */
+ case 1363 : /* fall through */
+ case 1364 : /* fall through */
+ case 1365 : /* fall through */
+ case 1366 : /* fall through */
+ case 1367 : /* fall through */
+ case 1368 : /* fall through */
+ case 1369 : /* fall through */
+ case 1370 : /* fall through */
+ case 1371 : /* fall through */
+ case 1372 : /* fall through */
+ case 1373 : /* fall through */
+ case 1374 : /* fall through */
+ case 1375 : itype = OR1K32BF_INSN_L_ORI; goto extract_sfmt_l_andi;
+ case 1376 : /* fall through */
+ case 1377 : /* fall through */
+ case 1378 : /* fall through */
+ case 1379 : /* fall through */
+ case 1380 : /* fall through */
+ case 1381 : /* fall through */
+ case 1382 : /* fall through */
+ case 1383 : /* fall through */
+ case 1384 : /* fall through */
+ case 1385 : /* fall through */
+ case 1386 : /* fall through */
+ case 1387 : /* fall through */
+ case 1388 : /* fall through */
+ case 1389 : /* fall through */
+ case 1390 : /* fall through */
+ case 1391 : /* fall through */
+ case 1392 : /* fall through */
+ case 1393 : /* fall through */
+ case 1394 : /* fall through */
+ case 1395 : /* fall through */
+ case 1396 : /* fall through */
+ case 1397 : /* fall through */
+ case 1398 : /* fall through */
+ case 1399 : /* fall through */
+ case 1400 : /* fall through */
+ case 1401 : /* fall through */
+ case 1402 : /* fall through */
+ case 1403 : /* fall through */
+ case 1404 : /* fall through */
+ case 1405 : /* fall through */
+ case 1406 : /* fall through */
+ case 1407 : itype = OR1K32BF_INSN_L_XORI; goto extract_sfmt_l_xori;
+ case 1408 : /* fall through */
+ case 1409 : /* fall through */
+ case 1410 : /* fall through */
+ case 1411 : /* fall through */
+ case 1412 : /* fall through */
+ case 1413 : /* fall through */
+ case 1414 : /* fall through */
+ case 1415 : /* fall through */
+ case 1416 : /* fall through */
+ case 1417 : /* fall through */
+ case 1418 : /* fall through */
+ case 1419 : /* fall through */
+ case 1420 : /* fall through */
+ case 1421 : /* fall through */
+ case 1422 : /* fall through */
+ case 1423 : /* fall through */
+ case 1424 : /* fall through */
+ case 1425 : /* fall through */
+ case 1426 : /* fall through */
+ case 1427 : /* fall through */
+ case 1428 : /* fall through */
+ case 1429 : /* fall through */
+ case 1430 : /* fall through */
+ case 1431 : /* fall through */
+ case 1432 : /* fall through */
+ case 1433 : /* fall through */
+ case 1434 : /* fall through */
+ case 1435 : /* fall through */
+ case 1436 : /* fall through */
+ case 1437 : /* fall through */
+ case 1438 : /* fall through */
+ case 1439 : itype = OR1K32BF_INSN_L_MULI; goto extract_sfmt_l_addi;
+ case 1440 : /* fall through */
+ case 1441 : /* fall through */
+ case 1442 : /* fall through */
+ case 1443 : /* fall through */
+ case 1444 : /* fall through */
+ case 1445 : /* fall through */
+ case 1446 : /* fall through */
+ case 1447 : /* fall through */
+ case 1448 : /* fall through */
+ case 1449 : /* fall through */
+ case 1450 : /* fall through */
+ case 1451 : /* fall through */
+ case 1452 : /* fall through */
+ case 1453 : /* fall through */
+ case 1454 : /* fall through */
+ case 1455 : /* fall through */
+ case 1456 : /* fall through */
+ case 1457 : /* fall through */
+ case 1458 : /* fall through */
+ case 1459 : /* fall through */
+ case 1460 : /* fall through */
+ case 1461 : /* fall through */
+ case 1462 : /* fall through */
+ case 1463 : /* fall through */
+ case 1464 : /* fall through */
+ case 1465 : /* fall through */
+ case 1466 : /* fall through */
+ case 1467 : /* fall through */
+ case 1468 : /* fall through */
+ case 1469 : /* fall through */
+ case 1470 : /* fall through */
+ case 1471 : itype = OR1K32BF_INSN_L_MFSPR; goto extract_sfmt_l_mfspr;
+ case 1472 : /* fall through */
+ case 1473 : /* fall through */
+ case 1474 : /* fall through */
+ case 1475 : /* fall through */
+ case 1476 : /* fall through */
+ case 1477 : /* fall through */
+ case 1478 : /* fall through */
+ case 1479 : /* fall through */
+ case 1480 : /* fall through */
+ case 1481 : /* fall through */
+ case 1482 : /* fall through */
+ case 1483 : /* fall through */
+ case 1484 : /* fall through */
+ case 1485 : /* fall through */
+ case 1486 : /* fall through */
+ case 1487 :
+ {
+ unsigned int val = (((insn >> 7) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb8000000)
+ { itype = OR1K32BF_INSN_L_SLLI; goto extract_sfmt_l_slli; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb8000080)
+ { itype = OR1K32BF_INSN_L_SRAI; goto extract_sfmt_l_slli; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1488 : /* fall through */
+ case 1489 : /* fall through */
+ case 1490 : /* fall through */
+ case 1491 : /* fall through */
+ case 1492 : /* fall through */
+ case 1493 : /* fall through */
+ case 1494 : /* fall through */
+ case 1495 : /* fall through */
+ case 1496 : /* fall through */
+ case 1497 : /* fall through */
+ case 1498 : /* fall through */
+ case 1499 : /* fall through */
+ case 1500 : /* fall through */
+ case 1501 : /* fall through */
+ case 1502 : /* fall through */
+ case 1503 :
+ {
+ unsigned int val = (((insn >> 7) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb8000040)
+ { itype = OR1K32BF_INSN_L_SRLI; goto extract_sfmt_l_slli; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb80000c0)
+ { itype = OR1K32BF_INSN_L_RORI; goto extract_sfmt_l_slli; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1504 : /* fall through */
+ case 1505 : /* fall through */
+ case 1506 : /* fall through */
+ case 1507 : /* fall through */
+ case 1508 : /* fall through */
+ case 1509 : /* fall through */
+ case 1510 : /* fall through */
+ case 1511 : /* fall through */
+ case 1512 : /* fall through */
+ case 1513 : /* fall through */
+ case 1514 : /* fall through */
+ case 1515 : /* fall through */
+ case 1516 : /* fall through */
+ case 1517 : /* fall through */
+ case 1518 : /* fall through */
+ case 1519 : /* fall through */
+ case 1520 : /* fall through */
+ case 1521 : /* fall through */
+ case 1522 : /* fall through */
+ case 1523 : /* fall through */
+ case 1524 : /* fall through */
+ case 1525 : /* fall through */
+ case 1526 : /* fall through */
+ case 1527 : /* fall through */
+ case 1528 : /* fall through */
+ case 1529 : /* fall through */
+ case 1530 : /* fall through */
+ case 1531 : /* fall through */
+ case 1532 : /* fall through */
+ case 1533 : /* fall through */
+ case 1534 : /* fall through */
+ case 1535 :
+ {
+ unsigned int val = (((insn >> 21) & (15 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xffe00000) == 0xbc000000)
+ { itype = OR1K32BF_INSN_L_SFEQI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xffe00000) == 0xbc200000)
+ { itype = OR1K32BF_INSN_L_SFNEI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xffe00000) == 0xbc400000)
+ { itype = OR1K32BF_INSN_L_SFGTUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xffe00000) == 0xbc600000)
+ { itype = OR1K32BF_INSN_L_SFGEUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 4 :
+ if ((entire_insn & 0xffe00000) == 0xbc800000)
+ { itype = OR1K32BF_INSN_L_SFLTUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 5 :
+ if ((entire_insn & 0xffe00000) == 0xbca00000)
+ { itype = OR1K32BF_INSN_L_SFLEUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 10 :
+ if ((entire_insn & 0xffe00000) == 0xbd400000)
+ { itype = OR1K32BF_INSN_L_SFGTSI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 11 :
+ if ((entire_insn & 0xffe00000) == 0xbd600000)
+ { itype = OR1K32BF_INSN_L_SFGESI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 12 :
+ if ((entire_insn & 0xffe00000) == 0xbd800000)
+ { itype = OR1K32BF_INSN_L_SFLTSI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 13 :
+ if ((entire_insn & 0xffe00000) == 0xbda00000)
+ { itype = OR1K32BF_INSN_L_SFLESI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1536 : /* fall through */
+ case 1537 : /* fall through */
+ case 1538 : /* fall through */
+ case 1539 : /* fall through */
+ case 1540 : /* fall through */
+ case 1541 : /* fall through */
+ case 1542 : /* fall through */
+ case 1543 : /* fall through */
+ case 1544 : /* fall through */
+ case 1545 : /* fall through */
+ case 1546 : /* fall through */
+ case 1547 : /* fall through */
+ case 1548 : /* fall through */
+ case 1549 : /* fall through */
+ case 1550 : /* fall through */
+ case 1551 : /* fall through */
+ case 1552 : /* fall through */
+ case 1553 : /* fall through */
+ case 1554 : /* fall through */
+ case 1555 : /* fall through */
+ case 1556 : /* fall through */
+ case 1557 : /* fall through */
+ case 1558 : /* fall through */
+ case 1559 : /* fall through */
+ case 1560 : /* fall through */
+ case 1561 : /* fall through */
+ case 1562 : /* fall through */
+ case 1563 : /* fall through */
+ case 1564 : /* fall through */
+ case 1565 : /* fall through */
+ case 1566 : /* fall through */
+ case 1567 : itype = OR1K32BF_INSN_L_MTSPR; goto extract_sfmt_l_mtspr;
+ case 1569 :
+ if ((entire_insn & 0xffe007ff) == 0xc4000001)
+ { itype = OR1K32BF_INSN_L_MAC; goto extract_sfmt_l_mac; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1570 :
+ if ((entire_insn & 0xffe007ff) == 0xc4000002)
+ { itype = OR1K32BF_INSN_L_MSB; goto extract_sfmt_l_mac; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1600 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000000)
+ { itype = OR1K32BF_INSN_LF_ADD_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1601 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000001)
+ { itype = OR1K32BF_INSN_LF_SUB_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1602 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000002)
+ { itype = OR1K32BF_INSN_LF_MUL_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1603 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000003)
+ { itype = OR1K32BF_INSN_LF_DIV_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1604 :
+ if ((entire_insn & 0xfc00ffff) == 0xc8000004)
+ { itype = OR1K32BF_INSN_LF_ITOF_S; goto extract_sfmt_lf_itof_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1605 :
+ if ((entire_insn & 0xfc00ffff) == 0xc8000005)
+ { itype = OR1K32BF_INSN_LF_FTOI_S; goto extract_sfmt_lf_ftoi_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1606 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000006)
+ { itype = OR1K32BF_INSN_LF_REM_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1607 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000007)
+ { itype = OR1K32BF_INSN_LF_MADD_S; goto extract_sfmt_lf_madd_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1608 :
+ if ((entire_insn & 0xffe007ff) == 0xc8000008)
+ { itype = OR1K32BF_INSN_LF_EQ_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1609 :
+ if ((entire_insn & 0xffe007ff) == 0xc8000009)
+ { itype = OR1K32BF_INSN_LF_NE_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1610 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000a)
+ { itype = OR1K32BF_INSN_LF_GT_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1611 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000b)
+ { itype = OR1K32BF_INSN_LF_GE_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1612 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000c)
+ { itype = OR1K32BF_INSN_LF_LT_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1613 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000d)
+ { itype = OR1K32BF_INSN_LF_LE_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1616 :
+ if ((entire_insn & 0xffe007ff) == 0xc80000d0)
+ { itype = OR1K32BF_INSN_LF_CUST1_S; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1696 : /* fall through */
+ case 1697 : /* fall through */
+ case 1698 : /* fall through */
+ case 1699 : /* fall through */
+ case 1700 : /* fall through */
+ case 1701 : /* fall through */
+ case 1702 : /* fall through */
+ case 1703 : /* fall through */
+ case 1704 : /* fall through */
+ case 1705 : /* fall through */
+ case 1706 : /* fall through */
+ case 1707 : /* fall through */
+ case 1708 : /* fall through */
+ case 1709 : /* fall through */
+ case 1710 : /* fall through */
+ case 1711 : /* fall through */
+ case 1712 : /* fall through */
+ case 1713 : /* fall through */
+ case 1714 : /* fall through */
+ case 1715 : /* fall through */
+ case 1716 : /* fall through */
+ case 1717 : /* fall through */
+ case 1718 : /* fall through */
+ case 1719 : /* fall through */
+ case 1720 : /* fall through */
+ case 1721 : /* fall through */
+ case 1722 : /* fall through */
+ case 1723 : /* fall through */
+ case 1724 : /* fall through */
+ case 1725 : /* fall through */
+ case 1726 : /* fall through */
+ case 1727 : itype = OR1K32BF_INSN_L_SW; goto extract_sfmt_l_sw;
+ case 1728 : /* fall through */
+ case 1729 : /* fall through */
+ case 1730 : /* fall through */
+ case 1731 : /* fall through */
+ case 1732 : /* fall through */
+ case 1733 : /* fall through */
+ case 1734 : /* fall through */
+ case 1735 : /* fall through */
+ case 1736 : /* fall through */
+ case 1737 : /* fall through */
+ case 1738 : /* fall through */
+ case 1739 : /* fall through */
+ case 1740 : /* fall through */
+ case 1741 : /* fall through */
+ case 1742 : /* fall through */
+ case 1743 : /* fall through */
+ case 1744 : /* fall through */
+ case 1745 : /* fall through */
+ case 1746 : /* fall through */
+ case 1747 : /* fall through */
+ case 1748 : /* fall through */
+ case 1749 : /* fall through */
+ case 1750 : /* fall through */
+ case 1751 : /* fall through */
+ case 1752 : /* fall through */
+ case 1753 : /* fall through */
+ case 1754 : /* fall through */
+ case 1755 : /* fall through */
+ case 1756 : /* fall through */
+ case 1757 : /* fall through */
+ case 1758 : /* fall through */
+ case 1759 : itype = OR1K32BF_INSN_L_SB; goto extract_sfmt_l_sb;
+ case 1760 : /* fall through */
+ case 1761 : /* fall through */
+ case 1762 : /* fall through */
+ case 1763 : /* fall through */
+ case 1764 : /* fall through */
+ case 1765 : /* fall through */
+ case 1766 : /* fall through */
+ case 1767 : /* fall through */
+ case 1768 : /* fall through */
+ case 1769 : /* fall through */
+ case 1770 : /* fall through */
+ case 1771 : /* fall through */
+ case 1772 : /* fall through */
+ case 1773 : /* fall through */
+ case 1774 : /* fall through */
+ case 1775 : /* fall through */
+ case 1776 : /* fall through */
+ case 1777 : /* fall through */
+ case 1778 : /* fall through */
+ case 1779 : /* fall through */
+ case 1780 : /* fall through */
+ case 1781 : /* fall through */
+ case 1782 : /* fall through */
+ case 1783 : /* fall through */
+ case 1784 : /* fall through */
+ case 1785 : /* fall through */
+ case 1786 : /* fall through */
+ case 1787 : /* fall through */
+ case 1788 : /* fall through */
+ case 1789 : /* fall through */
+ case 1790 : /* fall through */
+ case 1791 : itype = OR1K32BF_INSN_L_SH; goto extract_sfmt_l_sh;
+ case 1792 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000000)
+ { itype = OR1K32BF_INSN_L_ADD; goto extract_sfmt_l_add; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1793 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000001)
+ { itype = OR1K32BF_INSN_L_ADDC; goto extract_sfmt_l_addc; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1794 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000002)
+ { itype = OR1K32BF_INSN_L_SUB; goto extract_sfmt_l_add; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1795 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000003)
+ { itype = OR1K32BF_INSN_L_AND; goto extract_sfmt_l_and; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1796 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000004)
+ { itype = OR1K32BF_INSN_L_OR; goto extract_sfmt_l_and; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1797 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000005)
+ { itype = OR1K32BF_INSN_L_XOR; goto extract_sfmt_l_and; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1798 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000306)
+ { itype = OR1K32BF_INSN_L_MUL; goto extract_sfmt_l_add; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1800 :
+ {
+ unsigned int val = (((insn >> 7) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000008)
+ { itype = OR1K32BF_INSN_L_SLL; goto extract_sfmt_l_sll; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000088)
+ { itype = OR1K32BF_INSN_L_SRA; goto extract_sfmt_l_sll; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1801 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000309)
+ { itype = OR1K32BF_INSN_L_DIV; goto extract_sfmt_l_div; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1802 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000030a)
+ { itype = OR1K32BF_INSN_L_DIVU; goto extract_sfmt_l_div; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1803 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000030b)
+ { itype = OR1K32BF_INSN_L_MULU; goto extract_sfmt_l_add; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1804 :
+ {
+ unsigned int val = (((insn >> 7) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000000c)
+ { itype = OR1K32BF_INSN_L_EXTHS; goto extract_sfmt_l_exths; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000008c)
+ { itype = OR1K32BF_INSN_L_EXTHZ; goto extract_sfmt_l_exths; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1805 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000000d)
+ { itype = OR1K32BF_INSN_L_EXTWS; goto extract_sfmt_l_exths; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1806 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000000e)
+ { itype = OR1K32BF_INSN_L_CMOV; goto extract_sfmt_l_cmov; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1807 :
+ {
+ unsigned int val = (((insn >> 8) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000000f)
+ { itype = OR1K32BF_INSN_L_FF1; goto extract_sfmt_l_ff1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000010f)
+ { itype = OR1K32BF_INSN_L_FL1; goto extract_sfmt_l_ff1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1816 :
+ {
+ unsigned int val = (((insn >> 7) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000048)
+ { itype = OR1K32BF_INSN_L_SRL; goto extract_sfmt_l_sll; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc0007ff) == 0xe00000c8)
+ { itype = OR1K32BF_INSN_L_ROR; goto extract_sfmt_l_sll; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1820 :
+ {
+ unsigned int val = (((insn >> 7) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000004c)
+ { itype = OR1K32BF_INSN_L_EXTBS; goto extract_sfmt_l_exths; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc00ffff) == 0xe00000cc)
+ { itype = OR1K32BF_INSN_L_EXTBZ; goto extract_sfmt_l_exths; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1821 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000004d)
+ { itype = OR1K32BF_INSN_L_EXTWZ; goto extract_sfmt_l_exths; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1824 :
+ {
+ unsigned int val = (((insn >> 21) & (15 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xffe007ff) == 0xe4000000)
+ { itype = OR1K32BF_INSN_L_SFEQ; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xffe007ff) == 0xe4200000)
+ { itype = OR1K32BF_INSN_L_SFNE; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xffe007ff) == 0xe4400000)
+ { itype = OR1K32BF_INSN_L_SFGTU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xffe007ff) == 0xe4600000)
+ { itype = OR1K32BF_INSN_L_SFGEU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 4 :
+ if ((entire_insn & 0xffe007ff) == 0xe4800000)
+ { itype = OR1K32BF_INSN_L_SFLTU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 5 :
+ if ((entire_insn & 0xffe007ff) == 0xe4a00000)
+ { itype = OR1K32BF_INSN_L_SFLEU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 10 :
+ if ((entire_insn & 0xffe007ff) == 0xe5400000)
+ { itype = OR1K32BF_INSN_L_SFGTS; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 11 :
+ if ((entire_insn & 0xffe007ff) == 0xe5600000)
+ { itype = OR1K32BF_INSN_L_SFGES; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 12 :
+ if ((entire_insn & 0xffe007ff) == 0xe5800000)
+ { itype = OR1K32BF_INSN_L_SFLTS; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 13 :
+ if ((entire_insn & 0xffe007ff) == 0xe5a00000)
+ { itype = OR1K32BF_INSN_L_SFLES; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1920 :
+ if ((entire_insn & 0xffffffff) == 0xf0000000)
+ { itype = OR1K32BF_INSN_L_CUST5; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1952 :
+ if ((entire_insn & 0xffffffff) == 0xf4000000)
+ { itype = OR1K32BF_INSN_L_CUST6; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1984 :
+ if ((entire_insn & 0xffffffff) == 0xf8000000)
+ { itype = OR1K32BF_INSN_L_CUST7; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2016 :
+ if ((entire_insn & 0xffffffff) == 0xfc000000)
+ { itype = OR1K32BF_INSN_L_CUST8; goto extract_sfmt_l_cust1; }
+ itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ }
+
+ /* The instruction has been decoded, now extract the fields. */
+
+ extract_sfmt_empty:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+#define FLD(f) abuf->fields.sfmt_empty.f
+
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_j:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ USI f_disp26;
+
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc));
+
+ /* Record the fields for the semantic handler. */
+ FLD (i_disp26) = f_disp26;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_j", "disp26 0x%x", 'x', f_disp26, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_jal:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ USI f_disp26;
+
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc));
+
+ /* Record the fields for the semantic handler. */
+ FLD (i_disp26) = f_disp26;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jal", "disp26 0x%x", 'x', f_disp26, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_jr:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r3;
+
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jr", "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_jalr:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r3;
+
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jalr", "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_bnf:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ USI f_disp26;
+
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc));
+
+ /* Record the fields for the semantic handler. */
+ FLD (i_disp26) = f_disp26;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_bnf", "disp26 0x%x", 'x', f_disp26, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_trap:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+#define FLD(f) abuf->fields.sfmt_empty.f
+
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_trap", (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_nop_imm:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_uimm16;
+
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_nop_imm", "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_movhi:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r1;
+ UINT f_uimm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_uimm16) = f_uimm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_movhi", "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_macrc:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_macrc", "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_mfspr:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mfspr", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_mtspr:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ UINT f_uimm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_uimm16_split = ((UHI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_uimm16_split) = f_uimm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mtspr", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_uimm16_split 0x%x", 'x', f_uimm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lwz:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lwz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lws:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lws", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lbz:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lbz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lbs:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lbs", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lhz:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lhz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lhs:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lhs", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sw:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sw", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sb:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sb", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sh:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sh", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sll:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sll", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_slli:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm6;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 5, 6);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm6) = f_uimm6;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_slli", "f_r2 0x%x", 'x', f_r2, "f_uimm6 0x%x", 'x', f_uimm6, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_and:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_and", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_add:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_add", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_addc:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addc", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_div:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_div", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_ff1:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_ff1", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_andi:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm16) = f_uimm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_andi", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_xori:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_xori", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_addi:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addi", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_addic:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addic", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_exths:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_exths", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_cmov:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_cmov", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sfgtu:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgtu", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sfgtui:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r2;
+ UINT f_uimm16;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgtui", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sfgtsi:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgtsi", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_mac:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mac", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_maci:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_maci", "f_r2 0x%x", 'x', f_r2, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_cust1:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+#define FLD(f) abuf->fields.sfmt_empty.f
+
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_cust1", (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_add_s:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_add_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_itof_s:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_itof_s", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_ftoi_s:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_ftoi_s", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_eq_s:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_eq_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_madd_s:
+ {
+ const IDESC *idesc = &or1k32bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_madd_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+}
diff --git a/sim/or1k/decode32.h b/sim/or1k/decode32.h
new file mode 100644
index 0000000..56f4669
--- /dev/null
+++ b/sim/or1k/decode32.h
@@ -0,0 +1,93 @@
+/* Decode header for or1k32bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K32BF_DECODE_H
+#define OR1K32BF_DECODE_H
+
+extern const IDESC *or1k32bf_decode (SIM_CPU *, IADDR,
+ CGEN_INSN_WORD, CGEN_INSN_WORD,
+ ARGBUF *);
+extern void or1k32bf_init_idesc_table (SIM_CPU *);
+extern void or1k32bf_sem_init_idesc_table (SIM_CPU *);
+extern void or1k32bf_semf_init_idesc_table (SIM_CPU *);
+
+/* Enum declaration for instructions in cpu family or1k32bf. */
+typedef enum or1k32bf_insn_type {
+ OR1K32BF_INSN_X_INVALID, OR1K32BF_INSN_X_AFTER, OR1K32BF_INSN_X_BEFORE, OR1K32BF_INSN_X_CTI_CHAIN
+ , OR1K32BF_INSN_X_CHAIN, OR1K32BF_INSN_X_BEGIN, OR1K32BF_INSN_L_J, OR1K32BF_INSN_L_JAL
+ , OR1K32BF_INSN_L_JR, OR1K32BF_INSN_L_JALR, OR1K32BF_INSN_L_BNF, OR1K32BF_INSN_L_BF
+ , OR1K32BF_INSN_L_TRAP, OR1K32BF_INSN_L_SYS, OR1K32BF_INSN_L_RFE, OR1K32BF_INSN_L_NOP_IMM
+ , OR1K32BF_INSN_L_MOVHI, OR1K32BF_INSN_L_MACRC, OR1K32BF_INSN_L_MFSPR, OR1K32BF_INSN_L_MTSPR
+ , OR1K32BF_INSN_L_LWZ, OR1K32BF_INSN_L_LWS, OR1K32BF_INSN_L_LBZ, OR1K32BF_INSN_L_LBS
+ , OR1K32BF_INSN_L_LHZ, OR1K32BF_INSN_L_LHS, OR1K32BF_INSN_L_SW, OR1K32BF_INSN_L_SB
+ , OR1K32BF_INSN_L_SH, OR1K32BF_INSN_L_SLL, OR1K32BF_INSN_L_SLLI, OR1K32BF_INSN_L_SRL
+ , OR1K32BF_INSN_L_SRLI, OR1K32BF_INSN_L_SRA, OR1K32BF_INSN_L_SRAI, OR1K32BF_INSN_L_ROR
+ , OR1K32BF_INSN_L_RORI, OR1K32BF_INSN_L_AND, OR1K32BF_INSN_L_OR, OR1K32BF_INSN_L_XOR
+ , OR1K32BF_INSN_L_ADD, OR1K32BF_INSN_L_SUB, OR1K32BF_INSN_L_ADDC, OR1K32BF_INSN_L_MUL
+ , OR1K32BF_INSN_L_MULU, OR1K32BF_INSN_L_DIV, OR1K32BF_INSN_L_DIVU, OR1K32BF_INSN_L_FF1
+ , OR1K32BF_INSN_L_FL1, OR1K32BF_INSN_L_ANDI, OR1K32BF_INSN_L_ORI, OR1K32BF_INSN_L_XORI
+ , OR1K32BF_INSN_L_ADDI, OR1K32BF_INSN_L_ADDIC, OR1K32BF_INSN_L_MULI, OR1K32BF_INSN_L_EXTHS
+ , OR1K32BF_INSN_L_EXTBS, OR1K32BF_INSN_L_EXTHZ, OR1K32BF_INSN_L_EXTBZ, OR1K32BF_INSN_L_EXTWS
+ , OR1K32BF_INSN_L_EXTWZ, OR1K32BF_INSN_L_CMOV, OR1K32BF_INSN_L_SFGTU, OR1K32BF_INSN_L_SFGEU
+ , OR1K32BF_INSN_L_SFLTU, OR1K32BF_INSN_L_SFLEU, OR1K32BF_INSN_L_SFGTS, OR1K32BF_INSN_L_SFGES
+ , OR1K32BF_INSN_L_SFLTS, OR1K32BF_INSN_L_SFLES, OR1K32BF_INSN_L_SFGTUI, OR1K32BF_INSN_L_SFGEUI
+ , OR1K32BF_INSN_L_SFLTUI, OR1K32BF_INSN_L_SFLEUI, OR1K32BF_INSN_L_SFGTSI, OR1K32BF_INSN_L_SFGESI
+ , OR1K32BF_INSN_L_SFLTSI, OR1K32BF_INSN_L_SFLESI, OR1K32BF_INSN_L_SFEQ, OR1K32BF_INSN_L_SFEQI
+ , OR1K32BF_INSN_L_SFNE, OR1K32BF_INSN_L_SFNEI, OR1K32BF_INSN_L_MAC, OR1K32BF_INSN_L_MSB
+ , OR1K32BF_INSN_L_MACI, OR1K32BF_INSN_L_CUST1, OR1K32BF_INSN_L_CUST2, OR1K32BF_INSN_L_CUST3
+ , OR1K32BF_INSN_L_CUST4, OR1K32BF_INSN_L_CUST5, OR1K32BF_INSN_L_CUST6, OR1K32BF_INSN_L_CUST7
+ , OR1K32BF_INSN_L_CUST8, OR1K32BF_INSN_LF_ADD_S, OR1K32BF_INSN_LF_SUB_S, OR1K32BF_INSN_LF_MUL_S
+ , OR1K32BF_INSN_LF_DIV_S, OR1K32BF_INSN_LF_REM_S, OR1K32BF_INSN_LF_ITOF_S, OR1K32BF_INSN_LF_FTOI_S
+ , OR1K32BF_INSN_LF_EQ_S, OR1K32BF_INSN_LF_NE_S, OR1K32BF_INSN_LF_GE_S, OR1K32BF_INSN_LF_GT_S
+ , OR1K32BF_INSN_LF_LT_S, OR1K32BF_INSN_LF_LE_S, OR1K32BF_INSN_LF_MADD_S, OR1K32BF_INSN_LF_CUST1_S
+ , OR1K32BF_INSN__MAX
+} OR1K32BF_INSN_TYPE;
+
+/* Enum declaration for semantic formats in cpu family or1k32bf. */
+typedef enum or1k32bf_sfmt_type {
+ OR1K32BF_SFMT_EMPTY, OR1K32BF_SFMT_L_J, OR1K32BF_SFMT_L_JAL, OR1K32BF_SFMT_L_JR
+ , OR1K32BF_SFMT_L_JALR, OR1K32BF_SFMT_L_BNF, OR1K32BF_SFMT_L_TRAP, OR1K32BF_SFMT_L_NOP_IMM
+ , OR1K32BF_SFMT_L_MOVHI, OR1K32BF_SFMT_L_MACRC, OR1K32BF_SFMT_L_MFSPR, OR1K32BF_SFMT_L_MTSPR
+ , OR1K32BF_SFMT_L_LWZ, OR1K32BF_SFMT_L_LWS, OR1K32BF_SFMT_L_LBZ, OR1K32BF_SFMT_L_LBS
+ , OR1K32BF_SFMT_L_LHZ, OR1K32BF_SFMT_L_LHS, OR1K32BF_SFMT_L_SW, OR1K32BF_SFMT_L_SB
+ , OR1K32BF_SFMT_L_SH, OR1K32BF_SFMT_L_SLL, OR1K32BF_SFMT_L_SLLI, OR1K32BF_SFMT_L_AND
+ , OR1K32BF_SFMT_L_ADD, OR1K32BF_SFMT_L_ADDC, OR1K32BF_SFMT_L_DIV, OR1K32BF_SFMT_L_FF1
+ , OR1K32BF_SFMT_L_ANDI, OR1K32BF_SFMT_L_XORI, OR1K32BF_SFMT_L_ADDI, OR1K32BF_SFMT_L_ADDIC
+ , OR1K32BF_SFMT_L_EXTHS, OR1K32BF_SFMT_L_CMOV, OR1K32BF_SFMT_L_SFGTU, OR1K32BF_SFMT_L_SFGTUI
+ , OR1K32BF_SFMT_L_SFGTSI, OR1K32BF_SFMT_L_MAC, OR1K32BF_SFMT_L_MACI, OR1K32BF_SFMT_L_CUST1
+ , OR1K32BF_SFMT_LF_ADD_S, OR1K32BF_SFMT_LF_ITOF_S, OR1K32BF_SFMT_LF_FTOI_S, OR1K32BF_SFMT_LF_EQ_S
+ , OR1K32BF_SFMT_LF_MADD_S
+} OR1K32BF_SFMT_TYPE;
+
+/* Function unit handlers (user written). */
+
+extern int or1k32bf_model_or1200_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
+extern int or1k32bf_model_or1200nd_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
+
+/* Profiling before/after handlers (user written) */
+
+extern void or1k32bf_model_insn_before (SIM_CPU *, int /*first_p*/);
+extern void or1k32bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
+
+#endif /* OR1K32BF_DECODE_H */
diff --git a/sim/or1k/decode64.c b/sim/or1k/decode64.c
new file mode 100644
index 0000000..b3c774d9
--- /dev/null
+++ b/sim/or1k/decode64.c
@@ -0,0 +1,2624 @@
+/* Simulator instruction decoder for or1k64bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k64bf
+#define WANT_CPU_OR1K64BF
+
+#include "sim-main.h"
+#include "sim-assert.h"
+
+/* The instruction descriptor array.
+ This is computed at runtime. Space for it is not malloc'd to save a
+ teensy bit of cpu in the decoder. Moving it to malloc space is trivial
+ but won't be done until necessary (we don't currently support the runtime
+ addition of instructions nor an SMP machine with different cpus). */
+static IDESC or1k64bf_insn_data[OR1K64BF_INSN__MAX];
+
+/* Commas between elements are contained in the macros.
+ Some of these are conditionally compiled out. */
+
+static const struct insn_sem or1k64bf_insn_sem[] =
+{
+ { VIRTUAL_INSN_X_INVALID, OR1K64BF_INSN_X_INVALID, OR1K64BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_AFTER, OR1K64BF_INSN_X_AFTER, OR1K64BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_BEFORE, OR1K64BF_INSN_X_BEFORE, OR1K64BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_CTI_CHAIN, OR1K64BF_INSN_X_CTI_CHAIN, OR1K64BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_CHAIN, OR1K64BF_INSN_X_CHAIN, OR1K64BF_SFMT_EMPTY },
+ { VIRTUAL_INSN_X_BEGIN, OR1K64BF_INSN_X_BEGIN, OR1K64BF_SFMT_EMPTY },
+ { OR1K_INSN_L_J, OR1K64BF_INSN_L_J, OR1K64BF_SFMT_L_J },
+ { OR1K_INSN_L_JAL, OR1K64BF_INSN_L_JAL, OR1K64BF_SFMT_L_JAL },
+ { OR1K_INSN_L_JR, OR1K64BF_INSN_L_JR, OR1K64BF_SFMT_L_JR },
+ { OR1K_INSN_L_JALR, OR1K64BF_INSN_L_JALR, OR1K64BF_SFMT_L_JALR },
+ { OR1K_INSN_L_BNF, OR1K64BF_INSN_L_BNF, OR1K64BF_SFMT_L_BNF },
+ { OR1K_INSN_L_BF, OR1K64BF_INSN_L_BF, OR1K64BF_SFMT_L_BNF },
+ { OR1K_INSN_L_TRAP, OR1K64BF_INSN_L_TRAP, OR1K64BF_SFMT_L_TRAP },
+ { OR1K_INSN_L_SYS, OR1K64BF_INSN_L_SYS, OR1K64BF_SFMT_L_TRAP },
+ { OR1K_INSN_L_RFE, OR1K64BF_INSN_L_RFE, OR1K64BF_SFMT_L_TRAP },
+ { OR1K_INSN_L_NOP_IMM, OR1K64BF_INSN_L_NOP_IMM, OR1K64BF_SFMT_L_NOP_IMM },
+ { OR1K_INSN_L_MOVHI, OR1K64BF_INSN_L_MOVHI, OR1K64BF_SFMT_L_MOVHI },
+ { OR1K_INSN_L_MACRC, OR1K64BF_INSN_L_MACRC, OR1K64BF_SFMT_L_MACRC },
+ { OR1K_INSN_L_MFSPR, OR1K64BF_INSN_L_MFSPR, OR1K64BF_SFMT_L_MFSPR },
+ { OR1K_INSN_L_MTSPR, OR1K64BF_INSN_L_MTSPR, OR1K64BF_SFMT_L_MTSPR },
+ { OR1K_INSN_L_LWZ, OR1K64BF_INSN_L_LWZ, OR1K64BF_SFMT_L_LWZ },
+ { OR1K_INSN_L_LWS, OR1K64BF_INSN_L_LWS, OR1K64BF_SFMT_L_LWS },
+ { OR1K_INSN_L_LBZ, OR1K64BF_INSN_L_LBZ, OR1K64BF_SFMT_L_LBZ },
+ { OR1K_INSN_L_LBS, OR1K64BF_INSN_L_LBS, OR1K64BF_SFMT_L_LBS },
+ { OR1K_INSN_L_LHZ, OR1K64BF_INSN_L_LHZ, OR1K64BF_SFMT_L_LHZ },
+ { OR1K_INSN_L_LHS, OR1K64BF_INSN_L_LHS, OR1K64BF_SFMT_L_LHS },
+ { OR1K_INSN_L_SW, OR1K64BF_INSN_L_SW, OR1K64BF_SFMT_L_SW },
+ { OR1K_INSN_L_SB, OR1K64BF_INSN_L_SB, OR1K64BF_SFMT_L_SB },
+ { OR1K_INSN_L_SH, OR1K64BF_INSN_L_SH, OR1K64BF_SFMT_L_SH },
+ { OR1K_INSN_L_SLL, OR1K64BF_INSN_L_SLL, OR1K64BF_SFMT_L_SLL },
+ { OR1K_INSN_L_SLLI, OR1K64BF_INSN_L_SLLI, OR1K64BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_SRL, OR1K64BF_INSN_L_SRL, OR1K64BF_SFMT_L_SLL },
+ { OR1K_INSN_L_SRLI, OR1K64BF_INSN_L_SRLI, OR1K64BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_SRA, OR1K64BF_INSN_L_SRA, OR1K64BF_SFMT_L_SLL },
+ { OR1K_INSN_L_SRAI, OR1K64BF_INSN_L_SRAI, OR1K64BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_ROR, OR1K64BF_INSN_L_ROR, OR1K64BF_SFMT_L_SLL },
+ { OR1K_INSN_L_RORI, OR1K64BF_INSN_L_RORI, OR1K64BF_SFMT_L_SLLI },
+ { OR1K_INSN_L_AND, OR1K64BF_INSN_L_AND, OR1K64BF_SFMT_L_AND },
+ { OR1K_INSN_L_OR, OR1K64BF_INSN_L_OR, OR1K64BF_SFMT_L_AND },
+ { OR1K_INSN_L_XOR, OR1K64BF_INSN_L_XOR, OR1K64BF_SFMT_L_AND },
+ { OR1K_INSN_L_ADD, OR1K64BF_INSN_L_ADD, OR1K64BF_SFMT_L_ADD },
+ { OR1K_INSN_L_SUB, OR1K64BF_INSN_L_SUB, OR1K64BF_SFMT_L_ADD },
+ { OR1K_INSN_L_ADDC, OR1K64BF_INSN_L_ADDC, OR1K64BF_SFMT_L_ADDC },
+ { OR1K_INSN_L_MUL, OR1K64BF_INSN_L_MUL, OR1K64BF_SFMT_L_ADD },
+ { OR1K_INSN_L_MULU, OR1K64BF_INSN_L_MULU, OR1K64BF_SFMT_L_ADD },
+ { OR1K_INSN_L_DIV, OR1K64BF_INSN_L_DIV, OR1K64BF_SFMT_L_DIV },
+ { OR1K_INSN_L_DIVU, OR1K64BF_INSN_L_DIVU, OR1K64BF_SFMT_L_DIV },
+ { OR1K_INSN_L_FF1, OR1K64BF_INSN_L_FF1, OR1K64BF_SFMT_L_FF1 },
+ { OR1K_INSN_L_FL1, OR1K64BF_INSN_L_FL1, OR1K64BF_SFMT_L_FF1 },
+ { OR1K_INSN_L_ANDI, OR1K64BF_INSN_L_ANDI, OR1K64BF_SFMT_L_ANDI },
+ { OR1K_INSN_L_ORI, OR1K64BF_INSN_L_ORI, OR1K64BF_SFMT_L_ANDI },
+ { OR1K_INSN_L_XORI, OR1K64BF_INSN_L_XORI, OR1K64BF_SFMT_L_XORI },
+ { OR1K_INSN_L_ADDI, OR1K64BF_INSN_L_ADDI, OR1K64BF_SFMT_L_ADDI },
+ { OR1K_INSN_L_ADDIC, OR1K64BF_INSN_L_ADDIC, OR1K64BF_SFMT_L_ADDIC },
+ { OR1K_INSN_L_MULI, OR1K64BF_INSN_L_MULI, OR1K64BF_SFMT_L_ADDI },
+ { OR1K_INSN_L_EXTHS, OR1K64BF_INSN_L_EXTHS, OR1K64BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTBS, OR1K64BF_INSN_L_EXTBS, OR1K64BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTHZ, OR1K64BF_INSN_L_EXTHZ, OR1K64BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTBZ, OR1K64BF_INSN_L_EXTBZ, OR1K64BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTWS, OR1K64BF_INSN_L_EXTWS, OR1K64BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_EXTWZ, OR1K64BF_INSN_L_EXTWZ, OR1K64BF_SFMT_L_EXTHS },
+ { OR1K_INSN_L_CMOV, OR1K64BF_INSN_L_CMOV, OR1K64BF_SFMT_L_CMOV },
+ { OR1K_INSN_L_SFGTU, OR1K64BF_INSN_L_SFGTU, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGEU, OR1K64BF_INSN_L_SFGEU, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLTU, OR1K64BF_INSN_L_SFLTU, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLEU, OR1K64BF_INSN_L_SFLEU, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGTS, OR1K64BF_INSN_L_SFGTS, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGES, OR1K64BF_INSN_L_SFGES, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLTS, OR1K64BF_INSN_L_SFLTS, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFLES, OR1K64BF_INSN_L_SFLES, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFGTUI, OR1K64BF_INSN_L_SFGTUI, OR1K64BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFGEUI, OR1K64BF_INSN_L_SFGEUI, OR1K64BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFLTUI, OR1K64BF_INSN_L_SFLTUI, OR1K64BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFLEUI, OR1K64BF_INSN_L_SFLEUI, OR1K64BF_SFMT_L_SFGTUI },
+ { OR1K_INSN_L_SFGTSI, OR1K64BF_INSN_L_SFGTSI, OR1K64BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFGESI, OR1K64BF_INSN_L_SFGESI, OR1K64BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFLTSI, OR1K64BF_INSN_L_SFLTSI, OR1K64BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFLESI, OR1K64BF_INSN_L_SFLESI, OR1K64BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFEQ, OR1K64BF_INSN_L_SFEQ, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFEQI, OR1K64BF_INSN_L_SFEQI, OR1K64BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_SFNE, OR1K64BF_INSN_L_SFNE, OR1K64BF_SFMT_L_SFGTU },
+ { OR1K_INSN_L_SFNEI, OR1K64BF_INSN_L_SFNEI, OR1K64BF_SFMT_L_SFGTSI },
+ { OR1K_INSN_L_MAC, OR1K64BF_INSN_L_MAC, OR1K64BF_SFMT_L_MAC },
+ { OR1K_INSN_L_MSB, OR1K64BF_INSN_L_MSB, OR1K64BF_SFMT_L_MAC },
+ { OR1K_INSN_L_MACI, OR1K64BF_INSN_L_MACI, OR1K64BF_SFMT_L_MACI },
+ { OR1K_INSN_L_CUST1, OR1K64BF_INSN_L_CUST1, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST2, OR1K64BF_INSN_L_CUST2, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST3, OR1K64BF_INSN_L_CUST3, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST4, OR1K64BF_INSN_L_CUST4, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST5, OR1K64BF_INSN_L_CUST5, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST6, OR1K64BF_INSN_L_CUST6, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST7, OR1K64BF_INSN_L_CUST7, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_L_CUST8, OR1K64BF_INSN_L_CUST8, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_LF_ADD_S, OR1K64BF_INSN_LF_ADD_S, OR1K64BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_ADD_D, OR1K64BF_INSN_LF_ADD_D, OR1K64BF_SFMT_LF_ADD_D },
+ { OR1K_INSN_LF_SUB_S, OR1K64BF_INSN_LF_SUB_S, OR1K64BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_SUB_D, OR1K64BF_INSN_LF_SUB_D, OR1K64BF_SFMT_LF_ADD_D },
+ { OR1K_INSN_LF_MUL_S, OR1K64BF_INSN_LF_MUL_S, OR1K64BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_MUL_D, OR1K64BF_INSN_LF_MUL_D, OR1K64BF_SFMT_LF_ADD_D },
+ { OR1K_INSN_LF_DIV_S, OR1K64BF_INSN_LF_DIV_S, OR1K64BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_DIV_D, OR1K64BF_INSN_LF_DIV_D, OR1K64BF_SFMT_LF_ADD_D },
+ { OR1K_INSN_LF_REM_S, OR1K64BF_INSN_LF_REM_S, OR1K64BF_SFMT_LF_ADD_S },
+ { OR1K_INSN_LF_REM_D, OR1K64BF_INSN_LF_REM_D, OR1K64BF_SFMT_LF_ADD_D },
+ { OR1K_INSN_LF_ITOF_S, OR1K64BF_INSN_LF_ITOF_S, OR1K64BF_SFMT_LF_ITOF_S },
+ { OR1K_INSN_LF_ITOF_D, OR1K64BF_INSN_LF_ITOF_D, OR1K64BF_SFMT_LF_ITOF_D },
+ { OR1K_INSN_LF_FTOI_S, OR1K64BF_INSN_LF_FTOI_S, OR1K64BF_SFMT_LF_FTOI_S },
+ { OR1K_INSN_LF_FTOI_D, OR1K64BF_INSN_LF_FTOI_D, OR1K64BF_SFMT_LF_FTOI_D },
+ { OR1K_INSN_LF_EQ_S, OR1K64BF_INSN_LF_EQ_S, OR1K64BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_EQ_D, OR1K64BF_INSN_LF_EQ_D, OR1K64BF_SFMT_LF_EQ_D },
+ { OR1K_INSN_LF_NE_S, OR1K64BF_INSN_LF_NE_S, OR1K64BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_NE_D, OR1K64BF_INSN_LF_NE_D, OR1K64BF_SFMT_LF_EQ_D },
+ { OR1K_INSN_LF_GE_S, OR1K64BF_INSN_LF_GE_S, OR1K64BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_GE_D, OR1K64BF_INSN_LF_GE_D, OR1K64BF_SFMT_LF_EQ_D },
+ { OR1K_INSN_LF_GT_S, OR1K64BF_INSN_LF_GT_S, OR1K64BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_GT_D, OR1K64BF_INSN_LF_GT_D, OR1K64BF_SFMT_LF_EQ_D },
+ { OR1K_INSN_LF_LT_S, OR1K64BF_INSN_LF_LT_S, OR1K64BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_LT_D, OR1K64BF_INSN_LF_LT_D, OR1K64BF_SFMT_LF_EQ_D },
+ { OR1K_INSN_LF_LE_S, OR1K64BF_INSN_LF_LE_S, OR1K64BF_SFMT_LF_EQ_S },
+ { OR1K_INSN_LF_LE_D, OR1K64BF_INSN_LF_LE_D, OR1K64BF_SFMT_LF_EQ_D },
+ { OR1K_INSN_LF_MADD_S, OR1K64BF_INSN_LF_MADD_S, OR1K64BF_SFMT_LF_MADD_S },
+ { OR1K_INSN_LF_MADD_D, OR1K64BF_INSN_LF_MADD_D, OR1K64BF_SFMT_LF_MADD_D },
+ { OR1K_INSN_LF_CUST1_S, OR1K64BF_INSN_LF_CUST1_S, OR1K64BF_SFMT_L_CUST1 },
+ { OR1K_INSN_LF_CUST1_D, OR1K64BF_INSN_LF_CUST1_D, OR1K64BF_SFMT_L_CUST1 },
+};
+
+static const struct insn_sem or1k64bf_insn_sem_invalid =
+{
+ VIRTUAL_INSN_X_INVALID, OR1K64BF_INSN_X_INVALID, OR1K64BF_SFMT_EMPTY
+};
+
+/* Initialize an IDESC from the compile-time computable parts. */
+
+static INLINE void
+init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
+{
+ const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
+
+ id->num = t->index;
+ id->sfmt = t->sfmt;
+ if ((int) t->type <= 0)
+ id->idata = & cgen_virtual_insn_table[- (int) t->type];
+ else
+ id->idata = & insn_table[t->type];
+ id->attrs = CGEN_INSN_ATTRS (id->idata);
+ /* Oh my god, a magic number. */
+ id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
+
+#if WITH_PROFILE_MODEL_P
+ id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
+ {
+ SIM_DESC sd = CPU_STATE (cpu);
+ SIM_ASSERT (t->index == id->timing->num);
+ }
+#endif
+
+ /* Semantic pointers are initialized elsewhere. */
+}
+
+/* Initialize the instruction descriptor table. */
+
+void
+or1k64bf_init_idesc_table (SIM_CPU *cpu)
+{
+ IDESC *id,*tabend;
+ const struct insn_sem *t,*tend;
+ int tabsize = OR1K64BF_INSN__MAX;
+ IDESC *table = or1k64bf_insn_data;
+
+ memset (table, 0, tabsize * sizeof (IDESC));
+
+ /* First set all entries to the `invalid insn'. */
+ t = & or1k64bf_insn_sem_invalid;
+ for (id = table, tabend = table + tabsize; id < tabend; ++id)
+ init_idesc (cpu, id, t);
+
+ /* Now fill in the values for the chosen cpu. */
+ for (t = or1k64bf_insn_sem, tend = t + sizeof (or1k64bf_insn_sem) / sizeof (*t);
+ t != tend; ++t)
+ {
+ init_idesc (cpu, & table[t->index], t);
+ }
+
+ /* Link the IDESC table into the cpu. */
+ CPU_IDESC (cpu) = table;
+}
+
+/* Given an instruction, return a pointer to its IDESC entry. */
+
+const IDESC *
+or1k64bf_decode (SIM_CPU *current_cpu, IADDR pc,
+ CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn,
+ ARGBUF *abuf)
+{
+ /* Result of decoder. */
+ OR1K64BF_INSN_TYPE itype;
+
+ {
+ CGEN_INSN_WORD insn = base_insn;
+
+ {
+ unsigned int val = (((insn >> 21) & (63 << 5)) | ((insn >> 0) & (31 << 0)));
+ switch (val)
+ {
+ case 0 : /* fall through */
+ case 1 : /* fall through */
+ case 2 : /* fall through */
+ case 3 : /* fall through */
+ case 4 : /* fall through */
+ case 5 : /* fall through */
+ case 6 : /* fall through */
+ case 7 : /* fall through */
+ case 8 : /* fall through */
+ case 9 : /* fall through */
+ case 10 : /* fall through */
+ case 11 : /* fall through */
+ case 12 : /* fall through */
+ case 13 : /* fall through */
+ case 14 : /* fall through */
+ case 15 : /* fall through */
+ case 16 : /* fall through */
+ case 17 : /* fall through */
+ case 18 : /* fall through */
+ case 19 : /* fall through */
+ case 20 : /* fall through */
+ case 21 : /* fall through */
+ case 22 : /* fall through */
+ case 23 : /* fall through */
+ case 24 : /* fall through */
+ case 25 : /* fall through */
+ case 26 : /* fall through */
+ case 27 : /* fall through */
+ case 28 : /* fall through */
+ case 29 : /* fall through */
+ case 30 : /* fall through */
+ case 31 : itype = OR1K64BF_INSN_L_J; goto extract_sfmt_l_j;
+ case 32 : /* fall through */
+ case 33 : /* fall through */
+ case 34 : /* fall through */
+ case 35 : /* fall through */
+ case 36 : /* fall through */
+ case 37 : /* fall through */
+ case 38 : /* fall through */
+ case 39 : /* fall through */
+ case 40 : /* fall through */
+ case 41 : /* fall through */
+ case 42 : /* fall through */
+ case 43 : /* fall through */
+ case 44 : /* fall through */
+ case 45 : /* fall through */
+ case 46 : /* fall through */
+ case 47 : /* fall through */
+ case 48 : /* fall through */
+ case 49 : /* fall through */
+ case 50 : /* fall through */
+ case 51 : /* fall through */
+ case 52 : /* fall through */
+ case 53 : /* fall through */
+ case 54 : /* fall through */
+ case 55 : /* fall through */
+ case 56 : /* fall through */
+ case 57 : /* fall through */
+ case 58 : /* fall through */
+ case 59 : /* fall through */
+ case 60 : /* fall through */
+ case 61 : /* fall through */
+ case 62 : /* fall through */
+ case 63 : itype = OR1K64BF_INSN_L_JAL; goto extract_sfmt_l_jal;
+ case 96 : /* fall through */
+ case 97 : /* fall through */
+ case 98 : /* fall through */
+ case 99 : /* fall through */
+ case 100 : /* fall through */
+ case 101 : /* fall through */
+ case 102 : /* fall through */
+ case 103 : /* fall through */
+ case 104 : /* fall through */
+ case 105 : /* fall through */
+ case 106 : /* fall through */
+ case 107 : /* fall through */
+ case 108 : /* fall through */
+ case 109 : /* fall through */
+ case 110 : /* fall through */
+ case 111 : /* fall through */
+ case 112 : /* fall through */
+ case 113 : /* fall through */
+ case 114 : /* fall through */
+ case 115 : /* fall through */
+ case 116 : /* fall through */
+ case 117 : /* fall through */
+ case 118 : /* fall through */
+ case 119 : /* fall through */
+ case 120 : /* fall through */
+ case 121 : /* fall through */
+ case 122 : /* fall through */
+ case 123 : /* fall through */
+ case 124 : /* fall through */
+ case 125 : /* fall through */
+ case 126 : /* fall through */
+ case 127 : itype = OR1K64BF_INSN_L_BNF; goto extract_sfmt_l_bnf;
+ case 128 : /* fall through */
+ case 129 : /* fall through */
+ case 130 : /* fall through */
+ case 131 : /* fall through */
+ case 132 : /* fall through */
+ case 133 : /* fall through */
+ case 134 : /* fall through */
+ case 135 : /* fall through */
+ case 136 : /* fall through */
+ case 137 : /* fall through */
+ case 138 : /* fall through */
+ case 139 : /* fall through */
+ case 140 : /* fall through */
+ case 141 : /* fall through */
+ case 142 : /* fall through */
+ case 143 : /* fall through */
+ case 144 : /* fall through */
+ case 145 : /* fall through */
+ case 146 : /* fall through */
+ case 147 : /* fall through */
+ case 148 : /* fall through */
+ case 149 : /* fall through */
+ case 150 : /* fall through */
+ case 151 : /* fall through */
+ case 152 : /* fall through */
+ case 153 : /* fall through */
+ case 154 : /* fall through */
+ case 155 : /* fall through */
+ case 156 : /* fall through */
+ case 157 : /* fall through */
+ case 158 : /* fall through */
+ case 159 : itype = OR1K64BF_INSN_L_BF; goto extract_sfmt_l_bnf;
+ case 160 : /* fall through */
+ case 161 : /* fall through */
+ case 162 : /* fall through */
+ case 163 : /* fall through */
+ case 164 : /* fall through */
+ case 165 : /* fall through */
+ case 166 : /* fall through */
+ case 167 : /* fall through */
+ case 168 : /* fall through */
+ case 169 : /* fall through */
+ case 170 : /* fall through */
+ case 171 : /* fall through */
+ case 172 : /* fall through */
+ case 173 : /* fall through */
+ case 174 : /* fall through */
+ case 175 : /* fall through */
+ case 176 : /* fall through */
+ case 177 : /* fall through */
+ case 178 : /* fall through */
+ case 179 : /* fall through */
+ case 180 : /* fall through */
+ case 181 : /* fall through */
+ case 182 : /* fall through */
+ case 183 : /* fall through */
+ case 184 : /* fall through */
+ case 185 : /* fall through */
+ case 186 : /* fall through */
+ case 187 : /* fall through */
+ case 188 : /* fall through */
+ case 189 : /* fall through */
+ case 190 : /* fall through */
+ case 191 :
+ if ((entire_insn & 0xffff0000) == 0x15000000)
+ { itype = OR1K64BF_INSN_L_NOP_IMM; goto extract_sfmt_l_nop_imm; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 192 :
+ {
+ unsigned int val = (((insn >> 16) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc1f0000) == 0x18000000)
+ { itype = OR1K64BF_INSN_L_MOVHI; goto extract_sfmt_l_movhi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc1fffff) == 0x18010000)
+ { itype = OR1K64BF_INSN_L_MACRC; goto extract_sfmt_l_macrc; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 193 : /* fall through */
+ case 194 : /* fall through */
+ case 195 : /* fall through */
+ case 196 : /* fall through */
+ case 197 : /* fall through */
+ case 198 : /* fall through */
+ case 199 : /* fall through */
+ case 200 : /* fall through */
+ case 201 : /* fall through */
+ case 202 : /* fall through */
+ case 203 : /* fall through */
+ case 204 : /* fall through */
+ case 205 : /* fall through */
+ case 206 : /* fall through */
+ case 207 : /* fall through */
+ case 208 : /* fall through */
+ case 209 : /* fall through */
+ case 210 : /* fall through */
+ case 211 : /* fall through */
+ case 212 : /* fall through */
+ case 213 : /* fall through */
+ case 214 : /* fall through */
+ case 215 : /* fall through */
+ case 216 : /* fall through */
+ case 217 : /* fall through */
+ case 218 : /* fall through */
+ case 219 : /* fall through */
+ case 220 : /* fall through */
+ case 221 : /* fall through */
+ case 222 : /* fall through */
+ case 223 :
+ if ((entire_insn & 0xfc1f0000) == 0x18000000)
+ { itype = OR1K64BF_INSN_L_MOVHI; goto extract_sfmt_l_movhi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 256 : /* fall through */
+ case 257 : /* fall through */
+ case 258 : /* fall through */
+ case 259 : /* fall through */
+ case 260 : /* fall through */
+ case 261 : /* fall through */
+ case 262 : /* fall through */
+ case 263 : /* fall through */
+ case 264 : /* fall through */
+ case 265 : /* fall through */
+ case 266 : /* fall through */
+ case 267 : /* fall through */
+ case 268 : /* fall through */
+ case 269 : /* fall through */
+ case 270 : /* fall through */
+ case 271 : /* fall through */
+ case 272 : /* fall through */
+ case 273 : /* fall through */
+ case 274 : /* fall through */
+ case 275 : /* fall through */
+ case 276 : /* fall through */
+ case 277 : /* fall through */
+ case 278 : /* fall through */
+ case 279 : /* fall through */
+ case 280 : /* fall through */
+ case 281 : /* fall through */
+ case 282 : /* fall through */
+ case 283 : /* fall through */
+ case 284 : /* fall through */
+ case 285 : /* fall through */
+ case 286 : /* fall through */
+ case 287 :
+ {
+ unsigned int val = (((insn >> 24) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xffff0000) == 0x20000000)
+ { itype = OR1K64BF_INSN_L_SYS; goto extract_sfmt_l_trap; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xffff0000) == 0x21000000)
+ { itype = OR1K64BF_INSN_L_TRAP; goto extract_sfmt_l_trap; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 288 :
+ if ((entire_insn & 0xffffffff) == 0x24000000)
+ { itype = OR1K64BF_INSN_L_RFE; goto extract_sfmt_l_trap; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 544 :
+ if ((entire_insn & 0xffff07ff) == 0x44000000)
+ { itype = OR1K64BF_INSN_L_JR; goto extract_sfmt_l_jr; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 576 :
+ if ((entire_insn & 0xffff07ff) == 0x48000000)
+ { itype = OR1K64BF_INSN_L_JALR; goto extract_sfmt_l_jalr; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 608 : /* fall through */
+ case 609 : /* fall through */
+ case 610 : /* fall through */
+ case 611 : /* fall through */
+ case 612 : /* fall through */
+ case 613 : /* fall through */
+ case 614 : /* fall through */
+ case 615 : /* fall through */
+ case 616 : /* fall through */
+ case 617 : /* fall through */
+ case 618 : /* fall through */
+ case 619 : /* fall through */
+ case 620 : /* fall through */
+ case 621 : /* fall through */
+ case 622 : /* fall through */
+ case 623 : /* fall through */
+ case 624 : /* fall through */
+ case 625 : /* fall through */
+ case 626 : /* fall through */
+ case 627 : /* fall through */
+ case 628 : /* fall through */
+ case 629 : /* fall through */
+ case 630 : /* fall through */
+ case 631 : /* fall through */
+ case 632 : /* fall through */
+ case 633 : /* fall through */
+ case 634 : /* fall through */
+ case 635 : /* fall through */
+ case 636 : /* fall through */
+ case 637 : /* fall through */
+ case 638 : /* fall through */
+ case 639 :
+ if ((entire_insn & 0xfc1f0000) == 0x4c000000)
+ { itype = OR1K64BF_INSN_L_MACI; goto extract_sfmt_l_maci; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 896 :
+ if ((entire_insn & 0xffffffff) == 0x70000000)
+ { itype = OR1K64BF_INSN_L_CUST1; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 928 :
+ if ((entire_insn & 0xffffffff) == 0x74000000)
+ { itype = OR1K64BF_INSN_L_CUST2; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 960 :
+ if ((entire_insn & 0xffffffff) == 0x78000000)
+ { itype = OR1K64BF_INSN_L_CUST3; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 992 :
+ if ((entire_insn & 0xffffffff) == 0x7c000000)
+ { itype = OR1K64BF_INSN_L_CUST4; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1056 : /* fall through */
+ case 1057 : /* fall through */
+ case 1058 : /* fall through */
+ case 1059 : /* fall through */
+ case 1060 : /* fall through */
+ case 1061 : /* fall through */
+ case 1062 : /* fall through */
+ case 1063 : /* fall through */
+ case 1064 : /* fall through */
+ case 1065 : /* fall through */
+ case 1066 : /* fall through */
+ case 1067 : /* fall through */
+ case 1068 : /* fall through */
+ case 1069 : /* fall through */
+ case 1070 : /* fall through */
+ case 1071 : /* fall through */
+ case 1072 : /* fall through */
+ case 1073 : /* fall through */
+ case 1074 : /* fall through */
+ case 1075 : /* fall through */
+ case 1076 : /* fall through */
+ case 1077 : /* fall through */
+ case 1078 : /* fall through */
+ case 1079 : /* fall through */
+ case 1080 : /* fall through */
+ case 1081 : /* fall through */
+ case 1082 : /* fall through */
+ case 1083 : /* fall through */
+ case 1084 : /* fall through */
+ case 1085 : /* fall through */
+ case 1086 : /* fall through */
+ case 1087 : itype = OR1K64BF_INSN_L_LWZ; goto extract_sfmt_l_lwz;
+ case 1088 : /* fall through */
+ case 1089 : /* fall through */
+ case 1090 : /* fall through */
+ case 1091 : /* fall through */
+ case 1092 : /* fall through */
+ case 1093 : /* fall through */
+ case 1094 : /* fall through */
+ case 1095 : /* fall through */
+ case 1096 : /* fall through */
+ case 1097 : /* fall through */
+ case 1098 : /* fall through */
+ case 1099 : /* fall through */
+ case 1100 : /* fall through */
+ case 1101 : /* fall through */
+ case 1102 : /* fall through */
+ case 1103 : /* fall through */
+ case 1104 : /* fall through */
+ case 1105 : /* fall through */
+ case 1106 : /* fall through */
+ case 1107 : /* fall through */
+ case 1108 : /* fall through */
+ case 1109 : /* fall through */
+ case 1110 : /* fall through */
+ case 1111 : /* fall through */
+ case 1112 : /* fall through */
+ case 1113 : /* fall through */
+ case 1114 : /* fall through */
+ case 1115 : /* fall through */
+ case 1116 : /* fall through */
+ case 1117 : /* fall through */
+ case 1118 : /* fall through */
+ case 1119 : itype = OR1K64BF_INSN_L_LWS; goto extract_sfmt_l_lws;
+ case 1120 : /* fall through */
+ case 1121 : /* fall through */
+ case 1122 : /* fall through */
+ case 1123 : /* fall through */
+ case 1124 : /* fall through */
+ case 1125 : /* fall through */
+ case 1126 : /* fall through */
+ case 1127 : /* fall through */
+ case 1128 : /* fall through */
+ case 1129 : /* fall through */
+ case 1130 : /* fall through */
+ case 1131 : /* fall through */
+ case 1132 : /* fall through */
+ case 1133 : /* fall through */
+ case 1134 : /* fall through */
+ case 1135 : /* fall through */
+ case 1136 : /* fall through */
+ case 1137 : /* fall through */
+ case 1138 : /* fall through */
+ case 1139 : /* fall through */
+ case 1140 : /* fall through */
+ case 1141 : /* fall through */
+ case 1142 : /* fall through */
+ case 1143 : /* fall through */
+ case 1144 : /* fall through */
+ case 1145 : /* fall through */
+ case 1146 : /* fall through */
+ case 1147 : /* fall through */
+ case 1148 : /* fall through */
+ case 1149 : /* fall through */
+ case 1150 : /* fall through */
+ case 1151 : itype = OR1K64BF_INSN_L_LBZ; goto extract_sfmt_l_lbz;
+ case 1152 : /* fall through */
+ case 1153 : /* fall through */
+ case 1154 : /* fall through */
+ case 1155 : /* fall through */
+ case 1156 : /* fall through */
+ case 1157 : /* fall through */
+ case 1158 : /* fall through */
+ case 1159 : /* fall through */
+ case 1160 : /* fall through */
+ case 1161 : /* fall through */
+ case 1162 : /* fall through */
+ case 1163 : /* fall through */
+ case 1164 : /* fall through */
+ case 1165 : /* fall through */
+ case 1166 : /* fall through */
+ case 1167 : /* fall through */
+ case 1168 : /* fall through */
+ case 1169 : /* fall through */
+ case 1170 : /* fall through */
+ case 1171 : /* fall through */
+ case 1172 : /* fall through */
+ case 1173 : /* fall through */
+ case 1174 : /* fall through */
+ case 1175 : /* fall through */
+ case 1176 : /* fall through */
+ case 1177 : /* fall through */
+ case 1178 : /* fall through */
+ case 1179 : /* fall through */
+ case 1180 : /* fall through */
+ case 1181 : /* fall through */
+ case 1182 : /* fall through */
+ case 1183 : itype = OR1K64BF_INSN_L_LBS; goto extract_sfmt_l_lbs;
+ case 1184 : /* fall through */
+ case 1185 : /* fall through */
+ case 1186 : /* fall through */
+ case 1187 : /* fall through */
+ case 1188 : /* fall through */
+ case 1189 : /* fall through */
+ case 1190 : /* fall through */
+ case 1191 : /* fall through */
+ case 1192 : /* fall through */
+ case 1193 : /* fall through */
+ case 1194 : /* fall through */
+ case 1195 : /* fall through */
+ case 1196 : /* fall through */
+ case 1197 : /* fall through */
+ case 1198 : /* fall through */
+ case 1199 : /* fall through */
+ case 1200 : /* fall through */
+ case 1201 : /* fall through */
+ case 1202 : /* fall through */
+ case 1203 : /* fall through */
+ case 1204 : /* fall through */
+ case 1205 : /* fall through */
+ case 1206 : /* fall through */
+ case 1207 : /* fall through */
+ case 1208 : /* fall through */
+ case 1209 : /* fall through */
+ case 1210 : /* fall through */
+ case 1211 : /* fall through */
+ case 1212 : /* fall through */
+ case 1213 : /* fall through */
+ case 1214 : /* fall through */
+ case 1215 : itype = OR1K64BF_INSN_L_LHZ; goto extract_sfmt_l_lhz;
+ case 1216 : /* fall through */
+ case 1217 : /* fall through */
+ case 1218 : /* fall through */
+ case 1219 : /* fall through */
+ case 1220 : /* fall through */
+ case 1221 : /* fall through */
+ case 1222 : /* fall through */
+ case 1223 : /* fall through */
+ case 1224 : /* fall through */
+ case 1225 : /* fall through */
+ case 1226 : /* fall through */
+ case 1227 : /* fall through */
+ case 1228 : /* fall through */
+ case 1229 : /* fall through */
+ case 1230 : /* fall through */
+ case 1231 : /* fall through */
+ case 1232 : /* fall through */
+ case 1233 : /* fall through */
+ case 1234 : /* fall through */
+ case 1235 : /* fall through */
+ case 1236 : /* fall through */
+ case 1237 : /* fall through */
+ case 1238 : /* fall through */
+ case 1239 : /* fall through */
+ case 1240 : /* fall through */
+ case 1241 : /* fall through */
+ case 1242 : /* fall through */
+ case 1243 : /* fall through */
+ case 1244 : /* fall through */
+ case 1245 : /* fall through */
+ case 1246 : /* fall through */
+ case 1247 : itype = OR1K64BF_INSN_L_LHS; goto extract_sfmt_l_lhs;
+ case 1248 : /* fall through */
+ case 1249 : /* fall through */
+ case 1250 : /* fall through */
+ case 1251 : /* fall through */
+ case 1252 : /* fall through */
+ case 1253 : /* fall through */
+ case 1254 : /* fall through */
+ case 1255 : /* fall through */
+ case 1256 : /* fall through */
+ case 1257 : /* fall through */
+ case 1258 : /* fall through */
+ case 1259 : /* fall through */
+ case 1260 : /* fall through */
+ case 1261 : /* fall through */
+ case 1262 : /* fall through */
+ case 1263 : /* fall through */
+ case 1264 : /* fall through */
+ case 1265 : /* fall through */
+ case 1266 : /* fall through */
+ case 1267 : /* fall through */
+ case 1268 : /* fall through */
+ case 1269 : /* fall through */
+ case 1270 : /* fall through */
+ case 1271 : /* fall through */
+ case 1272 : /* fall through */
+ case 1273 : /* fall through */
+ case 1274 : /* fall through */
+ case 1275 : /* fall through */
+ case 1276 : /* fall through */
+ case 1277 : /* fall through */
+ case 1278 : /* fall through */
+ case 1279 : itype = OR1K64BF_INSN_L_ADDI; goto extract_sfmt_l_addi;
+ case 1280 : /* fall through */
+ case 1281 : /* fall through */
+ case 1282 : /* fall through */
+ case 1283 : /* fall through */
+ case 1284 : /* fall through */
+ case 1285 : /* fall through */
+ case 1286 : /* fall through */
+ case 1287 : /* fall through */
+ case 1288 : /* fall through */
+ case 1289 : /* fall through */
+ case 1290 : /* fall through */
+ case 1291 : /* fall through */
+ case 1292 : /* fall through */
+ case 1293 : /* fall through */
+ case 1294 : /* fall through */
+ case 1295 : /* fall through */
+ case 1296 : /* fall through */
+ case 1297 : /* fall through */
+ case 1298 : /* fall through */
+ case 1299 : /* fall through */
+ case 1300 : /* fall through */
+ case 1301 : /* fall through */
+ case 1302 : /* fall through */
+ case 1303 : /* fall through */
+ case 1304 : /* fall through */
+ case 1305 : /* fall through */
+ case 1306 : /* fall through */
+ case 1307 : /* fall through */
+ case 1308 : /* fall through */
+ case 1309 : /* fall through */
+ case 1310 : /* fall through */
+ case 1311 : itype = OR1K64BF_INSN_L_ADDIC; goto extract_sfmt_l_addic;
+ case 1312 : /* fall through */
+ case 1313 : /* fall through */
+ case 1314 : /* fall through */
+ case 1315 : /* fall through */
+ case 1316 : /* fall through */
+ case 1317 : /* fall through */
+ case 1318 : /* fall through */
+ case 1319 : /* fall through */
+ case 1320 : /* fall through */
+ case 1321 : /* fall through */
+ case 1322 : /* fall through */
+ case 1323 : /* fall through */
+ case 1324 : /* fall through */
+ case 1325 : /* fall through */
+ case 1326 : /* fall through */
+ case 1327 : /* fall through */
+ case 1328 : /* fall through */
+ case 1329 : /* fall through */
+ case 1330 : /* fall through */
+ case 1331 : /* fall through */
+ case 1332 : /* fall through */
+ case 1333 : /* fall through */
+ case 1334 : /* fall through */
+ case 1335 : /* fall through */
+ case 1336 : /* fall through */
+ case 1337 : /* fall through */
+ case 1338 : /* fall through */
+ case 1339 : /* fall through */
+ case 1340 : /* fall through */
+ case 1341 : /* fall through */
+ case 1342 : /* fall through */
+ case 1343 : itype = OR1K64BF_INSN_L_ANDI; goto extract_sfmt_l_andi;
+ case 1344 : /* fall through */
+ case 1345 : /* fall through */
+ case 1346 : /* fall through */
+ case 1347 : /* fall through */
+ case 1348 : /* fall through */
+ case 1349 : /* fall through */
+ case 1350 : /* fall through */
+ case 1351 : /* fall through */
+ case 1352 : /* fall through */
+ case 1353 : /* fall through */
+ case 1354 : /* fall through */
+ case 1355 : /* fall through */
+ case 1356 : /* fall through */
+ case 1357 : /* fall through */
+ case 1358 : /* fall through */
+ case 1359 : /* fall through */
+ case 1360 : /* fall through */
+ case 1361 : /* fall through */
+ case 1362 : /* fall through */
+ case 1363 : /* fall through */
+ case 1364 : /* fall through */
+ case 1365 : /* fall through */
+ case 1366 : /* fall through */
+ case 1367 : /* fall through */
+ case 1368 : /* fall through */
+ case 1369 : /* fall through */
+ case 1370 : /* fall through */
+ case 1371 : /* fall through */
+ case 1372 : /* fall through */
+ case 1373 : /* fall through */
+ case 1374 : /* fall through */
+ case 1375 : itype = OR1K64BF_INSN_L_ORI; goto extract_sfmt_l_andi;
+ case 1376 : /* fall through */
+ case 1377 : /* fall through */
+ case 1378 : /* fall through */
+ case 1379 : /* fall through */
+ case 1380 : /* fall through */
+ case 1381 : /* fall through */
+ case 1382 : /* fall through */
+ case 1383 : /* fall through */
+ case 1384 : /* fall through */
+ case 1385 : /* fall through */
+ case 1386 : /* fall through */
+ case 1387 : /* fall through */
+ case 1388 : /* fall through */
+ case 1389 : /* fall through */
+ case 1390 : /* fall through */
+ case 1391 : /* fall through */
+ case 1392 : /* fall through */
+ case 1393 : /* fall through */
+ case 1394 : /* fall through */
+ case 1395 : /* fall through */
+ case 1396 : /* fall through */
+ case 1397 : /* fall through */
+ case 1398 : /* fall through */
+ case 1399 : /* fall through */
+ case 1400 : /* fall through */
+ case 1401 : /* fall through */
+ case 1402 : /* fall through */
+ case 1403 : /* fall through */
+ case 1404 : /* fall through */
+ case 1405 : /* fall through */
+ case 1406 : /* fall through */
+ case 1407 : itype = OR1K64BF_INSN_L_XORI; goto extract_sfmt_l_xori;
+ case 1408 : /* fall through */
+ case 1409 : /* fall through */
+ case 1410 : /* fall through */
+ case 1411 : /* fall through */
+ case 1412 : /* fall through */
+ case 1413 : /* fall through */
+ case 1414 : /* fall through */
+ case 1415 : /* fall through */
+ case 1416 : /* fall through */
+ case 1417 : /* fall through */
+ case 1418 : /* fall through */
+ case 1419 : /* fall through */
+ case 1420 : /* fall through */
+ case 1421 : /* fall through */
+ case 1422 : /* fall through */
+ case 1423 : /* fall through */
+ case 1424 : /* fall through */
+ case 1425 : /* fall through */
+ case 1426 : /* fall through */
+ case 1427 : /* fall through */
+ case 1428 : /* fall through */
+ case 1429 : /* fall through */
+ case 1430 : /* fall through */
+ case 1431 : /* fall through */
+ case 1432 : /* fall through */
+ case 1433 : /* fall through */
+ case 1434 : /* fall through */
+ case 1435 : /* fall through */
+ case 1436 : /* fall through */
+ case 1437 : /* fall through */
+ case 1438 : /* fall through */
+ case 1439 : itype = OR1K64BF_INSN_L_MULI; goto extract_sfmt_l_addi;
+ case 1440 : /* fall through */
+ case 1441 : /* fall through */
+ case 1442 : /* fall through */
+ case 1443 : /* fall through */
+ case 1444 : /* fall through */
+ case 1445 : /* fall through */
+ case 1446 : /* fall through */
+ case 1447 : /* fall through */
+ case 1448 : /* fall through */
+ case 1449 : /* fall through */
+ case 1450 : /* fall through */
+ case 1451 : /* fall through */
+ case 1452 : /* fall through */
+ case 1453 : /* fall through */
+ case 1454 : /* fall through */
+ case 1455 : /* fall through */
+ case 1456 : /* fall through */
+ case 1457 : /* fall through */
+ case 1458 : /* fall through */
+ case 1459 : /* fall through */
+ case 1460 : /* fall through */
+ case 1461 : /* fall through */
+ case 1462 : /* fall through */
+ case 1463 : /* fall through */
+ case 1464 : /* fall through */
+ case 1465 : /* fall through */
+ case 1466 : /* fall through */
+ case 1467 : /* fall through */
+ case 1468 : /* fall through */
+ case 1469 : /* fall through */
+ case 1470 : /* fall through */
+ case 1471 : itype = OR1K64BF_INSN_L_MFSPR; goto extract_sfmt_l_mfspr;
+ case 1472 : /* fall through */
+ case 1473 : /* fall through */
+ case 1474 : /* fall through */
+ case 1475 : /* fall through */
+ case 1476 : /* fall through */
+ case 1477 : /* fall through */
+ case 1478 : /* fall through */
+ case 1479 : /* fall through */
+ case 1480 : /* fall through */
+ case 1481 : /* fall through */
+ case 1482 : /* fall through */
+ case 1483 : /* fall through */
+ case 1484 : /* fall through */
+ case 1485 : /* fall through */
+ case 1486 : /* fall through */
+ case 1487 : /* fall through */
+ case 1488 : /* fall through */
+ case 1489 : /* fall through */
+ case 1490 : /* fall through */
+ case 1491 : /* fall through */
+ case 1492 : /* fall through */
+ case 1493 : /* fall through */
+ case 1494 : /* fall through */
+ case 1495 : /* fall through */
+ case 1496 : /* fall through */
+ case 1497 : /* fall through */
+ case 1498 : /* fall through */
+ case 1499 : /* fall through */
+ case 1500 : /* fall through */
+ case 1501 : /* fall through */
+ case 1502 : /* fall through */
+ case 1503 :
+ {
+ unsigned int val = (((insn >> 6) & (3 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb8000000)
+ { itype = OR1K64BF_INSN_L_SLLI; goto extract_sfmt_l_slli; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb8000040)
+ { itype = OR1K64BF_INSN_L_SRLI; goto extract_sfmt_l_slli; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb8000080)
+ { itype = OR1K64BF_INSN_L_SRAI; goto extract_sfmt_l_slli; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xfc00ffc0) == 0xb80000c0)
+ { itype = OR1K64BF_INSN_L_RORI; goto extract_sfmt_l_slli; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1504 : /* fall through */
+ case 1505 : /* fall through */
+ case 1506 : /* fall through */
+ case 1507 : /* fall through */
+ case 1508 : /* fall through */
+ case 1509 : /* fall through */
+ case 1510 : /* fall through */
+ case 1511 : /* fall through */
+ case 1512 : /* fall through */
+ case 1513 : /* fall through */
+ case 1514 : /* fall through */
+ case 1515 : /* fall through */
+ case 1516 : /* fall through */
+ case 1517 : /* fall through */
+ case 1518 : /* fall through */
+ case 1519 : /* fall through */
+ case 1520 : /* fall through */
+ case 1521 : /* fall through */
+ case 1522 : /* fall through */
+ case 1523 : /* fall through */
+ case 1524 : /* fall through */
+ case 1525 : /* fall through */
+ case 1526 : /* fall through */
+ case 1527 : /* fall through */
+ case 1528 : /* fall through */
+ case 1529 : /* fall through */
+ case 1530 : /* fall through */
+ case 1531 : /* fall through */
+ case 1532 : /* fall through */
+ case 1533 : /* fall through */
+ case 1534 : /* fall through */
+ case 1535 :
+ {
+ unsigned int val = (((insn >> 21) & (15 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xffe00000) == 0xbc000000)
+ { itype = OR1K64BF_INSN_L_SFEQI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xffe00000) == 0xbc200000)
+ { itype = OR1K64BF_INSN_L_SFNEI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xffe00000) == 0xbc400000)
+ { itype = OR1K64BF_INSN_L_SFGTUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xffe00000) == 0xbc600000)
+ { itype = OR1K64BF_INSN_L_SFGEUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 4 :
+ if ((entire_insn & 0xffe00000) == 0xbc800000)
+ { itype = OR1K64BF_INSN_L_SFLTUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 5 :
+ if ((entire_insn & 0xffe00000) == 0xbca00000)
+ { itype = OR1K64BF_INSN_L_SFLEUI; goto extract_sfmt_l_sfgtui; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 10 :
+ if ((entire_insn & 0xffe00000) == 0xbd400000)
+ { itype = OR1K64BF_INSN_L_SFGTSI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 11 :
+ if ((entire_insn & 0xffe00000) == 0xbd600000)
+ { itype = OR1K64BF_INSN_L_SFGESI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 12 :
+ if ((entire_insn & 0xffe00000) == 0xbd800000)
+ { itype = OR1K64BF_INSN_L_SFLTSI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 13 :
+ if ((entire_insn & 0xffe00000) == 0xbda00000)
+ { itype = OR1K64BF_INSN_L_SFLESI; goto extract_sfmt_l_sfgtsi; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1536 : /* fall through */
+ case 1537 : /* fall through */
+ case 1538 : /* fall through */
+ case 1539 : /* fall through */
+ case 1540 : /* fall through */
+ case 1541 : /* fall through */
+ case 1542 : /* fall through */
+ case 1543 : /* fall through */
+ case 1544 : /* fall through */
+ case 1545 : /* fall through */
+ case 1546 : /* fall through */
+ case 1547 : /* fall through */
+ case 1548 : /* fall through */
+ case 1549 : /* fall through */
+ case 1550 : /* fall through */
+ case 1551 : /* fall through */
+ case 1552 : /* fall through */
+ case 1553 : /* fall through */
+ case 1554 : /* fall through */
+ case 1555 : /* fall through */
+ case 1556 : /* fall through */
+ case 1557 : /* fall through */
+ case 1558 : /* fall through */
+ case 1559 : /* fall through */
+ case 1560 : /* fall through */
+ case 1561 : /* fall through */
+ case 1562 : /* fall through */
+ case 1563 : /* fall through */
+ case 1564 : /* fall through */
+ case 1565 : /* fall through */
+ case 1566 : /* fall through */
+ case 1567 : itype = OR1K64BF_INSN_L_MTSPR; goto extract_sfmt_l_mtspr;
+ case 1569 :
+ if ((entire_insn & 0xffe007ff) == 0xc4000001)
+ { itype = OR1K64BF_INSN_L_MAC; goto extract_sfmt_l_mac; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1570 :
+ if ((entire_insn & 0xffe007ff) == 0xc4000002)
+ { itype = OR1K64BF_INSN_L_MSB; goto extract_sfmt_l_mac; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1600 :
+ {
+ unsigned int val = (((insn >> 5) & (7 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000000)
+ { itype = OR1K64BF_INSN_LF_ADD_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 7 :
+ if ((entire_insn & 0xffe007ff) == 0xc80000e0)
+ { itype = OR1K64BF_INSN_LF_CUST1_D; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1601 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000001)
+ { itype = OR1K64BF_INSN_LF_SUB_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1602 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000002)
+ { itype = OR1K64BF_INSN_LF_MUL_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1603 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000003)
+ { itype = OR1K64BF_INSN_LF_DIV_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1604 :
+ if ((entire_insn & 0xfc00ffff) == 0xc8000004)
+ { itype = OR1K64BF_INSN_LF_ITOF_S; goto extract_sfmt_lf_itof_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1605 :
+ if ((entire_insn & 0xfc00ffff) == 0xc8000005)
+ { itype = OR1K64BF_INSN_LF_FTOI_S; goto extract_sfmt_lf_ftoi_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1606 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000006)
+ { itype = OR1K64BF_INSN_LF_REM_S; goto extract_sfmt_lf_add_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1607 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000007)
+ { itype = OR1K64BF_INSN_LF_MADD_S; goto extract_sfmt_lf_madd_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1608 :
+ if ((entire_insn & 0xffe007ff) == 0xc8000008)
+ { itype = OR1K64BF_INSN_LF_EQ_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1609 :
+ if ((entire_insn & 0xffe007ff) == 0xc8000009)
+ { itype = OR1K64BF_INSN_LF_NE_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1610 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000a)
+ { itype = OR1K64BF_INSN_LF_GT_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1611 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000b)
+ { itype = OR1K64BF_INSN_LF_GE_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1612 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000c)
+ { itype = OR1K64BF_INSN_LF_LT_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1613 :
+ if ((entire_insn & 0xffe007ff) == 0xc800000d)
+ { itype = OR1K64BF_INSN_LF_LE_S; goto extract_sfmt_lf_eq_s; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1616 :
+ {
+ unsigned int val = (((insn >> 6) & (3 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000010)
+ { itype = OR1K64BF_INSN_LF_ADD_D; goto extract_sfmt_lf_add_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xffe007ff) == 0xc80000d0)
+ { itype = OR1K64BF_INSN_LF_CUST1_S; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1617 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000011)
+ { itype = OR1K64BF_INSN_LF_SUB_D; goto extract_sfmt_lf_add_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1618 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000012)
+ { itype = OR1K64BF_INSN_LF_MUL_D; goto extract_sfmt_lf_add_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1619 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000013)
+ { itype = OR1K64BF_INSN_LF_DIV_D; goto extract_sfmt_lf_add_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1620 :
+ if ((entire_insn & 0xfc00ffff) == 0xc8000014)
+ { itype = OR1K64BF_INSN_LF_ITOF_D; goto extract_sfmt_lf_itof_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1621 :
+ if ((entire_insn & 0xfc00ffff) == 0xc8000015)
+ { itype = OR1K64BF_INSN_LF_FTOI_D; goto extract_sfmt_lf_ftoi_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1622 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000016)
+ { itype = OR1K64BF_INSN_LF_REM_D; goto extract_sfmt_lf_add_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1623 :
+ if ((entire_insn & 0xfc0007ff) == 0xc8000017)
+ { itype = OR1K64BF_INSN_LF_MADD_D; goto extract_sfmt_lf_madd_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1624 :
+ if ((entire_insn & 0xffe007ff) == 0xc8000018)
+ { itype = OR1K64BF_INSN_LF_EQ_D; goto extract_sfmt_lf_eq_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1625 :
+ if ((entire_insn & 0xffe007ff) == 0xc8000019)
+ { itype = OR1K64BF_INSN_LF_NE_D; goto extract_sfmt_lf_eq_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1626 :
+ if ((entire_insn & 0xffe007ff) == 0xc800001a)
+ { itype = OR1K64BF_INSN_LF_GT_D; goto extract_sfmt_lf_eq_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1627 :
+ if ((entire_insn & 0xffe007ff) == 0xc800001b)
+ { itype = OR1K64BF_INSN_LF_GE_D; goto extract_sfmt_lf_eq_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1628 :
+ if ((entire_insn & 0xffe007ff) == 0xc800001c)
+ { itype = OR1K64BF_INSN_LF_LT_D; goto extract_sfmt_lf_eq_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1629 :
+ if ((entire_insn & 0xffe007ff) == 0xc800001d)
+ { itype = OR1K64BF_INSN_LF_LE_D; goto extract_sfmt_lf_eq_d; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1696 : /* fall through */
+ case 1697 : /* fall through */
+ case 1698 : /* fall through */
+ case 1699 : /* fall through */
+ case 1700 : /* fall through */
+ case 1701 : /* fall through */
+ case 1702 : /* fall through */
+ case 1703 : /* fall through */
+ case 1704 : /* fall through */
+ case 1705 : /* fall through */
+ case 1706 : /* fall through */
+ case 1707 : /* fall through */
+ case 1708 : /* fall through */
+ case 1709 : /* fall through */
+ case 1710 : /* fall through */
+ case 1711 : /* fall through */
+ case 1712 : /* fall through */
+ case 1713 : /* fall through */
+ case 1714 : /* fall through */
+ case 1715 : /* fall through */
+ case 1716 : /* fall through */
+ case 1717 : /* fall through */
+ case 1718 : /* fall through */
+ case 1719 : /* fall through */
+ case 1720 : /* fall through */
+ case 1721 : /* fall through */
+ case 1722 : /* fall through */
+ case 1723 : /* fall through */
+ case 1724 : /* fall through */
+ case 1725 : /* fall through */
+ case 1726 : /* fall through */
+ case 1727 : itype = OR1K64BF_INSN_L_SW; goto extract_sfmt_l_sw;
+ case 1728 : /* fall through */
+ case 1729 : /* fall through */
+ case 1730 : /* fall through */
+ case 1731 : /* fall through */
+ case 1732 : /* fall through */
+ case 1733 : /* fall through */
+ case 1734 : /* fall through */
+ case 1735 : /* fall through */
+ case 1736 : /* fall through */
+ case 1737 : /* fall through */
+ case 1738 : /* fall through */
+ case 1739 : /* fall through */
+ case 1740 : /* fall through */
+ case 1741 : /* fall through */
+ case 1742 : /* fall through */
+ case 1743 : /* fall through */
+ case 1744 : /* fall through */
+ case 1745 : /* fall through */
+ case 1746 : /* fall through */
+ case 1747 : /* fall through */
+ case 1748 : /* fall through */
+ case 1749 : /* fall through */
+ case 1750 : /* fall through */
+ case 1751 : /* fall through */
+ case 1752 : /* fall through */
+ case 1753 : /* fall through */
+ case 1754 : /* fall through */
+ case 1755 : /* fall through */
+ case 1756 : /* fall through */
+ case 1757 : /* fall through */
+ case 1758 : /* fall through */
+ case 1759 : itype = OR1K64BF_INSN_L_SB; goto extract_sfmt_l_sb;
+ case 1760 : /* fall through */
+ case 1761 : /* fall through */
+ case 1762 : /* fall through */
+ case 1763 : /* fall through */
+ case 1764 : /* fall through */
+ case 1765 : /* fall through */
+ case 1766 : /* fall through */
+ case 1767 : /* fall through */
+ case 1768 : /* fall through */
+ case 1769 : /* fall through */
+ case 1770 : /* fall through */
+ case 1771 : /* fall through */
+ case 1772 : /* fall through */
+ case 1773 : /* fall through */
+ case 1774 : /* fall through */
+ case 1775 : /* fall through */
+ case 1776 : /* fall through */
+ case 1777 : /* fall through */
+ case 1778 : /* fall through */
+ case 1779 : /* fall through */
+ case 1780 : /* fall through */
+ case 1781 : /* fall through */
+ case 1782 : /* fall through */
+ case 1783 : /* fall through */
+ case 1784 : /* fall through */
+ case 1785 : /* fall through */
+ case 1786 : /* fall through */
+ case 1787 : /* fall through */
+ case 1788 : /* fall through */
+ case 1789 : /* fall through */
+ case 1790 : /* fall through */
+ case 1791 : itype = OR1K64BF_INSN_L_SH; goto extract_sfmt_l_sh;
+ case 1792 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000000)
+ { itype = OR1K64BF_INSN_L_ADD; goto extract_sfmt_l_add; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1793 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000001)
+ { itype = OR1K64BF_INSN_L_ADDC; goto extract_sfmt_l_addc; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1794 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000002)
+ { itype = OR1K64BF_INSN_L_SUB; goto extract_sfmt_l_add; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1795 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000003)
+ { itype = OR1K64BF_INSN_L_AND; goto extract_sfmt_l_and; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1796 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000004)
+ { itype = OR1K64BF_INSN_L_OR; goto extract_sfmt_l_and; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1797 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000005)
+ { itype = OR1K64BF_INSN_L_XOR; goto extract_sfmt_l_and; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1798 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000306)
+ { itype = OR1K64BF_INSN_L_MUL; goto extract_sfmt_l_add; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1800 :
+ {
+ unsigned int val = (((insn >> 6) & (3 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000008)
+ { itype = OR1K64BF_INSN_L_SLL; goto extract_sfmt_l_sll; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000048)
+ { itype = OR1K64BF_INSN_L_SRL; goto extract_sfmt_l_sll; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000088)
+ { itype = OR1K64BF_INSN_L_SRA; goto extract_sfmt_l_sll; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xfc0007ff) == 0xe00000c8)
+ { itype = OR1K64BF_INSN_L_ROR; goto extract_sfmt_l_sll; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1801 :
+ if ((entire_insn & 0xfc0007ff) == 0xe0000309)
+ { itype = OR1K64BF_INSN_L_DIV; goto extract_sfmt_l_div; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1802 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000030a)
+ { itype = OR1K64BF_INSN_L_DIVU; goto extract_sfmt_l_div; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1803 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000030b)
+ { itype = OR1K64BF_INSN_L_MULU; goto extract_sfmt_l_add; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1804 :
+ {
+ unsigned int val = (((insn >> 6) & (3 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000000c)
+ { itype = OR1K64BF_INSN_L_EXTHS; goto extract_sfmt_l_exths; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000004c)
+ { itype = OR1K64BF_INSN_L_EXTBS; goto extract_sfmt_l_exths; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000008c)
+ { itype = OR1K64BF_INSN_L_EXTHZ; goto extract_sfmt_l_exths; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xfc00ffff) == 0xe00000cc)
+ { itype = OR1K64BF_INSN_L_EXTBZ; goto extract_sfmt_l_exths; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1805 :
+ {
+ unsigned int val = (((insn >> 6) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000000d)
+ { itype = OR1K64BF_INSN_L_EXTWS; goto extract_sfmt_l_exths; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc00ffff) == 0xe000004d)
+ { itype = OR1K64BF_INSN_L_EXTWZ; goto extract_sfmt_l_exths; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1806 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000000e)
+ { itype = OR1K64BF_INSN_L_CMOV; goto extract_sfmt_l_cmov; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1807 :
+ {
+ unsigned int val = (((insn >> 8) & (1 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000000f)
+ { itype = OR1K64BF_INSN_L_FF1; goto extract_sfmt_l_ff1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfc0007ff) == 0xe000010f)
+ { itype = OR1K64BF_INSN_L_FL1; goto extract_sfmt_l_ff1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1824 :
+ {
+ unsigned int val = (((insn >> 21) & (15 << 0)));
+ switch (val)
+ {
+ case 0 :
+ if ((entire_insn & 0xffe007ff) == 0xe4000000)
+ { itype = OR1K64BF_INSN_L_SFEQ; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xffe007ff) == 0xe4200000)
+ { itype = OR1K64BF_INSN_L_SFNE; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xffe007ff) == 0xe4400000)
+ { itype = OR1K64BF_INSN_L_SFGTU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xffe007ff) == 0xe4600000)
+ { itype = OR1K64BF_INSN_L_SFGEU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 4 :
+ if ((entire_insn & 0xffe007ff) == 0xe4800000)
+ { itype = OR1K64BF_INSN_L_SFLTU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 5 :
+ if ((entire_insn & 0xffe007ff) == 0xe4a00000)
+ { itype = OR1K64BF_INSN_L_SFLEU; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 10 :
+ if ((entire_insn & 0xffe007ff) == 0xe5400000)
+ { itype = OR1K64BF_INSN_L_SFGTS; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 11 :
+ if ((entire_insn & 0xffe007ff) == 0xe5600000)
+ { itype = OR1K64BF_INSN_L_SFGES; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 12 :
+ if ((entire_insn & 0xffe007ff) == 0xe5800000)
+ { itype = OR1K64BF_INSN_L_SFLTS; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 13 :
+ if ((entire_insn & 0xffe007ff) == 0xe5a00000)
+ { itype = OR1K64BF_INSN_L_SFLES; goto extract_sfmt_l_sfgtu; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ case 1920 :
+ if ((entire_insn & 0xffffffff) == 0xf0000000)
+ { itype = OR1K64BF_INSN_L_CUST5; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1952 :
+ if ((entire_insn & 0xffffffff) == 0xf4000000)
+ { itype = OR1K64BF_INSN_L_CUST6; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1984 :
+ if ((entire_insn & 0xffffffff) == 0xf8000000)
+ { itype = OR1K64BF_INSN_L_CUST7; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2016 :
+ if ((entire_insn & 0xffffffff) == 0xfc000000)
+ { itype = OR1K64BF_INSN_L_CUST8; goto extract_sfmt_l_cust1; }
+ itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ default : itype = OR1K64BF_INSN_X_INVALID; goto extract_sfmt_empty;
+ }
+ }
+ }
+
+ /* The instruction has been decoded, now extract the fields. */
+
+ extract_sfmt_empty:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+#define FLD(f) abuf->fields.sfmt_empty.f
+
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_j:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ UDI f_disp26;
+
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc));
+
+ /* Record the fields for the semantic handler. */
+ FLD (i_disp26) = f_disp26;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_j", "disp26 0x%x", 'x', f_disp26, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_jal:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ UDI f_disp26;
+
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc));
+
+ /* Record the fields for the semantic handler. */
+ FLD (i_disp26) = f_disp26;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jal", "disp26 0x%x", 'x', f_disp26, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_jr:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r3;
+
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jr", "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_jalr:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r3;
+
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jalr", "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_bnf:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ UDI f_disp26;
+
+ f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (2))) + (pc));
+
+ /* Record the fields for the semantic handler. */
+ FLD (i_disp26) = f_disp26;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_bnf", "disp26 0x%x", 'x', f_disp26, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_trap:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+#define FLD(f) abuf->fields.sfmt_empty.f
+
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_trap", (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_nop_imm:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_uimm16;
+
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_nop_imm", "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_movhi:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r1;
+ UINT f_uimm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_uimm16) = f_uimm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_movhi", "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_macrc:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_macrc", "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_mfspr:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mfspr", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_mtspr:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ UINT f_uimm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_uimm16_split = ((UHI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_uimm16_split) = f_uimm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mtspr", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_uimm16_split 0x%x", 'x', f_uimm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lwz:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lwz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lws:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lws", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lbz:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lbz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lbs:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lbs", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lhz:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lhz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_lhs:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lhs", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sw:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sw", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sb:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sb", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sh:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_r3;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sh", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sll:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sll", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_slli:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm6;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 5, 6);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm6) = f_uimm6;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_slli", "f_r2 0x%x", 'x', f_r2, "f_uimm6 0x%x", 'x', f_uimm6, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_and:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_and", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_add:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_add", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_addc:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addc", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_div:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_div", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_ff1:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_ff1", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_andi:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_uimm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm16) = f_uimm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_andi", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_xori:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_xori", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_addi:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addi", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_addic:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r1;
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addic", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_exths:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_exths", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_cmov:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_cmov", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sfgtu:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgtu", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sfgtui:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ UINT f_r2;
+ UINT f_uimm16;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgtui", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_sfgtsi:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ UINT f_r2;
+ INT f_simm16;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgtsi", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_mac:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mac", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_maci:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ UINT f_imm16_25_5;
+ UINT f_r2;
+ UINT f_imm16_10_11;
+ INT f_simm16_split;
+
+ f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11);
+ f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11))));
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_simm16_split) = f_simm16_split;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_maci", "f_r2 0x%x", 'x', f_r2, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_l_cust1:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+#define FLD(f) abuf->fields.sfmt_empty.f
+
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_cust1", (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_add_s:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_add_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_add_d:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_add_d", "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_itof_s:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_itof_s", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_itof_d:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_itof_d", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_ftoi_s:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+ UINT f_r2;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_ftoi_s", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_ftoi_d:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_ftoi_d", "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_eq_s:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_eq_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_eq_d:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_eq_d", "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_madd_s:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ UINT f_r1;
+ UINT f_r2;
+ UINT f_r3;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+ f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
+ f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = f_r2;
+ FLD (f_r3) = f_r3;
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_madd_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+ extract_sfmt_lf_madd_d:
+ {
+ const IDESC *idesc = &or1k64bf_insn_data[itype];
+ CGEN_INSN_WORD insn = entire_insn;
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ UINT f_r1;
+
+ f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_madd_d", "f_r1 0x%x", 'x', f_r1, (char *) 0));
+
+#undef FLD
+ return idesc;
+ }
+
+}
diff --git a/sim/or1k/decode64.h b/sim/or1k/decode64.h
new file mode 100644
index 0000000..a5f5806
--- /dev/null
+++ b/sim/or1k/decode64.h
@@ -0,0 +1,95 @@
+/* Decode header for or1k64bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K64BF_DECODE_H
+#define OR1K64BF_DECODE_H
+
+extern const IDESC *or1k64bf_decode (SIM_CPU *, IADDR,
+ CGEN_INSN_WORD, CGEN_INSN_WORD,
+ ARGBUF *);
+extern void or1k64bf_init_idesc_table (SIM_CPU *);
+extern void or1k64bf_sem_init_idesc_table (SIM_CPU *);
+extern void or1k64bf_semf_init_idesc_table (SIM_CPU *);
+
+/* Enum declaration for instructions in cpu family or1k64bf. */
+typedef enum or1k64bf_insn_type {
+ OR1K64BF_INSN_X_INVALID, OR1K64BF_INSN_X_AFTER, OR1K64BF_INSN_X_BEFORE, OR1K64BF_INSN_X_CTI_CHAIN
+ , OR1K64BF_INSN_X_CHAIN, OR1K64BF_INSN_X_BEGIN, OR1K64BF_INSN_L_J, OR1K64BF_INSN_L_JAL
+ , OR1K64BF_INSN_L_JR, OR1K64BF_INSN_L_JALR, OR1K64BF_INSN_L_BNF, OR1K64BF_INSN_L_BF
+ , OR1K64BF_INSN_L_TRAP, OR1K64BF_INSN_L_SYS, OR1K64BF_INSN_L_RFE, OR1K64BF_INSN_L_NOP_IMM
+ , OR1K64BF_INSN_L_MOVHI, OR1K64BF_INSN_L_MACRC, OR1K64BF_INSN_L_MFSPR, OR1K64BF_INSN_L_MTSPR
+ , OR1K64BF_INSN_L_LWZ, OR1K64BF_INSN_L_LWS, OR1K64BF_INSN_L_LBZ, OR1K64BF_INSN_L_LBS
+ , OR1K64BF_INSN_L_LHZ, OR1K64BF_INSN_L_LHS, OR1K64BF_INSN_L_SW, OR1K64BF_INSN_L_SB
+ , OR1K64BF_INSN_L_SH, OR1K64BF_INSN_L_SLL, OR1K64BF_INSN_L_SLLI, OR1K64BF_INSN_L_SRL
+ , OR1K64BF_INSN_L_SRLI, OR1K64BF_INSN_L_SRA, OR1K64BF_INSN_L_SRAI, OR1K64BF_INSN_L_ROR
+ , OR1K64BF_INSN_L_RORI, OR1K64BF_INSN_L_AND, OR1K64BF_INSN_L_OR, OR1K64BF_INSN_L_XOR
+ , OR1K64BF_INSN_L_ADD, OR1K64BF_INSN_L_SUB, OR1K64BF_INSN_L_ADDC, OR1K64BF_INSN_L_MUL
+ , OR1K64BF_INSN_L_MULU, OR1K64BF_INSN_L_DIV, OR1K64BF_INSN_L_DIVU, OR1K64BF_INSN_L_FF1
+ , OR1K64BF_INSN_L_FL1, OR1K64BF_INSN_L_ANDI, OR1K64BF_INSN_L_ORI, OR1K64BF_INSN_L_XORI
+ , OR1K64BF_INSN_L_ADDI, OR1K64BF_INSN_L_ADDIC, OR1K64BF_INSN_L_MULI, OR1K64BF_INSN_L_EXTHS
+ , OR1K64BF_INSN_L_EXTBS, OR1K64BF_INSN_L_EXTHZ, OR1K64BF_INSN_L_EXTBZ, OR1K64BF_INSN_L_EXTWS
+ , OR1K64BF_INSN_L_EXTWZ, OR1K64BF_INSN_L_CMOV, OR1K64BF_INSN_L_SFGTU, OR1K64BF_INSN_L_SFGEU
+ , OR1K64BF_INSN_L_SFLTU, OR1K64BF_INSN_L_SFLEU, OR1K64BF_INSN_L_SFGTS, OR1K64BF_INSN_L_SFGES
+ , OR1K64BF_INSN_L_SFLTS, OR1K64BF_INSN_L_SFLES, OR1K64BF_INSN_L_SFGTUI, OR1K64BF_INSN_L_SFGEUI
+ , OR1K64BF_INSN_L_SFLTUI, OR1K64BF_INSN_L_SFLEUI, OR1K64BF_INSN_L_SFGTSI, OR1K64BF_INSN_L_SFGESI
+ , OR1K64BF_INSN_L_SFLTSI, OR1K64BF_INSN_L_SFLESI, OR1K64BF_INSN_L_SFEQ, OR1K64BF_INSN_L_SFEQI
+ , OR1K64BF_INSN_L_SFNE, OR1K64BF_INSN_L_SFNEI, OR1K64BF_INSN_L_MAC, OR1K64BF_INSN_L_MSB
+ , OR1K64BF_INSN_L_MACI, OR1K64BF_INSN_L_CUST1, OR1K64BF_INSN_L_CUST2, OR1K64BF_INSN_L_CUST3
+ , OR1K64BF_INSN_L_CUST4, OR1K64BF_INSN_L_CUST5, OR1K64BF_INSN_L_CUST6, OR1K64BF_INSN_L_CUST7
+ , OR1K64BF_INSN_L_CUST8, OR1K64BF_INSN_LF_ADD_S, OR1K64BF_INSN_LF_ADD_D, OR1K64BF_INSN_LF_SUB_S
+ , OR1K64BF_INSN_LF_SUB_D, OR1K64BF_INSN_LF_MUL_S, OR1K64BF_INSN_LF_MUL_D, OR1K64BF_INSN_LF_DIV_S
+ , OR1K64BF_INSN_LF_DIV_D, OR1K64BF_INSN_LF_REM_S, OR1K64BF_INSN_LF_REM_D, OR1K64BF_INSN_LF_ITOF_S
+ , OR1K64BF_INSN_LF_ITOF_D, OR1K64BF_INSN_LF_FTOI_S, OR1K64BF_INSN_LF_FTOI_D, OR1K64BF_INSN_LF_EQ_S
+ , OR1K64BF_INSN_LF_EQ_D, OR1K64BF_INSN_LF_NE_S, OR1K64BF_INSN_LF_NE_D, OR1K64BF_INSN_LF_GE_S
+ , OR1K64BF_INSN_LF_GE_D, OR1K64BF_INSN_LF_GT_S, OR1K64BF_INSN_LF_GT_D, OR1K64BF_INSN_LF_LT_S
+ , OR1K64BF_INSN_LF_LT_D, OR1K64BF_INSN_LF_LE_S, OR1K64BF_INSN_LF_LE_D, OR1K64BF_INSN_LF_MADD_S
+ , OR1K64BF_INSN_LF_MADD_D, OR1K64BF_INSN_LF_CUST1_S, OR1K64BF_INSN_LF_CUST1_D, OR1K64BF_INSN__MAX
+} OR1K64BF_INSN_TYPE;
+
+/* Enum declaration for semantic formats in cpu family or1k64bf. */
+typedef enum or1k64bf_sfmt_type {
+ OR1K64BF_SFMT_EMPTY, OR1K64BF_SFMT_L_J, OR1K64BF_SFMT_L_JAL, OR1K64BF_SFMT_L_JR
+ , OR1K64BF_SFMT_L_JALR, OR1K64BF_SFMT_L_BNF, OR1K64BF_SFMT_L_TRAP, OR1K64BF_SFMT_L_NOP_IMM
+ , OR1K64BF_SFMT_L_MOVHI, OR1K64BF_SFMT_L_MACRC, OR1K64BF_SFMT_L_MFSPR, OR1K64BF_SFMT_L_MTSPR
+ , OR1K64BF_SFMT_L_LWZ, OR1K64BF_SFMT_L_LWS, OR1K64BF_SFMT_L_LBZ, OR1K64BF_SFMT_L_LBS
+ , OR1K64BF_SFMT_L_LHZ, OR1K64BF_SFMT_L_LHS, OR1K64BF_SFMT_L_SW, OR1K64BF_SFMT_L_SB
+ , OR1K64BF_SFMT_L_SH, OR1K64BF_SFMT_L_SLL, OR1K64BF_SFMT_L_SLLI, OR1K64BF_SFMT_L_AND
+ , OR1K64BF_SFMT_L_ADD, OR1K64BF_SFMT_L_ADDC, OR1K64BF_SFMT_L_DIV, OR1K64BF_SFMT_L_FF1
+ , OR1K64BF_SFMT_L_ANDI, OR1K64BF_SFMT_L_XORI, OR1K64BF_SFMT_L_ADDI, OR1K64BF_SFMT_L_ADDIC
+ , OR1K64BF_SFMT_L_EXTHS, OR1K64BF_SFMT_L_CMOV, OR1K64BF_SFMT_L_SFGTU, OR1K64BF_SFMT_L_SFGTUI
+ , OR1K64BF_SFMT_L_SFGTSI, OR1K64BF_SFMT_L_MAC, OR1K64BF_SFMT_L_MACI, OR1K64BF_SFMT_L_CUST1
+ , OR1K64BF_SFMT_LF_ADD_S, OR1K64BF_SFMT_LF_ADD_D, OR1K64BF_SFMT_LF_ITOF_S, OR1K64BF_SFMT_LF_ITOF_D
+ , OR1K64BF_SFMT_LF_FTOI_S, OR1K64BF_SFMT_LF_FTOI_D, OR1K64BF_SFMT_LF_EQ_S, OR1K64BF_SFMT_LF_EQ_D
+ , OR1K64BF_SFMT_LF_MADD_S, OR1K64BF_SFMT_LF_MADD_D
+} OR1K64BF_SFMT_TYPE;
+
+/* Function unit handlers (user written). */
+
+
+/* Profiling before/after handlers (user written) */
+
+extern void or1k64bf_model_insn_before (SIM_CPU *, int /*first_p*/);
+extern void or1k64bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
+
+#endif /* OR1K64BF_DECODE_H */
diff --git a/sim/or1k/eng.h b/sim/or1k/eng.h
new file mode 100644
index 0000000..a46cf86
--- /dev/null
+++ b/sim/or1k/eng.h
@@ -0,0 +1,5 @@
+#ifndef WANT_OR1K64
+#include "eng32.h"
+#else
+#include "eng64.h"
+#endif
diff --git a/sim/or1k/mloop.in b/sim/or1k/mloop.in
new file mode 100644
index 0000000..328d1e6
--- /dev/null
+++ b/sim/or1k/mloop.in
@@ -0,0 +1,223 @@
+# Simulator main loop for or1k. -*- C -*-
+#
+# Copyright (C) 1996-1998, 2007-2012 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Simulators.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# Syntax:
+# /bin/sh mainloop.in command
+#
+# Command is one of:
+#
+# init
+# support
+# extract-{simple,scache,pbb}
+# {full,fast}-exec-{simple,scache,pbb}
+#
+# A target need only provide a "full" version of one of simple,scache,pbb.
+# If the target wants it can also provide a fast version of same, or if
+# the slow (full featured) version is `simple', then the fast version can be
+# one of scache/pbb.
+# A target can't provide more than this.
+# However for illustration's sake this file provides examples of all.
+
+# ??? After a few more ports are done, revisit.
+# Will eventually need to machine generate a lot of this.
+
+case "x$1" in
+
+xsupport)
+
+cat <<EOF
+
+static INLINE const IDESC *
+extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
+ ARGBUF *abuf, int fast_p)
+{
+ const IDESC *id = @cpu at _decode (current_cpu, pc, insn, insn, abuf);
+ @cpu at _fill_argbuf (current_cpu, abuf, id, pc, fast_p);
+ if (!fast_p) {
+ int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
+ int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
+ @cpu at _fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
+ }
+ return id;
+}
+
+static INLINE SEM_PC
+execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
+{
+ SEM_PC vpc;
+
+ @cpu@_insn_before (current_cpu, vpc);
+
+ if (fast_p)
+ {
+#if ! WITH_SEM_SWITCH_FAST
+#if WITH_SCACHE
+ vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
+#else
+ vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
+#endif
+#else
+ abort ();
+#endif /* WITH_SEM_SWITCH_FAST */
+ }
+ else
+ {
+#if ! WITH_SEM_SWITCH_FULL
+ ARGBUF *abuf = &sc->argbuf;
+ const IDESC *idesc = abuf->idesc;
+ const CGEN_INSN *idata = idesc->idata;
+#if WITH_SCACHE_PBB
+ int virtual_p = CGEN_INSN_ATTR_VALUE (idata, CGEN_INSN_VIRTUAL);
+#else
+ int virtual_p = 0;
+#endif
+
+ if (! virtual_p)
+ {
+ /* FIXME: call x-before */
+ if (ARGBUF_PROFILE_P (abuf))
+ PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
+ /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
+ if (PROFILE_MODEL_P (current_cpu)
+ && ARGBUF_PROFILE_P (abuf))
+ @cpu at _model_insn_before (current_cpu, 1 /*first_p*/);
+ TRACE_INSN_INIT (current_cpu, abuf, 1);
+ TRACE_INSN (current_cpu, idata,
+ (const struct argbuf *) abuf, abuf->addr);
+ }
+#if WITH_SCACHE
+ vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
+#else
+ vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
+#endif
+ if (! virtual_p)
+ {
+ /* FIXME: call x-after */
+ if (PROFILE_MODEL_P (current_cpu)
+ && ARGBUF_PROFILE_P (abuf))
+ {
+ int cycles;
+
+ cycles = (*idesc->timing->model_fn) (current_cpu, sc);
+ @cpu at _model_insn_after (current_cpu, 1 /*last_p*/, cycles);
+ }
+ TRACE_INSN_FINI (current_cpu, abuf, 1);
+ }
+#else
+ abort ();
+#endif /* WITH_SEM_SWITCH_FULL */
+ }
+
+ return @cpu at _insn_after (current_cpu, vpc);
+}
+
+EOF
+
+;;
+
+xinit)
+
+# Nothing needed.
+
+;;
+
+xextract-simple | xextract-scache)
+
+cat <<EOF
+{
+ USI insn = GETIMEMUSI (current_cpu, pc);
+ extract (current_cpu, pc, insn, sc, FAST_P);
+ SEM_SKIP_COMPILE (current_cpu, sc, 1);
+}
+EOF
+
+;;
+
+xextract-pbb)
+
+# Inputs: current_cpu, pc, sc, max_insns, FAST_P
+# Outputs: sc, pc
+# sc must be left pointing past the last created entry.
+# pc must be left pointing past the last created entry.
+# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
+# to record the vpc of the cti insn.
+# SET_INSN_COUNT(n) must be called to record number of real insns.
+
+cat <<EOF
+{
+ const IDESC *idesc;
+ int icount = 0;
+
+ while (max_insns > 0) {
+ USI insn = GETIMEMUSI (current_cpu, pc);
+ idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
+ SEM_SKIP_COMPILE (current_cpu, sc, 1);
+ ++sc;
+ --max_insns;
+ ++icount;
+ pc += 4;
+ if (CGEN_ATTR_BOOLS (CGEN_INSN_ATTRS ((idesc)->idata)) & CGEN_ATTR_MASK (CGEN_INSN_DELAYED_CTI))
+ {
+ /* handle delay slot */
+ SET_CTI_VPC (sc - 1);
+ insn = GETIMEMUSI (current_cpu, pc);
+ idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
+ ++sc;
+ --max_insns;
+ ++icount;
+ pc += 4;
+ break;
+ }
+ }
+
+ SET_INSN_COUNT (icount);
+
+}
+EOF
+
+;;
+
+xfull-exec-* | xfast-exec-*)
+
+# Inputs: current_cpu, vpc, FAST_P
+# Outputs: vpc
+# vpc is the virtual program counter.
+
+cat <<EOF
+#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
+#define DEFINE_SWITCH
+#ifdef WANT_CPU_OR1K32BF
+#include "sem32-switch.c"
+#endif
+#ifdef WANT_CPU_OR1K64BF
+#include "sem64-switch.c"
+#endif
+#else
+ vpc = execute (current_cpu, vpc, FAST_P);
+#endif
+EOF
+
+;;
+
+*)
+ echo "Invalid argument to mainloop.in: $1" >&2
+ exit 1
+ ;;
+
+esac
diff --git a/sim/or1k/model32.c b/sim/or1k/model32.c
new file mode 100644
index 0000000..7a1a1b6
--- /dev/null
+++ b/sim/or1k/model32.c
@@ -0,0 +1,3639 @@
+/* Simulator model support for or1k32bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k32bf
+#define WANT_CPU_OR1K32BF
+
+#include "sim-main.h"
+
+/* The profiling data is recorded here, but is accessed via the profiling
+ mechanism. After all, this is information for profiling. */
+
+#if WITH_PROFILE_MODEL_P
+
+/* Model handlers for each insn. */
+
+static int
+model_or1200_l_j (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_jal (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_jr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_jalr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_bnf (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_bf (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_trap (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sys (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_rfe (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_nop_imm (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_movhi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_macrc (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_mfspr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_mtspr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_lwz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_lws (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_lbz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_lbs (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_lhz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_lhs (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sw (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sb (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sh (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sll (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_slli (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_srl (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_srli (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sra (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_srai (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_ror (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_rori (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_and (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_or (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_xor (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_add (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sub (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_addc (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_mul (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_mulu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_div (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_divu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_ff1 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_fl1 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_andi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_ori (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_xori (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_addi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_addic (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_muli (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_exths (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_extbs (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_exthz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_extbz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_extws (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_extwz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cmov (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfgtu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfgeu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfltu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfleu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfgts (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfges (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sflts (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfles (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfgtui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfgeui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfltui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfleui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfgtsi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfgesi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfltsi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sflesi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfeq (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfeqi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfne (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_sfnei (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_mac (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_msb (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_maci (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust1 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust2 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust3 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust4 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust5 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust6 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust7 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_l_cust8 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_add_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_sub_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_mul_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_div_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_rem_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_itof_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_ftoi_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_eq_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_ne_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_ge_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_gt_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_lt_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_le_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_madd_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200_lf_cust1_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_j (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_jal (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_jr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_jalr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_bnf (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_bf (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_trap (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sys (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_rfe (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_nop_imm (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_movhi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_macrc (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_mfspr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_mtspr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_lwz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_lws (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_lbz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_lbs (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_lhz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_lhs (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sw (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sb (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sh (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sll (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_slli (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_srl (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_srli (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sra (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_srai (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_ror (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_rori (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_and (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_or (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_xor (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_add (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sub (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_addc (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_mul (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_mulu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_div (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_divu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_ff1 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_fl1 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_andi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_ori (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_xori (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_addi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_addic (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_muli (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_exths (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_extbs (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_exthz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_extbz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_extws (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_extwz (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cmov (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfgtu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfgeu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfltu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfleu (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfgts (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfges (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sflts (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfles (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfgtui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfgeui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfltui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfleui (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfgtsi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfgesi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfltsi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sflesi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfeq (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfeqi (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfne (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_sfnei (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_mac (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_msb (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_maci (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust1 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust2 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust3 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust4 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust5 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust6 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust7 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_l_cust8 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_add_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_sub_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_mul_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_div_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_rem_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_itof_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_ftoi_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_eq_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_ne_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_ge_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_gt_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_lt_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_le_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_madd_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_or1200nd_lf_cust1_s (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+/* We assume UNIT_NONE == 0 because the tables don't always terminate
+ entries with it. */
+
+/* Model timing data for `or1200'. */
+
+static const INSN_TIMING or1200_timing[] = {
+ { OR1K32BF_INSN_X_INVALID, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_AFTER, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_BEFORE, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_CHAIN, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_BEGIN, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_J, model_or1200_l_j, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_JAL, model_or1200_l_jal, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_JR, model_or1200_l_jr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_JALR, model_or1200_l_jalr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_BNF, model_or1200_l_bnf, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_BF, model_or1200_l_bf, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_TRAP, model_or1200_l_trap, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SYS, model_or1200_l_sys, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_RFE, model_or1200_l_rfe, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_NOP_IMM, model_or1200_l_nop_imm, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MOVHI, model_or1200_l_movhi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MACRC, model_or1200_l_macrc, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MFSPR, model_or1200_l_mfspr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MTSPR, model_or1200_l_mtspr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LWZ, model_or1200_l_lwz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LWS, model_or1200_l_lws, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LBZ, model_or1200_l_lbz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LBS, model_or1200_l_lbs, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LHZ, model_or1200_l_lhz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LHS, model_or1200_l_lhs, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SW, model_or1200_l_sw, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SB, model_or1200_l_sb, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SH, model_or1200_l_sh, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SLL, model_or1200_l_sll, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SLLI, model_or1200_l_slli, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRL, model_or1200_l_srl, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRLI, model_or1200_l_srli, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRA, model_or1200_l_sra, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRAI, model_or1200_l_srai, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ROR, model_or1200_l_ror, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_RORI, model_or1200_l_rori, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_AND, model_or1200_l_and, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_OR, model_or1200_l_or, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_XOR, model_or1200_l_xor, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADD, model_or1200_l_add, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SUB, model_or1200_l_sub, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADDC, model_or1200_l_addc, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MUL, model_or1200_l_mul, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MULU, model_or1200_l_mulu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_DIV, model_or1200_l_div, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_DIVU, model_or1200_l_divu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_FF1, model_or1200_l_ff1, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_FL1, model_or1200_l_fl1, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ANDI, model_or1200_l_andi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ORI, model_or1200_l_ori, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_XORI, model_or1200_l_xori, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADDI, model_or1200_l_addi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADDIC, model_or1200_l_addic, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MULI, model_or1200_l_muli, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTHS, model_or1200_l_exths, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTBS, model_or1200_l_extbs, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTHZ, model_or1200_l_exthz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTBZ, model_or1200_l_extbz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTWS, model_or1200_l_extws, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTWZ, model_or1200_l_extwz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CMOV, model_or1200_l_cmov, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTU, model_or1200_l_sfgtu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGEU, model_or1200_l_sfgeu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTU, model_or1200_l_sfltu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLEU, model_or1200_l_sfleu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTS, model_or1200_l_sfgts, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGES, model_or1200_l_sfges, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTS, model_or1200_l_sflts, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLES, model_or1200_l_sfles, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTUI, model_or1200_l_sfgtui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGEUI, model_or1200_l_sfgeui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTUI, model_or1200_l_sfltui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLEUI, model_or1200_l_sfleui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTSI, model_or1200_l_sfgtsi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGESI, model_or1200_l_sfgesi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTSI, model_or1200_l_sfltsi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLESI, model_or1200_l_sflesi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFEQ, model_or1200_l_sfeq, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFEQI, model_or1200_l_sfeqi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFNE, model_or1200_l_sfne, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFNEI, model_or1200_l_sfnei, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MAC, model_or1200_l_mac, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MSB, model_or1200_l_msb, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MACI, model_or1200_l_maci, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST1, model_or1200_l_cust1, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST2, model_or1200_l_cust2, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST3, model_or1200_l_cust3, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST4, model_or1200_l_cust4, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST5, model_or1200_l_cust5, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST6, model_or1200_l_cust6, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST7, model_or1200_l_cust7, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST8, model_or1200_l_cust8, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_ADD_S, model_or1200_lf_add_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_SUB_S, model_or1200_lf_sub_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_MUL_S, model_or1200_lf_mul_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_DIV_S, model_or1200_lf_div_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_REM_S, model_or1200_lf_rem_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_ITOF_S, model_or1200_lf_itof_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_FTOI_S, model_or1200_lf_ftoi_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_EQ_S, model_or1200_lf_eq_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_NE_S, model_or1200_lf_ne_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_GE_S, model_or1200_lf_ge_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_GT_S, model_or1200_lf_gt_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_LT_S, model_or1200_lf_lt_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_LE_S, model_or1200_lf_le_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_MADD_S, model_or1200_lf_madd_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_CUST1_S, model_or1200_lf_cust1_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
+};
+
+/* Model timing data for `or1200nd'. */
+
+static const INSN_TIMING or1200nd_timing[] = {
+ { OR1K32BF_INSN_X_INVALID, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_AFTER, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_BEFORE, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_CHAIN, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_X_BEGIN, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_J, model_or1200nd_l_j, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_JAL, model_or1200nd_l_jal, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_JR, model_or1200nd_l_jr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_JALR, model_or1200nd_l_jalr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_BNF, model_or1200nd_l_bnf, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_BF, model_or1200nd_l_bf, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_TRAP, model_or1200nd_l_trap, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SYS, model_or1200nd_l_sys, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_RFE, model_or1200nd_l_rfe, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_NOP_IMM, model_or1200nd_l_nop_imm, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MOVHI, model_or1200nd_l_movhi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MACRC, model_or1200nd_l_macrc, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MFSPR, model_or1200nd_l_mfspr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MTSPR, model_or1200nd_l_mtspr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LWZ, model_or1200nd_l_lwz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LWS, model_or1200nd_l_lws, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LBZ, model_or1200nd_l_lbz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LBS, model_or1200nd_l_lbs, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LHZ, model_or1200nd_l_lhz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_LHS, model_or1200nd_l_lhs, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SW, model_or1200nd_l_sw, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SB, model_or1200nd_l_sb, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SH, model_or1200nd_l_sh, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SLL, model_or1200nd_l_sll, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SLLI, model_or1200nd_l_slli, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRL, model_or1200nd_l_srl, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRLI, model_or1200nd_l_srli, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRA, model_or1200nd_l_sra, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SRAI, model_or1200nd_l_srai, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ROR, model_or1200nd_l_ror, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_RORI, model_or1200nd_l_rori, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_AND, model_or1200nd_l_and, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_OR, model_or1200nd_l_or, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_XOR, model_or1200nd_l_xor, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADD, model_or1200nd_l_add, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SUB, model_or1200nd_l_sub, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADDC, model_or1200nd_l_addc, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MUL, model_or1200nd_l_mul, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MULU, model_or1200nd_l_mulu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_DIV, model_or1200nd_l_div, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_DIVU, model_or1200nd_l_divu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_FF1, model_or1200nd_l_ff1, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_FL1, model_or1200nd_l_fl1, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ANDI, model_or1200nd_l_andi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ORI, model_or1200nd_l_ori, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_XORI, model_or1200nd_l_xori, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADDI, model_or1200nd_l_addi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_ADDIC, model_or1200nd_l_addic, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MULI, model_or1200nd_l_muli, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTHS, model_or1200nd_l_exths, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTBS, model_or1200nd_l_extbs, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTHZ, model_or1200nd_l_exthz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTBZ, model_or1200nd_l_extbz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTWS, model_or1200nd_l_extws, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_EXTWZ, model_or1200nd_l_extwz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CMOV, model_or1200nd_l_cmov, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTU, model_or1200nd_l_sfgtu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGEU, model_or1200nd_l_sfgeu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTU, model_or1200nd_l_sfltu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLEU, model_or1200nd_l_sfleu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTS, model_or1200nd_l_sfgts, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGES, model_or1200nd_l_sfges, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTS, model_or1200nd_l_sflts, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLES, model_or1200nd_l_sfles, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTUI, model_or1200nd_l_sfgtui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGEUI, model_or1200nd_l_sfgeui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTUI, model_or1200nd_l_sfltui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLEUI, model_or1200nd_l_sfleui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGTSI, model_or1200nd_l_sfgtsi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFGESI, model_or1200nd_l_sfgesi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLTSI, model_or1200nd_l_sfltsi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFLESI, model_or1200nd_l_sflesi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFEQ, model_or1200nd_l_sfeq, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFEQI, model_or1200nd_l_sfeqi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFNE, model_or1200nd_l_sfne, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_SFNEI, model_or1200nd_l_sfnei, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MAC, model_or1200nd_l_mac, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MSB, model_or1200nd_l_msb, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_MACI, model_or1200nd_l_maci, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST1, model_or1200nd_l_cust1, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST2, model_or1200nd_l_cust2, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST3, model_or1200nd_l_cust3, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST4, model_or1200nd_l_cust4, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST5, model_or1200nd_l_cust5, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST6, model_or1200nd_l_cust6, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST7, model_or1200nd_l_cust7, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_L_CUST8, model_or1200nd_l_cust8, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_ADD_S, model_or1200nd_lf_add_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_SUB_S, model_or1200nd_lf_sub_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_MUL_S, model_or1200nd_lf_mul_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_DIV_S, model_or1200nd_lf_div_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_REM_S, model_or1200nd_lf_rem_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_ITOF_S, model_or1200nd_lf_itof_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_FTOI_S, model_or1200nd_lf_ftoi_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_EQ_S, model_or1200nd_lf_eq_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_NE_S, model_or1200nd_lf_ne_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_GE_S, model_or1200nd_lf_ge_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_GT_S, model_or1200nd_lf_gt_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_LT_S, model_or1200nd_lf_lt_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_LE_S, model_or1200nd_lf_le_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_MADD_S, model_or1200nd_lf_madd_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+ { OR1K32BF_INSN_LF_CUST1_S, model_or1200nd_lf_cust1_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
+};
+
+#endif /* WITH_PROFILE_MODEL_P */
+
+static void
+or1200_model_init (SIM_CPU *cpu)
+{
+ CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_OR1200_DATA));
+}
+
+static void
+or1200nd_model_init (SIM_CPU *cpu)
+{
+ CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_OR1200ND_DATA));
+}
+
+#if WITH_PROFILE_MODEL_P
+#define TIMING_DATA(td) td
+#else
+#define TIMING_DATA(td) 0
+#endif
+
+static const MODEL or32_models[] =
+{
+ { "or1200", & or32_mach, MODEL_OR1200, TIMING_DATA (& or1200_timing[0]), or1200_model_init },
+ { 0 }
+};
+
+static const MODEL or32nd_models[] =
+{
+ { "or1200nd", & or32nd_mach, MODEL_OR1200ND, TIMING_DATA (& or1200nd_timing[0]), or1200nd_model_init },
+ { 0 }
+};
+
+/* The properties of this cpu's implementation. */
+
+static const MACH_IMP_PROPERTIES or1k32bf_imp_properties =
+{
+ sizeof (SIM_CPU),
+#if WITH_SCACHE
+ sizeof (SCACHE)
+#else
+ 0
+#endif
+};
+
+
+static void
+or1k32bf_prepare_run (SIM_CPU *cpu)
+{
+ if (CPU_IDESC (cpu) == NULL)
+ or1k32bf_init_idesc_table (cpu);
+}
+
+static const CGEN_INSN *
+or1k32bf_get_idata (SIM_CPU *cpu, int inum)
+{
+ return CPU_IDESC (cpu) [inum].idata;
+}
+
+static void
+or32_init_cpu (SIM_CPU *cpu)
+{
+ CPU_REG_FETCH (cpu) = or1k32bf_fetch_register;
+ CPU_REG_STORE (cpu) = or1k32bf_store_register;
+ CPU_PC_FETCH (cpu) = or1k32bf_h_pc_get;
+ CPU_PC_STORE (cpu) = or1k32bf_h_pc_set;
+ CPU_GET_IDATA (cpu) = or1k32bf_get_idata;
+ CPU_MAX_INSNS (cpu) = OR1K32BF_INSN__MAX;
+ CPU_INSN_NAME (cpu) = cgen_insn_name;
+ CPU_FULL_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
+#if WITH_FAST
+ CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_fast;
+#else
+ CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
+#endif
+}
+
+const MACH or32_mach =
+{
+ "or32", "or1k", MACH_OR32,
+ 32, 32, & or32_models[0], & or1k32bf_imp_properties,
+ or32_init_cpu,
+ or1k32bf_prepare_run
+};
+
+static void
+or32nd_init_cpu (SIM_CPU *cpu)
+{
+ CPU_REG_FETCH (cpu) = or1k32bf_fetch_register;
+ CPU_REG_STORE (cpu) = or1k32bf_store_register;
+ CPU_PC_FETCH (cpu) = or1k32bf_h_pc_get;
+ CPU_PC_STORE (cpu) = or1k32bf_h_pc_set;
+ CPU_GET_IDATA (cpu) = or1k32bf_get_idata;
+ CPU_MAX_INSNS (cpu) = OR1K32BF_INSN__MAX;
+ CPU_INSN_NAME (cpu) = cgen_insn_name;
+ CPU_FULL_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
+#if WITH_FAST
+ CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_fast;
+#else
+ CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
+#endif
+}
+
+const MACH or32nd_mach =
+{
+ "or32nd", "or1knd", MACH_OR32ND,
+ 32, 32, & or32nd_models[0], & or1k32bf_imp_properties,
+ or32nd_init_cpu,
+ or1k32bf_prepare_run
+};
+
diff --git a/sim/or1k/model64.c b/sim/or1k/model64.c
new file mode 100644
index 0000000..4fa3399
--- /dev/null
+++ b/sim/or1k/model64.c
@@ -0,0 +1,135 @@
+/* Simulator model support for or1k64bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k64bf
+#define WANT_CPU_OR1K64BF
+
+#include "sim-main.h"
+
+/* The profiling data is recorded here, but is accessed via the profiling
+ mechanism. After all, this is information for profiling. */
+
+#if WITH_PROFILE_MODEL_P
+
+/* Model handlers for each insn. */
+
+/* We assume UNIT_NONE == 0 because the tables don't always terminate
+ entries with it. */
+
+#endif /* WITH_PROFILE_MODEL_P */
+
+#if WITH_PROFILE_MODEL_P
+#define TIMING_DATA(td) td
+#else
+#define TIMING_DATA(td) 0
+#endif
+
+static const MODEL or64_models[] =
+{
+ { 0 }
+};
+
+static const MODEL or64nd_models[] =
+{
+ { 0 }
+};
+
+/* The properties of this cpu's implementation. */
+
+static const MACH_IMP_PROPERTIES or1k64bf_imp_properties =
+{
+ sizeof (SIM_CPU),
+#if WITH_SCACHE
+ sizeof (SCACHE)
+#else
+ 0
+#endif
+};
+
+
+static void
+or1k64bf_prepare_run (SIM_CPU *cpu)
+{
+ if (CPU_IDESC (cpu) == NULL)
+ or1k64bf_init_idesc_table (cpu);
+}
+
+static const CGEN_INSN *
+or1k64bf_get_idata (SIM_CPU *cpu, int inum)
+{
+ return CPU_IDESC (cpu) [inum].idata;
+}
+
+static void
+or64_init_cpu (SIM_CPU *cpu)
+{
+ CPU_REG_FETCH (cpu) = or1k64bf_fetch_register;
+ CPU_REG_STORE (cpu) = or1k64bf_store_register;
+ CPU_PC_FETCH (cpu) = or1k64bf_h_pc_get;
+ CPU_PC_STORE (cpu) = or1k64bf_h_pc_set;
+ CPU_GET_IDATA (cpu) = or1k64bf_get_idata;
+ CPU_MAX_INSNS (cpu) = OR1K64BF_INSN__MAX;
+ CPU_INSN_NAME (cpu) = cgen_insn_name;
+ CPU_FULL_ENGINE_FN (cpu) = or1k64bf_engine_run_full;
+#if WITH_FAST
+ CPU_FAST_ENGINE_FN (cpu) = or1k64bf_engine_run_fast;
+#else
+ CPU_FAST_ENGINE_FN (cpu) = or1k64bf_engine_run_full;
+#endif
+}
+
+const MACH or64_mach =
+{
+ "or64", "or1k64", MACH_OR64,
+ 64, 64, & or64_models[0], & or1k64bf_imp_properties,
+ or64_init_cpu,
+ or1k64bf_prepare_run
+};
+
+static void
+or64nd_init_cpu (SIM_CPU *cpu)
+{
+ CPU_REG_FETCH (cpu) = or1k64bf_fetch_register;
+ CPU_REG_STORE (cpu) = or1k64bf_store_register;
+ CPU_PC_FETCH (cpu) = or1k64bf_h_pc_get;
+ CPU_PC_STORE (cpu) = or1k64bf_h_pc_set;
+ CPU_GET_IDATA (cpu) = or1k64bf_get_idata;
+ CPU_MAX_INSNS (cpu) = OR1K64BF_INSN__MAX;
+ CPU_INSN_NAME (cpu) = cgen_insn_name;
+ CPU_FULL_ENGINE_FN (cpu) = or1k64bf_engine_run_full;
+#if WITH_FAST
+ CPU_FAST_ENGINE_FN (cpu) = or1k64bf_engine_run_fast;
+#else
+ CPU_FAST_ENGINE_FN (cpu) = or1k64bf_engine_run_full;
+#endif
+}
+
+const MACH or64nd_mach =
+{
+ "or64nd", "or1k64nd", MACH_OR64ND,
+ 64, 64, & or64nd_models[0], & or1k64bf_imp_properties,
+ or64nd_init_cpu,
+ or1k64bf_prepare_run
+};
+
diff --git a/sim/or1k/or1k-sim.h b/sim/or1k/or1k-sim.h
new file mode 100644
index 0000000..9e1754f
--- /dev/null
+++ b/sim/or1k/or1k-sim.h
@@ -0,0 +1,19 @@
+#ifndef OR1K_SIM_H
+#define OR1K_SIM_H
+
+#include "symcat.h"
+
+/* GDB register numbers. */
+#define PC_REGNUM 16
+
+/* Misc. profile data. */
+typedef struct {
+} OR1K_MISC_PROFILE;
+
+#define GETTWI XCONCAT2(GETT,WI)
+#define SETTWI XCONCAT2(SETT,WI)
+
+#define EXIT_ERROR 1
+#define EXIT_UNSPECIFIED 2
+
+#endif /* OR1K_SIM_H */
diff --git a/sim/or1k/or1k.c b/sim/or1k/or1k.c
new file mode 100644
index 0000000..9f6e207
--- /dev/null
+++ b/sim/or1k/or1k.c
@@ -0,0 +1,290 @@
+#ifndef WANT_OR1K64
+#define WANT_CPU or1k32bf
+#define WANT_CPU_OR1K32BF
+#else
+#define WANT_CPU or1k64bf
+#define WANT_CPU_OR1K64BF
+#endif
+
+#include "sim-main.h"
+#include "symcat.h"
+#include "cgen-ops.h"
+
+#include <string.h>
+
+/* not sure what the point of these is */
+int XCONCAT2(WANT_CPU,_fetch_register) (sim_cpu *current_cpu, int rn, unsigned char *buf, int len)
+{
+ return -1;
+}
+
+int XCONCAT2(WANT_CPU,_store_register) (sim_cpu *current_cpu, int rn, unsigned char *buf, int len)
+{
+ return -1;
+}
+
+#ifdef WANT_CPU_OR1K32BF
+int or1k32bf_model_or1200_u_exec (sim_cpu * UNUSED current_cpu, const IDESC * UNUSED idesc, int unit_num, int referenced)
+{
+}
+
+int or1k32bf_model_or1200nd_u_exec (sim_cpu * UNUSED current_cpu, const IDESC * UNUSED idesc, int unit_num, int referenced)
+{
+}
+
+void or1k32bf_model_insn_before (sim_cpu * UNUSED current_cpu, int UNUSED first_p)
+{
+}
+
+void or1k32bf_model_insn_after (sim_cpu * UNUSED current_cpu, int UNUSED last_p, int UNUSED cycles)
+{
+}
+
+USI or1k32bf_h_spr_get_raw (sim_cpu *current_cpu, USI addr)
+{
+ SIM_DESC sd = CPU_STATE(current_cpu);
+ SIM_ASSERT(addr < NUM_SPR);
+ return current_cpu->spr[addr];
+}
+
+void or1k32bf_h_spr_set_raw (sim_cpu *current_cpu, USI addr, USI val)
+{
+ SIM_DESC sd = CPU_STATE(current_cpu);
+ SIM_ASSERT(addr < NUM_SPR);
+ current_cpu->spr[addr] = val;
+}
+
+USI or1k32bf_h_spr_field_get_raw (sim_cpu *current_cpu, USI addr, int msb, int lsb)
+{
+ SIM_DESC sd = CPU_STATE(current_cpu);
+ SIM_ASSERT(addr < NUM_SPR);
+ return LSEXTRACTED(current_cpu->spr[addr], msb, lsb);
+}
+
+void or1k32bf_h_spr_field_set_raw (sim_cpu *current_cpu, USI addr, int msb, int lsb, USI val)
+{
+ current_cpu->spr[addr] &= ~LSMASK32(msb, lsb);
+ current_cpu->spr[addr] |= LSINSERTED(val, msb, lsb);
+}
+
+void or1k32bf_cpu_init (SIM_DESC sd, sim_cpu *current_cpu)
+{
+#define CHECK_SPR_FIELD(GROUP, INDEX, FIELD, test) \
+ do { \
+ USI field = GET_H_##SYS##_##INDEX##_##FIELD (); \
+ if (!(test)) { \
+ sim_io_eprintf(sd, "WARNING: unsupported %s field in %s register: 0x%x\n", \
+ #FIELD, #INDEX, field); \
+ } \
+ } while (0)
+
+ CHECK_SPR_FIELD(SYS,UPR,UP, field == 1);
+ CHECK_SPR_FIELD(SYS,UPR,DCP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,ICP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,DMP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,MP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,IMP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,DUP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,PCUP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,PICP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,PMP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,TTP, field == 0);
+ CHECK_SPR_FIELD(SYS,UPR,CUP, field == 0);
+
+ CHECK_SPR_FIELD(SYS,CPUCFGR,NSGR, field == 0);
+ CHECK_SPR_FIELD(SYS,CPUCFGR,CGF, field == 0);
+ CHECK_SPR_FIELD(SYS,CPUCFGR,OB32S, field == 1);
+ CHECK_SPR_FIELD(SYS,CPUCFGR,OB64S, field == 0);
+ CHECK_SPR_FIELD(SYS,CPUCFGR,OF64S, field == 0);
+ CHECK_SPR_FIELD(SYS,CPUCFGR,OV64S, field == 0);
+
+#undef CHECK_SPR_FIELD
+
+ SET_H_SYS_UPR_UP(1);
+
+ SET_H_SYS_SR(SPR_FIELD_MASK_SYS_SR_SM |
+ SPR_FIELD_MASK_SYS_SR_FO
+ );
+
+ SET_H_SYS_FPCSR(0);
+}
+
+void or1k32bf_insn_before (sim_cpu *current_cpu, SEM_PC vpc)
+{
+}
+
+SEM_PC or1k32bf_insn_after (sim_cpu *current_cpu, SEM_PC vpc)
+{
+ USI ppc;
+#ifdef WITH_SCACHE
+ ppc = vpc->argbuf.addr;
+#else
+ ppc = vpc;
+#endif
+ SET_H_SPR (SPR_ADDR(SYS,PPC), ppc);
+
+ return vpc;
+}
+
+void or1k32bf_nop (sim_cpu *current_cpu, USI uimm16)
+{
+ SIM_DESC sd = CPU_STATE(current_cpu);
+
+ switch (uimm16) {
+
+ case NOP_NOP:
+ break;
+
+ case NOP_EXIT:
+ sim_engine_halt (sd, current_cpu, NULL, CPU_PC_GET (current_cpu), sim_exited, GET_H_GPR (3));
+ break;
+
+ case NOP_REPORT:
+ sim_io_printf (CPU_STATE(current_cpu), "report(0x%08x);\n", GET_H_GPR(3));
+ break;
+
+ case NOP_PUTC:
+ sim_io_printf (CPU_STATE(current_cpu), "%c", (char)(GET_H_GPR(3) & 0xff));
+ break;
+
+ default:
+ sim_io_eprintf(sd, "WARNING: l.nop with unsupported code 0x%08x\n", uimm16);
+ break;
+ }
+
+}
+
+void or1k32bf_mfspr (sim_cpu *current_cpu, USI pc, int rd, USI addr)
+{
+ SIM_DESC sd = CPU_STATE(current_cpu);
+
+ if (!GET_H_SYS_SR_SM () && !GET_H_SYS_SR_SUMRA ()) {
+ sim_io_eprintf(sd, "WARNING: l.mfspr in user mode (SR 0x%x)\n", GET_H_SYS_SR());
+ return;
+ }
+
+ if (addr >= NUM_SPR)
+ return;
+
+ SI val = GET_H_SPR(addr);
+
+ switch (addr) {
+
+ case SPR_ADDR(SYS,VR):
+ case SPR_ADDR(SYS,UPR):
+ case SPR_ADDR(SYS,CPUCFGR):
+ case SPR_ADDR(SYS,SR):
+ case SPR_ADDR(SYS,FPCSR):
+ case SPR_ADDR(SYS,DMMUCFGR):
+ SET_H_GPR(rd, val);
+ break;
+
+ default:
+ if (addr >= SPR_ADDR(SYS,GPR0) && addr <= SPR_ADDR(SYS,GPR511)) {
+ SET_H_GPR(rd, val);
+ } else {
+ sim_io_eprintf (sd, "WARNING: l.mfspr with invalid SPR address 0x%x\n", addr);
+ }
+ break;
+
+ }
+
+}
+
+void or1k32bf_mtspr (sim_cpu *current_cpu, USI pc, USI addr, USI val)
+{
+ SIM_DESC sd = CPU_STATE(current_cpu);
+
+ if (!GET_H_SYS_SR_SM () && !GET_H_SYS_SR_SUMRA ()) {
+ sim_io_eprintf(sd, "WARNING: l.mtspr in user mode (SR 0x%x)\n", GET_H_SYS_SR());
+ return;
+ }
+
+ if (addr >= NUM_SPR)
+ return;
+
+ switch (addr) {
+
+ case SPR_ADDR(SYS,SR):
+ break;
+
+ case SPR_ADDR(SYS,UPR):
+ break;
+
+ default:
+ if (addr >= SPR_ADDR(SYS,GPR0) && addr <= SPR_ADDR(SYS,GPR511)) {
+ SET_H_SPR(addr, val);
+ }
+ break;
+
+ }
+
+ return;
+}
+
+void or1k32bf_exception (sim_cpu *current_cpu, USI pc, USI exnum)
+{
+ /* TODO */
+ abort();
+}
+
+void or1k32bf_rfe (sim_cpu *current_cpu, USI pc)
+{
+ /* TODO */
+ abort();
+}
+
+USI or1k32bf_make_load_store_addr (sim_cpu *current_cpu, USI base, SI offset, int size)
+{
+ SIM_DESC sd = CPU_STATE(current_cpu);
+
+ if (!GET_H_SYS_SR_SM ()) {
+ sim_io_eprintf(sd, "WARNING: l.mfspr in user mode\n");
+ return;
+ }
+
+ USI addr = base + offset;
+
+ if (GET_H_SYS_SR_LEE ()) {
+ switch (size) {
+
+ case 4:
+ break;
+
+ case 2:
+ addr ^= 0x2;
+
+ case 1:
+ addr ^= 0x3;
+
+ default:
+ SIM_ASSERT (0);
+ return 0;
+ }
+ }
+
+ return addr;
+}
+
+USI or1k32bf_ff1 (sim_cpu *current_cpu, USI val)
+{
+ USI bit;
+ USI ret;
+ for (bit = 1, ret = 1; bit; bit <<= 1, ret++) {
+ if (val & bit)
+ return ret;
+ }
+ return 0;
+}
+
+USI or1k32bf_fl1 (sim_cpu *current_cpu, USI val)
+{
+ USI bit;
+ USI ret;
+ for (bit = 1, ret = 1; bit; bit <<= 1, ret++) {
+ if (!(val & bit))
+ return ret;
+ }
+ return 0;
+}
+#endif
diff --git a/sim/or1k/or1k.h b/sim/or1k/or1k.h
new file mode 100644
index 0000000..513c946
--- /dev/null
+++ b/sim/or1k/or1k.h
@@ -0,0 +1,29 @@
+#ifndef OR1K_H
+#define OR1K_H
+
+#define NOP_NOP 0x0
+#define NOP_EXIT 0x1
+#define NOP_REPORT 0x2
+#define NOP_PUTC 0x4
+#define NOP_CNT_RESET 0x5
+#define NOP_GET_TICKS 0x6
+#define NOP_GET_PS 0x7
+#define NOP_TRACE_ON 0x8
+#define NOP_TRACE_OFF 0x9
+#define NOP_RANDOM 0xa
+#define NOP_OR1KSIM 0xb
+
+#define NUM_SPR 0x20000
+#define SPR_GROUP_SHIFT 11
+#define SPR_GROUP_FIRST(group) (((UWI) SPR_GROUP_##group) << SPR_GROUP_SHIFT)
+#define SPR_GROUP_LAST(group) (SPR_GROUP_FIRST | (((UWI) 1 << SPR_GROUP_SHIFT) - 1))
+#define SPR_ADDR(group,index) (SPR_GROUP_FIRST(group) | ((UWI) SPR_INDEX_##group##_##index))
+#define SPR_FIELD(group,index,field,val) ((SPR_FIELD_MASK_##group##_##index##_##field & (val)) >> SPR_FIELD_LSB_##group##_##index##_##field)
+
+#ifdef WANT_CPU_OR1K32BF
+void or1k32bf_cpu_init (SIM_DESC sd, sim_cpu *current_cpu);
+void or1k32bf_insn_before (sim_cpu *current_cpu, SEM_PC vpc);
+SEM_PC or1k32bf_insn_after (sim_cpu *current_cpu, SEM_PC vpc);
+#endif
+
+#endif
diff --git a/sim/or1k/or1k32-opc.h b/sim/or1k/or1k32-opc.h
new file mode 100644
index 0000000..97aab87
--- /dev/null
+++ b/sim/or1k/or1k32-opc.h
@@ -0,0 +1,129 @@
+/* Instruction opcode header for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K_OPC_H
+#define OR1K_OPC_H
+
+/* -- opc.h */
+
+#undef CGEN_DIS_HASH_SIZE
+#define CGEN_DIS_HASH_SIZE 256
+#undef CGEN_DIS_HASH
+#define CGEN_DIS_HASH(buffer, value) (((unsigned char *) (buffer))[0] >> 2)
+
+/* -- */
+/* Enum declaration for or1k instruction types. */
+typedef enum cgen_insn_type {
+ OR1K_INSN_INVALID, OR1K_INSN_L_J, OR1K_INSN_L_JAL, OR1K_INSN_L_JR
+ , OR1K_INSN_L_JALR, OR1K_INSN_L_BNF, OR1K_INSN_L_BF, OR1K_INSN_L_TRAP
+ , OR1K_INSN_L_SYS, OR1K_INSN_L_RFE, OR1K_INSN_L_NOP_IMM, OR1K_INSN_L_NOP
+ , OR1K_INSN_L_MOVHI, OR1K_INSN_L_MACRC, OR1K_INSN_L_MFSPR, OR1K_INSN_L_MTSPR
+ , OR1K_INSN_L_LWZ, OR1K_INSN_L_LWS, OR1K_INSN_L_LBZ, OR1K_INSN_L_LBS
+ , OR1K_INSN_L_LHZ, OR1K_INSN_L_LHS, OR1K_INSN_L_SW, OR1K_INSN_L_SB
+ , OR1K_INSN_L_SH, OR1K_INSN_L_SLL, OR1K_INSN_L_SLLI, OR1K_INSN_L_SRL
+ , OR1K_INSN_L_SRLI, OR1K_INSN_L_SRA, OR1K_INSN_L_SRAI, OR1K_INSN_L_ROR
+ , OR1K_INSN_L_RORI, OR1K_INSN_L_AND, OR1K_INSN_L_OR, OR1K_INSN_L_XOR
+ , OR1K_INSN_L_ADD, OR1K_INSN_L_SUB, OR1K_INSN_L_ADDC, OR1K_INSN_L_MUL
+ , OR1K_INSN_L_MULU, OR1K_INSN_L_DIV, OR1K_INSN_L_DIVU, OR1K_INSN_L_FF1
+ , OR1K_INSN_L_FL1, OR1K_INSN_L_ANDI, OR1K_INSN_L_ORI, OR1K_INSN_L_XORI
+ , OR1K_INSN_L_ADDI, OR1K_INSN_L_ADDIC, OR1K_INSN_L_MULI, OR1K_INSN_L_EXTHS
+ , OR1K_INSN_L_EXTBS, OR1K_INSN_L_EXTHZ, OR1K_INSN_L_EXTBZ, OR1K_INSN_L_EXTWS
+ , OR1K_INSN_L_EXTWZ, OR1K_INSN_L_CMOV, OR1K_INSN_L_SFGTU, OR1K_INSN_L_SFGEU
+ , OR1K_INSN_L_SFLTU, OR1K_INSN_L_SFLEU, OR1K_INSN_L_SFGTS, OR1K_INSN_L_SFGES
+ , OR1K_INSN_L_SFLTS, OR1K_INSN_L_SFLES, OR1K_INSN_L_SFGTUI, OR1K_INSN_L_SFGEUI
+ , OR1K_INSN_L_SFLTUI, OR1K_INSN_L_SFLEUI, OR1K_INSN_L_SFGTSI, OR1K_INSN_L_SFGESI
+ , OR1K_INSN_L_SFLTSI, OR1K_INSN_L_SFLESI, OR1K_INSN_L_SFEQ, OR1K_INSN_L_SFEQI
+ , OR1K_INSN_L_SFNE, OR1K_INSN_L_SFNEI, OR1K_INSN_L_MAC, OR1K_INSN_L_MSB
+ , OR1K_INSN_L_MACI, OR1K_INSN_L_CUST1, OR1K_INSN_L_CUST2, OR1K_INSN_L_CUST3
+ , OR1K_INSN_L_CUST4, OR1K_INSN_L_CUST5, OR1K_INSN_L_CUST6, OR1K_INSN_L_CUST7
+ , OR1K_INSN_L_CUST8, OR1K_INSN_LF_ADD_S, OR1K_INSN_LF_SUB_S, OR1K_INSN_LF_MUL_S
+ , OR1K_INSN_LF_DIV_S, OR1K_INSN_LF_REM_S, OR1K_INSN_LF_ITOF_S, OR1K_INSN_LF_FTOI_S
+ , OR1K_INSN_LF_EQ_S, OR1K_INSN_LF_NE_S, OR1K_INSN_LF_GE_S, OR1K_INSN_LF_GT_S
+ , OR1K_INSN_LF_LT_S, OR1K_INSN_LF_LE_S, OR1K_INSN_LF_MADD_S, OR1K_INSN_LF_CUST1_S
+} CGEN_INSN_TYPE;
+
+/* Index of `invalid' insn place holder. */
+#define CGEN_INSN_INVALID OR1K_INSN_INVALID
+
+/* Total number of insns in table. */
+#define MAX_INSNS ((int) OR1K_INSN_LF_CUST1_S + 1)
+
+/* This struct records data prior to insertion or after extraction. */
+struct cgen_fields
+{
+ int length;
+ long f_nil;
+ long f_anyof;
+ long f_opcode;
+ long f_r1;
+ long f_r2;
+ long f_r3;
+ long f_op_25_2;
+ long f_op_25_5;
+ long f_op_16_1;
+ long f_op_7_4;
+ long f_op_3_4;
+ long f_op_9_2;
+ long f_op_9_4;
+ long f_op_7_8;
+ long f_op_7_2;
+ long f_resv_25_26;
+ long f_resv_25_10;
+ long f_resv_25_5;
+ long f_resv_23_8;
+ long f_resv_20_5;
+ long f_resv_20_4;
+ long f_resv_15_8;
+ long f_resv_15_6;
+ long f_resv_10_11;
+ long f_resv_10_7;
+ long f_resv_10_3;
+ long f_resv_10_1;
+ long f_resv_7_4;
+ long f_resv_5_2;
+ long f_imm16_25_5;
+ long f_imm16_10_11;
+ long f_disp26;
+ long f_uimm16;
+ long f_simm16;
+ long f_uimm6;
+ long f_uimm16_split;
+ long f_simm16_split;
+};
+
+#define CGEN_INIT_PARSE(od) \
+{\
+}
+#define CGEN_INIT_INSERT(od) \
+{\
+}
+#define CGEN_INIT_EXTRACT(od) \
+{\
+}
+#define CGEN_INIT_PRINT(od) \
+{\
+}
+
+
+#endif /* OR1K_OPC_H */
diff --git a/sim/or1k/or1k64-opc.h b/sim/or1k/or1k64-opc.h
new file mode 100644
index 0000000..b35a1bf
--- /dev/null
+++ b/sim/or1k/or1k64-opc.h
@@ -0,0 +1,133 @@
+/* Instruction opcode header for or1k.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef OR1K_OPC_H
+#define OR1K_OPC_H
+
+/* -- opc.h */
+
+#undef CGEN_DIS_HASH_SIZE
+#define CGEN_DIS_HASH_SIZE 256
+#undef CGEN_DIS_HASH
+#define CGEN_DIS_HASH(buffer, value) (((unsigned char *) (buffer))[0] >> 2)
+
+/* -- */
+/* Enum declaration for or1k instruction types. */
+typedef enum cgen_insn_type {
+ OR1K_INSN_INVALID, OR1K_INSN_L_J, OR1K_INSN_L_JAL, OR1K_INSN_L_JR
+ , OR1K_INSN_L_JALR, OR1K_INSN_L_BNF, OR1K_INSN_L_BF, OR1K_INSN_L_TRAP
+ , OR1K_INSN_L_SYS, OR1K_INSN_L_RFE, OR1K_INSN_L_NOP_IMM, OR1K_INSN_L_NOP
+ , OR1K_INSN_L_MOVHI, OR1K_INSN_L_MACRC, OR1K_INSN_L_MFSPR, OR1K_INSN_L_MTSPR
+ , OR1K_INSN_L_LWZ, OR1K_INSN_L_LWS, OR1K_INSN_L_LBZ, OR1K_INSN_L_LBS
+ , OR1K_INSN_L_LHZ, OR1K_INSN_L_LHS, OR1K_INSN_L_SW, OR1K_INSN_L_SB
+ , OR1K_INSN_L_SH, OR1K_INSN_L_SLL, OR1K_INSN_L_SLLI, OR1K_INSN_L_SRL
+ , OR1K_INSN_L_SRLI, OR1K_INSN_L_SRA, OR1K_INSN_L_SRAI, OR1K_INSN_L_ROR
+ , OR1K_INSN_L_RORI, OR1K_INSN_L_AND, OR1K_INSN_L_OR, OR1K_INSN_L_XOR
+ , OR1K_INSN_L_ADD, OR1K_INSN_L_SUB, OR1K_INSN_L_ADDC, OR1K_INSN_L_MUL
+ , OR1K_INSN_L_MULU, OR1K_INSN_L_DIV, OR1K_INSN_L_DIVU, OR1K_INSN_L_FF1
+ , OR1K_INSN_L_FL1, OR1K_INSN_L_ANDI, OR1K_INSN_L_ORI, OR1K_INSN_L_XORI
+ , OR1K_INSN_L_ADDI, OR1K_INSN_L_ADDIC, OR1K_INSN_L_MULI, OR1K_INSN_L_EXTHS
+ , OR1K_INSN_L_EXTBS, OR1K_INSN_L_EXTHZ, OR1K_INSN_L_EXTBZ, OR1K_INSN_L_EXTWS
+ , OR1K_INSN_L_EXTWZ, OR1K_INSN_L_CMOV, OR1K_INSN_L_SFGTU, OR1K_INSN_L_SFGEU
+ , OR1K_INSN_L_SFLTU, OR1K_INSN_L_SFLEU, OR1K_INSN_L_SFGTS, OR1K_INSN_L_SFGES
+ , OR1K_INSN_L_SFLTS, OR1K_INSN_L_SFLES, OR1K_INSN_L_SFGTUI, OR1K_INSN_L_SFGEUI
+ , OR1K_INSN_L_SFLTUI, OR1K_INSN_L_SFLEUI, OR1K_INSN_L_SFGTSI, OR1K_INSN_L_SFGESI
+ , OR1K_INSN_L_SFLTSI, OR1K_INSN_L_SFLESI, OR1K_INSN_L_SFEQ, OR1K_INSN_L_SFEQI
+ , OR1K_INSN_L_SFNE, OR1K_INSN_L_SFNEI, OR1K_INSN_L_MAC, OR1K_INSN_L_MSB
+ , OR1K_INSN_L_MACI, OR1K_INSN_L_CUST1, OR1K_INSN_L_CUST2, OR1K_INSN_L_CUST3
+ , OR1K_INSN_L_CUST4, OR1K_INSN_L_CUST5, OR1K_INSN_L_CUST6, OR1K_INSN_L_CUST7
+ , OR1K_INSN_L_CUST8, OR1K_INSN_LF_ADD_S, OR1K_INSN_LF_ADD_D, OR1K_INSN_LF_SUB_S
+ , OR1K_INSN_LF_SUB_D, OR1K_INSN_LF_MUL_S, OR1K_INSN_LF_MUL_D, OR1K_INSN_LF_DIV_S
+ , OR1K_INSN_LF_DIV_D, OR1K_INSN_LF_REM_S, OR1K_INSN_LF_REM_D, OR1K_INSN_LF_ITOF_S
+ , OR1K_INSN_LF_ITOF_D, OR1K_INSN_LF_FTOI_S, OR1K_INSN_LF_FTOI_D, OR1K_INSN_LF_EQ_S
+ , OR1K_INSN_LF_EQ_D, OR1K_INSN_LF_NE_S, OR1K_INSN_LF_NE_D, OR1K_INSN_LF_GE_S
+ , OR1K_INSN_LF_GE_D, OR1K_INSN_LF_GT_S, OR1K_INSN_LF_GT_D, OR1K_INSN_LF_LT_S
+ , OR1K_INSN_LF_LT_D, OR1K_INSN_LF_LE_S, OR1K_INSN_LF_LE_D, OR1K_INSN_LF_MADD_S
+ , OR1K_INSN_LF_MADD_D, OR1K_INSN_LF_CUST1_S, OR1K_INSN_LF_CUST1_D
+} CGEN_INSN_TYPE;
+
+/* Index of `invalid' insn place holder. */
+#define CGEN_INSN_INVALID OR1K_INSN_INVALID
+
+/* Total number of insns in table. */
+#define MAX_INSNS ((int) OR1K_INSN_LF_CUST1_D + 1)
+
+/* This struct records data prior to insertion or after extraction. */
+struct cgen_fields
+{
+ int length;
+ long f_nil;
+ long f_anyof;
+ long f_opcode;
+ long f_r1;
+ long f_r2;
+ long f_r3;
+ long f_op_25_2;
+ long f_op_25_5;
+ long f_op_16_1;
+ long f_op_7_4;
+ long f_op_3_4;
+ long f_op_9_2;
+ long f_op_9_4;
+ long f_op_7_8;
+ long f_op_7_2;
+ long f_resv_25_26;
+ long f_resv_25_10;
+ long f_resv_25_5;
+ long f_resv_23_8;
+ long f_resv_20_5;
+ long f_resv_20_4;
+ long f_resv_15_8;
+ long f_resv_15_6;
+ long f_resv_10_11;
+ long f_resv_10_7;
+ long f_resv_10_3;
+ long f_resv_10_1;
+ long f_resv_7_4;
+ long f_resv_5_2;
+ long f_imm16_25_5;
+ long f_imm16_10_11;
+ long f_disp26;
+ long f_uimm16;
+ long f_simm16;
+ long f_uimm6;
+ long f_uimm16_split;
+ long f_simm16_split;
+};
+
+#define CGEN_INIT_PARSE(od) \
+{\
+}
+#define CGEN_INIT_INSERT(od) \
+{\
+}
+#define CGEN_INIT_EXTRACT(od) \
+{\
+}
+#define CGEN_INIT_PRINT(od) \
+{\
+}
+
+
+#endif /* OR1K_OPC_H */
diff --git a/sim/or1k/sem32-switch.c b/sim/or1k/sem32-switch.c
new file mode 100644
index 0000000..e708fe1
--- /dev/null
+++ b/sim/or1k/sem32-switch.c
@@ -0,0 +1,2594 @@
+/* Simulator instruction semantics for or1k32bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifdef DEFINE_LABELS
+
+ /* The labels have the case they have because the enum of insn types
+ is all uppercase and in the non-stdc case the insn symbol is built
+ into the enum name. */
+
+ static struct {
+ int index;
+ void *label;
+ } labels[] = {
+ { OR1K32BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
+ { OR1K32BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
+ { OR1K32BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
+ { OR1K32BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
+ { OR1K32BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
+ { OR1K32BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
+ { OR1K32BF_INSN_L_J, && case_sem_INSN_L_J },
+ { OR1K32BF_INSN_L_JAL, && case_sem_INSN_L_JAL },
+ { OR1K32BF_INSN_L_JR, && case_sem_INSN_L_JR },
+ { OR1K32BF_INSN_L_JALR, && case_sem_INSN_L_JALR },
+ { OR1K32BF_INSN_L_BNF, && case_sem_INSN_L_BNF },
+ { OR1K32BF_INSN_L_BF, && case_sem_INSN_L_BF },
+ { OR1K32BF_INSN_L_TRAP, && case_sem_INSN_L_TRAP },
+ { OR1K32BF_INSN_L_SYS, && case_sem_INSN_L_SYS },
+ { OR1K32BF_INSN_L_RFE, && case_sem_INSN_L_RFE },
+ { OR1K32BF_INSN_L_NOP_IMM, && case_sem_INSN_L_NOP_IMM },
+ { OR1K32BF_INSN_L_MOVHI, && case_sem_INSN_L_MOVHI },
+ { OR1K32BF_INSN_L_MACRC, && case_sem_INSN_L_MACRC },
+ { OR1K32BF_INSN_L_MFSPR, && case_sem_INSN_L_MFSPR },
+ { OR1K32BF_INSN_L_MTSPR, && case_sem_INSN_L_MTSPR },
+ { OR1K32BF_INSN_L_LWZ, && case_sem_INSN_L_LWZ },
+ { OR1K32BF_INSN_L_LWS, && case_sem_INSN_L_LWS },
+ { OR1K32BF_INSN_L_LBZ, && case_sem_INSN_L_LBZ },
+ { OR1K32BF_INSN_L_LBS, && case_sem_INSN_L_LBS },
+ { OR1K32BF_INSN_L_LHZ, && case_sem_INSN_L_LHZ },
+ { OR1K32BF_INSN_L_LHS, && case_sem_INSN_L_LHS },
+ { OR1K32BF_INSN_L_SW, && case_sem_INSN_L_SW },
+ { OR1K32BF_INSN_L_SB, && case_sem_INSN_L_SB },
+ { OR1K32BF_INSN_L_SH, && case_sem_INSN_L_SH },
+ { OR1K32BF_INSN_L_SLL, && case_sem_INSN_L_SLL },
+ { OR1K32BF_INSN_L_SLLI, && case_sem_INSN_L_SLLI },
+ { OR1K32BF_INSN_L_SRL, && case_sem_INSN_L_SRL },
+ { OR1K32BF_INSN_L_SRLI, && case_sem_INSN_L_SRLI },
+ { OR1K32BF_INSN_L_SRA, && case_sem_INSN_L_SRA },
+ { OR1K32BF_INSN_L_SRAI, && case_sem_INSN_L_SRAI },
+ { OR1K32BF_INSN_L_ROR, && case_sem_INSN_L_ROR },
+ { OR1K32BF_INSN_L_RORI, && case_sem_INSN_L_RORI },
+ { OR1K32BF_INSN_L_AND, && case_sem_INSN_L_AND },
+ { OR1K32BF_INSN_L_OR, && case_sem_INSN_L_OR },
+ { OR1K32BF_INSN_L_XOR, && case_sem_INSN_L_XOR },
+ { OR1K32BF_INSN_L_ADD, && case_sem_INSN_L_ADD },
+ { OR1K32BF_INSN_L_SUB, && case_sem_INSN_L_SUB },
+ { OR1K32BF_INSN_L_ADDC, && case_sem_INSN_L_ADDC },
+ { OR1K32BF_INSN_L_MUL, && case_sem_INSN_L_MUL },
+ { OR1K32BF_INSN_L_MULU, && case_sem_INSN_L_MULU },
+ { OR1K32BF_INSN_L_DIV, && case_sem_INSN_L_DIV },
+ { OR1K32BF_INSN_L_DIVU, && case_sem_INSN_L_DIVU },
+ { OR1K32BF_INSN_L_FF1, && case_sem_INSN_L_FF1 },
+ { OR1K32BF_INSN_L_FL1, && case_sem_INSN_L_FL1 },
+ { OR1K32BF_INSN_L_ANDI, && case_sem_INSN_L_ANDI },
+ { OR1K32BF_INSN_L_ORI, && case_sem_INSN_L_ORI },
+ { OR1K32BF_INSN_L_XORI, && case_sem_INSN_L_XORI },
+ { OR1K32BF_INSN_L_ADDI, && case_sem_INSN_L_ADDI },
+ { OR1K32BF_INSN_L_ADDIC, && case_sem_INSN_L_ADDIC },
+ { OR1K32BF_INSN_L_MULI, && case_sem_INSN_L_MULI },
+ { OR1K32BF_INSN_L_EXTHS, && case_sem_INSN_L_EXTHS },
+ { OR1K32BF_INSN_L_EXTBS, && case_sem_INSN_L_EXTBS },
+ { OR1K32BF_INSN_L_EXTHZ, && case_sem_INSN_L_EXTHZ },
+ { OR1K32BF_INSN_L_EXTBZ, && case_sem_INSN_L_EXTBZ },
+ { OR1K32BF_INSN_L_EXTWS, && case_sem_INSN_L_EXTWS },
+ { OR1K32BF_INSN_L_EXTWZ, && case_sem_INSN_L_EXTWZ },
+ { OR1K32BF_INSN_L_CMOV, && case_sem_INSN_L_CMOV },
+ { OR1K32BF_INSN_L_SFGTU, && case_sem_INSN_L_SFGTU },
+ { OR1K32BF_INSN_L_SFGEU, && case_sem_INSN_L_SFGEU },
+ { OR1K32BF_INSN_L_SFLTU, && case_sem_INSN_L_SFLTU },
+ { OR1K32BF_INSN_L_SFLEU, && case_sem_INSN_L_SFLEU },
+ { OR1K32BF_INSN_L_SFGTS, && case_sem_INSN_L_SFGTS },
+ { OR1K32BF_INSN_L_SFGES, && case_sem_INSN_L_SFGES },
+ { OR1K32BF_INSN_L_SFLTS, && case_sem_INSN_L_SFLTS },
+ { OR1K32BF_INSN_L_SFLES, && case_sem_INSN_L_SFLES },
+ { OR1K32BF_INSN_L_SFGTUI, && case_sem_INSN_L_SFGTUI },
+ { OR1K32BF_INSN_L_SFGEUI, && case_sem_INSN_L_SFGEUI },
+ { OR1K32BF_INSN_L_SFLTUI, && case_sem_INSN_L_SFLTUI },
+ { OR1K32BF_INSN_L_SFLEUI, && case_sem_INSN_L_SFLEUI },
+ { OR1K32BF_INSN_L_SFGTSI, && case_sem_INSN_L_SFGTSI },
+ { OR1K32BF_INSN_L_SFGESI, && case_sem_INSN_L_SFGESI },
+ { OR1K32BF_INSN_L_SFLTSI, && case_sem_INSN_L_SFLTSI },
+ { OR1K32BF_INSN_L_SFLESI, && case_sem_INSN_L_SFLESI },
+ { OR1K32BF_INSN_L_SFEQ, && case_sem_INSN_L_SFEQ },
+ { OR1K32BF_INSN_L_SFEQI, && case_sem_INSN_L_SFEQI },
+ { OR1K32BF_INSN_L_SFNE, && case_sem_INSN_L_SFNE },
+ { OR1K32BF_INSN_L_SFNEI, && case_sem_INSN_L_SFNEI },
+ { OR1K32BF_INSN_L_MAC, && case_sem_INSN_L_MAC },
+ { OR1K32BF_INSN_L_MSB, && case_sem_INSN_L_MSB },
+ { OR1K32BF_INSN_L_MACI, && case_sem_INSN_L_MACI },
+ { OR1K32BF_INSN_L_CUST1, && case_sem_INSN_L_CUST1 },
+ { OR1K32BF_INSN_L_CUST2, && case_sem_INSN_L_CUST2 },
+ { OR1K32BF_INSN_L_CUST3, && case_sem_INSN_L_CUST3 },
+ { OR1K32BF_INSN_L_CUST4, && case_sem_INSN_L_CUST4 },
+ { OR1K32BF_INSN_L_CUST5, && case_sem_INSN_L_CUST5 },
+ { OR1K32BF_INSN_L_CUST6, && case_sem_INSN_L_CUST6 },
+ { OR1K32BF_INSN_L_CUST7, && case_sem_INSN_L_CUST7 },
+ { OR1K32BF_INSN_L_CUST8, && case_sem_INSN_L_CUST8 },
+ { OR1K32BF_INSN_LF_ADD_S, && case_sem_INSN_LF_ADD_S },
+ { OR1K32BF_INSN_LF_SUB_S, && case_sem_INSN_LF_SUB_S },
+ { OR1K32BF_INSN_LF_MUL_S, && case_sem_INSN_LF_MUL_S },
+ { OR1K32BF_INSN_LF_DIV_S, && case_sem_INSN_LF_DIV_S },
+ { OR1K32BF_INSN_LF_REM_S, && case_sem_INSN_LF_REM_S },
+ { OR1K32BF_INSN_LF_ITOF_S, && case_sem_INSN_LF_ITOF_S },
+ { OR1K32BF_INSN_LF_FTOI_S, && case_sem_INSN_LF_FTOI_S },
+ { OR1K32BF_INSN_LF_EQ_S, && case_sem_INSN_LF_EQ_S },
+ { OR1K32BF_INSN_LF_NE_S, && case_sem_INSN_LF_NE_S },
+ { OR1K32BF_INSN_LF_GE_S, && case_sem_INSN_LF_GE_S },
+ { OR1K32BF_INSN_LF_GT_S, && case_sem_INSN_LF_GT_S },
+ { OR1K32BF_INSN_LF_LT_S, && case_sem_INSN_LF_LT_S },
+ { OR1K32BF_INSN_LF_LE_S, && case_sem_INSN_LF_LE_S },
+ { OR1K32BF_INSN_LF_MADD_S, && case_sem_INSN_LF_MADD_S },
+ { OR1K32BF_INSN_LF_CUST1_S, && case_sem_INSN_LF_CUST1_S },
+ { 0, 0 }
+ };
+ int i;
+
+ for (i = 0; labels[i].label != 0; ++i)
+ {
+#if FAST_P
+ CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
+#else
+ CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
+#endif
+ }
+
+#undef DEFINE_LABELS
+#endif /* DEFINE_LABELS */
+
+#ifdef DEFINE_SWITCH
+
+/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
+ off frills like tracing and profiling. */
+/* FIXME: A better way would be to have TRACE_RESULT check for something
+ that can cause it to be optimized out. Another way would be to emit
+ special handlers into the instruction "stream". */
+
+#if FAST_P
+#undef TRACE_RESULT
+#define TRACE_RESULT(cpu, abuf, name, type, val)
+#endif
+
+#undef GET_ATTR
+#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
+
+{
+
+#if WITH_SCACHE_PBB
+
+/* Branch to next handler without going around main loop. */
+#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
+SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
+
+#else /* ! WITH_SCACHE_PBB */
+
+#define NEXT(vpc) BREAK (sem)
+#ifdef __GNUC__
+#if FAST_P
+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
+#else
+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
+#endif
+#else
+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
+#endif
+
+#endif /* ! WITH_SCACHE_PBB */
+
+ {
+
+ CASE (sem, INSN_X_INVALID) : /* --invalid-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+ /* Update the recorded pc in the cpu state struct.
+ Only necessary for WITH_SCACHE case, but to avoid the
+ conditional compilation .... */
+ SET_H_PC (pc);
+ /* Virtual insns have zero size. Overwrite vpc with address of next insn
+ using the default-insn-bitsize spec. When executing insns in parallel
+ we may want to queue the fault and continue execution. */
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+ vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_AFTER) : /* --after-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+ or1k32bf_pbb_after (current_cpu, sem_arg);
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_BEFORE) : /* --before-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+ or1k32bf_pbb_before (current_cpu, sem_arg);
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+#ifdef DEFINE_SWITCH
+ vpc = or1k32bf_pbb_cti_chain (current_cpu, sem_arg,
+ pbb_br_type, pbb_br_npc);
+ BREAK (sem);
+#else
+ /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
+ vpc = or1k32bf_pbb_cti_chain (current_cpu, sem_arg,
+ CPU_PBB_BR_TYPE (current_cpu),
+ CPU_PBB_BR_NPC (current_cpu));
+#endif
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_CHAIN) : /* --chain-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+ vpc = or1k32bf_pbb_chain (current_cpu, sem_arg);
+#ifdef DEFINE_SWITCH
+ BREAK (sem);
+#endif
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_BEGIN) : /* --begin-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+#if defined DEFINE_SWITCH || defined FAST_P
+ /* In the switch case FAST_P is a constant, allowing several optimizations
+ in any called inline functions. */
+ vpc = or1k32bf_pbb_begin (current_cpu, FAST_P);
+#else
+#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
+ vpc = or1k32bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
+#else
+ vpc = or1k32bf_pbb_begin (current_cpu, 0);
+#endif
+#endif
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_J) : /* l.j ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_JAL) : /* l.jal ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ USI opval = ADDSI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+{
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_JR) : /* l.jr $rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ USI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_JALR) : /* l.jalr $rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ USI opval = ADDSI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+{
+{
+ {
+ USI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_BNF) : /* l.bnf ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NOTSI (GET_H_SYS_SR_F ())) {
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ USI opval = ADDSI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_BF) : /* l.bf ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (GET_H_SYS_SR_F ()) {
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ USI opval = ADDSI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_TRAP) : /* l.trap ${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_exception (current_cpu, pc, EXCEPT_TRAP);
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SYS) : /* l.sys ${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_exception (current_cpu, pc, EXCEPT_SYSCALL);
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_RFE) : /* l.rfe */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_rfe (current_cpu, pc);
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_NOP_IMM) : /* l.nop ${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_nop (current_cpu, ZEXTSISI (FLD (f_uimm16)));
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MOVHI) : /* l.movhi $rD,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SLLSI (ZEXTSISI (FLD (f_uimm16)), 16);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MACRC) : /* l.macrc $rD */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ USI temp0;USI temp1;USI temp2;
+ temp0 = GET_H_MAC_MACLO ();
+ temp1 = 0;
+ temp2 = 0;
+ {
+ USI opval = temp0;
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+ {
+ USI opval = temp1;
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+ {
+ USI opval = temp2;
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MFSPR) : /* l.mfspr $rD,$rA,${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = or1k32bf_mfspr (current_cpu, pc, FLD (f_r1), ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MTSPR) : /* l.mtspr $rA,$rB,${uimm16-split} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_mtspr (current_cpu, pc, ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16_split))), GET_H_GPR (FLD (f_r3)));
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LWZ) : /* l.lwz $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTSISI (GETMEMUSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LWS) : /* l.lws $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTSISI (GETMEMSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LBZ) : /* l.lbz $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTQISI (GETMEMUQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LBS) : /* l.lbs $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTQISI (GETMEMQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LHZ) : /* l.lhz $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTHISI (GETMEMUHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LHS) : /* l.lhs $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTHISI (GETMEMHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SW) : /* l.sw ${simm16-split}($rA),$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = TRUNCSISI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SB) : /* l.sb ${simm16-split}($rA),$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UQI opval = TRUNCSIQI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 1), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SH) : /* l.sh ${simm16-split}($rA),$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UHI opval = TRUNCSIHI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 2), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SLL) : /* l.sll $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SLLSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SLLI) : /* l.slli $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SLLSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRL) : /* l.srl $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRLSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRLI) : /* l.srli $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRLSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRA) : /* l.sra $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRASI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRAI) : /* l.srai $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRASI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ROR) : /* l.ror $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = RORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_RORI) : /* l.rori $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = RORSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_AND) : /* l.and $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ANDSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_OR) : /* l.or $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_XOR) : /* l.xor $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = XORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADD) : /* l.add $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = ADDSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SUB) : /* l.sub $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = SUBCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = SUBOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = SUBSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADDC) : /* l.addc $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = ADDCSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MUL) : /* l.mul $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = MUL2OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MULU) : /* l.mulu $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_DIV) : /* l.div $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NESI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ SI opval = DIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_DIVU) : /* l.divu $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NESI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = DIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_FF1) : /* l.ff1 $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = or1k32bf_ff1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_FL1) : /* l.fl1 $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = or1k32bf_fl1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ANDI) : /* l.andi $rD,$rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ANDSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ORI) : /* l.ori $rD,$rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_XORI) : /* l.xori $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = XORSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADDI) : /* l.addi $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = ADDSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADDIC) : /* l.addic $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ SI opval = ADDCSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MULI) : /* l.muli $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ USI opval = MUL2OFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = MULSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTHS) : /* l.exths $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EXTHISI (TRUNCSIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTBS) : /* l.extbs $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EXTQISI (TRUNCSIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTHZ) : /* l.exthz $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTHISI (TRUNCSIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTBZ) : /* l.extbz $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTQISI (TRUNCSIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTWS) : /* l.extws $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EXTSISI (TRUNCSISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTWZ) : /* l.extwz $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTSISI (TRUNCSISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CMOV) : /* l.cmov $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+if (GET_H_SYS_SR_F ()) {
+ {
+ USI opval = GET_H_GPR (FLD (f_r2));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+} else {
+ {
+ USI opval = GET_H_GPR (FLD (f_r3));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+
+ abuf->written = written;
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTU) : /* l.sfgtu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGEU) : /* l.sfgeu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GEUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTU) : /* l.sfltu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLEU) : /* l.sfleu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LEUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTS) : /* l.sfgts $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGES) : /* l.sfges $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTS) : /* l.sflts $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLES) : /* l.sfles $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTUI) : /* l.sfgtui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGEUI) : /* l.sfgeui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GEUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTUI) : /* l.sfltui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLEUI) : /* l.sfleui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LEUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTSI) : /* l.sfgtsi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGESI) : /* l.sfgesi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTSI) : /* l.sfltsi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLESI) : /* l.sflesi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFEQ) : /* l.sfeq $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EQSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFEQI) : /* l.sfeqi $rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EQSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFNE) : /* l.sfne $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = NESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFNEI) : /* l.sfnei $rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = NESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MAC) : /* l.mac $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ SI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MSB) : /* l.msb $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ SI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = SUBDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MACI) : /* l.maci $rA,${simm16-split} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ SI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULSI (EXTSISI (FLD (f_simm16_split)), GET_H_GPR (FLD (f_r2)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST1) : /* l.cust1 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST2) : /* l.cust2 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST3) : /* l.cust3 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST4) : /* l.cust4 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST5) : /* l.cust5 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST6) : /* l.cust6 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST7) : /* l.cust7 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST8) : /* l.cust8 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_ADD_S) : /* lf.add.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_SUB_S) : /* lf.sub.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_MUL_S) : /* lf.mul.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_DIV_S) : /* lf.div.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_REM_S) : /* lf.rem.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->remsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_ITOF_S) : /* lf.itof.s $rDSF,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), TRUNCSISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_FTOI_S) : /* lf.ftoi.s $rD,$rASF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTSISI (CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_FSR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_EQ_S) : /* lf.sfeq.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_NE_S) : /* lf.sfne.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->nesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_GE_S) : /* lf.sfge.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_GT_S) : /* lf.sfgt.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_LT_S) : /* lf.sflt.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_LE_S) : /* lf.sfle.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->lesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_MADD_S) : /* lf.madd.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))), GET_H_FSR (FLD (f_r1)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_CUST1_S) : /* lf.cust1.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+
+ }
+ ENDSWITCH (sem) /* End of semantic switch. */
+
+ /* At this point `vpc' contains the next insn to execute. */
+}
+
+#undef DEFINE_SWITCH
+#endif /* DEFINE_SWITCH */
diff --git a/sim/or1k/sem32.c b/sim/or1k/sem32.c
new file mode 100644
index 0000000..0ea1db3
--- /dev/null
+++ b/sim/or1k/sem32.c
@@ -0,0 +1,2789 @@
+/* Simulator instruction semantics for or1k32bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k32bf
+#define WANT_CPU_OR1K32BF
+
+#include "sim-main.h"
+#include "cgen-mem.h"
+#include "cgen-ops.h"
+
+#undef GET_ATTR
+#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
+
+/* This is used so that we can compile two copies of the semantic code,
+ one with full feature support and one without that runs fast(er).
+ FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
+#if FAST_P
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
+#undef TRACE_RESULT
+#define TRACE_RESULT(cpu, abuf, name, type, val)
+#else
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
+#endif
+
+/* x-invalid: --invalid-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+ /* Update the recorded pc in the cpu state struct.
+ Only necessary for WITH_SCACHE case, but to avoid the
+ conditional compilation .... */
+ SET_H_PC (pc);
+ /* Virtual insns have zero size. Overwrite vpc with address of next insn
+ using the default-insn-bitsize spec. When executing insns in parallel
+ we may want to queue the fault and continue execution. */
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+ vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-after: --after-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+ or1k32bf_pbb_after (current_cpu, sem_arg);
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-before: --before-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+ or1k32bf_pbb_before (current_cpu, sem_arg);
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-cti-chain: --cti-chain-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+#ifdef DEFINE_SWITCH
+ vpc = or1k32bf_pbb_cti_chain (current_cpu, sem_arg,
+ pbb_br_type, pbb_br_npc);
+ BREAK (sem);
+#else
+ /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
+ vpc = or1k32bf_pbb_cti_chain (current_cpu, sem_arg,
+ CPU_PBB_BR_TYPE (current_cpu),
+ CPU_PBB_BR_NPC (current_cpu));
+#endif
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-chain: --chain-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+ vpc = or1k32bf_pbb_chain (current_cpu, sem_arg);
+#ifdef DEFINE_SWITCH
+ BREAK (sem);
+#endif
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-begin: --begin-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K32BF
+#if defined DEFINE_SWITCH || defined FAST_P
+ /* In the switch case FAST_P is a constant, allowing several optimizations
+ in any called inline functions. */
+ vpc = or1k32bf_pbb_begin (current_cpu, FAST_P);
+#else
+#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
+ vpc = or1k32bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
+#else
+ vpc = or1k32bf_pbb_begin (current_cpu, 0);
+#endif
+#endif
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-j: l.j ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_j) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-jal: l.jal ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_jal) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ USI opval = ADDSI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+{
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-jr: l.jr $rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_jr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ USI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-jalr: l.jalr $rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_jalr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ USI opval = ADDSI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+{
+{
+ {
+ USI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-bnf: l.bnf ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_bnf) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NOTSI (GET_H_SYS_SR_F ())) {
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ USI opval = ADDSI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-bf: l.bf ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_bf) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (GET_H_SYS_SR_F ()) {
+{
+ {
+ USI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ USI opval = ADDSI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-trap: l.trap ${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_exception (current_cpu, pc, EXCEPT_TRAP);
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sys: l.sys ${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sys) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_exception (current_cpu, pc, EXCEPT_SYSCALL);
+
+ return vpc;
+#undef FLD
+}
+
+/* l-rfe: l.rfe */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_rfe) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_rfe (current_cpu, pc);
+
+ return vpc;
+#undef FLD
+}
+
+/* l-nop-imm: l.nop ${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_nop_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_nop (current_cpu, ZEXTSISI (FLD (f_uimm16)));
+
+ return vpc;
+#undef FLD
+}
+
+/* l-movhi: l.movhi $rD,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_movhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SLLSI (ZEXTSISI (FLD (f_uimm16)), 16);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-macrc: l.macrc $rD */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_macrc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ USI temp0;USI temp1;USI temp2;
+ temp0 = GET_H_MAC_MACLO ();
+ temp1 = 0;
+ temp2 = 0;
+ {
+ USI opval = temp0;
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+ {
+ USI opval = temp1;
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+ {
+ USI opval = temp2;
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mfspr: l.mfspr $rD,$rA,${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_mfspr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = or1k32bf_mfspr (current_cpu, pc, FLD (f_r1), ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mtspr: l.mtspr $rA,$rB,${uimm16-split} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_mtspr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k32bf_mtspr (current_cpu, pc, ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16_split))), GET_H_GPR (FLD (f_r3)));
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lwz: l.lwz $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_lwz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTSISI (GETMEMUSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lws: l.lws $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_lws) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTSISI (GETMEMSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lbz: l.lbz $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_lbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTQISI (GETMEMUQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lbs: l.lbs $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_lbs) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTQISI (GETMEMQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lhz: l.lhz $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_lhz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTHISI (GETMEMUHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lhs: l.lhs $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_lhs) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTHISI (GETMEMHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sw: l.sw ${simm16-split}($rA),$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = TRUNCSISI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sb: l.sb ${simm16-split}($rA),$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UQI opval = TRUNCSIQI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 1), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sh: l.sh ${simm16-split}($rA),$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UHI opval = TRUNCSIHI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 2), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sll: l.sll $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SLLSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-slli: l.slli $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SLLSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-srl: l.srl $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRLSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-srli: l.srli $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRLSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sra: l.sra $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRASI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-srai: l.srai $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = SRASI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-ror: l.ror $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_ror) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = RORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-rori: l.rori $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_rori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = RORSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-and: l.and $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ANDSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-or: l.or $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-xor: l.xor $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = XORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-add: l.add $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = ADDSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sub: l.sub $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = SUBCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = SUBOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = SUBSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-addc: l.addc $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = ADDCSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mul: l.mul $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = MUL2OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mulu: l.mulu $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-div: l.div $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NESI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ SI opval = DIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+ return vpc;
+#undef FLD
+}
+
+/* l-divu: l.divu $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NESI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = DIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+ return vpc;
+#undef FLD
+}
+
+/* l-ff1: l.ff1 $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_ff1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = or1k32bf_ff1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-fl1: l.fl1 $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_fl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = or1k32bf_fl1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-andi: l.andi $rD,$rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_andi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ANDSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-ori: l.ori $rD,$rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_ori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-xori: l.xori $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_xori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = XORSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-addi: l.addi $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = ADDSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-addic: l.addic $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_addic) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ SI opval = ADDCSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-muli: l.muli $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_muli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ USI opval = MUL2OFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ USI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ USI opval = MULSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-exths: l.exths $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_exths) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EXTHISI (TRUNCSIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extbs: l.extbs $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_extbs) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EXTQISI (TRUNCSIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-exthz: l.exthz $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_exthz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTHISI (TRUNCSIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extbz: l.extbz $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_extbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTQISI (TRUNCSIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extws: l.extws $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_extws) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EXTSISI (TRUNCSISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extwz: l.extwz $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_extwz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = ZEXTSISI (TRUNCSISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cmov: l.cmov $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cmov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+if (GET_H_SYS_SR_F ()) {
+ {
+ USI opval = GET_H_GPR (FLD (f_r2));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+} else {
+ {
+ USI opval = GET_H_GPR (FLD (f_r3));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+}
+
+ abuf->written = written;
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgtu: l.sfgtu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfgtu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgeu: l.sfgeu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GEUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfltu: l.sfltu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfltu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfleu: l.sfleu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LEUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgts: l.sfgts $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfgts) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfges: l.sfges $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfges) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sflts: l.sflts $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sflts) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfles: l.sfles $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfles) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgtui: l.sfgtui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfgtui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgeui: l.sfgeui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfgeui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GEUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfltui: l.sfltui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfltui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfleui: l.sfleui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfleui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LEUSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgtsi: l.sfgtsi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfgtsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GTSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgesi: l.sfgesi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfgesi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = GESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfltsi: l.sfltsi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfltsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LTSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sflesi: l.sflesi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sflesi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = LESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfeq: l.sfeq $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EQSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfeqi: l.sfeqi $rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfeqi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = EQSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfne: l.sfne $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = NESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfnei: l.sfnei $rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_sfnei) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = NESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mac: l.mac $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_mac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ SI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-msb: l.msb $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_msb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ SI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = SUBDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-maci: l.maci $rA,${simm16-split} */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_maci) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ SI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULSI (EXTSISI (FLD (f_simm16_split)), GET_H_GPR (FLD (f_r2)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust1: l.cust1 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust2: l.cust2 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust3: l.cust3 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust4: l.cust4 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust4) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust5: l.cust5 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust5) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust6: l.cust6 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust6) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust7: l.cust7 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust7) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust8: l.cust8 */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,l_cust8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-add-s: lf.add.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_add_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-sub-s: lf.sub.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_sub_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-mul-s: lf.mul.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_mul_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-div-s: lf.div.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_div_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-rem-s: lf.rem.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_rem_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->remsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-itof-s: lf.itof.s $rDSF,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_itof_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), TRUNCSISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ftoi-s: lf.ftoi.s $rD,$rASF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_ftoi_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SI opval = EXTSISI (CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_FSR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-eq-s: lf.sfeq.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_eq_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ne-s: lf.sfne.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_ne_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->nesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ge-s: lf.sfge.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_ge_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-gt-s: lf.sfgt.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_gt_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-lt-s: lf.sflt.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_lt_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-le-s: lf.sfle.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_le_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->lesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-madd-s: lf.madd.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_madd_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))), GET_H_FSR (FLD (f_r1)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-cust1-s: lf.cust1.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k32bf,lf_cust1_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* Table of all semantic fns. */
+
+static const struct sem_fn_desc sem_fns[] = {
+ { OR1K32BF_INSN_X_INVALID, SEM_FN_NAME (or1k32bf,x_invalid) },
+ { OR1K32BF_INSN_X_AFTER, SEM_FN_NAME (or1k32bf,x_after) },
+ { OR1K32BF_INSN_X_BEFORE, SEM_FN_NAME (or1k32bf,x_before) },
+ { OR1K32BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (or1k32bf,x_cti_chain) },
+ { OR1K32BF_INSN_X_CHAIN, SEM_FN_NAME (or1k32bf,x_chain) },
+ { OR1K32BF_INSN_X_BEGIN, SEM_FN_NAME (or1k32bf,x_begin) },
+ { OR1K32BF_INSN_L_J, SEM_FN_NAME (or1k32bf,l_j) },
+ { OR1K32BF_INSN_L_JAL, SEM_FN_NAME (or1k32bf,l_jal) },
+ { OR1K32BF_INSN_L_JR, SEM_FN_NAME (or1k32bf,l_jr) },
+ { OR1K32BF_INSN_L_JALR, SEM_FN_NAME (or1k32bf,l_jalr) },
+ { OR1K32BF_INSN_L_BNF, SEM_FN_NAME (or1k32bf,l_bnf) },
+ { OR1K32BF_INSN_L_BF, SEM_FN_NAME (or1k32bf,l_bf) },
+ { OR1K32BF_INSN_L_TRAP, SEM_FN_NAME (or1k32bf,l_trap) },
+ { OR1K32BF_INSN_L_SYS, SEM_FN_NAME (or1k32bf,l_sys) },
+ { OR1K32BF_INSN_L_RFE, SEM_FN_NAME (or1k32bf,l_rfe) },
+ { OR1K32BF_INSN_L_NOP_IMM, SEM_FN_NAME (or1k32bf,l_nop_imm) },
+ { OR1K32BF_INSN_L_MOVHI, SEM_FN_NAME (or1k32bf,l_movhi) },
+ { OR1K32BF_INSN_L_MACRC, SEM_FN_NAME (or1k32bf,l_macrc) },
+ { OR1K32BF_INSN_L_MFSPR, SEM_FN_NAME (or1k32bf,l_mfspr) },
+ { OR1K32BF_INSN_L_MTSPR, SEM_FN_NAME (or1k32bf,l_mtspr) },
+ { OR1K32BF_INSN_L_LWZ, SEM_FN_NAME (or1k32bf,l_lwz) },
+ { OR1K32BF_INSN_L_LWS, SEM_FN_NAME (or1k32bf,l_lws) },
+ { OR1K32BF_INSN_L_LBZ, SEM_FN_NAME (or1k32bf,l_lbz) },
+ { OR1K32BF_INSN_L_LBS, SEM_FN_NAME (or1k32bf,l_lbs) },
+ { OR1K32BF_INSN_L_LHZ, SEM_FN_NAME (or1k32bf,l_lhz) },
+ { OR1K32BF_INSN_L_LHS, SEM_FN_NAME (or1k32bf,l_lhs) },
+ { OR1K32BF_INSN_L_SW, SEM_FN_NAME (or1k32bf,l_sw) },
+ { OR1K32BF_INSN_L_SB, SEM_FN_NAME (or1k32bf,l_sb) },
+ { OR1K32BF_INSN_L_SH, SEM_FN_NAME (or1k32bf,l_sh) },
+ { OR1K32BF_INSN_L_SLL, SEM_FN_NAME (or1k32bf,l_sll) },
+ { OR1K32BF_INSN_L_SLLI, SEM_FN_NAME (or1k32bf,l_slli) },
+ { OR1K32BF_INSN_L_SRL, SEM_FN_NAME (or1k32bf,l_srl) },
+ { OR1K32BF_INSN_L_SRLI, SEM_FN_NAME (or1k32bf,l_srli) },
+ { OR1K32BF_INSN_L_SRA, SEM_FN_NAME (or1k32bf,l_sra) },
+ { OR1K32BF_INSN_L_SRAI, SEM_FN_NAME (or1k32bf,l_srai) },
+ { OR1K32BF_INSN_L_ROR, SEM_FN_NAME (or1k32bf,l_ror) },
+ { OR1K32BF_INSN_L_RORI, SEM_FN_NAME (or1k32bf,l_rori) },
+ { OR1K32BF_INSN_L_AND, SEM_FN_NAME (or1k32bf,l_and) },
+ { OR1K32BF_INSN_L_OR, SEM_FN_NAME (or1k32bf,l_or) },
+ { OR1K32BF_INSN_L_XOR, SEM_FN_NAME (or1k32bf,l_xor) },
+ { OR1K32BF_INSN_L_ADD, SEM_FN_NAME (or1k32bf,l_add) },
+ { OR1K32BF_INSN_L_SUB, SEM_FN_NAME (or1k32bf,l_sub) },
+ { OR1K32BF_INSN_L_ADDC, SEM_FN_NAME (or1k32bf,l_addc) },
+ { OR1K32BF_INSN_L_MUL, SEM_FN_NAME (or1k32bf,l_mul) },
+ { OR1K32BF_INSN_L_MULU, SEM_FN_NAME (or1k32bf,l_mulu) },
+ { OR1K32BF_INSN_L_DIV, SEM_FN_NAME (or1k32bf,l_div) },
+ { OR1K32BF_INSN_L_DIVU, SEM_FN_NAME (or1k32bf,l_divu) },
+ { OR1K32BF_INSN_L_FF1, SEM_FN_NAME (or1k32bf,l_ff1) },
+ { OR1K32BF_INSN_L_FL1, SEM_FN_NAME (or1k32bf,l_fl1) },
+ { OR1K32BF_INSN_L_ANDI, SEM_FN_NAME (or1k32bf,l_andi) },
+ { OR1K32BF_INSN_L_ORI, SEM_FN_NAME (or1k32bf,l_ori) },
+ { OR1K32BF_INSN_L_XORI, SEM_FN_NAME (or1k32bf,l_xori) },
+ { OR1K32BF_INSN_L_ADDI, SEM_FN_NAME (or1k32bf,l_addi) },
+ { OR1K32BF_INSN_L_ADDIC, SEM_FN_NAME (or1k32bf,l_addic) },
+ { OR1K32BF_INSN_L_MULI, SEM_FN_NAME (or1k32bf,l_muli) },
+ { OR1K32BF_INSN_L_EXTHS, SEM_FN_NAME (or1k32bf,l_exths) },
+ { OR1K32BF_INSN_L_EXTBS, SEM_FN_NAME (or1k32bf,l_extbs) },
+ { OR1K32BF_INSN_L_EXTHZ, SEM_FN_NAME (or1k32bf,l_exthz) },
+ { OR1K32BF_INSN_L_EXTBZ, SEM_FN_NAME (or1k32bf,l_extbz) },
+ { OR1K32BF_INSN_L_EXTWS, SEM_FN_NAME (or1k32bf,l_extws) },
+ { OR1K32BF_INSN_L_EXTWZ, SEM_FN_NAME (or1k32bf,l_extwz) },
+ { OR1K32BF_INSN_L_CMOV, SEM_FN_NAME (or1k32bf,l_cmov) },
+ { OR1K32BF_INSN_L_SFGTU, SEM_FN_NAME (or1k32bf,l_sfgtu) },
+ { OR1K32BF_INSN_L_SFGEU, SEM_FN_NAME (or1k32bf,l_sfgeu) },
+ { OR1K32BF_INSN_L_SFLTU, SEM_FN_NAME (or1k32bf,l_sfltu) },
+ { OR1K32BF_INSN_L_SFLEU, SEM_FN_NAME (or1k32bf,l_sfleu) },
+ { OR1K32BF_INSN_L_SFGTS, SEM_FN_NAME (or1k32bf,l_sfgts) },
+ { OR1K32BF_INSN_L_SFGES, SEM_FN_NAME (or1k32bf,l_sfges) },
+ { OR1K32BF_INSN_L_SFLTS, SEM_FN_NAME (or1k32bf,l_sflts) },
+ { OR1K32BF_INSN_L_SFLES, SEM_FN_NAME (or1k32bf,l_sfles) },
+ { OR1K32BF_INSN_L_SFGTUI, SEM_FN_NAME (or1k32bf,l_sfgtui) },
+ { OR1K32BF_INSN_L_SFGEUI, SEM_FN_NAME (or1k32bf,l_sfgeui) },
+ { OR1K32BF_INSN_L_SFLTUI, SEM_FN_NAME (or1k32bf,l_sfltui) },
+ { OR1K32BF_INSN_L_SFLEUI, SEM_FN_NAME (or1k32bf,l_sfleui) },
+ { OR1K32BF_INSN_L_SFGTSI, SEM_FN_NAME (or1k32bf,l_sfgtsi) },
+ { OR1K32BF_INSN_L_SFGESI, SEM_FN_NAME (or1k32bf,l_sfgesi) },
+ { OR1K32BF_INSN_L_SFLTSI, SEM_FN_NAME (or1k32bf,l_sfltsi) },
+ { OR1K32BF_INSN_L_SFLESI, SEM_FN_NAME (or1k32bf,l_sflesi) },
+ { OR1K32BF_INSN_L_SFEQ, SEM_FN_NAME (or1k32bf,l_sfeq) },
+ { OR1K32BF_INSN_L_SFEQI, SEM_FN_NAME (or1k32bf,l_sfeqi) },
+ { OR1K32BF_INSN_L_SFNE, SEM_FN_NAME (or1k32bf,l_sfne) },
+ { OR1K32BF_INSN_L_SFNEI, SEM_FN_NAME (or1k32bf,l_sfnei) },
+ { OR1K32BF_INSN_L_MAC, SEM_FN_NAME (or1k32bf,l_mac) },
+ { OR1K32BF_INSN_L_MSB, SEM_FN_NAME (or1k32bf,l_msb) },
+ { OR1K32BF_INSN_L_MACI, SEM_FN_NAME (or1k32bf,l_maci) },
+ { OR1K32BF_INSN_L_CUST1, SEM_FN_NAME (or1k32bf,l_cust1) },
+ { OR1K32BF_INSN_L_CUST2, SEM_FN_NAME (or1k32bf,l_cust2) },
+ { OR1K32BF_INSN_L_CUST3, SEM_FN_NAME (or1k32bf,l_cust3) },
+ { OR1K32BF_INSN_L_CUST4, SEM_FN_NAME (or1k32bf,l_cust4) },
+ { OR1K32BF_INSN_L_CUST5, SEM_FN_NAME (or1k32bf,l_cust5) },
+ { OR1K32BF_INSN_L_CUST6, SEM_FN_NAME (or1k32bf,l_cust6) },
+ { OR1K32BF_INSN_L_CUST7, SEM_FN_NAME (or1k32bf,l_cust7) },
+ { OR1K32BF_INSN_L_CUST8, SEM_FN_NAME (or1k32bf,l_cust8) },
+ { OR1K32BF_INSN_LF_ADD_S, SEM_FN_NAME (or1k32bf,lf_add_s) },
+ { OR1K32BF_INSN_LF_SUB_S, SEM_FN_NAME (or1k32bf,lf_sub_s) },
+ { OR1K32BF_INSN_LF_MUL_S, SEM_FN_NAME (or1k32bf,lf_mul_s) },
+ { OR1K32BF_INSN_LF_DIV_S, SEM_FN_NAME (or1k32bf,lf_div_s) },
+ { OR1K32BF_INSN_LF_REM_S, SEM_FN_NAME (or1k32bf,lf_rem_s) },
+ { OR1K32BF_INSN_LF_ITOF_S, SEM_FN_NAME (or1k32bf,lf_itof_s) },
+ { OR1K32BF_INSN_LF_FTOI_S, SEM_FN_NAME (or1k32bf,lf_ftoi_s) },
+ { OR1K32BF_INSN_LF_EQ_S, SEM_FN_NAME (or1k32bf,lf_eq_s) },
+ { OR1K32BF_INSN_LF_NE_S, SEM_FN_NAME (or1k32bf,lf_ne_s) },
+ { OR1K32BF_INSN_LF_GE_S, SEM_FN_NAME (or1k32bf,lf_ge_s) },
+ { OR1K32BF_INSN_LF_GT_S, SEM_FN_NAME (or1k32bf,lf_gt_s) },
+ { OR1K32BF_INSN_LF_LT_S, SEM_FN_NAME (or1k32bf,lf_lt_s) },
+ { OR1K32BF_INSN_LF_LE_S, SEM_FN_NAME (or1k32bf,lf_le_s) },
+ { OR1K32BF_INSN_LF_MADD_S, SEM_FN_NAME (or1k32bf,lf_madd_s) },
+ { OR1K32BF_INSN_LF_CUST1_S, SEM_FN_NAME (or1k32bf,lf_cust1_s) },
+ { 0, 0 }
+};
+
+/* Add the semantic fns to IDESC_TABLE. */
+
+void
+SEM_FN_NAME (or1k32bf,init_idesc_table) (SIM_CPU *current_cpu)
+{
+ IDESC *idesc_table = CPU_IDESC (current_cpu);
+ const struct sem_fn_desc *sf;
+ int mach_num = MACH_NUM (CPU_MACH (current_cpu));
+
+ for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
+ {
+ const CGEN_INSN *insn = idesc_table[sf->index].idata;
+ int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
+ || CGEN_INSN_MACH_HAS_P (insn, mach_num));
+#if FAST_P
+ if (valid_p)
+ idesc_table[sf->index].sem_fast = sf->fn;
+ else
+ idesc_table[sf->index].sem_fast = SEM_FN_NAME (or1k32bf,x_invalid);
+#else
+ if (valid_p)
+ idesc_table[sf->index].sem_full = sf->fn;
+ else
+ idesc_table[sf->index].sem_full = SEM_FN_NAME (or1k32bf,x_invalid);
+#endif
+ }
+}
+
diff --git a/sim/or1k/sem64-switch.c b/sim/or1k/sem64-switch.c
new file mode 100644
index 0000000..3a60670
--- /dev/null
+++ b/sim/or1k/sem64-switch.c
@@ -0,0 +1,2890 @@
+/* Simulator instruction semantics for or1k64bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifdef DEFINE_LABELS
+
+ /* The labels have the case they have because the enum of insn types
+ is all uppercase and in the non-stdc case the insn symbol is built
+ into the enum name. */
+
+ static struct {
+ int index;
+ void *label;
+ } labels[] = {
+ { OR1K64BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
+ { OR1K64BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
+ { OR1K64BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
+ { OR1K64BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
+ { OR1K64BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
+ { OR1K64BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
+ { OR1K64BF_INSN_L_J, && case_sem_INSN_L_J },
+ { OR1K64BF_INSN_L_JAL, && case_sem_INSN_L_JAL },
+ { OR1K64BF_INSN_L_JR, && case_sem_INSN_L_JR },
+ { OR1K64BF_INSN_L_JALR, && case_sem_INSN_L_JALR },
+ { OR1K64BF_INSN_L_BNF, && case_sem_INSN_L_BNF },
+ { OR1K64BF_INSN_L_BF, && case_sem_INSN_L_BF },
+ { OR1K64BF_INSN_L_TRAP, && case_sem_INSN_L_TRAP },
+ { OR1K64BF_INSN_L_SYS, && case_sem_INSN_L_SYS },
+ { OR1K64BF_INSN_L_RFE, && case_sem_INSN_L_RFE },
+ { OR1K64BF_INSN_L_NOP_IMM, && case_sem_INSN_L_NOP_IMM },
+ { OR1K64BF_INSN_L_MOVHI, && case_sem_INSN_L_MOVHI },
+ { OR1K64BF_INSN_L_MACRC, && case_sem_INSN_L_MACRC },
+ { OR1K64BF_INSN_L_MFSPR, && case_sem_INSN_L_MFSPR },
+ { OR1K64BF_INSN_L_MTSPR, && case_sem_INSN_L_MTSPR },
+ { OR1K64BF_INSN_L_LWZ, && case_sem_INSN_L_LWZ },
+ { OR1K64BF_INSN_L_LWS, && case_sem_INSN_L_LWS },
+ { OR1K64BF_INSN_L_LBZ, && case_sem_INSN_L_LBZ },
+ { OR1K64BF_INSN_L_LBS, && case_sem_INSN_L_LBS },
+ { OR1K64BF_INSN_L_LHZ, && case_sem_INSN_L_LHZ },
+ { OR1K64BF_INSN_L_LHS, && case_sem_INSN_L_LHS },
+ { OR1K64BF_INSN_L_SW, && case_sem_INSN_L_SW },
+ { OR1K64BF_INSN_L_SB, && case_sem_INSN_L_SB },
+ { OR1K64BF_INSN_L_SH, && case_sem_INSN_L_SH },
+ { OR1K64BF_INSN_L_SLL, && case_sem_INSN_L_SLL },
+ { OR1K64BF_INSN_L_SLLI, && case_sem_INSN_L_SLLI },
+ { OR1K64BF_INSN_L_SRL, && case_sem_INSN_L_SRL },
+ { OR1K64BF_INSN_L_SRLI, && case_sem_INSN_L_SRLI },
+ { OR1K64BF_INSN_L_SRA, && case_sem_INSN_L_SRA },
+ { OR1K64BF_INSN_L_SRAI, && case_sem_INSN_L_SRAI },
+ { OR1K64BF_INSN_L_ROR, && case_sem_INSN_L_ROR },
+ { OR1K64BF_INSN_L_RORI, && case_sem_INSN_L_RORI },
+ { OR1K64BF_INSN_L_AND, && case_sem_INSN_L_AND },
+ { OR1K64BF_INSN_L_OR, && case_sem_INSN_L_OR },
+ { OR1K64BF_INSN_L_XOR, && case_sem_INSN_L_XOR },
+ { OR1K64BF_INSN_L_ADD, && case_sem_INSN_L_ADD },
+ { OR1K64BF_INSN_L_SUB, && case_sem_INSN_L_SUB },
+ { OR1K64BF_INSN_L_ADDC, && case_sem_INSN_L_ADDC },
+ { OR1K64BF_INSN_L_MUL, && case_sem_INSN_L_MUL },
+ { OR1K64BF_INSN_L_MULU, && case_sem_INSN_L_MULU },
+ { OR1K64BF_INSN_L_DIV, && case_sem_INSN_L_DIV },
+ { OR1K64BF_INSN_L_DIVU, && case_sem_INSN_L_DIVU },
+ { OR1K64BF_INSN_L_FF1, && case_sem_INSN_L_FF1 },
+ { OR1K64BF_INSN_L_FL1, && case_sem_INSN_L_FL1 },
+ { OR1K64BF_INSN_L_ANDI, && case_sem_INSN_L_ANDI },
+ { OR1K64BF_INSN_L_ORI, && case_sem_INSN_L_ORI },
+ { OR1K64BF_INSN_L_XORI, && case_sem_INSN_L_XORI },
+ { OR1K64BF_INSN_L_ADDI, && case_sem_INSN_L_ADDI },
+ { OR1K64BF_INSN_L_ADDIC, && case_sem_INSN_L_ADDIC },
+ { OR1K64BF_INSN_L_MULI, && case_sem_INSN_L_MULI },
+ { OR1K64BF_INSN_L_EXTHS, && case_sem_INSN_L_EXTHS },
+ { OR1K64BF_INSN_L_EXTBS, && case_sem_INSN_L_EXTBS },
+ { OR1K64BF_INSN_L_EXTHZ, && case_sem_INSN_L_EXTHZ },
+ { OR1K64BF_INSN_L_EXTBZ, && case_sem_INSN_L_EXTBZ },
+ { OR1K64BF_INSN_L_EXTWS, && case_sem_INSN_L_EXTWS },
+ { OR1K64BF_INSN_L_EXTWZ, && case_sem_INSN_L_EXTWZ },
+ { OR1K64BF_INSN_L_CMOV, && case_sem_INSN_L_CMOV },
+ { OR1K64BF_INSN_L_SFGTU, && case_sem_INSN_L_SFGTU },
+ { OR1K64BF_INSN_L_SFGEU, && case_sem_INSN_L_SFGEU },
+ { OR1K64BF_INSN_L_SFLTU, && case_sem_INSN_L_SFLTU },
+ { OR1K64BF_INSN_L_SFLEU, && case_sem_INSN_L_SFLEU },
+ { OR1K64BF_INSN_L_SFGTS, && case_sem_INSN_L_SFGTS },
+ { OR1K64BF_INSN_L_SFGES, && case_sem_INSN_L_SFGES },
+ { OR1K64BF_INSN_L_SFLTS, && case_sem_INSN_L_SFLTS },
+ { OR1K64BF_INSN_L_SFLES, && case_sem_INSN_L_SFLES },
+ { OR1K64BF_INSN_L_SFGTUI, && case_sem_INSN_L_SFGTUI },
+ { OR1K64BF_INSN_L_SFGEUI, && case_sem_INSN_L_SFGEUI },
+ { OR1K64BF_INSN_L_SFLTUI, && case_sem_INSN_L_SFLTUI },
+ { OR1K64BF_INSN_L_SFLEUI, && case_sem_INSN_L_SFLEUI },
+ { OR1K64BF_INSN_L_SFGTSI, && case_sem_INSN_L_SFGTSI },
+ { OR1K64BF_INSN_L_SFGESI, && case_sem_INSN_L_SFGESI },
+ { OR1K64BF_INSN_L_SFLTSI, && case_sem_INSN_L_SFLTSI },
+ { OR1K64BF_INSN_L_SFLESI, && case_sem_INSN_L_SFLESI },
+ { OR1K64BF_INSN_L_SFEQ, && case_sem_INSN_L_SFEQ },
+ { OR1K64BF_INSN_L_SFEQI, && case_sem_INSN_L_SFEQI },
+ { OR1K64BF_INSN_L_SFNE, && case_sem_INSN_L_SFNE },
+ { OR1K64BF_INSN_L_SFNEI, && case_sem_INSN_L_SFNEI },
+ { OR1K64BF_INSN_L_MAC, && case_sem_INSN_L_MAC },
+ { OR1K64BF_INSN_L_MSB, && case_sem_INSN_L_MSB },
+ { OR1K64BF_INSN_L_MACI, && case_sem_INSN_L_MACI },
+ { OR1K64BF_INSN_L_CUST1, && case_sem_INSN_L_CUST1 },
+ { OR1K64BF_INSN_L_CUST2, && case_sem_INSN_L_CUST2 },
+ { OR1K64BF_INSN_L_CUST3, && case_sem_INSN_L_CUST3 },
+ { OR1K64BF_INSN_L_CUST4, && case_sem_INSN_L_CUST4 },
+ { OR1K64BF_INSN_L_CUST5, && case_sem_INSN_L_CUST5 },
+ { OR1K64BF_INSN_L_CUST6, && case_sem_INSN_L_CUST6 },
+ { OR1K64BF_INSN_L_CUST7, && case_sem_INSN_L_CUST7 },
+ { OR1K64BF_INSN_L_CUST8, && case_sem_INSN_L_CUST8 },
+ { OR1K64BF_INSN_LF_ADD_S, && case_sem_INSN_LF_ADD_S },
+ { OR1K64BF_INSN_LF_ADD_D, && case_sem_INSN_LF_ADD_D },
+ { OR1K64BF_INSN_LF_SUB_S, && case_sem_INSN_LF_SUB_S },
+ { OR1K64BF_INSN_LF_SUB_D, && case_sem_INSN_LF_SUB_D },
+ { OR1K64BF_INSN_LF_MUL_S, && case_sem_INSN_LF_MUL_S },
+ { OR1K64BF_INSN_LF_MUL_D, && case_sem_INSN_LF_MUL_D },
+ { OR1K64BF_INSN_LF_DIV_S, && case_sem_INSN_LF_DIV_S },
+ { OR1K64BF_INSN_LF_DIV_D, && case_sem_INSN_LF_DIV_D },
+ { OR1K64BF_INSN_LF_REM_S, && case_sem_INSN_LF_REM_S },
+ { OR1K64BF_INSN_LF_REM_D, && case_sem_INSN_LF_REM_D },
+ { OR1K64BF_INSN_LF_ITOF_S, && case_sem_INSN_LF_ITOF_S },
+ { OR1K64BF_INSN_LF_ITOF_D, && case_sem_INSN_LF_ITOF_D },
+ { OR1K64BF_INSN_LF_FTOI_S, && case_sem_INSN_LF_FTOI_S },
+ { OR1K64BF_INSN_LF_FTOI_D, && case_sem_INSN_LF_FTOI_D },
+ { OR1K64BF_INSN_LF_EQ_S, && case_sem_INSN_LF_EQ_S },
+ { OR1K64BF_INSN_LF_EQ_D, && case_sem_INSN_LF_EQ_D },
+ { OR1K64BF_INSN_LF_NE_S, && case_sem_INSN_LF_NE_S },
+ { OR1K64BF_INSN_LF_NE_D, && case_sem_INSN_LF_NE_D },
+ { OR1K64BF_INSN_LF_GE_S, && case_sem_INSN_LF_GE_S },
+ { OR1K64BF_INSN_LF_GE_D, && case_sem_INSN_LF_GE_D },
+ { OR1K64BF_INSN_LF_GT_S, && case_sem_INSN_LF_GT_S },
+ { OR1K64BF_INSN_LF_GT_D, && case_sem_INSN_LF_GT_D },
+ { OR1K64BF_INSN_LF_LT_S, && case_sem_INSN_LF_LT_S },
+ { OR1K64BF_INSN_LF_LT_D, && case_sem_INSN_LF_LT_D },
+ { OR1K64BF_INSN_LF_LE_S, && case_sem_INSN_LF_LE_S },
+ { OR1K64BF_INSN_LF_LE_D, && case_sem_INSN_LF_LE_D },
+ { OR1K64BF_INSN_LF_MADD_S, && case_sem_INSN_LF_MADD_S },
+ { OR1K64BF_INSN_LF_MADD_D, && case_sem_INSN_LF_MADD_D },
+ { OR1K64BF_INSN_LF_CUST1_S, && case_sem_INSN_LF_CUST1_S },
+ { OR1K64BF_INSN_LF_CUST1_D, && case_sem_INSN_LF_CUST1_D },
+ { 0, 0 }
+ };
+ int i;
+
+ for (i = 0; labels[i].label != 0; ++i)
+ {
+#if FAST_P
+ CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
+#else
+ CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
+#endif
+ }
+
+#undef DEFINE_LABELS
+#endif /* DEFINE_LABELS */
+
+#ifdef DEFINE_SWITCH
+
+/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
+ off frills like tracing and profiling. */
+/* FIXME: A better way would be to have TRACE_RESULT check for something
+ that can cause it to be optimized out. Another way would be to emit
+ special handlers into the instruction "stream". */
+
+#if FAST_P
+#undef TRACE_RESULT
+#define TRACE_RESULT(cpu, abuf, name, type, val)
+#endif
+
+#undef GET_ATTR
+#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
+
+{
+
+#if WITH_SCACHE_PBB
+
+/* Branch to next handler without going around main loop. */
+#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
+SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
+
+#else /* ! WITH_SCACHE_PBB */
+
+#define NEXT(vpc) BREAK (sem)
+#ifdef __GNUC__
+#if FAST_P
+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
+#else
+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
+#endif
+#else
+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
+#endif
+
+#endif /* ! WITH_SCACHE_PBB */
+
+ {
+
+ CASE (sem, INSN_X_INVALID) : /* --invalid-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+ /* Update the recorded pc in the cpu state struct.
+ Only necessary for WITH_SCACHE case, but to avoid the
+ conditional compilation .... */
+ SET_H_PC (pc);
+ /* Virtual insns have zero size. Overwrite vpc with address of next insn
+ using the default-insn-bitsize spec. When executing insns in parallel
+ we may want to queue the fault and continue execution. */
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+ vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_AFTER) : /* --after-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+ or1k64bf_pbb_after (current_cpu, sem_arg);
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_BEFORE) : /* --before-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+ or1k64bf_pbb_before (current_cpu, sem_arg);
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+#ifdef DEFINE_SWITCH
+ vpc = or1k64bf_pbb_cti_chain (current_cpu, sem_arg,
+ pbb_br_type, pbb_br_npc);
+ BREAK (sem);
+#else
+ /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
+ vpc = or1k64bf_pbb_cti_chain (current_cpu, sem_arg,
+ CPU_PBB_BR_TYPE (current_cpu),
+ CPU_PBB_BR_NPC (current_cpu));
+#endif
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_CHAIN) : /* --chain-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+ vpc = or1k64bf_pbb_chain (current_cpu, sem_arg);
+#ifdef DEFINE_SWITCH
+ BREAK (sem);
+#endif
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_X_BEGIN) : /* --begin-- */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+#if defined DEFINE_SWITCH || defined FAST_P
+ /* In the switch case FAST_P is a constant, allowing several optimizations
+ in any called inline functions. */
+ vpc = or1k64bf_pbb_begin (current_cpu, FAST_P);
+#else
+#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
+ vpc = or1k64bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
+#else
+ vpc = or1k64bf_pbb_begin (current_cpu, 0);
+#endif
+#endif
+#endif
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_J) : /* l.j ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_JAL) : /* l.jal ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ UDI opval = ADDDI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+{
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_JR) : /* l.jr $rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ UDI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_JALR) : /* l.jalr $rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ UDI opval = ADDDI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+{
+{
+ {
+ UDI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_BNF) : /* l.bnf ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NOTDI (GET_H_SYS_SR_F ())) {
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ UDI opval = ADDDI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_BF) : /* l.bf ${disp26} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (GET_H_SYS_SR_F ()) {
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ UDI opval = ADDDI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_TRAP) : /* l.trap ${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_exception (current_cpu, pc, EXCEPT_TRAP);
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SYS) : /* l.sys ${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_exception (current_cpu, pc, EXCEPT_SYSCALL);
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_RFE) : /* l.rfe */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_rfe (current_cpu, pc);
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_NOP_IMM) : /* l.nop ${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_nop (current_cpu, ZEXTSIDI (FLD (f_uimm16)));
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MOVHI) : /* l.movhi $rD,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SLLDI (ZEXTSIDI (FLD (f_uimm16)), 16);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MACRC) : /* l.macrc $rD */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ UDI temp0;UDI temp1;UDI temp2;
+ temp0 = GET_H_MAC_MACLO ();
+ temp1 = 0;
+ temp2 = 0;
+ {
+ UDI opval = temp0;
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+ {
+ UDI opval = temp1;
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'D', opval);
+ }
+ {
+ UDI opval = temp2;
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'D', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MFSPR) : /* l.mfspr $rD,$rA,${uimm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = or1k64bf_mfspr (current_cpu, pc, FLD (f_r1), ORDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MTSPR) : /* l.mtspr $rA,$rB,${uimm16-split} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_mtspr (current_cpu, pc, ORDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16_split))), GET_H_GPR (FLD (f_r3)));
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LWZ) : /* l.lwz $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTSIDI (GETMEMUSI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LWS) : /* l.lws $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LBZ) : /* l.lbz $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTQIDI (GETMEMUQI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LBS) : /* l.lbs $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTQIDI (GETMEMQI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LHZ) : /* l.lhz $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTHIDI (GETMEMUHI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_LHS) : /* l.lhs $rD,${simm16}($rA) */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTHIDI (GETMEMHI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SW) : /* l.sw ${simm16-split}($rA),$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = TRUNCDISI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUSI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SB) : /* l.sb ${simm16-split}($rA),$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UQI opval = TRUNCDIQI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUQI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 1), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SH) : /* l.sh ${simm16-split}($rA),$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UHI opval = TRUNCDIHI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUHI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 2), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SLL) : /* l.sll $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SLLDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SLLI) : /* l.slli $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SLLDI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRL) : /* l.srl $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRLDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRLI) : /* l.srli $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRLDI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRA) : /* l.sra $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRADI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SRAI) : /* l.srai $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRADI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ROR) : /* l.ror $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = RORDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_RORI) : /* l.rori $rD,$rA,${uimm6} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = RORDI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_AND) : /* l.and $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ANDDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_OR) : /* l.or $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ORDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_XOR) : /* l.xor $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = XORDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADD) : /* l.add $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = ADDDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SUB) : /* l.sub $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = SUBCFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = SUBOFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = SUBDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADDC) : /* l.addc $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = ADDCDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MUL) : /* l.mul $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = MUL2OFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ UDI opval = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MULU) : /* l.mulu $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ UDI opval = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_DIV) : /* l.div $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NEDI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ DI opval = DIVDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_DIVU) : /* l.divu $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NEDI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ UDI opval = DIVDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_FF1) : /* l.ff1 $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = or1k64bf_ff1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_FL1) : /* l.fl1 $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = or1k64bf_fl1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ANDI) : /* l.andi $rD,$rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ANDDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ORI) : /* l.ori $rD,$rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ORDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_XORI) : /* l.xori $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = XORDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADDI) : /* l.addi $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = ADDDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_ADDIC) : /* l.addic $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ DI opval = ADDCDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MULI) : /* l.muli $rD,$rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ UDI opval = MUL2OFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'D', opval);
+ }
+ {
+ UDI opval = MUL1OFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'D', opval);
+ }
+ {
+ UDI opval = MULDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTHS) : /* l.exths $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EXTHIDI (TRUNCDIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTBS) : /* l.extbs $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EXTQIDI (TRUNCDIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTHZ) : /* l.exthz $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTHIDI (TRUNCDIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTBZ) : /* l.extbz $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTQIDI (TRUNCDIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTWS) : /* l.extws $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EXTSIDI (TRUNCDISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_EXTWZ) : /* l.extwz $rD,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTSISI (TRUNCDISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CMOV) : /* l.cmov $rD,$rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+if (GET_H_SYS_SR_F ()) {
+ {
+ UDI opval = GET_H_GPR (FLD (f_r2));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+} else {
+ {
+ UDI opval = GET_H_GPR (FLD (f_r3));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+
+ abuf->written = written;
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTU) : /* l.sfgtu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGEU) : /* l.sfgeu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTU) : /* l.sfltu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLEU) : /* l.sfleu $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTS) : /* l.sfgts $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGES) : /* l.sfges $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTS) : /* l.sflts $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLES) : /* l.sfles $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTUI) : /* l.sfgtui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGEUI) : /* l.sfgeui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTUI) : /* l.sfltui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLEUI) : /* l.sfleui $rA,$uimm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGTSI) : /* l.sfgtsi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFGESI) : /* l.sfgesi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLTSI) : /* l.sfltsi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFLESI) : /* l.sflesi $rA,${simm16} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFEQ) : /* l.sfeq $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EQDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFEQI) : /* l.sfeqi $rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EQDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFNE) : /* l.sfne $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = NEDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_SFNEI) : /* l.sfnei $rA,$simm16 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = NEDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MAC) : /* l.mac $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ DI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTDIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MSB) : /* l.msb $rA,$rB */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ DI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = SUBDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTDIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_MACI) : /* l.maci $rA,${simm16-split} */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ DI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULDI (EXTSIDI (FLD (f_simm16_split)), GET_H_GPR (FLD (f_r2)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTDIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST1) : /* l.cust1 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST2) : /* l.cust2 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST3) : /* l.cust3 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST4) : /* l.cust4 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST5) : /* l.cust5 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST6) : /* l.cust6 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST7) : /* l.cust7 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_L_CUST8) : /* l.cust8 */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_ADD_S) : /* lf.add.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_ADD_D) : /* lf.add.d $rDDF,$rADF,$rBDF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_SUB_S) : /* lf.sub.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_SUB_D) : /* lf.sub.d $rDDF,$rADF,$rBDF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_MUL_S) : /* lf.mul.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_MUL_D) : /* lf.mul.d $rDDF,$rADF,$rBDF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_DIV_S) : /* lf.div.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_DIV_D) : /* lf.div.d $rDDF,$rADF,$rBDF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->divdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_REM_S) : /* lf.rem.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->remsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_REM_D) : /* lf.rem.d $rDDF,$rADF,$rBDF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->moddf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_ITOF_S) : /* lf.itof.s $rDSF,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), TRUNCDISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_ITOF_D) : /* lf.itof.d $rDSF,$rA */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->floatdidf (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_GPR (FLD (f_r2)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_FTOI_S) : /* lf.ftoi.s $rD,$rASF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTSIDI (CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_FSR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_FTOI_D) : /* lf.ftoi.d $rD,$rADF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = CGEN_CPU_FPU (current_cpu)->ops->fixdfdi (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_FDR (FLD (f_r1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_EQ_S) : /* lf.sfeq.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_EQ_D) : /* lf.sfeq.d $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->eqdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_NE_S) : /* lf.sfne.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->nesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_NE_D) : /* lf.sfne.d $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->nedf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_GE_S) : /* lf.sfge.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_GE_D) : /* lf.sfge.d $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gedf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_GT_S) : /* lf.sfgt.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_GT_D) : /* lf.sfgt.d $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gtdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_LT_S) : /* lf.sflt.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_LT_D) : /* lf.sflt.d $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ltdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_LE_S) : /* lf.sfle.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->lesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_LE_D) : /* lf.sfle.d $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ledf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_MADD_S) : /* lf.madd.s $rDSF,$rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))), GET_H_FSR (FLD (f_r1)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_MADD_D) : /* lf.madd.d $rDDF,$rADF,$rBDF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1))), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_CUST1_S) : /* lf.cust1.s $rASF,$rBSF */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+ CASE (sem, INSN_LF_CUST1_D) : /* lf.cust1.d */
+{
+ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+#undef FLD
+}
+ NEXT (vpc);
+
+
+ }
+ ENDSWITCH (sem) /* End of semantic switch. */
+
+ /* At this point `vpc' contains the next insn to execute. */
+}
+
+#undef DEFINE_SWITCH
+#endif /* DEFINE_SWITCH */
diff --git a/sim/or1k/sem64.c b/sim/or1k/sem64.c
new file mode 100644
index 0000000..12dd361
--- /dev/null
+++ b/sim/or1k/sem64.c
@@ -0,0 +1,3115 @@
+/* Simulator instruction semantics for or1k64bf.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2010 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#define WANT_CPU or1k64bf
+#define WANT_CPU_OR1K64BF
+
+#include "sim-main.h"
+#include "cgen-mem.h"
+#include "cgen-ops.h"
+
+#undef GET_ATTR
+#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
+
+/* This is used so that we can compile two copies of the semantic code,
+ one with full feature support and one without that runs fast(er).
+ FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
+#if FAST_P
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
+#undef TRACE_RESULT
+#define TRACE_RESULT(cpu, abuf, name, type, val)
+#else
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
+#endif
+
+/* x-invalid: --invalid-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+ /* Update the recorded pc in the cpu state struct.
+ Only necessary for WITH_SCACHE case, but to avoid the
+ conditional compilation .... */
+ SET_H_PC (pc);
+ /* Virtual insns have zero size. Overwrite vpc with address of next insn
+ using the default-insn-bitsize spec. When executing insns in parallel
+ we may want to queue the fault and continue execution. */
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+ vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-after: --after-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+ or1k64bf_pbb_after (current_cpu, sem_arg);
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-before: --before-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+ or1k64bf_pbb_before (current_cpu, sem_arg);
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-cti-chain: --cti-chain-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+#ifdef DEFINE_SWITCH
+ vpc = or1k64bf_pbb_cti_chain (current_cpu, sem_arg,
+ pbb_br_type, pbb_br_npc);
+ BREAK (sem);
+#else
+ /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
+ vpc = or1k64bf_pbb_cti_chain (current_cpu, sem_arg,
+ CPU_PBB_BR_TYPE (current_cpu),
+ CPU_PBB_BR_NPC (current_cpu));
+#endif
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-chain: --chain-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+ vpc = or1k64bf_pbb_chain (current_cpu, sem_arg);
+#ifdef DEFINE_SWITCH
+ BREAK (sem);
+#endif
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* x-begin: --begin-- */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
+
+ {
+#if WITH_SCACHE_PBB_OR1K64BF
+#if defined DEFINE_SWITCH || defined FAST_P
+ /* In the switch case FAST_P is a constant, allowing several optimizations
+ in any called inline functions. */
+ vpc = or1k64bf_pbb_begin (current_cpu, FAST_P);
+#else
+#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
+ vpc = or1k64bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
+#else
+ vpc = or1k64bf_pbb_begin (current_cpu, 0);
+#endif
+#endif
+#endif
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-j: l.j ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_j) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-jal: l.jal ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_jal) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ UDI opval = ADDDI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+{
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-jr: l.jr $rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_jr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ UDI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-jalr: l.jalr $rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_jalr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ {
+ UDI opval = ADDDI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8)));
+ SET_H_GPR (((UINT) 9), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+{
+{
+ {
+ UDI opval = GET_H_GPR (FLD (f_r3));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+}
+
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-bnf: l.bnf ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_bnf) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NOTDI (GET_H_SYS_SR_F ())) {
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ UDI opval = ADDDI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-bf: l.bf ${disp26} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_bf) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_j.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_BRANCH_INIT
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (GET_H_SYS_SR_F ()) {
+{
+ {
+ UDI opval = FLD (i_disp26);
+ SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+} else {
+if (GET_H_SYS_CPUCFGR_ND ()) {
+{
+ {
+ UDI opval = ADDDI (pc, 4);
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
+ written |= (1 << 4);
+ TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval);
+ }
+}
+}
+}
+if (GET_H_SYS_CPUCFGR_ND ()) {
+if (1)
+ SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
+}
+}
+
+ abuf->written = written;
+ SEM_BRANCH_FINI (vpc);
+ return vpc;
+#undef FLD
+}
+
+/* l-trap: l.trap ${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_exception (current_cpu, pc, EXCEPT_TRAP);
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sys: l.sys ${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sys) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_exception (current_cpu, pc, EXCEPT_SYSCALL);
+
+ return vpc;
+#undef FLD
+}
+
+/* l-rfe: l.rfe */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_rfe) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_rfe (current_cpu, pc);
+
+ return vpc;
+#undef FLD
+}
+
+/* l-nop-imm: l.nop ${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_nop_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_nop (current_cpu, ZEXTSIDI (FLD (f_uimm16)));
+
+ return vpc;
+#undef FLD
+}
+
+/* l-movhi: l.movhi $rD,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_movhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SLLDI (ZEXTSIDI (FLD (f_uimm16)), 16);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-macrc: l.macrc $rD */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_macrc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ UDI temp0;UDI temp1;UDI temp2;
+ temp0 = GET_H_MAC_MACLO ();
+ temp1 = 0;
+ temp2 = 0;
+ {
+ UDI opval = temp0;
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+ {
+ UDI opval = temp1;
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'D', opval);
+ }
+ {
+ UDI opval = temp2;
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'D', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mfspr: l.mfspr $rD,$rA,${uimm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_mfspr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = or1k64bf_mfspr (current_cpu, pc, FLD (f_r1), ORDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mtspr: l.mtspr $rA,$rB,${uimm16-split} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_mtspr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mtspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+or1k64bf_mtspr (current_cpu, pc, ORDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16_split))), GET_H_GPR (FLD (f_r3)));
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lwz: l.lwz $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_lwz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTSIDI (GETMEMUSI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lws: l.lws $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_lws) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lbz: l.lbz $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_lbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTQIDI (GETMEMUQI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lbs: l.lbs $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_lbs) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTQIDI (GETMEMQI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lhz: l.lhz $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_lhz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTHIDI (GETMEMUHI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-lhs: l.lhs $rD,${simm16}($rA) */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_lhs) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTHIDI (GETMEMHI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sw: l.sw ${simm16-split}($rA),$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ USI opval = TRUNCDISI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUSI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sb: l.sb ${simm16-split}($rA),$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UQI opval = TRUNCDIQI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUQI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 1), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sh: l.sh ${simm16-split}($rA),$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UHI opval = TRUNCDIHI (GET_H_GPR (FLD (f_r3)));
+ SETMEMUHI (current_cpu, pc, or1k64bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 2), opval);
+ TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sll: l.sll $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SLLDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-slli: l.slli $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SLLDI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-srl: l.srl $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRLDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-srli: l.srli $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRLDI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sra: l.sra $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRADI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-srai: l.srai $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = SRADI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-ror: l.ror $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_ror) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = RORDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-rori: l.rori $rD,$rA,${uimm6} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_rori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = RORDI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-and: l.and $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ANDDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-or: l.or $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ORDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-xor: l.xor $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = XORDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-add: l.add $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = ADDDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sub: l.sub $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = SUBCFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = SUBOFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = SUBDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-addc: l.addc $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = ADDCDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mul: l.mul $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = MUL2OFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ UDI opval = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mulu: l.mulu $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ BI opval = MUL1OFDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ UDI opval = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-div: l.div $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NEDI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ DI opval = DIVDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+ return vpc;
+#undef FLD
+}
+
+/* l-divu: l.divu $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+if (NEDI (GET_H_GPR (FLD (f_r3)), 0)) {
+{
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ UDI opval = DIVDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 5);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+} else {
+ {
+ BI opval = 1;
+ SET_H_SYS_SR_CY (opval);
+ written |= (1 << 6);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+}
+ {
+ BI opval = 0;
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ abuf->written = written;
+ return vpc;
+#undef FLD
+}
+
+/* l-ff1: l.ff1 $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_ff1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = or1k64bf_ff1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-fl1: l.fl1 $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_fl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = or1k64bf_fl1 (current_cpu, GET_H_GPR (FLD (f_r2)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-andi: l.andi $rD,$rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_andi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ANDDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-ori: l.ori $rD,$rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_ori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ORDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-xori: l.xori $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_xori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = XORDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-addi: l.addi $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), 0);
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ UDI opval = ADDDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-addic: l.addic $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_addic) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ BI tmp_tmp_sys_sr_cy;
+ tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY ();
+ {
+ BI opval = ADDCFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
+ }
+ {
+ BI opval = ADDOFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), GET_H_SYS_SR_CY ());
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
+ }
+ {
+ DI opval = ADDCDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)), tmp_tmp_sys_sr_cy);
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-muli: l.muli $rD,$rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_muli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+{
+ {
+ UDI opval = MUL2OFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_OV (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'D', opval);
+ }
+ {
+ UDI opval = MUL1OFDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_CY (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'D', opval);
+ }
+ {
+ UDI opval = MULDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
+or1k64bf_exception (current_cpu, pc, EXCEPT_RANGE);
+}
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-exths: l.exths $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_exths) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EXTHIDI (TRUNCDIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extbs: l.extbs $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_extbs) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EXTQIDI (TRUNCDIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-exthz: l.exthz $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_exthz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTHIDI (TRUNCDIHI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extbz: l.extbz $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_extbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTQIDI (TRUNCDIQI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extws: l.extws $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_extws) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EXTSIDI (TRUNCDISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-extwz: l.extwz $rD,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_extwz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = ZEXTSISI (TRUNCDISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cmov: l.cmov $rD,$rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cmov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+if (GET_H_SYS_SR_F ()) {
+ {
+ UDI opval = GET_H_GPR (FLD (f_r2));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+} else {
+ {
+ UDI opval = GET_H_GPR (FLD (f_r3));
+ SET_H_GPR (FLD (f_r1), opval);
+ written |= (1 << 3);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+}
+
+ abuf->written = written;
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgtu: l.sfgtu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfgtu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgeu: l.sfgeu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfltu: l.sfltu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfltu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfleu: l.sfleu $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEUDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgts: l.sfgts $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfgts) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfges: l.sfges $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfges) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sflts: l.sflts $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sflts) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfles: l.sfles $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfles) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgtui: l.sfgtui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfgtui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgeui: l.sfgeui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfgeui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfltui: l.sfltui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfltui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfleui: l.sfleui $rA,$uimm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfleui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_mfspr.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEUDI (GET_H_GPR (FLD (f_r2)), ZEXTSIDI (FLD (f_uimm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgtsi: l.sfgtsi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfgtsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GTDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfgesi: l.sfgesi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfgesi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = GEDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfltsi: l.sfltsi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfltsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LTDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sflesi: l.sflesi $rA,${simm16} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sflesi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = LEDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfeq: l.sfeq $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EQDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfeqi: l.sfeqi $rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfeqi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = EQDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfne: l.sfne $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = NEDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-sfnei: l.sfnei $rA,$simm16 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_sfnei) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_lwz.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ UDI opval = NEDI (GET_H_GPR (FLD (f_r2)), EXTSIDI (FLD (f_simm16)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* l-mac: l.mac $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_mac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ DI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTDIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-msb: l.msb $rA,$rB */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_msb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ DI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULDI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
+ tmp_result = SUBDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTDIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-maci: l.maci $rA,${simm16-split} */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_maci) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sw.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+{
+ DI tmp_prod;
+ DI tmp_result;
+ tmp_prod = MULDI (EXTSIDI (FLD (f_simm16_split)), GET_H_GPR (FLD (f_r2)));
+ tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTDIDI (tmp_prod));
+ {
+ SI opval = SUBWORDDISI (tmp_result, 0);
+ SET_H_MAC_MACHI (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
+ }
+ {
+ SI opval = SUBWORDDISI (tmp_result, 1);
+ SET_H_MAC_MACLO (opval);
+ TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
+ }
+}
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust1: l.cust1 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust2: l.cust2 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust3: l.cust3 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust4: l.cust4 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust4) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust5: l.cust5 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust5) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust6: l.cust6 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust6) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust7: l.cust7 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust7) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* l-cust8: l.cust8 */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,l_cust8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-add-s: lf.add.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_add_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-add-d: lf.add.d $rDDF,$rADF,$rBDF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_add_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-sub-s: lf.sub.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_sub_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-sub-d: lf.sub.d $rDDF,$rADF,$rBDF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_sub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-mul-s: lf.mul.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_mul_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-mul-d: lf.mul.d $rDDF,$rADF,$rBDF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_mul_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-div-s: lf.div.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_div_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-div-d: lf.div.d $rDDF,$rADF,$rBDF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_div_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->divdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-rem-s: lf.rem.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_rem_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->remsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-rem-d: lf.rem.d $rDDF,$rADF,$rBDF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_rem_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->moddf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-itof-s: lf.itof.s $rDSF,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_itof_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), TRUNCDISI (GET_H_GPR (FLD (f_r2))));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-itof-d: lf.itof.d $rDSF,$rA */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_itof_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->floatdidf (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_GPR (FLD (f_r2)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ftoi-s: lf.ftoi.s $rD,$rASF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_ftoi_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = EXTSIDI (CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_FSR (FLD (f_r2))));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ftoi-d: lf.ftoi.d $rD,$rADF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_ftoi_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DI opval = CGEN_CPU_FPU (current_cpu)->ops->fixdfdi (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_FDR (FLD (f_r1)));
+ SET_H_GPR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-eq-s: lf.sfeq.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_eq_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-eq-d: lf.sfeq.d $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_eq_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->eqdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ne-s: lf.sfne.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_ne_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->nesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ne-d: lf.sfne.d $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_ne_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->nedf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ge-s: lf.sfge.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_ge_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-ge-d: lf.sfge.d $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_ge_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gedf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-gt-s: lf.sfgt.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_gt_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-gt-d: lf.sfgt.d $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_gt_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->gtdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-lt-s: lf.sflt.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_lt_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-lt-d: lf.sflt.d $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_lt_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ltdf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-le-s: lf.sfle.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_le_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->lesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-le-d: lf.sfle.d $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_le_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ BI opval = CGEN_CPU_FPU (current_cpu)->ops->ledf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1)));
+ SET_H_SYS_SR_F (opval);
+ TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-madd-s: lf.madd.s $rDSF,$rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_madd_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_sll.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))), GET_H_FSR (FLD (f_r1)));
+ SET_H_FSR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-madd-d: lf.madd.d $rDDF,$rADF,$rBDF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_madd_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_l_slli.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+ {
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), GET_H_FDR (FLD (f_r1)), GET_H_FDR (FLD (f_r1))), GET_H_FDR (FLD (f_r1)));
+ SET_H_FDR (FLD (f_r1), opval);
+ TRACE_RESULT (current_cpu, abuf, "fdr", 'f', opval);
+ }
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-cust1-s: lf.cust1.s $rASF,$rBSF */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_cust1_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* lf-cust1-d: lf.cust1.d */
+
+static SEM_PC
+SEM_FN_NAME (or1k64bf,lf_cust1_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_empty.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ int UNUSED written = 0;
+ IADDR UNUSED pc = abuf->addr;
+ SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
+
+((void) 0); /*nop*/
+
+ return vpc;
+#undef FLD
+}
+
+/* Table of all semantic fns. */
+
+static const struct sem_fn_desc sem_fns[] = {
+ { OR1K64BF_INSN_X_INVALID, SEM_FN_NAME (or1k64bf,x_invalid) },
+ { OR1K64BF_INSN_X_AFTER, SEM_FN_NAME (or1k64bf,x_after) },
+ { OR1K64BF_INSN_X_BEFORE, SEM_FN_NAME (or1k64bf,x_before) },
+ { OR1K64BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (or1k64bf,x_cti_chain) },
+ { OR1K64BF_INSN_X_CHAIN, SEM_FN_NAME (or1k64bf,x_chain) },
+ { OR1K64BF_INSN_X_BEGIN, SEM_FN_NAME (or1k64bf,x_begin) },
+ { OR1K64BF_INSN_L_J, SEM_FN_NAME (or1k64bf,l_j) },
+ { OR1K64BF_INSN_L_JAL, SEM_FN_NAME (or1k64bf,l_jal) },
+ { OR1K64BF_INSN_L_JR, SEM_FN_NAME (or1k64bf,l_jr) },
+ { OR1K64BF_INSN_L_JALR, SEM_FN_NAME (or1k64bf,l_jalr) },
+ { OR1K64BF_INSN_L_BNF, SEM_FN_NAME (or1k64bf,l_bnf) },
+ { OR1K64BF_INSN_L_BF, SEM_FN_NAME (or1k64bf,l_bf) },
+ { OR1K64BF_INSN_L_TRAP, SEM_FN_NAME (or1k64bf,l_trap) },
+ { OR1K64BF_INSN_L_SYS, SEM_FN_NAME (or1k64bf,l_sys) },
+ { OR1K64BF_INSN_L_RFE, SEM_FN_NAME (or1k64bf,l_rfe) },
+ { OR1K64BF_INSN_L_NOP_IMM, SEM_FN_NAME (or1k64bf,l_nop_imm) },
+ { OR1K64BF_INSN_L_MOVHI, SEM_FN_NAME (or1k64bf,l_movhi) },
+ { OR1K64BF_INSN_L_MACRC, SEM_FN_NAME (or1k64bf,l_macrc) },
+ { OR1K64BF_INSN_L_MFSPR, SEM_FN_NAME (or1k64bf,l_mfspr) },
+ { OR1K64BF_INSN_L_MTSPR, SEM_FN_NAME (or1k64bf,l_mtspr) },
+ { OR1K64BF_INSN_L_LWZ, SEM_FN_NAME (or1k64bf,l_lwz) },
+ { OR1K64BF_INSN_L_LWS, SEM_FN_NAME (or1k64bf,l_lws) },
+ { OR1K64BF_INSN_L_LBZ, SEM_FN_NAME (or1k64bf,l_lbz) },
+ { OR1K64BF_INSN_L_LBS, SEM_FN_NAME (or1k64bf,l_lbs) },
+ { OR1K64BF_INSN_L_LHZ, SEM_FN_NAME (or1k64bf,l_lhz) },
+ { OR1K64BF_INSN_L_LHS, SEM_FN_NAME (or1k64bf,l_lhs) },
+ { OR1K64BF_INSN_L_SW, SEM_FN_NAME (or1k64bf,l_sw) },
+ { OR1K64BF_INSN_L_SB, SEM_FN_NAME (or1k64bf,l_sb) },
+ { OR1K64BF_INSN_L_SH, SEM_FN_NAME (or1k64bf,l_sh) },
+ { OR1K64BF_INSN_L_SLL, SEM_FN_NAME (or1k64bf,l_sll) },
+ { OR1K64BF_INSN_L_SLLI, SEM_FN_NAME (or1k64bf,l_slli) },
+ { OR1K64BF_INSN_L_SRL, SEM_FN_NAME (or1k64bf,l_srl) },
+ { OR1K64BF_INSN_L_SRLI, SEM_FN_NAME (or1k64bf,l_srli) },
+ { OR1K64BF_INSN_L_SRA, SEM_FN_NAME (or1k64bf,l_sra) },
+ { OR1K64BF_INSN_L_SRAI, SEM_FN_NAME (or1k64bf,l_srai) },
+ { OR1K64BF_INSN_L_ROR, SEM_FN_NAME (or1k64bf,l_ror) },
+ { OR1K64BF_INSN_L_RORI, SEM_FN_NAME (or1k64bf,l_rori) },
+ { OR1K64BF_INSN_L_AND, SEM_FN_NAME (or1k64bf,l_and) },
+ { OR1K64BF_INSN_L_OR, SEM_FN_NAME (or1k64bf,l_or) },
+ { OR1K64BF_INSN_L_XOR, SEM_FN_NAME (or1k64bf,l_xor) },
+ { OR1K64BF_INSN_L_ADD, SEM_FN_NAME (or1k64bf,l_add) },
+ { OR1K64BF_INSN_L_SUB, SEM_FN_NAME (or1k64bf,l_sub) },
+ { OR1K64BF_INSN_L_ADDC, SEM_FN_NAME (or1k64bf,l_addc) },
+ { OR1K64BF_INSN_L_MUL, SEM_FN_NAME (or1k64bf,l_mul) },
+ { OR1K64BF_INSN_L_MULU, SEM_FN_NAME (or1k64bf,l_mulu) },
+ { OR1K64BF_INSN_L_DIV, SEM_FN_NAME (or1k64bf,l_div) },
+ { OR1K64BF_INSN_L_DIVU, SEM_FN_NAME (or1k64bf,l_divu) },
+ { OR1K64BF_INSN_L_FF1, SEM_FN_NAME (or1k64bf,l_ff1) },
+ { OR1K64BF_INSN_L_FL1, SEM_FN_NAME (or1k64bf,l_fl1) },
+ { OR1K64BF_INSN_L_ANDI, SEM_FN_NAME (or1k64bf,l_andi) },
+ { OR1K64BF_INSN_L_ORI, SEM_FN_NAME (or1k64bf,l_ori) },
+ { OR1K64BF_INSN_L_XORI, SEM_FN_NAME (or1k64bf,l_xori) },
+ { OR1K64BF_INSN_L_ADDI, SEM_FN_NAME (or1k64bf,l_addi) },
+ { OR1K64BF_INSN_L_ADDIC, SEM_FN_NAME (or1k64bf,l_addic) },
+ { OR1K64BF_INSN_L_MULI, SEM_FN_NAME (or1k64bf,l_muli) },
+ { OR1K64BF_INSN_L_EXTHS, SEM_FN_NAME (or1k64bf,l_exths) },
+ { OR1K64BF_INSN_L_EXTBS, SEM_FN_NAME (or1k64bf,l_extbs) },
+ { OR1K64BF_INSN_L_EXTHZ, SEM_FN_NAME (or1k64bf,l_exthz) },
+ { OR1K64BF_INSN_L_EXTBZ, SEM_FN_NAME (or1k64bf,l_extbz) },
+ { OR1K64BF_INSN_L_EXTWS, SEM_FN_NAME (or1k64bf,l_extws) },
+ { OR1K64BF_INSN_L_EXTWZ, SEM_FN_NAME (or1k64bf,l_extwz) },
+ { OR1K64BF_INSN_L_CMOV, SEM_FN_NAME (or1k64bf,l_cmov) },
+ { OR1K64BF_INSN_L_SFGTU, SEM_FN_NAME (or1k64bf,l_sfgtu) },
+ { OR1K64BF_INSN_L_SFGEU, SEM_FN_NAME (or1k64bf,l_sfgeu) },
+ { OR1K64BF_INSN_L_SFLTU, SEM_FN_NAME (or1k64bf,l_sfltu) },
+ { OR1K64BF_INSN_L_SFLEU, SEM_FN_NAME (or1k64bf,l_sfleu) },
+ { OR1K64BF_INSN_L_SFGTS, SEM_FN_NAME (or1k64bf,l_sfgts) },
+ { OR1K64BF_INSN_L_SFGES, SEM_FN_NAME (or1k64bf,l_sfges) },
+ { OR1K64BF_INSN_L_SFLTS, SEM_FN_NAME (or1k64bf,l_sflts) },
+ { OR1K64BF_INSN_L_SFLES, SEM_FN_NAME (or1k64bf,l_sfles) },
+ { OR1K64BF_INSN_L_SFGTUI, SEM_FN_NAME (or1k64bf,l_sfgtui) },
+ { OR1K64BF_INSN_L_SFGEUI, SEM_FN_NAME (or1k64bf,l_sfgeui) },
+ { OR1K64BF_INSN_L_SFLTUI, SEM_FN_NAME (or1k64bf,l_sfltui) },
+ { OR1K64BF_INSN_L_SFLEUI, SEM_FN_NAME (or1k64bf,l_sfleui) },
+ { OR1K64BF_INSN_L_SFGTSI, SEM_FN_NAME (or1k64bf,l_sfgtsi) },
+ { OR1K64BF_INSN_L_SFGESI, SEM_FN_NAME (or1k64bf,l_sfgesi) },
+ { OR1K64BF_INSN_L_SFLTSI, SEM_FN_NAME (or1k64bf,l_sfltsi) },
+ { OR1K64BF_INSN_L_SFLESI, SEM_FN_NAME (or1k64bf,l_sflesi) },
+ { OR1K64BF_INSN_L_SFEQ, SEM_FN_NAME (or1k64bf,l_sfeq) },
+ { OR1K64BF_INSN_L_SFEQI, SEM_FN_NAME (or1k64bf,l_sfeqi) },
+ { OR1K64BF_INSN_L_SFNE, SEM_FN_NAME (or1k64bf,l_sfne) },
+ { OR1K64BF_INSN_L_SFNEI, SEM_FN_NAME (or1k64bf,l_sfnei) },
+ { OR1K64BF_INSN_L_MAC, SEM_FN_NAME (or1k64bf,l_mac) },
+ { OR1K64BF_INSN_L_MSB, SEM_FN_NAME (or1k64bf,l_msb) },
+ { OR1K64BF_INSN_L_MACI, SEM_FN_NAME (or1k64bf,l_maci) },
+ { OR1K64BF_INSN_L_CUST1, SEM_FN_NAME (or1k64bf,l_cust1) },
+ { OR1K64BF_INSN_L_CUST2, SEM_FN_NAME (or1k64bf,l_cust2) },
+ { OR1K64BF_INSN_L_CUST3, SEM_FN_NAME (or1k64bf,l_cust3) },
+ { OR1K64BF_INSN_L_CUST4, SEM_FN_NAME (or1k64bf,l_cust4) },
+ { OR1K64BF_INSN_L_CUST5, SEM_FN_NAME (or1k64bf,l_cust5) },
+ { OR1K64BF_INSN_L_CUST6, SEM_FN_NAME (or1k64bf,l_cust6) },
+ { OR1K64BF_INSN_L_CUST7, SEM_FN_NAME (or1k64bf,l_cust7) },
+ { OR1K64BF_INSN_L_CUST8, SEM_FN_NAME (or1k64bf,l_cust8) },
+ { OR1K64BF_INSN_LF_ADD_S, SEM_FN_NAME (or1k64bf,lf_add_s) },
+ { OR1K64BF_INSN_LF_ADD_D, SEM_FN_NAME (or1k64bf,lf_add_d) },
+ { OR1K64BF_INSN_LF_SUB_S, SEM_FN_NAME (or1k64bf,lf_sub_s) },
+ { OR1K64BF_INSN_LF_SUB_D, SEM_FN_NAME (or1k64bf,lf_sub_d) },
+ { OR1K64BF_INSN_LF_MUL_S, SEM_FN_NAME (or1k64bf,lf_mul_s) },
+ { OR1K64BF_INSN_LF_MUL_D, SEM_FN_NAME (or1k64bf,lf_mul_d) },
+ { OR1K64BF_INSN_LF_DIV_S, SEM_FN_NAME (or1k64bf,lf_div_s) },
+ { OR1K64BF_INSN_LF_DIV_D, SEM_FN_NAME (or1k64bf,lf_div_d) },
+ { OR1K64BF_INSN_LF_REM_S, SEM_FN_NAME (or1k64bf,lf_rem_s) },
+ { OR1K64BF_INSN_LF_REM_D, SEM_FN_NAME (or1k64bf,lf_rem_d) },
+ { OR1K64BF_INSN_LF_ITOF_S, SEM_FN_NAME (or1k64bf,lf_itof_s) },
+ { OR1K64BF_INSN_LF_ITOF_D, SEM_FN_NAME (or1k64bf,lf_itof_d) },
+ { OR1K64BF_INSN_LF_FTOI_S, SEM_FN_NAME (or1k64bf,lf_ftoi_s) },
+ { OR1K64BF_INSN_LF_FTOI_D, SEM_FN_NAME (or1k64bf,lf_ftoi_d) },
+ { OR1K64BF_INSN_LF_EQ_S, SEM_FN_NAME (or1k64bf,lf_eq_s) },
+ { OR1K64BF_INSN_LF_EQ_D, SEM_FN_NAME (or1k64bf,lf_eq_d) },
+ { OR1K64BF_INSN_LF_NE_S, SEM_FN_NAME (or1k64bf,lf_ne_s) },
+ { OR1K64BF_INSN_LF_NE_D, SEM_FN_NAME (or1k64bf,lf_ne_d) },
+ { OR1K64BF_INSN_LF_GE_S, SEM_FN_NAME (or1k64bf,lf_ge_s) },
+ { OR1K64BF_INSN_LF_GE_D, SEM_FN_NAME (or1k64bf,lf_ge_d) },
+ { OR1K64BF_INSN_LF_GT_S, SEM_FN_NAME (or1k64bf,lf_gt_s) },
+ { OR1K64BF_INSN_LF_GT_D, SEM_FN_NAME (or1k64bf,lf_gt_d) },
+ { OR1K64BF_INSN_LF_LT_S, SEM_FN_NAME (or1k64bf,lf_lt_s) },
+ { OR1K64BF_INSN_LF_LT_D, SEM_FN_NAME (or1k64bf,lf_lt_d) },
+ { OR1K64BF_INSN_LF_LE_S, SEM_FN_NAME (or1k64bf,lf_le_s) },
+ { OR1K64BF_INSN_LF_LE_D, SEM_FN_NAME (or1k64bf,lf_le_d) },
+ { OR1K64BF_INSN_LF_MADD_S, SEM_FN_NAME (or1k64bf,lf_madd_s) },
+ { OR1K64BF_INSN_LF_MADD_D, SEM_FN_NAME (or1k64bf,lf_madd_d) },
+ { OR1K64BF_INSN_LF_CUST1_S, SEM_FN_NAME (or1k64bf,lf_cust1_s) },
+ { OR1K64BF_INSN_LF_CUST1_D, SEM_FN_NAME (or1k64bf,lf_cust1_d) },
+ { 0, 0 }
+};
+
+/* Add the semantic fns to IDESC_TABLE. */
+
+void
+SEM_FN_NAME (or1k64bf,init_idesc_table) (SIM_CPU *current_cpu)
+{
+ IDESC *idesc_table = CPU_IDESC (current_cpu);
+ const struct sem_fn_desc *sf;
+ int mach_num = MACH_NUM (CPU_MACH (current_cpu));
+
+ for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
+ {
+ const CGEN_INSN *insn = idesc_table[sf->index].idata;
+ int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
+ || CGEN_INSN_MACH_HAS_P (insn, mach_num));
+#if FAST_P
+ if (valid_p)
+ idesc_table[sf->index].sem_fast = sf->fn;
+ else
+ idesc_table[sf->index].sem_fast = SEM_FN_NAME (or1k64bf,x_invalid);
+#else
+ if (valid_p)
+ idesc_table[sf->index].sem_full = sf->fn;
+ else
+ idesc_table[sf->index].sem_full = SEM_FN_NAME (or1k64bf,x_invalid);
+#endif
+ }
+}
+
diff --git a/sim/or1k/sim-if.c b/sim/or1k/sim-if.c
new file mode 100644
index 0000000..c257ae6
--- /dev/null
+++ b/sim/or1k/sim-if.c
@@ -0,0 +1,325 @@
+/* Main simulator entry points specific to the OR1K.
+ Copyright (C) 1996-1999, 2003, 2007-2012 Free Software Foundation,
+ Inc.
+ Contributed by Cygnus Support.
+
+ This file is part of GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#ifndef WANT_OR1K64
+#define WANT_CPU or1k32bf
+#define WANT_CPU_OR1K32BF
+#else
+#define WANT_CPU or1k64bf
+#define WANT_CPU_OR1K64BF
+#endif
+
+#include "sim-main.h"
+#include "sim-options.h"
+#include "libiberty.h"
+#include "bfd.h"
+
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+
+static void free_state (SIM_DESC);
+
+/* Records simulator descriptor so utilities like or1k_dump_regs can be
+ called from gdb. */
+SIM_DESC current_state;
+\f
+/* Cover function of sim_state_free to free the cpu buffers as well. */
+
+static void
+free_state (SIM_DESC sd)
+{
+ if (STATE_MODULES (sd) != NULL)
+ sim_module_uninstall (sd);
+ sim_cpu_free_all (sd);
+ sim_state_free (sd);
+}
+
+static const USI or1k_default_vr = 0x0;
+static const USI or1k_default_upr = 0x0
+ | SPR_FIELD_MASK_SYS_UPR_UP
+ ;
+static const USI or1k_default_cpucfgr = 0x0
+#ifdef WANT_CPU_OR1K32BF
+ | SPR_FIELD_MASK_SYS_CPUCFGR_OB32S
+ | SPR_FIELD_MASK_SYS_CPUCFGR_OF32S
+#endif
+#ifdef WANT_CPU_OR1K64BF
+ | SPR_FIELD_MASK_SYS_CPUCFGR_OB64S
+ | SPR_FIELD_MASK_SYS_CPUCFGR_OF64S
+#endif
+#ifdef WANT_OR1K_NODELAY
+ | SPR_FIELD_MASK_SYS_CPUCFGR_ND
+#endif
+ ;
+
+static UWI or1k_upr;
+static UWI or1k_vr;
+static UWI or1k_cpucfgr;
+
+enum {
+ OPTION_OR1K_VR,
+ OPTION_OR1K_UPR,
+ OPTION_OR1K_CPUCFGR = OPTION_START,
+};
+
+DECLARE_OPTION_HANDLER(or1k_option_handler);
+
+static const OPTION or1k_options[] = {
+ { {"or1k-cpucfgr", required_argument, NULL, OPTION_OR1K_CPUCFGR },
+ '\0', "INTEGER|default", "Set simulator CPUCFGR value",
+ or1k_option_handler },
+ { {"or1k-vr", required_argument, NULL, OPTION_OR1K_VR },
+ '\0', "INTEGER|default", "Set simulator VR value",
+ or1k_option_handler },
+ { {"or1k-upr", required_argument, NULL, OPTION_OR1K_VR },
+ '\0', "INTEGER|default", "Set simulator UPR value",
+ or1k_option_handler },
+ { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
+};
+
+SIM_RC
+or1k_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
+ char *arg, int is_command)
+{
+
+ switch (opt) {
+
+ case OPTION_OR1K_VR:
+ if (strcmp("default", arg) == 0) {
+ or1k_vr = or1k_default_vr;
+ } else {
+ unsigned long long n;
+ char *endptr;
+ n = strtoull (arg, &endptr, 0);
+ if (*arg != '\0' &&
+ *endptr == '\0') {
+ or1k_vr = n;
+ } else {
+ sim_io_eprintf (sd, "invalid argument to option --or1k-vr: `%s'\n", arg);
+ return SIM_RC_FAIL;
+ }
+ }
+ break;
+
+ case OPTION_OR1K_UPR:
+ if (strcmp("default", arg) == 0) {
+ or1k_upr = or1k_default_upr;
+ } else {
+ unsigned long long n;
+ char *endptr;
+ n = strtoull (arg, &endptr, 0);
+ if (*arg != '\0' &&
+ *endptr == '\0') {
+ or1k_upr = n;
+ } else {
+ sim_io_eprintf (sd, "invalid argument to option --or1k-upr: `%s'\n", arg);
+ return SIM_RC_FAIL;
+ }
+ }
+ break;
+
+ case OPTION_OR1K_CPUCFGR:
+ if (strcmp("default", arg) == 0) {
+ or1k_cpucfgr = or1k_default_cpucfgr;
+ } else {
+ unsigned long long n;
+ char *endptr;
+ n = strtoull (arg, &endptr, 0);
+ if (*arg != '\0' &&
+ *endptr == '\0') {
+ or1k_cpucfgr = n;
+ } else {
+ sim_io_eprintf (sd, "invalid argument to option --or1k-cpucfgr: `%s'\n", arg);
+ return SIM_RC_FAIL;
+ }
+ }
+ break;
+
+ default:
+ abort ();
+ }
+
+}
+
+
+/* Create an instance of the simulator. */
+
+SIM_DESC
+sim_open (kind, callback, abfd, argv)
+ SIM_OPEN_KIND kind;
+ host_callback *callback;
+ struct bfd *abfd;
+ char **argv;
+{
+ SIM_DESC sd = sim_state_alloc (kind, callback);
+ char c;
+ int i;
+
+ /* The cpu data is kept in a separately allocated chunk of memory. */
+ if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
+
+ if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
+
+#ifdef HAVE_DV_SOCKSER /* FIXME: was done differently before */
+ if (dv_sockser_install (sd) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
+#endif
+
+ /* These options override any module options.
+ Obviously ambiguity should be avoided, however the caller may wish to
+ augment the meaning of an option. */
+ or1k_upr = or1k_default_upr;
+ or1k_vr = or1k_default_vr;
+ or1k_cpucfgr = or1k_default_cpucfgr;
+ sim_add_option_table (sd, NULL, or1k_options);
+
+ /* getopt will print the error message so we just have to exit if this fails.
+ FIXME: Hmmm... in the case of gdb we need getopt to call
+ print_filtered. */
+ if (sim_parse_args (sd, argv) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
+
+ /* Allocate core managed memory if none specified by user.
+ Use address 4 here in case the user wanted address 0 unmapped. */
+ if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) {
+ sim_do_commandf (sd, "memory region 0,0x%x", OR1K_DEFAULT_MEM_SIZE);
+ }
+
+ /* check for/establish the reference program image */
+ if (sim_analyze_program (sd,
+ (STATE_PROG_ARGV (sd) != NULL
+ ? *STATE_PROG_ARGV (sd)
+ : NULL),
+ abfd) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
+
+ if ((or1k_cpucfgr & SPR_FIELD_MASK_SYS_CPUCFGR_ND) &&
+ (STATE_ARCHITECTURE (sd)->mach != bfd_mach_or1knd)) {
+ sim_io_eprintf (sd, "WARNING: CPUCFGR ND flag set, but loading non-or1knd binary\n");
+ } else if (!(or1k_cpucfgr & SPR_FIELD_MASK_SYS_CPUCFGR_ND) &&
+ (STATE_ARCHITECTURE (sd)->mach != bfd_mach_or1k)) {
+ sim_io_eprintf (sd, "WARNING: CPUCFGR ND flag not set, but loading non-or1k binary\n");
+ }
+
+ /* Establish any remaining configuration options. */
+ if (sim_config (sd) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
+
+ if (sim_post_argv_init (sd) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
+
+ /* Open a copy of the cpu descriptor table. */
+ {
+ CGEN_CPU_DESC cd = or1k_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
+ CGEN_ENDIAN_BIG);
+ for (i = 0; i < MAX_NR_PROCESSORS; ++i)
+ {
+ SIM_CPU *cpu = STATE_CPU (sd, i);
+ CPU_CPU_DESC (cpu) = cd;
+ CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
+ }
+ or1k_cgen_init_dis (cd);
+ }
+
+ /* Initialize various cgen things not done by common framework.
+ Must be done after or1k_cgen_cpu_open. */
+ cgen_init (sd);
+
+ for (c = 0; c < MAX_NR_PROCESSORS; ++c)
+ {
+ SIM_CPU *cpu = STATE_CPU (sd, i);
+ /* Only needed for profiling, but the structure member is small. */
+ memset (CPU_OR1K_MISC_PROFILE (cpu), 0,
+ sizeof (* CPU_OR1K_MISC_PROFILE (cpu)));
+
+#ifdef WANT_CPU_OR1K32BF
+ or1k32bf_h_spr_set_raw(cpu, SPR_ADDR(SYS,VR), or1k_vr);
+ or1k32bf_h_spr_set_raw(cpu, SPR_ADDR(SYS,UPR), or1k_upr);
+ or1k32bf_h_spr_set_raw(cpu, SPR_ADDR(SYS,CPUCFGR), or1k_cpucfgr);
+
+ or1k32bf_cpu_init (sd, cpu);
+#endif
+ }
+
+ /* Store in a global so things like sparc32_dump_regs can be invoked
+ from the gdb command line. */
+ current_state = sd;
+
+ return sd;
+}
+
+void
+sim_close (sd, quitting)
+ SIM_DESC sd;
+ int quitting;
+{
+ or1k_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
+ sim_module_uninstall (sd);
+}
+\f
+SIM_RC
+sim_create_inferior (sd, abfd, argv, envp)
+ SIM_DESC sd;
+ struct bfd *abfd;
+ char **argv;
+ char **envp;
+{
+ SIM_CPU *current_cpu = STATE_CPU (sd, 0);
+ SIM_ADDR addr;
+
+ if (abfd != NULL)
+ addr = bfd_get_start_address (abfd);
+ else
+ addr = 0;
+ sim_pc_set (current_cpu, addr);
+
+ return SIM_RC_OK;
+}
diff --git a/sim/or1k/sim-main.h b/sim/or1k/sim-main.h
new file mode 100644
index 0000000..8b27906
--- /dev/null
+++ b/sim/or1k/sim-main.h
@@ -0,0 +1,71 @@
+#ifndef SIM_MAIN_H
+#define SIM_MAIN_H
+
+#include "ansidecl.h"
+#include "or1k-desc.h"
+#include "sim-basics.h"
+#include "cgen-types.h"
+#include "arch.h"
+typedef IAI sim_cia;
+#define CIA_GET(cpu) CPU_PC_GET (cpu)
+#define CIA_SET(cpu,val) CPU_PC_SET ((cpu),(val))
+#include "sim-base.h"
+
+typedef struct _sim_cpu SIM_CPU;
+#include "or1k-opc.h"
+#include "cgen-sim.h"
+#include "or1k-sim.h"
+#include "cpuall.h"
+#include "or1k.h"
+
+#ifdef OR1K_LINUX
+#define OR1K_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
+#else
+#define OR1K_DEFAULT_MEM_SIZE 0x800000 /* 8M */
+#endif
+
+/* The _sim_cpu struct. */
+struct _sim_cpu {
+ /* sim/common cpu base. */
+ sim_cpu_base base;
+
+ /* Static parts of cgen. */
+ CGEN_CPU cgen_cpu;
+
+ OR1K_MISC_PROFILE or1k_misc_profile;
+#define CPU_OR1K_MISC_PROFILE(cpu) (& (cpu)->or1k_misc_profile)
+
+ /* CPU specific parts go here.
+ Note that in files that don't need to access these pieces WANT_CPU_FOO
+ won't be defined and thus these parts won't appear. This is ok in the
+ sense that things work. It is a source of bugs though.
+ One has to of course be careful to not take the size of this
+ struct and no structure members accessed in non-cpu specific files can
+ go after here. Oh for a better language. */
+ UWI spr[NUM_SPR];
+
+#ifdef WANT_CPU_OR1K32BF
+ OR1K32BF_CPU_DATA cpu_data;
+#endif
+#ifdef WANT_CPU_OR1K64BF
+ OR1K64BF_CPU_DATA cpu_data;
+#endif
+
+};
+\f
+/* The sim_state struct. */
+
+struct sim_state {
+ sim_cpu *cpu[MAX_NR_PROCESSORS];
+#if (WITH_SMP)
+#define STATE_CPU(sd, n) ((sd)->cpu[n])
+#else
+#define STATE_CPU(sd, n) ((sd)->cpu[0])
+#endif
+
+ CGEN_STATE cgen_state;
+
+ sim_state_base base;
+};
+
+#endif
diff --git a/sim/or1k/tconfig.in b/sim/or1k/tconfig.in
new file mode 100644
index 0000000..a1b463f
--- /dev/null
+++ b/sim/or1k/tconfig.in
@@ -0,0 +1,8 @@
+#ifndef OR1K_TCONFIG_H
+#define OR1K_TCONFIG_H
+
+#define SIM_HANDLES_LMA 1
+
+#define WITH_SCACHE_PBB 1
+
+#endif
\ No newline at end of file
diff --git a/sim/or1k/traps-linux.c b/sim/or1k/traps-linux.c
new file mode 100644
index 0000000..d2a111f
--- /dev/null
+++ b/sim/or1k/traps-linux.c
@@ -0,0 +1,8 @@
+#include "sim-main.h"
+
+SEM_PC
+sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
+{
+ /* TODO */
+ abort();
+}
diff --git a/sim/or1k/traps.c b/sim/or1k/traps.c
new file mode 100644
index 0000000..d2a111f
--- /dev/null
+++ b/sim/or1k/traps.c
@@ -0,0 +1,8 @@
+#include "sim-main.h"
+
+SEM_PC
+sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
+{
+ /* TODO */
+ abort();
+}
--
2.7.4
next prev parent reply other threads:[~2016-11-23 22:14 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-23 22:14 [OpenRISC] [PATCH 00/18] sim: port for OpenRISC Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 01/18] sim: cgen: add rem (remainder) function (needed for OR1K lf.rem.[sd]) Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 02/18] sim: cgen: add mul-o1flag, mul-o2flag RTL functions to CGEN Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 03/18] sim: cgen: allow suffix on generated arch.[ch] and cpuall.h Stafford Horne
2016-11-23 22:14 ` Stafford Horne [this message]
2016-11-23 22:14 ` [OpenRISC] [PATCH 05/18] sim: or1k: add NOP_EXIT_SILENT; make simulator print exit code for NOP_EXIT; Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 06/18] sim: or1k: fix branching and exceptions in sim Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 07/18] sim: or1k: remove erroneous warning message in sim/or1k/or1k.c Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 08/18] sim: or1k: fix fl1 in sim Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 09/18] sim: or1k: regenerate sim files Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 10/18] sim: testsuite: add testsuite for or1k sim Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 11/18] sim: or1k: fix segfault when run without arguments Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 12/18] sim: or1k: Get or1k sim building with latest sim common Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 13/18] sim: or1k: Regenerate cgen files Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 14/18] sim: or1k: Regenerate autotool files Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 15/18] sim: or1k: Implement register store/fetch Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 16/18] sim: or1k: Do trap breakpoint handling Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 17/18] sim: or1k: Implement fetch/store for ppc and sr Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 18/18] sim: or1k: add additional stubs for linux build Stafford Horne
2016-11-23 23:04 ` [OpenRISC] [PATCH 00/18] sim: port for OpenRISC Stafford Horne
2016-11-25 16:19 ` Mike Frysinger
2016-11-25 22:46 ` Stafford Horne
2016-12-05 8:40 ` Stafford Horne
2016-12-16 20:34 ` Mike Frysinger
2016-12-17 4:18 ` Stafford Horne
2016-12-18 4:33 ` Mike Frysinger
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