From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH 05/18] sim: or1k: add NOP_EXIT_SILENT; make simulator print exit code for NOP_EXIT;
Date: Thu, 24 Nov 2016 07:14:19 +0900 [thread overview]
Message-ID: <1479939272-1754-6-git-send-email-shorne@gmail.com> (raw)
In-Reply-To: <1479939272-1754-1-git-send-email-shorne@gmail.com>
From: Peter Gavin <pgavin@gmail.com>
make newlib's exit use NOP_EXIT_SILENT
---
sim/or1k/ChangeLog | 8 ++++++++
sim/or1k/or1k.c | 3 +++
sim/or1k/or1k.h | 23 ++++++++++++-----------
3 files changed, 23 insertions(+), 11 deletions(-)
diff --git a/sim/or1k/ChangeLog b/sim/or1k/ChangeLog
index 3dc053a..cd2617c 100644
--- a/sim/or1k/ChangeLog
+++ b/sim/or1k/ChangeLog
@@ -1,3 +1,11 @@
+2012-05-21 Peter Gavin <pgavin@gmail.com>
+
+ * or1k.c (or1k32bf_nop) make NOP_EXIT report exit code on
+ simulator output; add NOP_EXIT_SILENT which silently exits. This
+ is needed to maintain compatibility with existing testsuites, but
+ we need to be able to silently exit for the gcc testsuite.
+ Newlib's exit will use NOP_EXIT_SILENT.
+
2012-05-17 Peter Gavin <pgavin@gmail.com>
* or1k.c (or1k32bf_nop) handle NOP_NOP, NOP_REPORT; warn if
diff --git a/sim/or1k/or1k.c b/sim/or1k/or1k.c
index 9f6e207..aca7333 100644
--- a/sim/or1k/or1k.c
+++ b/sim/or1k/or1k.c
@@ -136,6 +136,9 @@ void or1k32bf_nop (sim_cpu *current_cpu, USI uimm16)
break;
case NOP_EXIT:
+ sim_io_printf (CPU_STATE(current_cpu), "exit(%d)\n", GET_H_GPR(3));
+ /* fall through */
+ case NOP_EXIT_SILENT:
sim_engine_halt (sd, current_cpu, NULL, CPU_PC_GET (current_cpu), sim_exited, GET_H_GPR (3));
break;
diff --git a/sim/or1k/or1k.h b/sim/or1k/or1k.h
index 513c946..f1c9b73 100644
--- a/sim/or1k/or1k.h
+++ b/sim/or1k/or1k.h
@@ -1,17 +1,18 @@
#ifndef OR1K_H
#define OR1K_H
-#define NOP_NOP 0x0
-#define NOP_EXIT 0x1
-#define NOP_REPORT 0x2
-#define NOP_PUTC 0x4
-#define NOP_CNT_RESET 0x5
-#define NOP_GET_TICKS 0x6
-#define NOP_GET_PS 0x7
-#define NOP_TRACE_ON 0x8
-#define NOP_TRACE_OFF 0x9
-#define NOP_RANDOM 0xa
-#define NOP_OR1KSIM 0xb
+#define NOP_NOP 0x0
+#define NOP_EXIT 0x1
+#define NOP_REPORT 0x2
+#define NOP_PUTC 0x4
+#define NOP_CNT_RESET 0x5
+#define NOP_GET_TICKS 0x6
+#define NOP_GET_PS 0x7
+#define NOP_TRACE_ON 0x8
+#define NOP_TRACE_OFF 0x9
+#define NOP_RANDOM 0xa
+#define NOP_OR1KSIM 0xb
+#define NOP_EXIT_SILENT 0xc
#define NUM_SPR 0x20000
#define SPR_GROUP_SHIFT 11
--
2.7.4
next prev parent reply other threads:[~2016-11-23 22:14 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-23 22:14 [OpenRISC] [PATCH 00/18] sim: port for OpenRISC Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 01/18] sim: cgen: add rem (remainder) function (needed for OR1K lf.rem.[sd]) Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 02/18] sim: cgen: add mul-o1flag, mul-o2flag RTL functions to CGEN Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 03/18] sim: cgen: allow suffix on generated arch.[ch] and cpuall.h Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 04/18] sim: or1k: add or1k target to sim Stafford Horne
2016-11-23 22:14 ` Stafford Horne [this message]
2016-11-23 22:14 ` [OpenRISC] [PATCH 06/18] sim: or1k: fix branching and exceptions in sim Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 07/18] sim: or1k: remove erroneous warning message in sim/or1k/or1k.c Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 08/18] sim: or1k: fix fl1 in sim Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 09/18] sim: or1k: regenerate sim files Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 10/18] sim: testsuite: add testsuite for or1k sim Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 11/18] sim: or1k: fix segfault when run without arguments Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 12/18] sim: or1k: Get or1k sim building with latest sim common Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 13/18] sim: or1k: Regenerate cgen files Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 14/18] sim: or1k: Regenerate autotool files Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 15/18] sim: or1k: Implement register store/fetch Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 16/18] sim: or1k: Do trap breakpoint handling Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 17/18] sim: or1k: Implement fetch/store for ppc and sr Stafford Horne
2016-11-23 22:14 ` [OpenRISC] [PATCH 18/18] sim: or1k: add additional stubs for linux build Stafford Horne
2016-11-23 23:04 ` [OpenRISC] [PATCH 00/18] sim: port for OpenRISC Stafford Horne
2016-11-25 16:19 ` Mike Frysinger
2016-11-25 22:46 ` Stafford Horne
2016-12-05 8:40 ` Stafford Horne
2016-12-16 20:34 ` Mike Frysinger
2016-12-17 4:18 ` Stafford Horne
2016-12-18 4:33 ` Mike Frysinger
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