From: Sui Jingfeng <sui.jingfeng@linux.dev>
To: Icenowy Zheng <uwu@icenowy.me>, Shuah <shuah@kernel.org>,
Xi Ruoyao <xry111@xry111.site>, WANG Xuerui <kernel@xen0n.name>,
Huacai Chen <chenhuacai@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>,
"Mike Rapoport (IBM)" <rppt@kernel.org>,
Baoquan He <bhe@redhat.com>,
"Matthew Wilcox (Oracle)" <willy@infradead.org>,
David Hildenbrand <david@redhat.com>,
Zhen Lei <thunder.leizhen@huawei.com>,
Thomas Gleixner <tglx@linutronix.de>,
Zhihong Dong <donmor3000@hotmail.com>,
loongarch@lists.linux.dev, linux-kernel@vger.kernel.org,
"conduct@kernel.org" <conduct@kernel.org>
Subject: Re: [PATCH v2] loongarch/mm: disable WUC for pgprot_writecombine as same as ioremap_wc
Date: Thu, 19 Dec 2024 11:17:12 +0800 [thread overview]
Message-ID: <147eda64-0673-4698-a79d-0bd367c80b70@linux.dev> (raw)
In-Reply-To: <8d38328adea0d752b09a91f69e7a94d4804ac725.camel@icenowy.me>
Hi,
On 2024/12/18 20:37, Icenowy Zheng wrote:
> 在 2024-12-18星期三的 18:05 +0800,Sui Jingfeng写道:
>> Hi,
>>
>>
>> On 2024/12/18 14:23, Icenowy Zheng wrote:
>>> 在 2024-12-18星期三的 11:24 +0800,Sui Jingfeng写道:
>>>> Hi,
>>>>
>>>>
>>>> On 2024/12/18 02:18, Shuah wrote:
>>>>> On 12/2/24 09:23, Sui Jingfeng wrote:
>>>>>> Hi,
>>>>>>
>>>>>>> IIUC this is a hardware bug of 7A1000 and 7A2000, so the
>>>>>>> proper
>>>>>>> location
>>>>>>> of the workaround is in the bridge chip driver. Or am I
>>>>>>> misunderstanding something?
>>>>>>>
>>>>>> You are misunderstanding everything and ranting like a dog.
>>>>>>
>>>>> Sui Jingfeng,
>>>>>
>>>>> This is not the way to work with your fellow developers in the
>>>>> community to express disagreements.
>>>> I'm not expressing disagreements, but argue that the contributor
>>>> and/or talker should provide *sufficient* hardware details and
>>>> tests. Instead of pointless *ranting* in order to get harmful
>>>> patch merged.
>>> I don't think the original patch is harmful.
>>>
>> I have told you countless times, that is, disabling Write-Combine
>> made the performance of BMC graphics(drm/ast) decrease dramatically.
> So do the ast driver have any kind of command queues that needs to be
> read by the card and executed? If it has, I assume it will break like
> amdgpu/radeon if this is utilized (I remember ast has some 2D accel);
> if it does not have, then maybe you can add an architecture-specific
> pgprot type (e.g. pgprot_wuc), see how pgprot_noncached_wc is defined
> for PowerPC or pgprot_device is defined for ARM64
drm/ast driver doesn't perform DMA to/from system RAM so far.
> -- in fact you may
> find another architecture that have some page attribute that behave
> like WUC on LongArch; and then utilize the newly introduced pgprot type
> in drm/ast, instead of using WUC as pgprot_writecombine, which do not
> exactly match (usual driver expect an ARM-like behavior of
> pgprot_combine, I assume).
This exactly saying that your patch is unqualified, because its not
entirely an arch-specific problem.
Your patch, together with other WC disable patch make the WC mapping
of LoongArch completely broken. then you told us "you don't think
the original patch is harmful" ???
>> And downstream Loongson developer really dislike related patch,
>> and asking for solutions to me.
>>
>>
>>>> The discussion completely not make scene at all.
>>>>
>>>>
>>>>> I would recommend following up with an apology.
>>>>>
>>>> I will not apology to indecent contributors and/or maintainers
>>>> like this, never.
>>>>
>>>>
>>>>> thanks,
>>>>> -- Shuah
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
--
Best regards,
Sui
next prev parent reply other threads:[~2024-12-19 3:17 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-09 4:28 [PATCH v2] loongarch/mm: disable WUC for pgprot_writecombine as same as ioremap_wc Icenowy Zheng
2023-10-09 14:32 ` Sui Jingfeng
2023-10-10 0:15 ` WANG Xuerui
2023-10-10 3:02 ` Sui Jingfeng
2023-10-10 12:26 ` Xi Ruoyao
2023-10-13 11:12 ` Sui Jingfeng
2023-10-13 12:51 ` Sui Jingfeng
2023-10-13 13:15 ` Xi Ruoyao
2023-10-13 13:53 ` Xi Ruoyao
2025-01-21 9:19 ` Sui Jingfeng
2024-12-02 16:23 ` Sui Jingfeng
2024-12-17 18:18 ` Shuah
2024-12-18 3:24 ` Sui Jingfeng
2024-12-18 6:23 ` Icenowy Zheng
2024-12-18 10:05 ` Sui Jingfeng
2024-12-18 12:37 ` Icenowy Zheng
2024-12-19 3:17 ` Sui Jingfeng [this message]
2024-12-19 4:54 ` Icenowy Zheng
2024-12-20 16:43 ` Shuah
2024-12-17 23:44 ` Icenowy Zheng
2024-12-18 3:05 ` Sui Jingfeng
2024-12-18 5:47 ` Icenowy Zheng
2024-12-18 10:29 ` Sui Jingfeng
2024-12-18 12:43 ` Icenowy Zheng
2024-12-19 2:54 ` Sui Jingfeng
2024-12-19 4:49 ` Icenowy Zheng
2024-12-19 5:49 ` Sui Jingfeng
2024-12-19 6:34 ` Icenowy Zheng
2024-12-19 7:46 ` Sui Jingfeng
2024-12-19 6:38 ` Icenowy Zheng
2024-12-19 10:39 ` Sui Jingfeng
2023-10-10 0:50 ` Icenowy Zheng
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