From: Gerd Hoffmann <kraxel@redhat.com>
To: Icenowy Zheng <icenowy@aosc.xyz>
Cc: Beniamino Galvani <b.galvani@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org
Subject: Re: [Qemu-arm] [PATCH 1/2] usb/ehci: Add SysBus EHCI device for Allwinner SoCs
Date: Mon, 30 Jan 2017 09:19:58 +0100 [thread overview]
Message-ID: <1485764398.20455.13.camel@redhat.com> (raw)
In-Reply-To: <20170129010013.29637-1-icenowy@aosc.xyz>
On So, 2017-01-29 at 09:00 +0800, Icenowy Zheng wrote:
> It uses a register map like the one in Exynos SoCs.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
I guess this goes through the arm queue?
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
cheers,
Gerd
next prev parent reply other threads:[~2017-01-30 8:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-29 1:00 [Qemu-arm] [PATCH 1/2] usb/ehci: Add SysBus EHCI device for Allwinner SoCs Icenowy Zheng
2017-01-29 1:00 ` [Qemu-arm] [PATCH 2/2] arm: allwinner-a10: Add OHCI/EHCI Icenowy Zheng
2017-01-30 8:19 ` Gerd Hoffmann [this message]
-- strict thread matches above, loose matches on Subject: below --
2017-01-30 13:59 [Qemu-arm] [PATCH 1/2] usb/ehci: Add SysBus EHCI device for Allwinner SoCs Icenowy Zheng
2017-02-07 7:42 ` Gerd Hoffmann
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