* [PATCH 1/2] drm/i915: use correct node for handling cache domain eviction
@ 2017-03-03 18:03 Matthew Auld
2017-03-03 18:03 ` [PATCH 2/2] drm/i915/selftests: exercise " Matthew Auld
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Matthew Auld @ 2017-03-03 18:03 UTC (permalink / raw)
To: intel-gfx
It looks like we were incorrectly comparing vma->node against itself
instead of the target node, when evicting for a node on systems where we
need guard pages between regions with different cache domains. As a
consequence we can end up trying to needlessly evict neighbouring nodes,
even if they have the same cache domain, and if they were pinned we
would fail the eviction.
Fixes: 625d988acc28 ("drm/i915: Extract reserving space in the GTT to a helper")
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/i915_gem_evict.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
index a0de5734f7d0..2da3a94fc9f3 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -299,12 +299,12 @@ int i915_gem_evict_for_node(struct i915_address_space *vm,
* those as well to make room for our guard pages.
*/
if (check_color) {
- if (vma->node.start + vma->node.size == node->start) {
- if (vma->node.color == node->color)
+ if (node->start + node->size == target->start) {
+ if (node->color == target->color)
continue;
}
- if (vma->node.start == node->start + node->size) {
- if (vma->node.color == node->color)
+ if (node->start == target->start + target->size) {
+ if (node->color == target->color)
continue;
}
}
--
2.9.3
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] drm/i915/selftests: exercise cache domain eviction 2017-03-03 18:03 [PATCH 1/2] drm/i915: use correct node for handling cache domain eviction Matthew Auld @ 2017-03-03 18:03 ` Matthew Auld 2017-03-03 18:28 ` Chris Wilson 2017-03-03 18:18 ` [PATCH 1/2] drm/i915: use correct node for handling " Chris Wilson 2017-03-03 18:48 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork 2 siblings, 1 reply; 6+ messages in thread From: Matthew Auld @ 2017-03-03 18:03 UTC (permalink / raw) To: intel-gfx Signed-off-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 80 +++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c index 97af353db218..e92c235d0200 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c @@ -202,6 +202,85 @@ static int igt_evict_for_vma(void *arg) return err; } +static void mock_color_adjust(const struct drm_mm_node *node, + unsigned long color, + u64 *start, + u64 *end) +{ +} + +static int igt_evict_for_cache_color(void *arg) +{ + struct drm_i915_private *i915 = arg; + struct i915_ggtt *ggtt = &i915->ggtt; + const unsigned long flags = PIN_OFFSET_FIXED; + struct drm_mm_node target = { + .start = I915_GTT_PAGE_SIZE * 2, + .size = I915_GTT_PAGE_SIZE, + .color = I915_CACHE_LLC, + }; + struct drm_i915_gem_object *obj; + struct i915_vma *vma; + int err; + + ggtt->base.mm.color_adjust = mock_color_adjust; + + obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + goto cleanup; + } + i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); + + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, + I915_GTT_PAGE_SIZE | flags); + if (IS_ERR(vma)) { + pr_err("[0]i915_gem_object_ggtt_pin failed\n"); + err = PTR_ERR(vma); + goto cleanup; + } + + obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + goto cleanup; + } + i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); + + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, + (I915_GTT_PAGE_SIZE * 2) | flags); + if (IS_ERR(vma)) { + pr_err("[1]i915_gem_object_ggtt_pin failed\n"); + err = PTR_ERR(vma); + goto cleanup; + } + + i915_vma_unpin(vma); + + err = i915_gem_evict_for_node(&ggtt->base, &target, 0); + if (err) { + pr_err("[0]i915_gem_evict_for_node returned err=%d\n", err); + goto cleanup; + } + + target.color = I915_CACHE_L3_LLC; + + err = i915_gem_evict_for_node(&ggtt->base, &target, 0); + if (!err) { + pr_err("[1]i915_gem_evict_for_node returned err=%d\n", err); + err = -EINVAL; + goto cleanup; + } + + err = 0; + +cleanup: + unpin_ggtt(i915); + cleanup_objects(i915); + ggtt->base.mm.color_adjust = NULL; + return err; +} + static int igt_evict_vm(void *arg) { struct drm_i915_private *i915 = arg; @@ -241,6 +320,7 @@ int i915_gem_evict_mock_selftests(void) static const struct i915_subtest tests[] = { SUBTEST(igt_evict_something), SUBTEST(igt_evict_for_vma), + SUBTEST(igt_evict_for_cache_color), SUBTEST(igt_evict_vm), SUBTEST(igt_overcommit), }; -- 2.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] drm/i915/selftests: exercise cache domain eviction 2017-03-03 18:03 ` [PATCH 2/2] drm/i915/selftests: exercise " Matthew Auld @ 2017-03-03 18:28 ` Chris Wilson 0 siblings, 0 replies; 6+ messages in thread From: Chris Wilson @ 2017-03-03 18:28 UTC (permalink / raw) To: Matthew Auld; +Cc: intel-gfx On Fri, Mar 03, 2017 at 06:03:35PM +0000, Matthew Auld wrote: > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > --- > drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 80 +++++++++++++++++++++++++ > 1 file changed, 80 insertions(+) > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c > index 97af353db218..e92c235d0200 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c > @@ -202,6 +202,85 @@ static int igt_evict_for_vma(void *arg) > return err; > } > > +static void mock_color_adjust(const struct drm_mm_node *node, > + unsigned long color, > + u64 *start, > + u64 *end) > +{ Ah. I see, this is because evict_for_node makes the assumption that any color_adjust is i915_ggtt_color_adjust. I was wondering. Please add a note here about the magic. > +} > + > +static int igt_evict_for_cache_color(void *arg) > +{ > + struct drm_i915_private *i915 = arg; > + struct i915_ggtt *ggtt = &i915->ggtt; > + const unsigned long flags = PIN_OFFSET_FIXED; > + struct drm_mm_node target = { > + .start = I915_GTT_PAGE_SIZE * 2, > + .size = I915_GTT_PAGE_SIZE, > + .color = I915_CACHE_LLC, > + }; > + struct drm_i915_gem_object *obj; > + struct i915_vma *vma; > + int err; > + > + ggtt->base.mm.color_adjust = mock_color_adjust; > + > + obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); > + if (IS_ERR(obj)) { > + err = PTR_ERR(obj); > + goto cleanup; > + } > + i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); > + > + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, > + I915_GTT_PAGE_SIZE | flags); > + if (IS_ERR(vma)) { > + pr_err("[0]i915_gem_object_ggtt_pin failed\n"); > + err = PTR_ERR(vma); > + goto cleanup; > + } > + > + obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); > + if (IS_ERR(obj)) { > + err = PTR_ERR(obj); > + goto cleanup; > + } > + i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); > + /* Neighbouring; same colour - should fit */ > + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, > + (I915_GTT_PAGE_SIZE * 2) | flags); > + if (IS_ERR(vma)) { > + pr_err("[1]i915_gem_object_ggtt_pin failed\n"); > + err = PTR_ERR(vma); > + goto cleanup; > + } > + > + i915_vma_unpin(vma); > + /* Remove just the second vma */ > + err = i915_gem_evict_for_node(&ggtt->base, &target, 0); > + if (err) { > + pr_err("[0]i915_gem_evict_for_node returned err=%d\n", err); > + goto cleanup; > + } > + /* Attempt to remove the first *pinned* vma, by removing the (empty) neighbour */ > + target.color = I915_CACHE_L3_LLC; > + > + err = i915_gem_evict_for_node(&ggtt->base, &target, 0); > + if (!err) { > + pr_err("[1]i915_gem_evict_for_node returned err=%d\n", err); > + err = -EINVAL; > + goto cleanup; Your pr_err("[]") are as bad as mine ;) I see what you're testing, looks ok. So just a couple of comments for the next reader. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] drm/i915: use correct node for handling cache domain eviction 2017-03-03 18:03 [PATCH 1/2] drm/i915: use correct node for handling cache domain eviction Matthew Auld 2017-03-03 18:03 ` [PATCH 2/2] drm/i915/selftests: exercise " Matthew Auld @ 2017-03-03 18:18 ` Chris Wilson 2017-03-06 18:34 ` Joonas Lahtinen 2017-03-03 18:48 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork 2 siblings, 1 reply; 6+ messages in thread From: Chris Wilson @ 2017-03-03 18:18 UTC (permalink / raw) To: Matthew Auld; +Cc: intel-gfx On Fri, Mar 03, 2017 at 06:03:34PM +0000, Matthew Auld wrote: > It looks like we were incorrectly comparing vma->node against itself > instead of the target node, when evicting for a node on systems where we > need guard pages between regions with different cache domains. As a > consequence we can end up trying to needlessly evict neighbouring nodes, > even if they have the same cache domain, and if they were pinned we > would fail the eviction. > > Fixes: 625d988acc28 ("drm/i915: Extract reserving space in the GTT to a helper") > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> /o\ -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] drm/i915: use correct node for handling cache domain eviction 2017-03-03 18:18 ` [PATCH 1/2] drm/i915: use correct node for handling " Chris Wilson @ 2017-03-06 18:34 ` Joonas Lahtinen 0 siblings, 0 replies; 6+ messages in thread From: Joonas Lahtinen @ 2017-03-06 18:34 UTC (permalink / raw) To: Matthew Auld; +Cc: intel-gfx On pe, 2017-03-03 at 18:18 +0000, Chris Wilson wrote: > On Fri, Mar 03, 2017 at 06:03:34PM +0000, Matthew Auld wrote: > > > > It looks like we were incorrectly comparing vma->node against itself > > instead of the target node, when evicting for a node on systems where we > > need guard pages between regions with different cache domains. As a > > consequence we can end up trying to needlessly evict neighbouring nodes, > > even if they have the same cache domain, and if they were pinned we > > would fail the eviction. > > > > Fixes: 625d988acc28 ("drm/i915: Extract reserving space in the GTT to a helper") > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> /o\ > -Chris Good catch, will merge the series once the comments on patch 2 are addressed. Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: use correct node for handling cache domain eviction 2017-03-03 18:03 [PATCH 1/2] drm/i915: use correct node for handling cache domain eviction Matthew Auld 2017-03-03 18:03 ` [PATCH 2/2] drm/i915/selftests: exercise " Matthew Auld 2017-03-03 18:18 ` [PATCH 1/2] drm/i915: use correct node for handling " Chris Wilson @ 2017-03-03 18:48 ` Patchwork 2 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2017-03-03 18:48 UTC (permalink / raw) To: Matthew Auld; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: use correct node for handling cache domain eviction URL : https://patchwork.freedesktop.org/series/20646/ State : success == Summary == Series 20646v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/20646/revisions/1/mbox/ Test gem_exec_flush: Subgroup basic-batch-kernel-default-uc: pass -> FAIL (fi-snb-2600) fdo#100007 fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 fi-kbl-7500u total:278 pass:259 dwarn:1 dfail:0 fail:0 skip:18 fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 1d7915e7823628a0d548c6ecc5ad5b9a4ae4a6ff drm-tip: 2017y-03m-03d-15h-54m-06s UTC integration manifest dcfd30d drm/i915/selftests: exercise cache domain eviction 60905a6 drm/i915: use correct node for handling cache domain eviction == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4060/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-03-06 18:34 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-03-03 18:03 [PATCH 1/2] drm/i915: use correct node for handling cache domain eviction Matthew Auld 2017-03-03 18:03 ` [PATCH 2/2] drm/i915/selftests: exercise " Matthew Auld 2017-03-03 18:28 ` Chris Wilson 2017-03-03 18:18 ` [PATCH 1/2] drm/i915: use correct node for handling " Chris Wilson 2017-03-06 18:34 ` Joonas Lahtinen 2017-03-03 18:48 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
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