From: daniel.lezcano@linaro.org (Daniel Lezcano)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds
Date: Sun, 16 Apr 2017 22:27:00 +0200 [thread overview]
Message-ID: <1492374441-23336-10-git-send-email-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <1492374441-23336-1-git-send-email-daniel.lezcano@linaro.org>
From: Marc Zyngier <marc.zyngier@arm.com>
The way we work around errata affecting set_next_event is not very
nice, at it imposes this workaround on errata that do not need it.
Add new workaround hooks and let the existing workarounds use them.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/include/asm/arch_timer.h | 4 ++++
drivers/clocksource/arm_arch_timer.c | 31 ++++++++++++++++++++++++++-----
2 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index 1b0d7e9..cc1e081 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -42,6 +42,8 @@ enum arch_timer_erratum_match_type {
ate_match_local_cap_id,
};
+struct clock_event_device;
+
struct arch_timer_erratum_workaround {
enum arch_timer_erratum_match_type match_type;
const void *id;
@@ -49,6 +51,8 @@ struct arch_timer_erratum_workaround {
u32 (*read_cntp_tval_el0)(void);
u32 (*read_cntv_tval_el0)(void);
u64 (*read_cntvct_el0)(void);
+ int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
+ int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
};
extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround;
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 2c02e25..a0c9ee8 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -282,6 +282,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
},
#endif
#ifdef CONFIG_HISILICON_ERRATUM_161010101
@@ -292,6 +294,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
},
#endif
};
@@ -377,11 +381,24 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t
local ? "local" : "global", wa->desc);
}
+#define erratum_handler(fn, r, ...) \
+({ \
+ bool __val; \
+ if (needs_unstable_timer_counter_workaround() && \
+ timer_unstable_counter_workaround->fn) { \
+ r = timer_unstable_counter_workaround->fn(__VA_ARGS__); \
+ __val = true; \
+ } else { \
+ __val = false; \
+ } \
+ __val; \
+})
+
#else
#define arch_timer_check_ool_workaround(t,a) do { } while(0)
#define erratum_set_next_event_tval_virt(...) ({BUG(); 0;})
#define erratum_set_next_event_tval_phys(...) ({BUG(); 0;})
-#define needs_unstable_timer_counter_workaround() ({false;})
+#define erratum_handler(fn, r, ...) ({false;})
#endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
static __always_inline irqreturn_t timer_handler(const int access,
@@ -474,8 +491,10 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
static int arch_timer_set_next_event_virt(unsigned long evt,
struct clock_event_device *clk)
{
- if (needs_unstable_timer_counter_workaround())
- return erratum_set_next_event_tval_virt(evt, clk);
+ int ret;
+
+ if (erratum_handler(set_next_event_virt, ret, evt, clk))
+ return ret;
set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
return 0;
@@ -484,8 +503,10 @@ static int arch_timer_set_next_event_virt(unsigned long evt,
static int arch_timer_set_next_event_phys(unsigned long evt,
struct clock_event_device *clk)
{
- if (needs_unstable_timer_counter_workaround())
- return erratum_set_next_event_tval_phys(evt, clk);
+ int ret;
+
+ if (erratum_handler(set_next_event_phys, ret, evt, clk))
+ return ret;
set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
return 0;
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: linux-kernel@vger.kernel.org, Marc Zyngier <marc.zyngier@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
linux-arm-kernel@lists.infradead.org (moderated list:ARM
ARCHITECTED TIMER DRIVER)
Subject: [PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds
Date: Sun, 16 Apr 2017 22:27:00 +0200 [thread overview]
Message-ID: <1492374441-23336-10-git-send-email-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <1492374441-23336-1-git-send-email-daniel.lezcano@linaro.org>
From: Marc Zyngier <marc.zyngier@arm.com>
The way we work around errata affecting set_next_event is not very
nice, at it imposes this workaround on errata that do not need it.
Add new workaround hooks and let the existing workarounds use them.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/include/asm/arch_timer.h | 4 ++++
drivers/clocksource/arm_arch_timer.c | 31 ++++++++++++++++++++++++++-----
2 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index 1b0d7e9..cc1e081 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -42,6 +42,8 @@ enum arch_timer_erratum_match_type {
ate_match_local_cap_id,
};
+struct clock_event_device;
+
struct arch_timer_erratum_workaround {
enum arch_timer_erratum_match_type match_type;
const void *id;
@@ -49,6 +51,8 @@ struct arch_timer_erratum_workaround {
u32 (*read_cntp_tval_el0)(void);
u32 (*read_cntv_tval_el0)(void);
u64 (*read_cntvct_el0)(void);
+ int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
+ int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
};
extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround;
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 2c02e25..a0c9ee8 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -282,6 +282,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
},
#endif
#ifdef CONFIG_HISILICON_ERRATUM_161010101
@@ -292,6 +294,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
},
#endif
};
@@ -377,11 +381,24 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t
local ? "local" : "global", wa->desc);
}
+#define erratum_handler(fn, r, ...) \
+({ \
+ bool __val; \
+ if (needs_unstable_timer_counter_workaround() && \
+ timer_unstable_counter_workaround->fn) { \
+ r = timer_unstable_counter_workaround->fn(__VA_ARGS__); \
+ __val = true; \
+ } else { \
+ __val = false; \
+ } \
+ __val; \
+})
+
#else
#define arch_timer_check_ool_workaround(t,a) do { } while(0)
#define erratum_set_next_event_tval_virt(...) ({BUG(); 0;})
#define erratum_set_next_event_tval_phys(...) ({BUG(); 0;})
-#define needs_unstable_timer_counter_workaround() ({false;})
+#define erratum_handler(fn, r, ...) ({false;})
#endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
static __always_inline irqreturn_t timer_handler(const int access,
@@ -474,8 +491,10 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
static int arch_timer_set_next_event_virt(unsigned long evt,
struct clock_event_device *clk)
{
- if (needs_unstable_timer_counter_workaround())
- return erratum_set_next_event_tval_virt(evt, clk);
+ int ret;
+
+ if (erratum_handler(set_next_event_virt, ret, evt, clk))
+ return ret;
set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
return 0;
@@ -484,8 +503,10 @@ static int arch_timer_set_next_event_virt(unsigned long evt,
static int arch_timer_set_next_event_phys(unsigned long evt,
struct clock_event_device *clk)
{
- if (needs_unstable_timer_counter_workaround())
- return erratum_set_next_event_tval_phys(evt, clk);
+ int ret;
+
+ if (erratum_handler(set_next_event_phys, ret, evt, clk))
+ return ret;
set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
return 0;
--
2.7.4
next prev parent reply other threads:[~2017-04-16 20:27 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-16 20:25 [GIT PULL] timers changes for 4.12 Daniel Lezcano
2017-04-16 20:26 ` [PATCH 01/29] arm64: Allow checking of a CPU-local erratum Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 02/29] arm64: Add CNTVCT_EL0 trap handler Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 03/29] arm64: Define Cortex-A73 MIDR Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 04/29] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 05/29] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 06/29] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 07/29] arm64: arch_timer: Add erratum handler for CPU-specific capability Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 08/29] arm64: arch_timer: Move arch_timer_reg_read/write around Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:26 ` [PATCH 09/29] arm64: arch_timer: Get rid of erratum_workaround_set_sne Daniel Lezcano
2017-04-16 20:26 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano [this message]
2017-04-16 20:27 ` [PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds Daniel Lezcano
2017-04-16 20:27 ` [PATCH 11/29] arm64: arch_timer: Make workaround methods optional Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 12/29] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 13/29] arm64: arch_timer: Move clocksource_counter and co around Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 14/29] arm64: arch_timer: Save cntkctl_el1 as a per-cpu variable Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 15/29] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 16/29] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 17/29] arm64: arch_timer: Allow erratum matching with ACPI OEM information Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 18/29] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 19/29] clocksource/drivers/orion: Read clock rate once Daniel Lezcano
2017-04-16 20:27 ` [PATCH 20/29] clocksource/drivers/orion: Add delay_timer implementation Daniel Lezcano
2017-04-16 20:27 ` [PATCH 21/29] clocksource: Add missing line break to error messages Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-24 7:45 ` Uwe Kleine-König
2017-04-24 7:45 ` Uwe Kleine-König
2017-04-24 7:45 ` Uwe Kleine-König
2017-04-24 7:45 ` Uwe Kleine-König
2017-04-24 7:45 ` Uwe Kleine-König
2017-04-16 20:27 ` [PATCH 22/29] dt-bindings: Clarify compatible property for rockchip timers Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
[not found] ` <1492374441-23336-22-git-send-email-daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-04-20 14:12 ` Rob Herring
2017-04-20 14:12 ` Rob Herring
2017-04-20 14:12 ` Rob Herring
2017-04-16 20:27 ` [PATCH 23/29] ARM: dts: rockchip: Update compatible property for rk322x timer Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 24/29] clocksource/drivers/rockchip_timer: Implement clocksource timer Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 25/29] ARM: dts: rockchip: Add timer entries to rk3188 SoC Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 26/29] ARM: dts: rockchip: disable arm-global-timer for rk3188 Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 27/29] clocksource: Augment bindings for Faraday timer Daniel Lezcano
2017-04-16 20:27 ` Daniel Lezcano
2017-04-16 20:27 ` [PATCH 28/29] clocksource/drivers/gemini: Rename Gemini timer to Faraday Daniel Lezcano
2017-04-16 20:27 ` [PATCH 29/29] clocksource/drivers/fttmr010: Refactor to handle clock Daniel Lezcano
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