From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: "sboyd@codeaurora.org" <sboyd@codeaurora.org>,
"Alexey.Brodkin@synopsys.com" <Alexey.Brodkin@synopsys.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"Eugeniy.Paltsev@synopsys.com" <Eugeniy.Paltsev@synopsys.com>,
"linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"vladimir_zapolskiy@mentor.com" <vladimir_zapolskiy@mentor.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Subject: Re: [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree
Date: Sat, 9 Dec 2017 13:50:49 +0000 [thread overview]
Message-ID: <1512827448.2699.72.camel@synopsys.com> (raw)
In-Reply-To: <20171114234643.GD11955@codeaurora.org>
T24gVHVlLCAyMDE3LTExLTE0IGF0IDE1OjQ2IC0wODAwLCBzYm95ZEBjb2RlYXVyb3JhLm9yZyB3
cm90ZToNCj4gT24gMTEvMTQsIEFsZXhleSBCcm9ka2luIHdyb3RlOg0KPiA+IEhpIFZsYWRpbWly
LA0KPiA+IA0KPiA+IE9uIFR1ZSwgMjAxNy0xMS0xNCBhdCAxOTowMSArMDIwMCwgVmxhZGltaXIg
WmFwb2xza2l5IHdyb3RlOg0KPiA+ID4gT24gMTEvMTQvMjAxNyAwMjoyMCBQTSwgRXVnZW5peSBQ
YWx0c2V2IHdyb3RlOg0KPiA+ID4gPiANCj4gPiA+ID4gQWRkIG9wdGlvbiB0byBzZXQgaW5pdGlh
bCBvdXRwdXQgZnJlcXVlbmN5IG9mIHBsbHMgdmlhDQo+ID4gPiA+ICJjbG9jay1mcmVxdWVuY3ki
IHByb3BlcnR5IGluIHBsbCdzIGRldmljZSB0cmVlIG5vZGUuDQo+ID4gPiA+IFRoaXMgZnJlcXVl
bmN5IHdpbGwgYmUgc2V0IHdoaWxlIHBsbCBkcml2ZXIgcHJvYmVkLg0KPiA+ID4gPiANCj4gPiA+
ID4gVGhlIHVzYWdlIGV4YW1wbGUgaXMgc2V0dGluZyBDUFUgY2xvY2sgZnJlcXVlbmN5IG9uIGJv
b3QNCj4gPiA+ID4gU2VlIGRpc2N1c3Npb246DQo+ID4gPiA+IGh0dHBzOi8vdXJsZGVmZW5zZS5w
cm9vZnBvaW50LmNvbS92Mi91cmw/dT1odHRwcy0zQV9fd3d3Lm1haWwtMkRhcmNoaXZlLmNvbV9s
aW51eC0yRHNucHMtMkRhcmMtNDBsaXN0cy5pbmZyYWRlYWQub3JnX21zZzAyNjg5Lmh0bWwmZD1E
d0lDQWcmYz0NCj4gPiA+ID4gRFBMNg0KPiA+ID4gPiBfWF82SmtYRng3QVhXcUIwdGcmcj1scWRl
ZVNTRWVzMEdGRERsNjU2ZVZpWE83YnJlUzU1eXRXa2hwazVSODFJJm09dlRGb1N2MUU4TnlRQzhu
cWU2cHd2dVREeEd2RWVmaEFkR3dBb0FCT3JZNCZzPXNibU1uY3pkS1AzMTdiTjk3M2NabjJXY1lG
MjlrDQo+ID4gPiA+IFZNTFcNCj4gPiA+ID4gY2hZZmhTR1QyTSZlPQ0KPiA+ID4gPiANCj4gPiA+
ID4gU2lnbmVkLW9mZi1ieTogRXVnZW5peSBQYWx0c2V2IDxFdWdlbml5LlBhbHRzZXZAc3lub3Bz
eXMuY29tPg0KPiA+ID4gPiAtLS0NCj4gPiA+ID4gwqAuLi4vYmluZGluZ3MvY2xvY2svc25wcyxo
c2RrLXBsbC1jbG9jay50eHTCoMKgwqDCoMKgwqDCoMKgwqB8wqDCoDUgKysrKw0KPiA+ID4gPiDC
oC4uLi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Nsb2NrL3NucHMscGxsLWNsb2NrLnR4dMKgwqDCoHzC
oMKgNSArKysrDQo+ID4gPiA+IMKgZHJpdmVycy9jbGsvYXhzMTB4L3BsbF9jbG9jay5jwqDCoMKg
wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgfCAzNCArKysrKysrKysrKysrKysr
KysrKy0tDQo+ID4gPiA+IMKgZHJpdmVycy9jbGsvY2xrLWhzZGstcGxsLmPCoMKgwqDCoMKgwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoHwgMzQgKysrKysrKysrKysrKysr
KysrKystLQ0KPiA+ID4gPiDCoDQgZmlsZXMgY2hhbmdlZCwgNzQgaW5zZXJ0aW9ucygrKSwgNCBk
ZWxldGlvbnMoLSkNCj4gPiA+ID4gDQo+ID4gPiA+IGRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9u
L2RldmljZXRyZWUvYmluZGluZ3MvY2xvY2svc25wcyxoc2RrLXBsbC1jbG9jay50eHQgYi9Eb2N1
bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvY2xvY2svc25wcyxoc2RrLXBsbC1jbG9jay50
eHQNCj4gPiA+ID4gaW5kZXggYzU2Yzc1NS4uNTcwMzA1OSAxMDA2NDQNCj4gPiA+ID4gLS0tIGEv
RG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Nsb2NrL3NucHMsaHNkay1wbGwtY2xv
Y2sudHh0DQo+ID4gPiA+ICsrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9j
bG9jay9zbnBzLGhzZGstcGxsLWNsb2NrLnR4dA0KPiA+ID4gPiBAQCAtMTMsNiArMTMsMTAgQEAg
UmVxdWlyZWQgcHJvcGVydGllczoNCj4gPiA+ID4gwqAtIGNsb2Nrczogc2hhbGwgYmUgdGhlIGlu
cHV0IHBhcmVudCBjbG9jayBwaGFuZGxlIGZvciB0aGUgUExMLg0KPiA+ID4gPiDCoC0gI2Nsb2Nr
LWNlbGxzOiBmcm9tIGNvbW1vbiBjbG9jayBiaW5kaW5nOyBTaG91bGQgYWx3YXlzIGJlIHNldCB0
byAwLg0KPiA+ID4gPiDCoA0KPiA+ID4gPiArT3B0aW9uYWwgcHJvcGVydGllczoNCj4gPiA+ID4g
Ky0gY2xvY2stZnJlcXVlbmN5OiBvdXRwdXQgZnJlcXVlbmN5IGdlbmVyYXRlZCBieSBwbGwgaW4g
SHogd2hpY2ggd2lsbCBiZSBzZXQNCj4gPiA+ID4gK3doaWxlIHByb2JpbmcuIFNob3VsZCBiZSBh
IHNpbmdsZSBjZWxsLg0KPiA+ID4gPiArDQo+ID4gPiA+IMKgRXhhbXBsZToNCj4gPiA+ID4gwqAJ
aW5wdXRfY2xrOiBpbnB1dC1jbGsgew0KPiA+ID4gPiDCoAkJY2xvY2stZnJlcXVlbmN5ID0gPDMz
MzMzMzMzPjsNCj4gPiA+ID4gQEAgLTI1LDQgKzI5LDUgQEAgRXhhbXBsZToNCj4gPiA+ID4gwqAJ
CXJlZyA9IDwweDAwIDB4MTA+Ow0KPiA+ID4gPiDCoAkJI2Nsb2NrLWNlbGxzID0gPDA+Ow0KPiA+
ID4gPiDCoAkJY2xvY2tzID0gPCZpbnB1dF9jbGs+Ow0KPiA+ID4gPiArCQljbG9jay1mcmVxdWVu
Y3kgPSA8MTAwMDAwMDAwMD47DQo+ID4gPiA+IMKgCX07DQo+ID4gPiA+IGRpZmYgLS1naXQgYS9E
b2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvY2xvY2svc25wcyxwbGwtY2xvY2sudHh0
IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Nsb2NrL3NucHMscGxsLWNsb2Nr
LnR4dA0KPiA+ID4gPiBpbmRleCAxMWZlNDg3Li41OTA4Zjk5IDEwMDY0NA0KPiA+ID4gPiAtLS0g
YS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvY2xvY2svc25wcyxwbGwtY2xvY2su
dHh0DQo+ID4gPiA+ICsrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9jbG9j
ay9zbnBzLHBsbC1jbG9jay50eHQNCj4gPiA+ID4gQEAgLTEzLDYgKzEzLDEwIEBAIHJlZ2lzdGVy
cyBhbmQgc2Vjb25kIGZvciBjb3JyZXNwb25kaW5nIExPQ0sgQ0dVIHJlZ2lzdGVyLg0KPiA+ID4g
PiDCoC0gY2xvY2tzOiBzaGFsbCBiZSB0aGUgaW5wdXQgcGFyZW50IGNsb2NrIHBoYW5kbGUgZm9y
IHRoZSBQTEwuDQo+ID4gPiA+IMKgLSAjY2xvY2stY2VsbHM6IGZyb20gY29tbW9uIGNsb2NrIGJp
bmRpbmc7IFNob3VsZCBhbHdheXMgYmUgc2V0IHRvIDAuDQo+ID4gPiA+IMKgDQo+ID4gPiA+ICtP
cHRpb25hbCBwcm9wZXJ0aWVzOg0KPiA+ID4gPiArLSBjbG9jay1mcmVxdWVuY3k6IG91dHB1dCBm
cmVxdWVuY3kgZ2VuZXJhdGVkIGJ5IHBsbCBpbiBIeiB3aGljaCB3aWxsIGJlIHNldA0KPiA+ID4g
PiArd2hpbGUgcHJvYmluZy4gU2hvdWxkIGJlIGEgc2luZ2xlIGNlbGwuDQo+ID4gPiA+ICsNCj4g
PiA+ID4gwqBFeGFtcGxlOg0KPiA+ID4gPiDCoAlpbnB1dC1jbGs6IGlucHV0LWNsayB7DQo+ID4g
PiA+IMKgCQljbG9jay1mcmVxdWVuY3kgPSA8MzMzMzMzMzM+Ow0KPiA+ID4gPiBAQCAtMjUsNCAr
MjksNSBAQCBFeGFtcGxlOg0KPiA+ID4gPiDCoAkJcmVnID0gPDB4ODAgMHgxMD4sIDwweDEwMCAw
eDEwPjsNCj4gPiA+ID4gwqAJCSNjbG9jay1jZWxscyA9IDwwPjsNCj4gPiA+ID4gwqAJCWNsb2Nr
cyA9IDwmaW5wdXQtY2xrPjsNCj4gPiA+ID4gKwkJY2xvY2stZnJlcXVlbmN5ID0gPDEwMDAwMDAw
MD47DQo+ID4gPiA+IMKgCX07DQo+ID4gPiANCj4gPiA+IFlvdSBtYXkgY2hlY2sgRG9jdW1lbnRh
dGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Nsb2NrL2Nsb2NrLWJpbmRpbmdzLnR4dA0KPiA+ID4g
YWJvdXQgaG93IHRvIGFzc2lnbiBpbml0aWFsIGNsb2NrIHJhdGVzLCBpbiBnZW5lcmFsICdjbG9j
ay1mcmVxdWVuY3knDQo+ID4gPiBwcm9wZXJ0eSBpcyBhIHByb3BlcnR5IG9mIGNsb2NrIGNvbnN1
bWVycyB3aXRoIHR3byBleGNlcHRpb25zIG9mIHNpbXBsZQ0KPiA+ID4gY2xvY2sgc291cmNlcywg
bmFtZWx5IGl0IGlzIHVzZWQgaW4gZml4ZWQgY2xvY2sgYW5kIFBXTSBjbG9jayBiaW5kaW5ncy4N
Cj4gPiANCj4gPiBJIHRoaW5rIHRoYXQncyB3aGF0IHdlIGFncmVlZCBvbiB3aXRoIFJvYiBIZXJy
aW5nIGJhY2sgaW4gdGhlIGRheS4NCj4gPiBIYXZlIHlvdSBjaGVja2VkIHRoaXMgcG9zdCBvZiBo
aW0gb24gdGhlIHRvcGljPw0KPiA+IGh0dHBzOi8vdXJsZGVmZW5zZS5wcm9vZnBvaW50LmNvbS92
Mi91cmw/dT1odHRwLTNBX19saXN0cy5pbmZyYWRlYWQub3JnX3BpcGVybWFpbF9saW51eC0yRHNu
cHMtMkRhcmNfMjAxNy0yRFNlcHRlbWJlcl8wMDI5MDkuaHRtbCZkPUR3SURBdyZjPURQTDZfDQo+
ID4gWF82SmtYRng3QVhXcUIwdGcmcj1abEpOMU1yaVBVVGtCS0NyUFN4NjdHbWFwbEVVR2NBRWs5
eVB0Q0xkVVhJJm09WDBXOHA1Zk9qaXlWaEsxMjE2TGt0YjV5SDNvalRTWmhkblFoRWlJVmowayZz
PXlHSmZIYmpIMlQ3NVllSUpMQjE0X2lEamZzS2kxRTVhYVgNCj4gPiBZdTNRSkJVSWsmZT0NCj4g
PiANCj4gPiBKdXN0IEZZSSBpdCBhbGwgc3RhcnRlZCBmcm9tIG15IHF1ZXN0aW9uIGhlcmU6DQo+
ID4gaHR0cHM6Ly91cmxkZWZlbnNlLnByb29mcG9pbnQuY29tL3YyL3VybD91PWh0dHAtM0FfX2xp
c3RzLmluZnJhZGVhZC5vcmdfcGlwZXJtYWlsX2xpbnV4LTJEc25wcy0yRGFyY18yMDE3LTJEU2Vw
dGVtYmVyXzAwMjkwMC5odG1sJmQ9RHdJREF3JmM9RFBMNl8NCj4gPiBYXzZKa1hGeDdBWFdxQjB0
ZyZyPVpsSk4xTXJpUFVUa0JLQ3JQU3g2N0dtYXBsRVVHY0FFazl5UHRDTGRVWEkmbT1YMFc4cDVm
T2ppeVZoSzEyMTZMa3RiNXlIM29qVFNaaGRuUWhFaUlWajBrJnM9Smt6dDJHX0o0YUU5SmZlUFBR
NTdsZG5yRldlUzU3UmhmYw0KPiA+IE1odW45Mm9VMCZlPQ0KPiANCj4gV2h5IGNhbid0IHdlIHVz
ZSBhc3NpZ25lZC1jbG9jay1yYXRlcz8gVGhhdCB3b3VsZCBiYXNpY2FsbHkgY2FsbA0KPiBjbGtf
c2V0X3JhdGUoKSBvbiB0aGUgY2xrIG9uY2UgaXQncyBhZGRlZC4NCg0KVGhhbmtzIGZvciB0aGUg
aGludCwgYXNzaWduZWQtY2xvY2stcmF0ZXMgd29ya3MgZm9yIHVzLg0KDQotLSANCsKgRXVnZW5p
eSBQYWx0c2V2
WARNING: multiple messages have this Message-ID (diff)
From: Eugeniy.Paltsev@synopsys.com (Eugeniy Paltsev)
To: linux-snps-arc@lists.infradead.org
Subject: [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree
Date: Sat, 9 Dec 2017 13:50:49 +0000 [thread overview]
Message-ID: <1512827448.2699.72.camel@synopsys.com> (raw)
In-Reply-To: <20171114234643.GD11955@codeaurora.org>
On Tue, 2017-11-14@15:46 -0800, sboyd@codeaurora.org wrote:
> On 11/14, Alexey Brodkin wrote:
> > Hi Vladimir,
> >
> > On Tue, 2017-11-14@19:01 +0200, Vladimir Zapolskiy wrote:
> > > On 11/14/2017 02:20 PM, Eugeniy Paltsev wrote:
> > > >
> > > > Add option to set initial output frequency of plls via
> > > > "clock-frequency" property in pll's device tree node.
> > > > This frequency will be set while pll driver probed.
> > > >
> > > > The usage example is setting CPU clock frequency on boot
> > > > See discussion:
> > > > https://urldefense.proofpoint.com/v2/url?u=https-3A__www.mail-2Darchive.com_linux-2Dsnps-2Darc-40lists.infradead.org_msg02689.html&d=DwICAg&c=
> > > > DPL6
> > > > _X_6JkXFx7AXWqB0tg&r=lqdeeSSEes0GFDDl656eViXO7breS55ytWkhpk5R81I&m=vTFoSv1E8NyQC8nqe6pwvuTDxGvEefhAdGwAoABOrY4&s=sbmMnczdKP317bN973cZn2WcYF29k
> > > > VMLW
> > > > chYfhSGT2M&e=
> > > >
> > > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
> > > > ---
> > > > ?.../bindings/clock/snps,hsdk-pll-clock.txt?????????|??5 ++++
> > > > ?.../devicetree/bindings/clock/snps,pll-clock.txt???|??5 ++++
> > > > ?drivers/clk/axs10x/pll_clock.c?????????????????????| 34 ++++++++++++++++++++--
> > > > ?drivers/clk/clk-hsdk-pll.c?????????????????????????| 34 ++++++++++++++++++++--
> > > > ?4 files changed, 74 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt
> > > > index c56c755..5703059 100644
> > > > --- a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt
> > > > +++ b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt
> > > > @@ -13,6 +13,10 @@ Required properties:
> > > > ?- clocks: shall be the input parent clock phandle for the PLL.
> > > > ?- #clock-cells: from common clock binding; Should always be set to 0.
> > > > ?
> > > > +Optional properties:
> > > > +- clock-frequency: output frequency generated by pll in Hz which will be set
> > > > +while probing. Should be a single cell.
> > > > +
> > > > ?Example:
> > > > ? input_clk: input-clk {
> > > > ? clock-frequency = <33333333>;
> > > > @@ -25,4 +29,5 @@ Example:
> > > > ? reg = <0x00 0x10>;
> > > > ? #clock-cells = <0>;
> > > > ? clocks = <&input_clk>;
> > > > + clock-frequency = <1000000000>;
> > > > ? };
> > > > diff --git a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt
> > > > index 11fe487..5908f99 100644
> > > > --- a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt
> > > > +++ b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt
> > > > @@ -13,6 +13,10 @@ registers and second for corresponding LOCK CGU register.
> > > > ?- clocks: shall be the input parent clock phandle for the PLL.
> > > > ?- #clock-cells: from common clock binding; Should always be set to 0.
> > > > ?
> > > > +Optional properties:
> > > > +- clock-frequency: output frequency generated by pll in Hz which will be set
> > > > +while probing. Should be a single cell.
> > > > +
> > > > ?Example:
> > > > ? input-clk: input-clk {
> > > > ? clock-frequency = <33333333>;
> > > > @@ -25,4 +29,5 @@ Example:
> > > > ? reg = <0x80 0x10>, <0x100 0x10>;
> > > > ? #clock-cells = <0>;
> > > > ? clocks = <&input-clk>;
> > > > + clock-frequency = <100000000>;
> > > > ? };
> > >
> > > You may check Documentation/devicetree/bindings/clock/clock-bindings.txt
> > > about how to assign initial clock rates, in general 'clock-frequency'
> > > property is a property of clock consumers with two exceptions of simple
> > > clock sources, namely it is used in fixed clock and PWM clock bindings.
> >
> > I think that's what we agreed on with Rob Herring back in the day.
> > Have you checked this post of him on the topic?
> > https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.infradead.org_pipermail_linux-2Dsnps-2Darc_2017-2DSeptember_002909.html&d=DwIDAw&c=DPL6_
> > X_6JkXFx7AXWqB0tg&r=ZlJN1MriPUTkBKCrPSx67GmaplEUGcAEk9yPtCLdUXI&m=X0W8p5fOjiyVhK1216Lktb5yH3ojTSZhdnQhEiIVj0k&s=yGJfHbjH2T75YeIJLB14_iDjfsKi1E5aaX
> > Yu3QJBUIk&e=
> >
> > Just FYI it all started from my question here:
> > https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.infradead.org_pipermail_linux-2Dsnps-2Darc_2017-2DSeptember_002900.html&d=DwIDAw&c=DPL6_
> > X_6JkXFx7AXWqB0tg&r=ZlJN1MriPUTkBKCrPSx67GmaplEUGcAEk9yPtCLdUXI&m=X0W8p5fOjiyVhK1216Lktb5yH3ojTSZhdnQhEiIVj0k&s=Jkzt2G_J4aE9JfePPQ57ldnrFWeS57Rhfc
> > Mhun92oU0&e=
>
> Why can't we use assigned-clock-rates? That would basically call
> clk_set_rate() on the clk once it's added.
Thanks for the hint, assigned-clock-rates works for us.
--
?Eugeniy Paltsev
WARNING: multiple messages have this Message-ID (diff)
From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: "sboyd@codeaurora.org" <sboyd@codeaurora.org>,
"Alexey.Brodkin@synopsys.com" <Alexey.Brodkin@synopsys.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"Eugeniy.Paltsev@synopsys.com" <Eugeniy.Paltsev@synopsys.com>,
"linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"vladimir_zapolskiy@mentor.com" <vladimir_zapolskiy@mentor.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Subject: Re: [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree
Date: Sat, 9 Dec 2017 13:50:49 +0000 [thread overview]
Message-ID: <1512827448.2699.72.camel@synopsys.com> (raw)
In-Reply-To: <20171114234643.GD11955@codeaurora.org>
On Tue, 2017-11-14 at 15:46 -0800, sboyd@codeaurora.org wrote:
> On 11/14, Alexey Brodkin wrote:
> > Hi Vladimir,
> >
> > On Tue, 2017-11-14 at 19:01 +0200, Vladimir Zapolskiy wrote:
> > > On 11/14/2017 02:20 PM, Eugeniy Paltsev wrote:
> > > >
> > > > Add option to set initial output frequency of plls via
> > > > "clock-frequency" property in pll's device tree node.
> > > > This frequency will be set while pll driver probed.
> > > >
> > > > The usage example is setting CPU clock frequency on boot
> > > > See discussion:
> > > > https://urldefense.proofpoint.com/v2/url?u=https-3A__www.mail-2Darchive.com_linux-2Dsnps-2Darc-40lists.infradead.org_msg02689.html&d=DwICAg&c=
> > > > DPL6
> > > > _X_6JkXFx7AXWqB0tg&r=lqdeeSSEes0GFDDl656eViXO7breS55ytWkhpk5R81I&m=vTFoSv1E8NyQC8nqe6pwvuTDxGvEefhAdGwAoABOrY4&s=sbmMnczdKP317bN973cZn2WcYF29k
> > > > VMLW
> > > > chYfhSGT2M&e=
> > > >
> > > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
> > > > ---
> > > > .../bindings/clock/snps,hsdk-pll-clock.txt | 5 ++++
> > > > .../devicetree/bindings/clock/snps,pll-clock.txt | 5 ++++
> > > > drivers/clk/axs10x/pll_clock.c | 34 ++++++++++++++++++++--
> > > > drivers/clk/clk-hsdk-pll.c | 34 ++++++++++++++++++++--
> > > > 4 files changed, 74 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt
> > > > index c56c755..5703059 100644
> > > > --- a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt
> > > > +++ b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt
> > > > @@ -13,6 +13,10 @@ Required properties:
> > > > - clocks: shall be the input parent clock phandle for the PLL.
> > > > - #clock-cells: from common clock binding; Should always be set to 0.
> > > >
> > > > +Optional properties:
> > > > +- clock-frequency: output frequency generated by pll in Hz which will be set
> > > > +while probing. Should be a single cell.
> > > > +
> > > > Example:
> > > > input_clk: input-clk {
> > > > clock-frequency = <33333333>;
> > > > @@ -25,4 +29,5 @@ Example:
> > > > reg = <0x00 0x10>;
> > > > #clock-cells = <0>;
> > > > clocks = <&input_clk>;
> > > > + clock-frequency = <1000000000>;
> > > > };
> > > > diff --git a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt
> > > > index 11fe487..5908f99 100644
> > > > --- a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt
> > > > +++ b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt
> > > > @@ -13,6 +13,10 @@ registers and second for corresponding LOCK CGU register.
> > > > - clocks: shall be the input parent clock phandle for the PLL.
> > > > - #clock-cells: from common clock binding; Should always be set to 0.
> > > >
> > > > +Optional properties:
> > > > +- clock-frequency: output frequency generated by pll in Hz which will be set
> > > > +while probing. Should be a single cell.
> > > > +
> > > > Example:
> > > > input-clk: input-clk {
> > > > clock-frequency = <33333333>;
> > > > @@ -25,4 +29,5 @@ Example:
> > > > reg = <0x80 0x10>, <0x100 0x10>;
> > > > #clock-cells = <0>;
> > > > clocks = <&input-clk>;
> > > > + clock-frequency = <100000000>;
> > > > };
> > >
> > > You may check Documentation/devicetree/bindings/clock/clock-bindings.txt
> > > about how to assign initial clock rates, in general 'clock-frequency'
> > > property is a property of clock consumers with two exceptions of simple
> > > clock sources, namely it is used in fixed clock and PWM clock bindings.
> >
> > I think that's what we agreed on with Rob Herring back in the day.
> > Have you checked this post of him on the topic?
> > https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.infradead.org_pipermail_linux-2Dsnps-2Darc_2017-2DSeptember_002909.html&d=DwIDAw&c=DPL6_
> > X_6JkXFx7AXWqB0tg&r=ZlJN1MriPUTkBKCrPSx67GmaplEUGcAEk9yPtCLdUXI&m=X0W8p5fOjiyVhK1216Lktb5yH3ojTSZhdnQhEiIVj0k&s=yGJfHbjH2T75YeIJLB14_iDjfsKi1E5aaX
> > Yu3QJBUIk&e=
> >
> > Just FYI it all started from my question here:
> > https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.infradead.org_pipermail_linux-2Dsnps-2Darc_2017-2DSeptember_002900.html&d=DwIDAw&c=DPL6_
> > X_6JkXFx7AXWqB0tg&r=ZlJN1MriPUTkBKCrPSx67GmaplEUGcAEk9yPtCLdUXI&m=X0W8p5fOjiyVhK1216Lktb5yH3ojTSZhdnQhEiIVj0k&s=Jkzt2G_J4aE9JfePPQ57ldnrFWeS57Rhfc
> > Mhun92oU0&e=
>
> Why can't we use assigned-clock-rates? That would basically call
> clk_set_rate() on the clk once it's added.
Thanks for the hint, assigned-clock-rates works for us.
--
Eugeniy Paltsev
next prev parent reply other threads:[~2017-12-09 13:50 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-14 12:20 [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree Eugeniy Paltsev
2017-11-14 12:20 ` Eugeniy Paltsev
2017-11-14 17:01 ` Vladimir Zapolskiy
2017-11-14 17:01 ` Vladimir Zapolskiy
2017-11-14 21:19 ` Alexey Brodkin
2017-11-14 21:19 ` Alexey Brodkin
2017-11-14 21:19 ` Alexey Brodkin
2017-11-14 23:46 ` sboyd
2017-11-14 23:46 ` sboyd
2017-12-09 13:50 ` Eugeniy Paltsev [this message]
2017-12-09 13:50 ` Eugeniy Paltsev
2017-12-09 13:50 ` Eugeniy Paltsev
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