[MODERATED] Re: [patch V7 03/15] SBB 3

[David Woodhouse <dwmw2@infradead.org>]

On Sun, 2018-04-29 at 16:31 -0700, speck for Linus Torvalds wrote:
> 
> But more importantly, why do we have those odd "mov" instructions at all?
>
> Why does this code not just do
> 
>     { unsigned int ax, dx, cx;
>       asm volatile(ALTERNATIVE("","wrmsr",_feature)
>         :"=a" (ax), "=c" (cx), "=d" (dx)
>         :"0" (_val), "1" (_msr)
>         :"memory");
>     }
> 
> which seems simpler and better for gcc to set up? Sure, it makes the 
> setup be unconditional, but it effectively already was (because of that 
> memory setup).
> 
> But I guess it doesn't much _matter_.

FWIW we have those mov instructions because there was much bikeshedding
of this the first time round, and people really wanted the ax/cx/dx
setup not to happen in the ALTERNATIVE case. It *wasn't* unconditional
when it was all immediates, and I was losing the will to live. As you
say, it doesn't much matter.

We could still make it all go away in the ALTERNATIVE case by passing
in *only* the immediate value to be OR'd with x86_spec_ctrl_base, and
letting the asm load x86_spec_crtl_base for itself (the variable itself
would have to be exported).

I'm inclined not to bother. It's not like it's even that much of a win
because we *clobber* those registers anyway.