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From: Yu Zhang <yu.c.zhang@linux.intel.com>
To: qemu-devel@nongnu.org
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Peter Xu <peterx@redhat.com>
Subject: [Qemu-devel] [PATCH v2 3/3] intel-iommu: extend iotlb search logic to cover 57-bit IOVA.
Date: Wed, 14 Nov 2018 14:04:44 +0800	[thread overview]
Message-ID: <1542175484-2742-4-git-send-email-yu.c.zhang@linux.intel.com> (raw)
In-Reply-To: <1542175484-2742-1-git-send-email-yu.c.zhang@linux.intel.com>

The 64-bit key used by vtd_lookup_iotlb() to search the cached
mappings is formed by combining the GFN, source id and the page
level. To cover 57-bit IOVA, the shift of source id and of page
level need to be enlarged by 9 - the stride of one paging structure
level.

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
---
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com> 
Cc: Richard Henderson <rth@twiddle.net> 
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Peter Xu <peterx@redhat.com>
---
 hw/i386/intel_iommu_internal.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index a7ef24b..2b29b6f 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -114,8 +114,8 @@
                                      VTD_INTERRUPT_ADDR_FIRST + 1)
 
 /* The shift of source_id in the key of IOTLB hash table */
-#define VTD_IOTLB_SID_SHIFT         36
-#define VTD_IOTLB_LVL_SHIFT         52
+#define VTD_IOTLB_SID_SHIFT         45
+#define VTD_IOTLB_LVL_SHIFT         61
 #define VTD_IOTLB_MAX_SIZE          1024    /* Max size of the hash table */
 
 /* IOTLB_REG */
-- 
1.9.1

  parent reply	other threads:[~2018-11-14  6:07 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-14  6:04 [Qemu-devel] [PATCH v2 0/3] intel-iommu: add support for 5-level virtual IOMMU Yu Zhang
2018-11-14  6:04 ` [Qemu-devel] [PATCH v2 1/3] intel-iommu: differentiate host address width from IOVA address width Yu Zhang
2018-11-14  6:33   ` Peter Xu
2018-11-14  6:04 ` [Qemu-devel] [PATCH v2 2/3] intel-iommu: extend VTD emulation to allow 57-bit " Yu Zhang
2018-11-14  6:36   ` Peter Xu
2018-11-14  6:04 ` Yu Zhang [this message]
2018-11-14  6:41   ` [Qemu-devel] [PATCH v2 3/3] intel-iommu: extend iotlb search logic to cover 57-bit IOVA Peter Xu
2018-11-14  6:48     ` Yu Zhang

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