From: Peter Xu <peterx@redhat.com>
To: Yu Zhang <yu.c.zhang@linux.intel.com>
Cc: qemu-devel@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 1/3] intel-iommu: differentiate host address width from IOVA address width.
Date: Wed, 14 Nov 2018 14:33:40 +0800 [thread overview]
Message-ID: <20181114063340.GD6846@xz-x1> (raw)
In-Reply-To: <1542175484-2742-2-git-send-email-yu.c.zhang@linux.intel.com>
On Wed, Nov 14, 2018 at 02:04:42PM +0800, Yu Zhang wrote:
> Currently, vIOMMU is using the value of IOVA address width, instead of
> the host address width(HAW) to calculate the number of reserved bits in
> data structures such as root entries, context entries, and entries of
> DMA paging structures etc.
>
> However values of IOVA address width and of the HAW may not equal. For
> example, a 48-bit IOVA can only be mapped to host addresses no wider than
> 46 bits. Using 48, instead of 46 to calculate the reserved bit may result
> in an invalid IOVA being accepted.
>
> To fix this, a new field - haw_bits is introduced in struct IntelIOMMUState,
> whose value is initialized based on the maximum physical address set to
> guest CPU. Also, definitions such as VTD_HOST_AW_39/48BIT etc. are renamed
> to clarify.
>
> Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
--
Peter Xu
next prev parent reply other threads:[~2018-11-14 6:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-14 6:04 [Qemu-devel] [PATCH v2 0/3] intel-iommu: add support for 5-level virtual IOMMU Yu Zhang
2018-11-14 6:04 ` [Qemu-devel] [PATCH v2 1/3] intel-iommu: differentiate host address width from IOVA address width Yu Zhang
2018-11-14 6:33 ` Peter Xu [this message]
2018-11-14 6:04 ` [Qemu-devel] [PATCH v2 2/3] intel-iommu: extend VTD emulation to allow 57-bit " Yu Zhang
2018-11-14 6:36 ` Peter Xu
2018-11-14 6:04 ` [Qemu-devel] [PATCH v2 3/3] intel-iommu: extend iotlb search logic to cover 57-bit IOVA Yu Zhang
2018-11-14 6:41 ` Peter Xu
2018-11-14 6:48 ` Yu Zhang
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