From: Peter Xu <peterx@redhat.com>
To: Yu Zhang <yu.c.zhang@linux.intel.com>
Cc: qemu-devel@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 2/3] intel-iommu: extend VTD emulation to allow 57-bit IOVA address width.
Date: Wed, 14 Nov 2018 14:36:40 +0800 [thread overview]
Message-ID: <20181114063640.GE6846@xz-x1> (raw)
In-Reply-To: <1542175484-2742-3-git-send-email-yu.c.zhang@linux.intel.com>
On Wed, Nov 14, 2018 at 02:04:43PM +0800, Yu Zhang wrote:
> A 5-level paging capable VM may choose to use 57-bit IOVA address width.
> E.g. guest applications may prefer to use its VA as IOVA when performing
> VFIO map/unmap operations, to avoid the burden of managing the IOVA space.
>
> This patch extends the current vIOMMU logic to cover the extended address
> width. When creating a VM with 5-level paging feature, one can choose to
> create a virtual VTD with 5-level paging capability, with configurations
> like "-device intel-iommu,x-aw-bits=57".
>
> Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
--
Peter Xu
next prev parent reply other threads:[~2018-11-14 6:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-14 6:04 [Qemu-devel] [PATCH v2 0/3] intel-iommu: add support for 5-level virtual IOMMU Yu Zhang
2018-11-14 6:04 ` [Qemu-devel] [PATCH v2 1/3] intel-iommu: differentiate host address width from IOVA address width Yu Zhang
2018-11-14 6:33 ` Peter Xu
2018-11-14 6:04 ` [Qemu-devel] [PATCH v2 2/3] intel-iommu: extend VTD emulation to allow 57-bit " Yu Zhang
2018-11-14 6:36 ` Peter Xu [this message]
2018-11-14 6:04 ` [Qemu-devel] [PATCH v2 3/3] intel-iommu: extend iotlb search logic to cover 57-bit IOVA Yu Zhang
2018-11-14 6:41 ` Peter Xu
2018-11-14 6:48 ` Yu Zhang
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