* [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index
@ 2018-11-21 22:00 Oak Zeng
[not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 18+ messages in thread
From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak
This is a preparation work to make reserved doorbell index per device,
instead of using a global macro definition. By doing this, we can easily
change doorbell layout for future ASICs while not affecting ASICs in
production.
Change-Id: If08e2bc9d0749748ed4083ba4eb32a4698763085
Signed-off-by: Oak Zeng <ozeng@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 +++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2c80453..b7ee4ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -813,6 +813,55 @@ struct amd_powerplay {
uint32_t pp_feature;
};
+/* Reserved doorbells for amdgpu (including multimedia).
+ * KFD can use all the rest in the 2M doorbell bar.
+ * For asic before vega10, doorbell is 32-bit, so the
+ * index/offset is in dword. For vega10 and after, doorbell
+ * can be 64-bit, so the index defined is in qword.
+ */
+struct amdgpu_doorbell_index {
+ uint32_t kiq;
+ uint32_t mec_ring0;
+ uint32_t mec_ring1;
+ uint32_t mec_ring2;
+ uint32_t mec_ring3;
+ uint32_t mec_ring4;
+ uint32_t mec_ring5;
+ uint32_t mec_ring6;
+ uint32_t mec_ring7;
+ uint32_t userqueue_start;
+ uint32_t userqueue_end;
+ uint32_t gfx_ring0;
+ uint32_t sdma_engine0;
+ uint32_t sdma_engine1;
+ uint32_t sdma_engine2;
+ uint32_t sdma_engine3;
+ uint32_t sdma_engine4;
+ uint32_t sdma_engine5;
+ uint32_t sdma_engine6;
+ uint32_t sdma_engine7;
+ uint32_t ih;
+ union {
+ struct {
+ uint32_t vcn_ring0_1;
+ uint32_t vcn_ring2_3;
+ uint32_t vcn_ring4_5;
+ uint32_t vcn_ring6_7;
+ } vcn;
+ struct {
+ uint32_t uvd_ring0_1;
+ uint32_t uvd_ring2_3;
+ uint32_t uvd_ring4_5;
+ uint32_t uvd_ring6_7;
+ uint32_t vce_ring0_1;
+ uint32_t vce_ring2_3;
+ uint32_t vce_ring4_5;
+ uint32_t vce_ring6_7;
+ } uvd_vce;
+ };
+ uint32_t max_assignment;
+};
+
#define AMDGPU_RESET_MAGIC_NUM 64
struct amdgpu_device {
struct device *dev;
@@ -1026,6 +1075,7 @@ struct amdgpu_device {
unsigned long last_mm_index;
bool in_gpu_reset;
struct mutex lock_reset;
+ struct amdgpu_doorbell_index doorbell_index;
};
static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread[parent not found: <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* [PATCH 2/7] drm/amdgpu: Vega10 doorbell index initialization [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 22:00 ` Oak Zeng [not found] ` <1542837620-13571-2-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:00 ` [PATCH 3/7] drm/amdgpu: Vega12 " Oak Zeng ` (5 subsequent siblings) 6 siblings, 1 reply; 18+ messages in thread From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak v2: Use enum definition instead of hardcoded value Change-Id: Ib72058337f0aa53adfc6c6aae5341a7cd665111a Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h index f8ad780..d37c57d 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h @@ -58,4 +58,5 @@ void soc15_program_register_sequence(struct amdgpu_device *adev, int vega10_reg_base_init(struct amdgpu_device *adev); int vega20_reg_base_init(struct amdgpu_device *adev); +void vega10_doorbell_index_init(struct amdgpu_device *adev); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c index c5c9b2b..9ba8e02 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c @@ -56,4 +56,32 @@ int vega10_reg_base_init(struct amdgpu_device *adev) return 0; } +void vega10_doorbell_index_init(struct amdgpu_device *adev) +{ + adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0; + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1; + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL64_MEC_RING2; + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL64_MEC_RING3; + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL64_MEC_RING4; + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5; + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6; + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7; + adev->doorbell_index.userqueue_start = AMDGPU_DOORBELL64_USERQUEUE_START; + adev->doorbell_index.userqueue_end = AMDGPU_DOORBELL64_USERQUEUE_END; + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL64_GFX_RING0; + adev->doorbell_index.sdma_engine0 = AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0; + adev->doorbell_index.sdma_engine1 = AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1; + adev->doorbell_index.ih = AMDGPU_DOORBELL64_IH; + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_DOORBELL64_UVD_RING0_1; + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_DOORBELL64_UVD_RING2_3; + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_DOORBELL64_UVD_RING4_5; + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_DOORBELL64_UVD_RING6_7; + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_DOORBELL64_VCE_RING0_1; + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3; + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5; + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7; + /* In unit of dword doorbell */ + adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1; +} -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <1542837620-13571-2-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH 2/7] drm/amdgpu: Vega10 doorbell index initialization [not found] ` <1542837620-13571-2-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 22:29 ` Alex Deucher 0 siblings, 0 replies; 18+ messages in thread From: Alex Deucher @ 2018-11-21 22:29 UTC (permalink / raw) To: ozeng-5C7GfCeVMHo; +Cc: Oak Zeng, amd-gfx list On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > v2: Use enum definition instead of hardcoded value > > Change-Id: Ib72058337f0aa53adfc6c6aae5341a7cd665111a > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + > drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 28 ++++++++++++++++++++++++++++ > 2 files changed, 29 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h > index f8ad780..d37c57d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/soc15.h > +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h > @@ -58,4 +58,5 @@ void soc15_program_register_sequence(struct amdgpu_device *adev, > int vega10_reg_base_init(struct amdgpu_device *adev); > int vega20_reg_base_init(struct amdgpu_device *adev); > > +void vega10_doorbell_index_init(struct amdgpu_device *adev); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c > index c5c9b2b..9ba8e02 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c > +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c > @@ -56,4 +56,32 @@ int vega10_reg_base_init(struct amdgpu_device *adev) > return 0; > } > > +void vega10_doorbell_index_init(struct amdgpu_device *adev) > +{ > + adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; > + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0; > + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1; > + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL64_MEC_RING2; > + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL64_MEC_RING3; > + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL64_MEC_RING4; > + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5; > + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6; > + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7; > + adev->doorbell_index.userqueue_start = AMDGPU_DOORBELL64_USERQUEUE_START; > + adev->doorbell_index.userqueue_end = AMDGPU_DOORBELL64_USERQUEUE_END; > + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL64_GFX_RING0; > + adev->doorbell_index.sdma_engine0 = AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0; > + adev->doorbell_index.sdma_engine1 = AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1; > + adev->doorbell_index.ih = AMDGPU_DOORBELL64_IH; > + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_DOORBELL64_UVD_RING0_1; > + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_DOORBELL64_UVD_RING2_3; > + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_DOORBELL64_UVD_RING4_5; > + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_DOORBELL64_UVD_RING6_7; > + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_DOORBELL64_VCE_RING0_1; > + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3; > + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5; > + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7; > + /* In unit of dword doorbell */ > + adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1; > +} > > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 3/7] drm/amdgpu: Vega12 doorbell index initialization [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:00 ` [PATCH 2/7] drm/amdgpu: Vega10 doorbell index initialization Oak Zeng @ 2018-11-21 22:00 ` Oak Zeng [not found] ` <1542837620-13571-3-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:00 ` [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 Oak Zeng ` (4 subsequent siblings) 6 siblings, 1 reply; 18+ messages in thread From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak v2: Changed file name for consistency Change-Id: Ib2c570224321bb7002d2ed01f43ac70203e86f88 Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c | 54 ++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index f76bcb9..1cef9e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce amdgpu-y += \ vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \ - vega20_reg_init.o nbio_v7_4.o + vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o # add DF block amdgpu-y += \ diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h index d37c57d..939c0e8 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h @@ -59,4 +59,5 @@ int vega10_reg_base_init(struct amdgpu_device *adev); int vega20_reg_base_init(struct amdgpu_device *adev); void vega10_doorbell_index_init(struct amdgpu_device *adev); +void vega12_doorbell_index_init(struct amdgpu_device *adev); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c new file mode 100644 index 0000000..71622b5 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c @@ -0,0 +1,54 @@ +/* + * Copyright 2018 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "amdgpu.h" + +void vega12_doorbell_index_init(struct amdgpu_device *adev) +{ + adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0; + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1; + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL64_MEC_RING2; + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL64_MEC_RING3; + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL64_MEC_RING4; + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5; + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6; + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7; + adev->doorbell_index.userqueue_start = AMDGPU_DOORBELL64_USERQUEUE_START; + adev->doorbell_index.userqueue_end = AMDGPU_DOORBELL64_USERQUEUE_END; + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL64_GFX_RING0; + adev->doorbell_index.sdma_engine0 = AMDGPU_DOORBELL64_sDMA_ENGINE0; + adev->doorbell_index.sdma_engine1 = AMDGPU_DOORBELL64_sDMA_ENGINE1; + adev->doorbell_index.ih = AMDGPU_DOORBELL64_IH; + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_DOORBELL64_UVD_RING0_1; + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_DOORBELL64_UVD_RING2_3; + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_DOORBELL64_UVD_RING4_5; + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_DOORBELL64_UVD_RING6_7; + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_DOORBELL64_VCE_RING0_1; + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3; + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5; + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7; + /* In unit of dword doorbell */ + adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1; +} + -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <1542837620-13571-3-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH 3/7] drm/amdgpu: Vega12 doorbell index initialization [not found] ` <1542837620-13571-3-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 22:30 ` Alex Deucher 0 siblings, 0 replies; 18+ messages in thread From: Alex Deucher @ 2018-11-21 22:30 UTC (permalink / raw) To: ozeng-5C7GfCeVMHo; +Cc: Oak Zeng, amd-gfx list On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > v2: Changed file name for consistency > > Change-Id: Ib2c570224321bb7002d2ed01f43ac70203e86f88 > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> Just drop this patch and use the vega10 definition for vega12 and raven. Alex > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- > drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + > drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c | 54 ++++++++++++++++++++++++++++ > 3 files changed, 56 insertions(+), 1 deletion(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index f76bcb9..1cef9e1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce > > amdgpu-y += \ > vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \ > - vega20_reg_init.o nbio_v7_4.o > + vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o > > # add DF block > amdgpu-y += \ > diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h > index d37c57d..939c0e8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/soc15.h > +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h > @@ -59,4 +59,5 @@ int vega10_reg_base_init(struct amdgpu_device *adev); > int vega20_reg_base_init(struct amdgpu_device *adev); > > void vega10_doorbell_index_init(struct amdgpu_device *adev); > +void vega12_doorbell_index_init(struct amdgpu_device *adev); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c > new file mode 100644 > index 0000000..71622b5 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c > @@ -0,0 +1,54 @@ > +/* > + * Copyright 2018 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + */ > + > +#include "amdgpu.h" > + > +void vega12_doorbell_index_init(struct amdgpu_device *adev) > +{ > + adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; > + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0; > + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1; > + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL64_MEC_RING2; > + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL64_MEC_RING3; > + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL64_MEC_RING4; > + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5; > + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6; > + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7; > + adev->doorbell_index.userqueue_start = AMDGPU_DOORBELL64_USERQUEUE_START; > + adev->doorbell_index.userqueue_end = AMDGPU_DOORBELL64_USERQUEUE_END; > + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL64_GFX_RING0; > + adev->doorbell_index.sdma_engine0 = AMDGPU_DOORBELL64_sDMA_ENGINE0; > + adev->doorbell_index.sdma_engine1 = AMDGPU_DOORBELL64_sDMA_ENGINE1; > + adev->doorbell_index.ih = AMDGPU_DOORBELL64_IH; > + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_DOORBELL64_UVD_RING0_1; > + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_DOORBELL64_UVD_RING2_3; > + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_DOORBELL64_UVD_RING4_5; > + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_DOORBELL64_UVD_RING6_7; > + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_DOORBELL64_VCE_RING0_1; > + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3; > + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5; > + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7; > + /* In unit of dword doorbell */ > + adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1; > +} > + > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:00 ` [PATCH 2/7] drm/amdgpu: Vega10 doorbell index initialization Oak Zeng 2018-11-21 22:00 ` [PATCH 3/7] drm/amdgpu: Vega12 " Oak Zeng @ 2018-11-21 22:00 ` Oak Zeng [not found] ` <1542837620-13571-4-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:00 ` [PATCH 5/7] drm/amdgpu: Call doorbell index init on device initialization Oak Zeng ` (3 subsequent siblings) 6 siblings, 1 reply; 18+ messages in thread From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak v2: Use enum definition instead of hardcoded number Change-Id: Id64eb98f5b1c24b51eb2fd5a083086fc3515813d Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/vi.h | 2 +- drivers/gpu/drm/amd/amdgpu/vi_reg_init.c | 43 ++++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/vi_reg_init.c diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index 1cef9e1..ae29bf5 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce amdgpu-y += \ vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \ - vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o + vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o vi_reg_init.o # add DF block amdgpu-y += \ diff --git a/drivers/gpu/drm/amd/amdgpu/vi.h b/drivers/gpu/drm/amd/amdgpu/vi.h index 0429fe3..abcb52e 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.h +++ b/drivers/gpu/drm/amd/amdgpu/vi.h @@ -29,5 +29,5 @@ void vi_srbm_select(struct amdgpu_device *adev, u32 me, u32 pipe, u32 queue, u32 vmid); int vi_set_ip_blocks(struct amdgpu_device *adev); - +void vi_doorbell_index_init(struct amdgpu_device *adev); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c new file mode 100644 index 0000000..cdeb88d --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c @@ -0,0 +1,43 @@ +/* + * Copyright 2018 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "amdgpu.h" + +void vi_doorbell_index_init(struct amdgpu_device *adev) +{ + adev->doorbell_index.kiq = AMDGPU_DOORBELL_KIQ; + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL_MEC_RING0; + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL_MEC_RING1; + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL_MEC_RING2; + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL_MEC_RING3; + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL_MEC_RING4; + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL_MEC_RING5; + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL_MEC_RING6; + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL_MEC_RING7; + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL_GFX_RING0; + adev->doorbell_index.sdma_engine0 = AMDGPU_DOORBELL_sDMA_ENGINE0; + adev->doorbell_index.sdma_engine1 = AMDGPU_DOORBELL_sDMA_ENGINE1; + adev->doorbell_index.ih = AMDGPU_DOORBELL_IH; + adev->doorbell_index.max_assignment = AMDGPU_DOORBELL_MAX_ASSIGNMENT; +} + -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <1542837620-13571-4-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 [not found] ` <1542837620-13571-4-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 22:40 ` Alex Deucher [not found] ` <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg@mail.gmail.com> 0 siblings, 1 reply; 18+ messages in thread From: Alex Deucher @ 2018-11-21 22:40 UTC (permalink / raw) To: ozeng-5C7GfCeVMHo; +Cc: Oak Zeng, amd-gfx list On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > v2: Use enum definition instead of hardcoded number > > Change-Id: Id64eb98f5b1c24b51eb2fd5a083086fc3515813d > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> Since this covers cik and vi, maybe call it cik_doorbell_index_init() or legacy_doorbell_index_init()? Alex > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- > drivers/gpu/drm/amd/amdgpu/vi.h | 2 +- > drivers/gpu/drm/amd/amdgpu/vi_reg_init.c | 43 ++++++++++++++++++++++++++++++++ > 3 files changed, 45 insertions(+), 2 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index 1cef9e1..ae29bf5 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce > > amdgpu-y += \ > vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \ > - vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o > + vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o vi_reg_init.o > > # add DF block > amdgpu-y += \ > diff --git a/drivers/gpu/drm/amd/amdgpu/vi.h b/drivers/gpu/drm/amd/amdgpu/vi.h > index 0429fe3..abcb52e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vi.h > +++ b/drivers/gpu/drm/amd/amdgpu/vi.h > @@ -29,5 +29,5 @@ > void vi_srbm_select(struct amdgpu_device *adev, > u32 me, u32 pipe, u32 queue, u32 vmid); > int vi_set_ip_blocks(struct amdgpu_device *adev); > - > +void vi_doorbell_index_init(struct amdgpu_device *adev); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > new file mode 100644 > index 0000000..cdeb88d > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > @@ -0,0 +1,43 @@ > +/* > + * Copyright 2018 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + */ > + > +#include "amdgpu.h" > + > +void vi_doorbell_index_init(struct amdgpu_device *adev) > +{ > + adev->doorbell_index.kiq = AMDGPU_DOORBELL_KIQ; > + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL_MEC_RING0; > + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL_MEC_RING1; > + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL_MEC_RING2; > + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL_MEC_RING3; > + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL_MEC_RING4; > + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL_MEC_RING5; > + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL_MEC_RING6; > + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL_MEC_RING7; > + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL_GFX_RING0; > + adev->doorbell_index.sdma_engine0 = AMDGPU_DOORBELL_sDMA_ENGINE0; > + adev->doorbell_index.sdma_engine1 = AMDGPU_DOORBELL_sDMA_ENGINE1; > + adev->doorbell_index.ih = AMDGPU_DOORBELL_IH; > + adev->doorbell_index.max_assignment = AMDGPU_DOORBELL_MAX_ASSIGNMENT; > +} > + > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
[parent not found: <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg@mail.gmail.com>]
[parent not found: <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* RE: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 [not found] ` <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2018-11-26 17:20 ` Zeng, Oak [not found] ` <BN6PR12MB165126A9513105183F63194880D70-/b2+HYfkarRSqX7PDniLCgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org> 0 siblings, 1 reply; 18+ messages in thread From: Zeng, Oak @ 2018-11-26 17:20 UTC (permalink / raw) To: Alex Deucher; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Ok, I can change it legacy_doorbell_index_init(). I will keep this function in vi.c. The reason I don't want to put it in cik.c is cik.c is only compiled optionally. Another thing I want to know is, my understanding is si doesn't use doorbell, does it? thanks, Oak -----Original Message----- From: Alex Deucher <alexdeucher@gmail.com> Sent: Sunday, November 25, 2018 1:46 PM To: Zeng, Oak <Oak.Zeng@amd.com> Subject: Fwd: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 ---------- Forwarded message --------- From: Alex Deucher <alexdeucher@gmail.com> Date: Wed, Nov 21, 2018 at 5:40 PM Subject: Re: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 To: <ozeng@amd.com> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>, Oak Zeng <Oak.Zeng@amd.com> On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > v2: Use enum definition instead of hardcoded number > > Change-Id: Id64eb98f5b1c24b51eb2fd5a083086fc3515813d > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> Since this covers cik and vi, maybe call it cik_doorbell_index_init() or legacy_doorbell_index_init()? Alex > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- > drivers/gpu/drm/amd/amdgpu/vi.h | 2 +- > drivers/gpu/drm/amd/amdgpu/vi_reg_init.c | 43 > ++++++++++++++++++++++++++++++++ > 3 files changed, 45 insertions(+), 2 deletions(-) create mode 100644 > drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile > b/drivers/gpu/drm/amd/amdgpu/Makefile > index 1cef9e1..ae29bf5 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o > gfx_v6_0.o si_ih.o si_dma.o dce > > amdgpu-y += \ > vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \ > - vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o > + vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o vi_reg_init.o > > # add DF block > amdgpu-y += \ > diff --git a/drivers/gpu/drm/amd/amdgpu/vi.h > b/drivers/gpu/drm/amd/amdgpu/vi.h index 0429fe3..abcb52e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vi.h > +++ b/drivers/gpu/drm/amd/amdgpu/vi.h > @@ -29,5 +29,5 @@ > void vi_srbm_select(struct amdgpu_device *adev, > u32 me, u32 pipe, u32 queue, u32 vmid); int > vi_set_ip_blocks(struct amdgpu_device *adev); > - > +void vi_doorbell_index_init(struct amdgpu_device *adev); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > new file mode 100644 > index 0000000..cdeb88d > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > @@ -0,0 +1,43 @@ > +/* > + * Copyright 2018 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person > +obtaining a > + * copy of this software and associated documentation files (the > +"Software"), > + * to deal in the Software without restriction, including without > +limitation > + * the rights to use, copy, modify, merge, publish, distribute, > +sublicense, > + * and/or sell copies of the Software, and to permit persons to whom > +the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be > +included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > +EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF > +MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT > +SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, > +DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR > +OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE > +OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + */ > + > +#include "amdgpu.h" > + > +void vi_doorbell_index_init(struct amdgpu_device *adev) { > + adev->doorbell_index.kiq = AMDGPU_DOORBELL_KIQ; > + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL_MEC_RING0; > + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL_MEC_RING1; > + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL_MEC_RING2; > + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL_MEC_RING3; > + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL_MEC_RING4; > + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL_MEC_RING5; > + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL_MEC_RING6; > + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL_MEC_RING7; > + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL_GFX_RING0; > + adev->doorbell_index.sdma_engine0 = AMDGPU_DOORBELL_sDMA_ENGINE0; > + adev->doorbell_index.sdma_engine1 = AMDGPU_DOORBELL_sDMA_ENGINE1; > + adev->doorbell_index.ih = AMDGPU_DOORBELL_IH; > + adev->doorbell_index.max_assignment = > +AMDGPU_DOORBELL_MAX_ASSIGNMENT; } > + > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
[parent not found: <BN6PR12MB165126A9513105183F63194880D70-/b2+HYfkarRSqX7PDniLCgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>]
* Re: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 [not found] ` <BN6PR12MB165126A9513105183F63194880D70-/b2+HYfkarRSqX7PDniLCgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org> @ 2018-11-26 18:05 ` Deucher, Alexander 0 siblings, 0 replies; 18+ messages in thread From: Deucher, Alexander @ 2018-11-26 18:05 UTC (permalink / raw) To: Zeng, Oak, Alex Deucher Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org [-- Attachment #1.1: Type: text/plain, Size: 6381 bytes --] Correct. SI does not use doorbells. Alex ________________________________ From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Zeng, Oak <Oak.Zeng-5C7GfCeVMHo@public.gmane.org> Sent: Monday, November 26, 2018 12:20:10 PM To: Alex Deucher Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Subject: RE: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 Ok, I can change it legacy_doorbell_index_init(). I will keep this function in vi.c. The reason I don't want to put it in cik.c is cik.c is only compiled optionally. Another thing I want to know is, my understanding is si doesn't use doorbell, does it? thanks, Oak -----Original Message----- From: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sent: Sunday, November 25, 2018 1:46 PM To: Zeng, Oak <Oak.Zeng-5C7GfCeVMHo@public.gmane.org> Subject: Fwd: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 ---------- Forwarded message --------- From: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Date: Wed, Nov 21, 2018 at 5:40 PM Subject: Re: [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 To: <ozeng-5C7GfCeVMHo@public.gmane.org> Cc: amd-gfx list <amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>, Oak Zeng <Oak.Zeng-urvtwAKJhsc@public.gmane.orgm> On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng-5C7GfCeVMHo@public.gmane.org> wrote: > > v2: Use enum definition instead of hardcoded number > > Change-Id: Id64eb98f5b1c24b51eb2fd5a083086fc3515813d > Signed-off-by: Oak Zeng <ozeng-5C7GfCeVMHo@public.gmane.org> > Suggested-by: Felix Kuehling <Felix.Kuehling-5C7GfCeVMHo@public.gmane.org> > Suggested-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org> Since this covers cik and vi, maybe call it cik_doorbell_index_init() or legacy_doorbell_index_init()? Alex > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- > drivers/gpu/drm/amd/amdgpu/vi.h | 2 +- > drivers/gpu/drm/amd/amdgpu/vi_reg_init.c | 43 > ++++++++++++++++++++++++++++++++ > 3 files changed, 45 insertions(+), 2 deletions(-) create mode 100644 > drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile > b/drivers/gpu/drm/amd/amdgpu/Makefile > index 1cef9e1..ae29bf5 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o > gfx_v6_0.o si_ih.o si_dma.o dce > > amdgpu-y += \ > vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \ > - vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o > + vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o vi_reg_init.o > > # add DF block > amdgpu-y += \ > diff --git a/drivers/gpu/drm/amd/amdgpu/vi.h > b/drivers/gpu/drm/amd/amdgpu/vi.h index 0429fe3..abcb52e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vi.h > +++ b/drivers/gpu/drm/amd/amdgpu/vi.h > @@ -29,5 +29,5 @@ > void vi_srbm_select(struct amdgpu_device *adev, > u32 me, u32 pipe, u32 queue, u32 vmid); int > vi_set_ip_blocks(struct amdgpu_device *adev); > - > +void vi_doorbell_index_init(struct amdgpu_device *adev); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > new file mode 100644 > index 0000000..cdeb88d > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/vi_reg_init.c > @@ -0,0 +1,43 @@ > +/* > + * Copyright 2018 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person > +obtaining a > + * copy of this software and associated documentation files (the > +"Software"), > + * to deal in the Software without restriction, including without > +limitation > + * the rights to use, copy, modify, merge, publish, distribute, > +sublicense, > + * and/or sell copies of the Software, and to permit persons to whom > +the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be > +included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > +EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF > +MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT > +SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, > +DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR > +OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE > +OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + */ > + > +#include "amdgpu.h" > + > +void vi_doorbell_index_init(struct amdgpu_device *adev) { > + adev->doorbell_index.kiq = AMDGPU_DOORBELL_KIQ; > + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL_MEC_RING0; > + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL_MEC_RING1; > + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL_MEC_RING2; > + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL_MEC_RING3; > + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL_MEC_RING4; > + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL_MEC_RING5; > + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL_MEC_RING6; > + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL_MEC_RING7; > + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL_GFX_RING0; > + adev->doorbell_index.sdma_engine0 = AMDGPU_DOORBELL_sDMA_ENGINE0; > + adev->doorbell_index.sdma_engine1 = AMDGPU_DOORBELL_sDMA_ENGINE1; > + adev->doorbell_index.ih = AMDGPU_DOORBELL_IH; > + adev->doorbell_index.max_assignment = > +AMDGPU_DOORBELL_MAX_ASSIGNMENT; } > + > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx [-- Attachment #1.2: Type: text/html, Size: 9602 bytes --] [-- Attachment #2: Type: text/plain, Size: 154 bytes --] _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 5/7] drm/amdgpu: Call doorbell index init on device initialization [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> ` (2 preceding siblings ...) 2018-11-21 22:00 ` [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 Oak Zeng @ 2018-11-21 22:00 ` Oak Zeng [not found] ` <1542837620-13571-5-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:00 ` [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition Oak Zeng ` (2 subsequent siblings) 6 siblings, 1 reply; 18+ messages in thread From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak Change-Id: I2f004bbbe2565035460686f4fc16e86b77a2a9b5 Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index cb06e68..a942a88 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -513,6 +513,13 @@ void amdgpu_device_pci_config_reset(struct amdgpu_device *adev) */ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) { + if (adev->asic_type < CHIP_VEGA10) + vi_doorbell_index_init(adev); + else if (adev->asic_type == CHIP_VEGA10) + vega10_doorbell_index_init(adev); + else + vega12_doorbell_index_init(adev); + /* No doorbell on SI hardware generation */ if (adev->asic_type < CHIP_BONAIRE) { adev->doorbell.base = 0; -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <1542837620-13571-5-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH 5/7] drm/amdgpu: Call doorbell index init on device initialization [not found] ` <1542837620-13571-5-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 22:38 ` Alex Deucher 0 siblings, 0 replies; 18+ messages in thread From: Alex Deucher @ 2018-11-21 22:38 UTC (permalink / raw) To: ozeng-5C7GfCeVMHo; +Cc: Oak Zeng, amd-gfx list On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > Change-Id: I2f004bbbe2565035460686f4fc16e86b77a2a9b5 > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> I think it would be cleaner to call this in the soc files directly (cik.c, vi.c, soc15.c in the set_ip_blocks() functions). It keeps the asic specific bits out of amdgpu_device.c. > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index cb06e68..a942a88 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -513,6 +513,13 @@ void amdgpu_device_pci_config_reset(struct amdgpu_device *adev) > */ > static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) > { > + if (adev->asic_type < CHIP_VEGA10) > + vi_doorbell_index_init(adev); > + else if (adev->asic_type == CHIP_VEGA10) > + vega10_doorbell_index_init(adev); > + else > + vega12_doorbell_index_init(adev); > + > /* No doorbell on SI hardware generation */ > if (adev->asic_type < CHIP_BONAIRE) { > adev->doorbell.base = 0; > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> ` (3 preceding siblings ...) 2018-11-21 22:00 ` [PATCH 5/7] drm/amdgpu: Call doorbell index init on device initialization Oak Zeng @ 2018-11-21 22:00 ` Oak Zeng [not found] ` <1542837620-13571-6-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:00 ` [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic Oak Zeng 2018-11-21 22:28 ` [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index Alex Deucher 6 siblings, 1 reply; 18+ messages in thread From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak Change-Id: Iffff84475efcfb482c474fccb133010abb5df5f4 Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 27 ++++++++------------------- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 +++++----- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 ++++---- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 25 +++++++++---------------- drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 2 +- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +- 12 files changed, 36 insertions(+), 54 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c index 1c1fed6..d693b804 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -181,25 +181,14 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) * process in case of 64-bit doorbells so we * can use each doorbell assignment twice. */ - if (adev->asic_type == CHIP_VEGA10) { - gpu_resources.sdma_doorbell[0][i] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + (i >> 1); - gpu_resources.sdma_doorbell[0][i+1] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1); - gpu_resources.sdma_doorbell[1][i] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + (i >> 1); - gpu_resources.sdma_doorbell[1][i+1] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1); - } else { - gpu_resources.sdma_doorbell[0][i] = - AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1); - gpu_resources.sdma_doorbell[0][i+1] = - AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1); - gpu_resources.sdma_doorbell[1][i] = - AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1); - gpu_resources.sdma_doorbell[1][i+1] = - AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1); - } + gpu_resources.sdma_doorbell[0][i] = + adev->doorbell_index.sdma_engine0 + (i >> 1); + gpu_resources.sdma_doorbell[0][i+1] = + adev->doorbell_index.sdma_engine0 + 0x200 + (i >> 1); + gpu_resources.sdma_doorbell[1][i] = + adev->doorbell_index.sdma_engine1 + (i >> 1); + gpu_resources.sdma_doorbell[1][i+1] = + adev->doorbell_index.sdma_engine1 + 0x200 + (i >> 1); } /* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for * SDMA, IH and VCN. So don't use them for the CP. diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index a942a88..3ffd8f5 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -537,7 +537,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) adev->doorbell.size = pci_resource_len(adev->pdev, 2); adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32), - AMDGPU_DOORBELL_MAX_ASSIGNMENT+1); + adev->doorbell_index.max_assignment+1); if (adev->doorbell.num_doorbells == 0) return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 6a70c0b..97a60da 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -250,7 +250,7 @@ int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, ring->adev = NULL; ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_KIQ; + ring->doorbell_index = adev->doorbell_index.kiq; r = amdgpu_gfx_kiq_acquire(adev, ring); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c index f467b9b..3a9fb60 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c @@ -4363,7 +4363,7 @@ static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id; + ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 77cac0e..1454fc3 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -1890,7 +1890,7 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id; + ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + (ring_id * GFX8_MEC_HPD_SIZE); sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); @@ -2001,7 +2001,7 @@ static int gfx_v8_0_sw_init(void *handle) /* no gfx doorbells on iceland */ if (adev->asic_type != CHIP_TOPAZ) { ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_GFX_RING0; + ring->doorbell_index = adev->doorbell_index.gfx_ring0; } r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, @@ -4215,7 +4215,7 @@ static void gfx_v8_0_set_cpg_door_bell(struct amdgpu_device *adev, struct amdgpu tmp = REG_SET_FIELD(0, CP_RB_DOORBELL_RANGE_LOWER, DOORBELL_RANGE_LOWER, - AMDGPU_DOORBELL_GFX_RING0); + adev->doorbell_index.gfx_ring0); WREG32(mmCP_RB_DOORBELL_RANGE_LOWER, tmp); WREG32(mmCP_RB_DOORBELL_RANGE_UPPER, @@ -4644,8 +4644,8 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring) static void gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev) { if (adev->asic_type > CHIP_TONGA) { - WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2); - WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2); + WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2); + WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, adev->doorbell_index.mec_ring7 << 2); } /* enable doorbells */ WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1); diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index e409fbf..af8ccb0 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -1566,7 +1566,7 @@ static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = (AMDGPU_DOORBELL64_MEC_RING0 + ring_id) << 1; + ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1; ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + (ring_id * GFX9_MEC_HPD_SIZE); sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); @@ -1655,7 +1655,7 @@ static int gfx_v9_0_sw_init(void *handle) else sprintf(ring->name, "gfx_%d", i); ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL64_GFX_RING0 << 1; + ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1; r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP); if (r) @@ -2981,9 +2981,9 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring) /* enable the doorbell if requested */ if (ring->use_doorbell) { WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER, - (AMDGPU_DOORBELL64_KIQ *2) << 2); + (adev->doorbell_index.kiq * 2) << 2); WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER, - (AMDGPU_DOORBELL64_USERQUEUE_END * 2) << 2); + (adev->doorbell_index.userqueue_end * 2) << 2); } WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index b6a25f9..1bccc5f 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -1146,7 +1146,7 @@ static int sdma_v3_0_sw_init(void *handle) if (!amdgpu_sriov_vf(adev)) { ring->use_doorbell = true; ring->doorbell_index = (i == 0) ? - AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1; + adev->doorbell_index.sdma_engine0 : adev->doorbell_index.sdma_engine1; } else { ring->use_pollmem = true; } diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index e6cb2c3..61507ad 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -1517,15 +1517,13 @@ static int sdma_v4_0_sw_init(void *handle) ring->ring_obj = NULL; ring->use_doorbell = true; + DRM_INFO("use_doorbell being set to: [%s]\n", + ring->use_doorbell?"true":"false"); + /* doorbell size is 2 dwords, get DWORD offset */ - if (adev->asic_type == CHIP_VEGA10) - ring->doorbell_index = (i == 0) ? - (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1); - else - ring->doorbell_index = (i == 0) ? - (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); + ring->doorbell_index = (i == 0) ? + (adev->doorbell_index.sdma_engine0 << 1) + : (adev->doorbell_index.sdma_engine1 << 1); sprintf(ring->name, "sdma%d", i); r = amdgpu_ring_init(adev, ring, 1024, @@ -1544,14 +1542,9 @@ static int sdma_v4_0_sw_init(void *handle) /* paging queue use same doorbell index/routing as gfx queue * with 0x400 (4096 dwords) offset on second doorbell page */ - if (adev->asic_type == CHIP_VEGA10) - ring->doorbell_index = (i == 0) ? - (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1); - else - ring->doorbell_index = (i == 0) ? - (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); + ring->doorbell_index = (i == 0) ? + (adev->doorbell_index.sdma_engine0 << 1) + : (adev->doorbell_index.sdma_engine1 << 1); ring->doorbell_index += 0x400; sprintf(ring->name, "page%d", i); diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c index 3abffd0..dcdbb4d 100644 --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c @@ -322,7 +322,7 @@ static int tonga_ih_sw_init(void *handle) return r; adev->irq.ih.use_doorbell = true; - adev->irq.ih.doorbell_index = AMDGPU_DOORBELL_IH; + adev->irq.ih.doorbell_index = adev->doorbell_index.ih; r = amdgpu_irq_init(adev); diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c index 8a45959..3680a01 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c @@ -455,9 +455,9 @@ static int uvd_v7_0_sw_init(void *handle) * sriov, so set unused location for other unused rings. */ if (i == 0) - ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING0_1 * 2; + ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2; else - ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING2_3 * 2 + 1; + ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1; } r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c index 0054ba1..9fb34b7 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c @@ -466,9 +466,9 @@ static int vce_v4_0_sw_init(void *handle) * so set unused location for other unused rings. */ if (i == 0) - ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING0_1 * 2; + ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2; else - ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING2_3 * 2 + 1; + ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1; } r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c index a0fda6f..d84b687 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c @@ -385,7 +385,7 @@ static int vega10_ih_sw_init(void *handle) return r; adev->irq.ih.use_doorbell = true; - adev->irq.ih.doorbell_index = AMDGPU_DOORBELL64_IH << 1; + adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1; r = amdgpu_irq_init(adev); -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <1542837620-13571-6-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition [not found] ` <1542837620-13571-6-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 22:35 ` Alex Deucher 0 siblings, 0 replies; 18+ messages in thread From: Alex Deucher @ 2018-11-21 22:35 UTC (permalink / raw) To: ozeng-5C7GfCeVMHo; +Cc: Oak Zeng, amd-gfx list On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > Change-Id: Iffff84475efcfb482c474fccb133010abb5df5f4 > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 27 ++++++++------------------- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +- > drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +- > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 +++++----- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 ++++---- > drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 +- > drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 25 +++++++++---------------- > drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 2 +- > drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++-- > drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++-- > drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +- > 12 files changed, 36 insertions(+), 54 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c > index 1c1fed6..d693b804 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c > @@ -181,25 +181,14 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) > * process in case of 64-bit doorbells so we > * can use each doorbell assignment twice. > */ > - if (adev->asic_type == CHIP_VEGA10) { > - gpu_resources.sdma_doorbell[0][i] = > - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + (i >> 1); > - gpu_resources.sdma_doorbell[0][i+1] = > - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1); > - gpu_resources.sdma_doorbell[1][i] = > - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + (i >> 1); > - gpu_resources.sdma_doorbell[1][i+1] = > - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1); > - } else { > - gpu_resources.sdma_doorbell[0][i] = > - AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1); > - gpu_resources.sdma_doorbell[0][i+1] = > - AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1); > - gpu_resources.sdma_doorbell[1][i] = > - AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1); > - gpu_resources.sdma_doorbell[1][i+1] = > - AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1); > - } > + gpu_resources.sdma_doorbell[0][i] = > + adev->doorbell_index.sdma_engine0 + (i >> 1); > + gpu_resources.sdma_doorbell[0][i+1] = > + adev->doorbell_index.sdma_engine0 + 0x200 + (i >> 1); > + gpu_resources.sdma_doorbell[1][i] = > + adev->doorbell_index.sdma_engine1 + (i >> 1); > + gpu_resources.sdma_doorbell[1][i+1] = > + adev->doorbell_index.sdma_engine1 + 0x200 + (i >> 1); > } > /* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for > * SDMA, IH and VCN. So don't use them for the CP. > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index a942a88..3ffd8f5 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -537,7 +537,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) > adev->doorbell.size = pci_resource_len(adev->pdev, 2); > > adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32), > - AMDGPU_DOORBELL_MAX_ASSIGNMENT+1); > + adev->doorbell_index.max_assignment+1); > if (adev->doorbell.num_doorbells == 0) > return -EINVAL; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c > index 6a70c0b..97a60da 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c > @@ -250,7 +250,7 @@ int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, > ring->adev = NULL; > ring->ring_obj = NULL; > ring->use_doorbell = true; > - ring->doorbell_index = AMDGPU_DOORBELL_KIQ; > + ring->doorbell_index = adev->doorbell_index.kiq; > > r = amdgpu_gfx_kiq_acquire(adev, ring); > if (r) > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > index f467b9b..3a9fb60 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > @@ -4363,7 +4363,7 @@ static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, > > ring->ring_obj = NULL; > ring->use_doorbell = true; > - ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id; > + ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; > sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); > > irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > index 77cac0e..1454fc3 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > @@ -1890,7 +1890,7 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, > > ring->ring_obj = NULL; > ring->use_doorbell = true; > - ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id; > + ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; > ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr > + (ring_id * GFX8_MEC_HPD_SIZE); > sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); > @@ -2001,7 +2001,7 @@ static int gfx_v8_0_sw_init(void *handle) > /* no gfx doorbells on iceland */ > if (adev->asic_type != CHIP_TOPAZ) { > ring->use_doorbell = true; > - ring->doorbell_index = AMDGPU_DOORBELL_GFX_RING0; > + ring->doorbell_index = adev->doorbell_index.gfx_ring0; > } > > r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, > @@ -4215,7 +4215,7 @@ static void gfx_v8_0_set_cpg_door_bell(struct amdgpu_device *adev, struct amdgpu > > tmp = REG_SET_FIELD(0, CP_RB_DOORBELL_RANGE_LOWER, > DOORBELL_RANGE_LOWER, > - AMDGPU_DOORBELL_GFX_RING0); > + adev->doorbell_index.gfx_ring0); > WREG32(mmCP_RB_DOORBELL_RANGE_LOWER, tmp); > > WREG32(mmCP_RB_DOORBELL_RANGE_UPPER, > @@ -4644,8 +4644,8 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring) > static void gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev) > { > if (adev->asic_type > CHIP_TONGA) { > - WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2); > - WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2); > + WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2); > + WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, adev->doorbell_index.mec_ring7 << 2); > } > /* enable doorbells */ > WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1); > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > index e409fbf..af8ccb0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > @@ -1566,7 +1566,7 @@ static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, > > ring->ring_obj = NULL; > ring->use_doorbell = true; > - ring->doorbell_index = (AMDGPU_DOORBELL64_MEC_RING0 + ring_id) << 1; > + ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1; > ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr > + (ring_id * GFX9_MEC_HPD_SIZE); > sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); > @@ -1655,7 +1655,7 @@ static int gfx_v9_0_sw_init(void *handle) > else > sprintf(ring->name, "gfx_%d", i); > ring->use_doorbell = true; > - ring->doorbell_index = AMDGPU_DOORBELL64_GFX_RING0 << 1; > + ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1; > r = amdgpu_ring_init(adev, ring, 1024, > &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP); > if (r) > @@ -2981,9 +2981,9 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring) > /* enable the doorbell if requested */ > if (ring->use_doorbell) { > WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER, > - (AMDGPU_DOORBELL64_KIQ *2) << 2); > + (adev->doorbell_index.kiq * 2) << 2); > WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER, > - (AMDGPU_DOORBELL64_USERQUEUE_END * 2) << 2); > + (adev->doorbell_index.userqueue_end * 2) << 2); > } > > WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > index b6a25f9..1bccc5f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > @@ -1146,7 +1146,7 @@ static int sdma_v3_0_sw_init(void *handle) > if (!amdgpu_sriov_vf(adev)) { > ring->use_doorbell = true; > ring->doorbell_index = (i == 0) ? > - AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1; > + adev->doorbell_index.sdma_engine0 : adev->doorbell_index.sdma_engine1; > } else { > ring->use_pollmem = true; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c > index e6cb2c3..61507ad 100644 > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c > @@ -1517,15 +1517,13 @@ static int sdma_v4_0_sw_init(void *handle) > ring->ring_obj = NULL; > ring->use_doorbell = true; > > + DRM_INFO("use_doorbell being set to: [%s]\n", > + ring->use_doorbell?"true":"false"); > + > /* doorbell size is 2 dwords, get DWORD offset */ > - if (adev->asic_type == CHIP_VEGA10) > - ring->doorbell_index = (i == 0) ? > - (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1) > - : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1); > - else > - ring->doorbell_index = (i == 0) ? > - (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) > - : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); > + ring->doorbell_index = (i == 0) ? > + (adev->doorbell_index.sdma_engine0 << 1) > + : (adev->doorbell_index.sdma_engine1 << 1); > > sprintf(ring->name, "sdma%d", i); > r = amdgpu_ring_init(adev, ring, 1024, > @@ -1544,14 +1542,9 @@ static int sdma_v4_0_sw_init(void *handle) > /* paging queue use same doorbell index/routing as gfx queue > * with 0x400 (4096 dwords) offset on second doorbell page > */ > - if (adev->asic_type == CHIP_VEGA10) > - ring->doorbell_index = (i == 0) ? > - (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1) > - : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1); > - else > - ring->doorbell_index = (i == 0) ? > - (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) > - : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); > + ring->doorbell_index = (i == 0) ? > + (adev->doorbell_index.sdma_engine0 << 1) > + : (adev->doorbell_index.sdma_engine1 << 1); > ring->doorbell_index += 0x400; > > sprintf(ring->name, "page%d", i); > diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > index 3abffd0..dcdbb4d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > @@ -322,7 +322,7 @@ static int tonga_ih_sw_init(void *handle) > return r; > > adev->irq.ih.use_doorbell = true; > - adev->irq.ih.doorbell_index = AMDGPU_DOORBELL_IH; > + adev->irq.ih.doorbell_index = adev->doorbell_index.ih; > > r = amdgpu_irq_init(adev); > > diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c > index 8a45959..3680a01 100644 > --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c > @@ -455,9 +455,9 @@ static int uvd_v7_0_sw_init(void *handle) > * sriov, so set unused location for other unused rings. > */ > if (i == 0) > - ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING0_1 * 2; > + ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2; > else > - ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING2_3 * 2 + 1; > + ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1; > } > r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0); > if (r) > diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c > index 0054ba1..9fb34b7 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c > @@ -466,9 +466,9 @@ static int vce_v4_0_sw_init(void *handle) > * so set unused location for other unused rings. > */ > if (i == 0) > - ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING0_1 * 2; > + ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2; > else > - ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING2_3 * 2 + 1; > + ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1; > } > r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); > if (r) > diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c > index a0fda6f..d84b687 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c > @@ -385,7 +385,7 @@ static int vega10_ih_sw_init(void *handle) > return r; > > adev->irq.ih.use_doorbell = true; > - adev->irq.ih.doorbell_index = AMDGPU_DOORBELL64_IH << 1; > + adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1; > > r = amdgpu_irq_init(adev); > > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> ` (4 preceding siblings ...) 2018-11-21 22:00 ` [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition Oak Zeng @ 2018-11-21 22:00 ` Oak Zeng [not found] ` <1542837620-13571-7-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:28 ` [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index Alex Deucher 6 siblings, 1 reply; 18+ messages in thread From: Oak Zeng @ 2018-11-21 22:00 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak v2: Use enum definition instead of hardcoded value Change-Id: I04d22fb717ac50483c0835f160a2e860e344f358 Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 ++++++++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++- drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 33 ++++++++++++++++++ 4 files changed, 87 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index b7ee4ef..e4101b1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -392,6 +392,56 @@ struct amdgpu_doorbell { u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */ }; +typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT +{ + /* Compute + GFX: 0~255 */ + AMDGPU_VEGA20_DOORBELL_KIQ = 0x000, + AMDGPU_VEGA20_DOORBELL_HIQ = 0x001, + AMDGPU_VEGA20_DOORBELL_DIQ = 0x002, + AMDGPU_VEGA20_DOORBELL_MEC_RING0 = 0x003, + AMDGPU_VEGA20_DOORBELL_MEC_RING1 = 0x004, + AMDGPU_VEGA20_DOORBELL_MEC_RING2 = 0x005, + AMDGPU_VEGA20_DOORBELL_MEC_RING3 = 0x006, + AMDGPU_VEGA20_DOORBELL_MEC_RING4 = 0x007, + AMDGPU_VEGA20_DOORBELL_MEC_RING5 = 0x008, + AMDGPU_VEGA20_DOORBELL_MEC_RING6 = 0x009, + AMDGPU_VEGA20_DOORBELL_MEC_RING7 = 0x00A, + AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B, + AMDGPU_VEGA20_DOORBELL_USERQUEUE_END = 0x08A, + AMDGPU_VEGA20_DOORBELL_GFX_RING0 = 0x08B, + /* SDMA:256~335*/ + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0 = 0x100, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1 = 0x10A, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2 = 0x114, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3 = 0x11E, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4 = 0x128, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5 = 0x132, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6 = 0x13C, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7 = 0x146, + /* IH: 376~391 */ + AMDGPU_VEGA20_DOORBELL_IH = 0x178, + /* MMSCH: 392~407 + * overlap the doorbell assignment with VCN as they are mutually exclusive + * VCE engine's doorbell is 32 bit and two VCE ring share one QWORD + */ + AMDGPU_VEGA20_DOORBELL64_VCN0_1 = 0x188, /* lower 32 bits for VNC0 and upper 32 bits for VNC1 */ + AMDGPU_VEGA20_DOORBELL64_VCN2_3 = 0x189, + AMDGPU_VEGA20_DOORBELL64_VCN4_5 = 0x18A, + AMDGPU_VEGA20_DOORBELL64_VCN6_7 = 0x18B, + + AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188, + AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3 = 0x189, + AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5 = 0x18A, + AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7 = 0x18B, + + AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1 = 0x18C, + AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3 = 0x18D, + AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5 = 0x18E, + AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7 = 0x18F, + AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT = 0x18F, + AMDGPU_VEGA20_DOORBELL_INVALID = 0xFFFF +} AMDGPU_VEGA20_DOORBELL_ASSIGNMENT; + /* * 64bit doorbell, offset are in QWORD, occupy 2KB doorbell space */ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 3ffd8f5..19f2149 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -517,8 +517,10 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) vi_doorbell_index_init(adev); else if (adev->asic_type == CHIP_VEGA10) vega10_doorbell_index_init(adev); - else + else if (adev->asic_type == CHIP_VEGA12 || adev->asic_type == CHIP_RAVEN) vega12_doorbell_index_init(adev); + else + vega20_doorbell_index_init(adev); /* No doorbell on SI hardware generation */ if (adev->asic_type < CHIP_BONAIRE) { diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h index 939c0e8..6ba0d26 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h @@ -60,4 +60,5 @@ int vega20_reg_base_init(struct amdgpu_device *adev); void vega10_doorbell_index_init(struct amdgpu_device *adev); void vega12_doorbell_index_init(struct amdgpu_device *adev); +void vega20_doorbell_index_init(struct amdgpu_device *adev); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c index d13fc4f..edce413 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c @@ -54,4 +54,37 @@ int vega20_reg_base_init(struct amdgpu_device *adev) return 0; } +void vega20_doorbell_index_init(struct amdgpu_device *adev) +{ + adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; + adev->doorbell_index.mec_ring0 = AMDGPU_VEGA20_DOORBELL_MEC_RING0; + adev->doorbell_index.mec_ring1 = AMDGPU_VEGA20_DOORBELL_MEC_RING1; + adev->doorbell_index.mec_ring2 = AMDGPU_VEGA20_DOORBELL_MEC_RING2; + adev->doorbell_index.mec_ring3 = AMDGPU_VEGA20_DOORBELL_MEC_RING3; + adev->doorbell_index.mec_ring4 = AMDGPU_VEGA20_DOORBELL_MEC_RING4; + adev->doorbell_index.mec_ring5 = AMDGPU_VEGA20_DOORBELL_MEC_RING5; + adev->doorbell_index.mec_ring6 = AMDGPU_VEGA20_DOORBELL_MEC_RING6; + adev->doorbell_index.mec_ring7 = AMDGPU_VEGA20_DOORBELL_MEC_RING7; + adev->doorbell_index.userqueue_start = AMDGPU_VEGA20_DOORBELL_USERQUEUE_START; + adev->doorbell_index.userqueue_end = AMDGPU_VEGA20_DOORBELL_USERQUEUE_END; + adev->doorbell_index.gfx_ring0 = AMDGPU_VEGA20_DOORBELL_GFX_RING0; + adev->doorbell_index.sdma_engine0 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0; + adev->doorbell_index.sdma_engine1 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1; + adev->doorbell_index.sdma_engine2 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2; + adev->doorbell_index.sdma_engine3 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3; + adev->doorbell_index.sdma_engine4 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4; + adev->doorbell_index.sdma_engine5 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5; + adev->doorbell_index.sdma_engine6 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6; + adev->doorbell_index.sdma_engine7 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7; + adev->doorbell_index.ih = AMDGPU_VEGA20_DOORBELL_IH; + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1; + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3; + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5; + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7; + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1; + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3; + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5; + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7; + adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1; +} -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <1542837620-13571-7-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic [not found] ` <1542837620-13571-7-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 22:34 ` Alex Deucher 2018-11-22 19:19 ` Zeng, Oak 1 sibling, 0 replies; 18+ messages in thread From: Alex Deucher @ 2018-11-21 22:34 UTC (permalink / raw) To: ozeng-5C7GfCeVMHo; +Cc: Oak Zeng, amd-gfx list On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > v2: Use enum definition instead of hardcoded value > > Change-Id: I04d22fb717ac50483c0835f160a2e860e344f358 > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> This patch should come before patch 5 so we update all of the asics before we switch to using the new interface. Alex > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 ++++++++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++- > drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + > drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 33 ++++++++++++++++++ > 4 files changed, 87 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index b7ee4ef..e4101b1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -392,6 +392,56 @@ struct amdgpu_doorbell { > u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */ > }; > > +typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT > +{ > + /* Compute + GFX: 0~255 */ > + AMDGPU_VEGA20_DOORBELL_KIQ = 0x000, > + AMDGPU_VEGA20_DOORBELL_HIQ = 0x001, > + AMDGPU_VEGA20_DOORBELL_DIQ = 0x002, > + AMDGPU_VEGA20_DOORBELL_MEC_RING0 = 0x003, > + AMDGPU_VEGA20_DOORBELL_MEC_RING1 = 0x004, > + AMDGPU_VEGA20_DOORBELL_MEC_RING2 = 0x005, > + AMDGPU_VEGA20_DOORBELL_MEC_RING3 = 0x006, > + AMDGPU_VEGA20_DOORBELL_MEC_RING4 = 0x007, > + AMDGPU_VEGA20_DOORBELL_MEC_RING5 = 0x008, > + AMDGPU_VEGA20_DOORBELL_MEC_RING6 = 0x009, > + AMDGPU_VEGA20_DOORBELL_MEC_RING7 = 0x00A, > + AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B, > + AMDGPU_VEGA20_DOORBELL_USERQUEUE_END = 0x08A, > + AMDGPU_VEGA20_DOORBELL_GFX_RING0 = 0x08B, > + /* SDMA:256~335*/ > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0 = 0x100, > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1 = 0x10A, > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2 = 0x114, > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3 = 0x11E, > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4 = 0x128, > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5 = 0x132, > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6 = 0x13C, > + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7 = 0x146, > + /* IH: 376~391 */ > + AMDGPU_VEGA20_DOORBELL_IH = 0x178, > + /* MMSCH: 392~407 > + * overlap the doorbell assignment with VCN as they are mutually exclusive > + * VCE engine's doorbell is 32 bit and two VCE ring share one QWORD > + */ > + AMDGPU_VEGA20_DOORBELL64_VCN0_1 = 0x188, /* lower 32 bits for VNC0 and upper 32 bits for VNC1 */ > + AMDGPU_VEGA20_DOORBELL64_VCN2_3 = 0x189, > + AMDGPU_VEGA20_DOORBELL64_VCN4_5 = 0x18A, > + AMDGPU_VEGA20_DOORBELL64_VCN6_7 = 0x18B, > + > + AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188, > + AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3 = 0x189, > + AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5 = 0x18A, > + AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7 = 0x18B, > + > + AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1 = 0x18C, > + AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3 = 0x18D, > + AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5 = 0x18E, > + AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7 = 0x18F, > + AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT = 0x18F, > + AMDGPU_VEGA20_DOORBELL_INVALID = 0xFFFF > +} AMDGPU_VEGA20_DOORBELL_ASSIGNMENT; > + > /* > * 64bit doorbell, offset are in QWORD, occupy 2KB doorbell space > */ > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index 3ffd8f5..19f2149 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -517,8 +517,10 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) > vi_doorbell_index_init(adev); > else if (adev->asic_type == CHIP_VEGA10) > vega10_doorbell_index_init(adev); > - else > + else if (adev->asic_type == CHIP_VEGA12 || adev->asic_type == CHIP_RAVEN) > vega12_doorbell_index_init(adev); > + else > + vega20_doorbell_index_init(adev); > > /* No doorbell on SI hardware generation */ > if (adev->asic_type < CHIP_BONAIRE) { > diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h > index 939c0e8..6ba0d26 100644 > --- a/drivers/gpu/drm/amd/amdgpu/soc15.h > +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h > @@ -60,4 +60,5 @@ int vega20_reg_base_init(struct amdgpu_device *adev); > > void vega10_doorbell_index_init(struct amdgpu_device *adev); > void vega12_doorbell_index_init(struct amdgpu_device *adev); > +void vega20_doorbell_index_init(struct amdgpu_device *adev); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c > index d13fc4f..edce413 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c > +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c > @@ -54,4 +54,37 @@ int vega20_reg_base_init(struct amdgpu_device *adev) > return 0; > } > > +void vega20_doorbell_index_init(struct amdgpu_device *adev) > +{ > + adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; > + adev->doorbell_index.mec_ring0 = AMDGPU_VEGA20_DOORBELL_MEC_RING0; > + adev->doorbell_index.mec_ring1 = AMDGPU_VEGA20_DOORBELL_MEC_RING1; > + adev->doorbell_index.mec_ring2 = AMDGPU_VEGA20_DOORBELL_MEC_RING2; > + adev->doorbell_index.mec_ring3 = AMDGPU_VEGA20_DOORBELL_MEC_RING3; > + adev->doorbell_index.mec_ring4 = AMDGPU_VEGA20_DOORBELL_MEC_RING4; > + adev->doorbell_index.mec_ring5 = AMDGPU_VEGA20_DOORBELL_MEC_RING5; > + adev->doorbell_index.mec_ring6 = AMDGPU_VEGA20_DOORBELL_MEC_RING6; > + adev->doorbell_index.mec_ring7 = AMDGPU_VEGA20_DOORBELL_MEC_RING7; > + adev->doorbell_index.userqueue_start = AMDGPU_VEGA20_DOORBELL_USERQUEUE_START; > + adev->doorbell_index.userqueue_end = AMDGPU_VEGA20_DOORBELL_USERQUEUE_END; > + adev->doorbell_index.gfx_ring0 = AMDGPU_VEGA20_DOORBELL_GFX_RING0; > + adev->doorbell_index.sdma_engine0 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0; > + adev->doorbell_index.sdma_engine1 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1; > + adev->doorbell_index.sdma_engine2 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2; > + adev->doorbell_index.sdma_engine3 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3; > + adev->doorbell_index.sdma_engine4 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4; > + adev->doorbell_index.sdma_engine5 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5; > + adev->doorbell_index.sdma_engine6 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6; > + adev->doorbell_index.sdma_engine7 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7; > + adev->doorbell_index.ih = AMDGPU_VEGA20_DOORBELL_IH; > + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1; > + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3; > + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5; > + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7; > + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1; > + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3; > + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5; > + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7; > + adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1; > +} > > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic [not found] ` <1542837620-13571-7-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> 2018-11-21 22:34 ` Alex Deucher @ 2018-11-22 19:19 ` Zeng, Oak 1 sibling, 0 replies; 18+ messages in thread From: Zeng, Oak @ 2018-11-22 19:19 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Hi Alex/Felix, This is a modified version based on your feedback. Do you have more comment? Regards, Oak -----Original Message----- From: Zeng, Oak <Oak.Zeng@amd.com> Sent: Wednesday, November 21, 2018 5:01 PM To: amd-gfx@lists.freedesktop.org Cc: Zeng, Oak <Oak.Zeng@amd.com> Subject: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic v2: Use enum definition instead of hardcoded value Change-Id: I04d22fb717ac50483c0835f160a2e860e344f358 Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 ++++++++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++- drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 33 ++++++++++++++++++ 4 files changed, 87 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index b7ee4ef..e4101b1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -392,6 +392,56 @@ struct amdgpu_doorbell { u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */ }; +typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT +{ + /* Compute + GFX: 0~255 */ + AMDGPU_VEGA20_DOORBELL_KIQ = 0x000, + AMDGPU_VEGA20_DOORBELL_HIQ = 0x001, + AMDGPU_VEGA20_DOORBELL_DIQ = 0x002, + AMDGPU_VEGA20_DOORBELL_MEC_RING0 = 0x003, + AMDGPU_VEGA20_DOORBELL_MEC_RING1 = 0x004, + AMDGPU_VEGA20_DOORBELL_MEC_RING2 = 0x005, + AMDGPU_VEGA20_DOORBELL_MEC_RING3 = 0x006, + AMDGPU_VEGA20_DOORBELL_MEC_RING4 = 0x007, + AMDGPU_VEGA20_DOORBELL_MEC_RING5 = 0x008, + AMDGPU_VEGA20_DOORBELL_MEC_RING6 = 0x009, + AMDGPU_VEGA20_DOORBELL_MEC_RING7 = 0x00A, + AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B, + AMDGPU_VEGA20_DOORBELL_USERQUEUE_END = 0x08A, + AMDGPU_VEGA20_DOORBELL_GFX_RING0 = 0x08B, + /* SDMA:256~335*/ + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0 = 0x100, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1 = 0x10A, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2 = 0x114, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3 = 0x11E, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4 = 0x128, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5 = 0x132, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6 = 0x13C, + AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7 = 0x146, + /* IH: 376~391 */ + AMDGPU_VEGA20_DOORBELL_IH = 0x178, + /* MMSCH: 392~407 + * overlap the doorbell assignment with VCN as they are mutually exclusive + * VCE engine's doorbell is 32 bit and two VCE ring share one QWORD + */ + AMDGPU_VEGA20_DOORBELL64_VCN0_1 = 0x188, /* lower 32 bits for VNC0 and upper 32 bits for VNC1 */ + AMDGPU_VEGA20_DOORBELL64_VCN2_3 = 0x189, + AMDGPU_VEGA20_DOORBELL64_VCN4_5 = 0x18A, + AMDGPU_VEGA20_DOORBELL64_VCN6_7 = 0x18B, + + AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188, + AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3 = 0x189, + AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5 = 0x18A, + AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7 = 0x18B, + + AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1 = 0x18C, + AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3 = 0x18D, + AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5 = 0x18E, + AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7 = 0x18F, + AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT = 0x18F, + AMDGPU_VEGA20_DOORBELL_INVALID = 0xFFFF +} AMDGPU_VEGA20_DOORBELL_ASSIGNMENT; + /* * 64bit doorbell, offset are in QWORD, occupy 2KB doorbell space */ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 3ffd8f5..19f2149 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -517,8 +517,10 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) vi_doorbell_index_init(adev); else if (adev->asic_type == CHIP_VEGA10) vega10_doorbell_index_init(adev); - else + else if (adev->asic_type == CHIP_VEGA12 || adev->asic_type == +CHIP_RAVEN) vega12_doorbell_index_init(adev); + else + vega20_doorbell_index_init(adev); /* No doorbell on SI hardware generation */ if (adev->asic_type < CHIP_BONAIRE) { diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h index 939c0e8..6ba0d26 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h @@ -60,4 +60,5 @@ int vega20_reg_base_init(struct amdgpu_device *adev); void vega10_doorbell_index_init(struct amdgpu_device *adev); void vega12_doorbell_index_init(struct amdgpu_device *adev); +void vega20_doorbell_index_init(struct amdgpu_device *adev); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c index d13fc4f..edce413 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c @@ -54,4 +54,37 @@ int vega20_reg_base_init(struct amdgpu_device *adev) return 0; } +void vega20_doorbell_index_init(struct amdgpu_device *adev) { + adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; + adev->doorbell_index.mec_ring0 = AMDGPU_VEGA20_DOORBELL_MEC_RING0; + adev->doorbell_index.mec_ring1 = AMDGPU_VEGA20_DOORBELL_MEC_RING1; + adev->doorbell_index.mec_ring2 = AMDGPU_VEGA20_DOORBELL_MEC_RING2; + adev->doorbell_index.mec_ring3 = AMDGPU_VEGA20_DOORBELL_MEC_RING3; + adev->doorbell_index.mec_ring4 = AMDGPU_VEGA20_DOORBELL_MEC_RING4; + adev->doorbell_index.mec_ring5 = AMDGPU_VEGA20_DOORBELL_MEC_RING5; + adev->doorbell_index.mec_ring6 = AMDGPU_VEGA20_DOORBELL_MEC_RING6; + adev->doorbell_index.mec_ring7 = AMDGPU_VEGA20_DOORBELL_MEC_RING7; + adev->doorbell_index.userqueue_start = AMDGPU_VEGA20_DOORBELL_USERQUEUE_START; + adev->doorbell_index.userqueue_end = AMDGPU_VEGA20_DOORBELL_USERQUEUE_END; + adev->doorbell_index.gfx_ring0 = AMDGPU_VEGA20_DOORBELL_GFX_RING0; + adev->doorbell_index.sdma_engine0 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0; + adev->doorbell_index.sdma_engine1 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1; + adev->doorbell_index.sdma_engine2 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2; + adev->doorbell_index.sdma_engine3 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3; + adev->doorbell_index.sdma_engine4 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4; + adev->doorbell_index.sdma_engine5 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5; + adev->doorbell_index.sdma_engine6 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6; + adev->doorbell_index.sdma_engine7 = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7; + adev->doorbell_index.ih = AMDGPU_VEGA20_DOORBELL_IH; + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1; + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3; + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5; + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7; + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1; + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3; + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5; + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7; + adev->doorbell_index.max_assignment = +AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1; } -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index [not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> ` (5 preceding siblings ...) 2018-11-21 22:00 ` [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic Oak Zeng @ 2018-11-21 22:28 ` Alex Deucher 6 siblings, 0 replies; 18+ messages in thread From: Alex Deucher @ 2018-11-21 22:28 UTC (permalink / raw) To: ozeng-5C7GfCeVMHo; +Cc: Oak Zeng, amd-gfx list On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@amd.com> wrote: > > This is a preparation work to make reserved doorbell index per device, > instead of using a global macro definition. By doing this, we can easily > change doorbell layout for future ASICs while not affecting ASICs in > production. > > Change-Id: If08e2bc9d0749748ed4083ba4eb32a4698763085 > Signed-off-by: Oak Zeng <ozeng@amd.com> > Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> > Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> It would be nice to move all of the doorbell related enums and this structure into amdgpu_doorbell.h, but that can be later cleanup. Alex > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 2c80453..b7ee4ef 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -813,6 +813,55 @@ struct amd_powerplay { > uint32_t pp_feature; > }; > > +/* Reserved doorbells for amdgpu (including multimedia). > + * KFD can use all the rest in the 2M doorbell bar. > + * For asic before vega10, doorbell is 32-bit, so the > + * index/offset is in dword. For vega10 and after, doorbell > + * can be 64-bit, so the index defined is in qword. > + */ > +struct amdgpu_doorbell_index { > + uint32_t kiq; > + uint32_t mec_ring0; > + uint32_t mec_ring1; > + uint32_t mec_ring2; > + uint32_t mec_ring3; > + uint32_t mec_ring4; > + uint32_t mec_ring5; > + uint32_t mec_ring6; > + uint32_t mec_ring7; > + uint32_t userqueue_start; > + uint32_t userqueue_end; > + uint32_t gfx_ring0; > + uint32_t sdma_engine0; > + uint32_t sdma_engine1; > + uint32_t sdma_engine2; > + uint32_t sdma_engine3; > + uint32_t sdma_engine4; > + uint32_t sdma_engine5; > + uint32_t sdma_engine6; > + uint32_t sdma_engine7; > + uint32_t ih; > + union { > + struct { > + uint32_t vcn_ring0_1; > + uint32_t vcn_ring2_3; > + uint32_t vcn_ring4_5; > + uint32_t vcn_ring6_7; > + } vcn; > + struct { > + uint32_t uvd_ring0_1; > + uint32_t uvd_ring2_3; > + uint32_t uvd_ring4_5; > + uint32_t uvd_ring6_7; > + uint32_t vce_ring0_1; > + uint32_t vce_ring2_3; > + uint32_t vce_ring4_5; > + uint32_t vce_ring6_7; > + } uvd_vce; > + }; > + uint32_t max_assignment; > +}; > + > #define AMDGPU_RESET_MAGIC_NUM 64 > struct amdgpu_device { > struct device *dev; > @@ -1026,6 +1075,7 @@ struct amdgpu_device { > unsigned long last_mm_index; > bool in_gpu_reset; > struct mutex lock_reset; > + struct amdgpu_doorbell_index doorbell_index; > }; > > static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev) > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index
@ 2018-11-21 15:52 Oak Zeng
[not found] ` <1542815518-8124-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 18+ messages in thread
From: Oak Zeng @ 2018-11-21 15:52 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak
This is a preparation work to make reserved doorbell index per device,
instead of using a global macro definition. By doing this, we can easily
change doorbell layout for future ASICs while not affecting ASICs in
production.
Change-Id: If08e2bc9d0749748ed4083ba4eb32a4698763085
Signed-off-by: Oak Zeng <ozeng@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 +++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2c80453..b7ee4ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -813,6 +813,55 @@ struct amd_powerplay {
uint32_t pp_feature;
};
+/* Reserved doorbells for amdgpu (including multimedia).
+ * KFD can use all the rest in the 2M doorbell bar.
+ * For asic before vega10, doorbell is 32-bit, so the
+ * index/offset is in dword. For vega10 and after, doorbell
+ * can be 64-bit, so the index defined is in qword.
+ */
+struct amdgpu_doorbell_index {
+ uint32_t kiq;
+ uint32_t mec_ring0;
+ uint32_t mec_ring1;
+ uint32_t mec_ring2;
+ uint32_t mec_ring3;
+ uint32_t mec_ring4;
+ uint32_t mec_ring5;
+ uint32_t mec_ring6;
+ uint32_t mec_ring7;
+ uint32_t userqueue_start;
+ uint32_t userqueue_end;
+ uint32_t gfx_ring0;
+ uint32_t sdma_engine0;
+ uint32_t sdma_engine1;
+ uint32_t sdma_engine2;
+ uint32_t sdma_engine3;
+ uint32_t sdma_engine4;
+ uint32_t sdma_engine5;
+ uint32_t sdma_engine6;
+ uint32_t sdma_engine7;
+ uint32_t ih;
+ union {
+ struct {
+ uint32_t vcn_ring0_1;
+ uint32_t vcn_ring2_3;
+ uint32_t vcn_ring4_5;
+ uint32_t vcn_ring6_7;
+ } vcn;
+ struct {
+ uint32_t uvd_ring0_1;
+ uint32_t uvd_ring2_3;
+ uint32_t uvd_ring4_5;
+ uint32_t uvd_ring6_7;
+ uint32_t vce_ring0_1;
+ uint32_t vce_ring2_3;
+ uint32_t vce_ring4_5;
+ uint32_t vce_ring6_7;
+ } uvd_vce;
+ };
+ uint32_t max_assignment;
+};
+
#define AMDGPU_RESET_MAGIC_NUM 64
struct amdgpu_device {
struct device *dev;
@@ -1026,6 +1075,7 @@ struct amdgpu_device {
unsigned long last_mm_index;
bool in_gpu_reset;
struct mutex lock_reset;
+ struct amdgpu_doorbell_index doorbell_index;
};
static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread[parent not found: <1542815518-8124-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>]
* [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition [not found] ` <1542815518-8124-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org> @ 2018-11-21 15:52 ` Oak Zeng 0 siblings, 0 replies; 18+ messages in thread From: Oak Zeng @ 2018-11-21 15:52 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zeng, Oak Also deleted doorbell index macro definition Change-Id: Iffff84475efcfb482c474fccb133010abb5df5f4 Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 106 ----------------------------- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 27 +++----- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 +-- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 +-- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 25 +++---- drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 2 +- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 +- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 +- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +- 13 files changed, 36 insertions(+), 160 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index b7ee4ef..5cbd67a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -363,27 +363,6 @@ void amdgpu_fence_slab_fini(void); /* * GPU doorbell structures, functions & helpers */ -typedef enum _AMDGPU_DOORBELL_ASSIGNMENT -{ - AMDGPU_DOORBELL_KIQ = 0x000, - AMDGPU_DOORBELL_HIQ = 0x001, - AMDGPU_DOORBELL_DIQ = 0x002, - AMDGPU_DOORBELL_MEC_RING0 = 0x010, - AMDGPU_DOORBELL_MEC_RING1 = 0x011, - AMDGPU_DOORBELL_MEC_RING2 = 0x012, - AMDGPU_DOORBELL_MEC_RING3 = 0x013, - AMDGPU_DOORBELL_MEC_RING4 = 0x014, - AMDGPU_DOORBELL_MEC_RING5 = 0x015, - AMDGPU_DOORBELL_MEC_RING6 = 0x016, - AMDGPU_DOORBELL_MEC_RING7 = 0x017, - AMDGPU_DOORBELL_GFX_RING0 = 0x020, - AMDGPU_DOORBELL_sDMA_ENGINE0 = 0x1E0, - AMDGPU_DOORBELL_sDMA_ENGINE1 = 0x1E1, - AMDGPU_DOORBELL_IH = 0x1E8, - AMDGPU_DOORBELL_MAX_ASSIGNMENT = 0x3FF, - AMDGPU_DOORBELL_INVALID = 0xFFFF -} AMDGPU_DOORBELL_ASSIGNMENT; - struct amdgpu_doorbell { /* doorbell mmio */ resource_size_t base; @@ -393,91 +372,6 @@ struct amdgpu_doorbell { }; /* - * 64bit doorbell, offset are in QWORD, occupy 2KB doorbell space - */ -typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT -{ - /* - * All compute related doorbells: kiq, hiq, diq, traditional compute queue, user queue, should locate in - * a continues range so that programming CP_MEC_DOORBELL_RANGE_LOWER/UPPER can cover this range. - * Compute related doorbells are allocated from 0x00 to 0x8a - */ - - - /* kernel scheduling */ - AMDGPU_DOORBELL64_KIQ = 0x00, - - /* HSA interface queue and debug queue */ - AMDGPU_DOORBELL64_HIQ = 0x01, - AMDGPU_DOORBELL64_DIQ = 0x02, - - /* Compute engines */ - AMDGPU_DOORBELL64_MEC_RING0 = 0x03, - AMDGPU_DOORBELL64_MEC_RING1 = 0x04, - AMDGPU_DOORBELL64_MEC_RING2 = 0x05, - AMDGPU_DOORBELL64_MEC_RING3 = 0x06, - AMDGPU_DOORBELL64_MEC_RING4 = 0x07, - AMDGPU_DOORBELL64_MEC_RING5 = 0x08, - AMDGPU_DOORBELL64_MEC_RING6 = 0x09, - AMDGPU_DOORBELL64_MEC_RING7 = 0x0a, - - /* User queue doorbell range (128 doorbells) */ - AMDGPU_DOORBELL64_USERQUEUE_START = 0x0b, - AMDGPU_DOORBELL64_USERQUEUE_END = 0x8a, - - /* Graphics engine */ - AMDGPU_DOORBELL64_GFX_RING0 = 0x8b, - - /* - * Other graphics doorbells can be allocated here: from 0x8c to 0xdf - * Graphics voltage island aperture 1 - * default non-graphics QWORD index is 0xe0 - 0xFF inclusive - */ - - /* sDMA engines reserved from 0xe0 -0xef */ - AMDGPU_DOORBELL64_sDMA_ENGINE0 = 0xE0, - AMDGPU_DOORBELL64_sDMA_HI_PRI_ENGINE0 = 0xE1, - AMDGPU_DOORBELL64_sDMA_ENGINE1 = 0xE8, - AMDGPU_DOORBELL64_sDMA_HI_PRI_ENGINE1 = 0xE9, - - /* For vega10 sriov, the sdma doorbell must be fixed as follow - * to keep the same setting with host driver, or it will - * happen conflicts - */ - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 = 0xF0, - AMDGPU_VEGA10_DOORBELL64_sDMA_HI_PRI_ENGINE0 = 0xF1, - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 = 0xF2, - AMDGPU_VEGA10_DOORBELL64_sDMA_HI_PRI_ENGINE1 = 0xF3, - - /* Interrupt handler */ - AMDGPU_DOORBELL64_IH = 0xF4, /* For legacy interrupt ring buffer */ - AMDGPU_DOORBELL64_IH_RING1 = 0xF5, /* For page migration request log */ - AMDGPU_DOORBELL64_IH_RING2 = 0xF6, /* For page migration translation/invalidation log */ - - /* VCN engine use 32 bits doorbell */ - AMDGPU_DOORBELL64_VCN0_1 = 0xF8, /* lower 32 bits for VNC0 and upper 32 bits for VNC1 */ - AMDGPU_DOORBELL64_VCN2_3 = 0xF9, - AMDGPU_DOORBELL64_VCN4_5 = 0xFA, - AMDGPU_DOORBELL64_VCN6_7 = 0xFB, - - /* overlap the doorbell assignment with VCN as they are mutually exclusive - * VCE engine's doorbell is 32 bit and two VCE ring share one QWORD - */ - AMDGPU_DOORBELL64_UVD_RING0_1 = 0xF8, - AMDGPU_DOORBELL64_UVD_RING2_3 = 0xF9, - AMDGPU_DOORBELL64_UVD_RING4_5 = 0xFA, - AMDGPU_DOORBELL64_UVD_RING6_7 = 0xFB, - - AMDGPU_DOORBELL64_VCE_RING0_1 = 0xFC, - AMDGPU_DOORBELL64_VCE_RING2_3 = 0xFD, - AMDGPU_DOORBELL64_VCE_RING4_5 = 0xFE, - AMDGPU_DOORBELL64_VCE_RING6_7 = 0xFF, - - AMDGPU_DOORBELL64_MAX_ASSIGNMENT = 0xFF, - AMDGPU_DOORBELL64_INVALID = 0xFFFF -} AMDGPU_DOORBELL64_ASSIGNMENT; - -/* * IRQS. */ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c index 1c1fed6..d693b804 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -181,25 +181,14 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) * process in case of 64-bit doorbells so we * can use each doorbell assignment twice. */ - if (adev->asic_type == CHIP_VEGA10) { - gpu_resources.sdma_doorbell[0][i] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + (i >> 1); - gpu_resources.sdma_doorbell[0][i+1] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1); - gpu_resources.sdma_doorbell[1][i] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + (i >> 1); - gpu_resources.sdma_doorbell[1][i+1] = - AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1); - } else { - gpu_resources.sdma_doorbell[0][i] = - AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1); - gpu_resources.sdma_doorbell[0][i+1] = - AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1); - gpu_resources.sdma_doorbell[1][i] = - AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1); - gpu_resources.sdma_doorbell[1][i+1] = - AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1); - } + gpu_resources.sdma_doorbell[0][i] = + adev->doorbell_index.sdma_engine0 + (i >> 1); + gpu_resources.sdma_doorbell[0][i+1] = + adev->doorbell_index.sdma_engine0 + 0x200 + (i >> 1); + gpu_resources.sdma_doorbell[1][i] = + adev->doorbell_index.sdma_engine1 + (i >> 1); + gpu_resources.sdma_doorbell[1][i+1] = + adev->doorbell_index.sdma_engine1 + 0x200 + (i >> 1); } /* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for * SDMA, IH and VCN. So don't use them for the CP. diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index a942a88..3ffd8f5 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -537,7 +537,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) adev->doorbell.size = pci_resource_len(adev->pdev, 2); adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32), - AMDGPU_DOORBELL_MAX_ASSIGNMENT+1); + adev->doorbell_index.max_assignment+1); if (adev->doorbell.num_doorbells == 0) return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 6a70c0b..97a60da 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -250,7 +250,7 @@ int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, ring->adev = NULL; ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_KIQ; + ring->doorbell_index = adev->doorbell_index.kiq; r = amdgpu_gfx_kiq_acquire(adev, ring); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c index f467b9b..3a9fb60 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c @@ -4363,7 +4363,7 @@ static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id; + ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 77cac0e..1454fc3 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -1890,7 +1890,7 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id; + ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + (ring_id * GFX8_MEC_HPD_SIZE); sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); @@ -2001,7 +2001,7 @@ static int gfx_v8_0_sw_init(void *handle) /* no gfx doorbells on iceland */ if (adev->asic_type != CHIP_TOPAZ) { ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL_GFX_RING0; + ring->doorbell_index = adev->doorbell_index.gfx_ring0; } r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, @@ -4215,7 +4215,7 @@ static void gfx_v8_0_set_cpg_door_bell(struct amdgpu_device *adev, struct amdgpu tmp = REG_SET_FIELD(0, CP_RB_DOORBELL_RANGE_LOWER, DOORBELL_RANGE_LOWER, - AMDGPU_DOORBELL_GFX_RING0); + adev->doorbell_index.gfx_ring0); WREG32(mmCP_RB_DOORBELL_RANGE_LOWER, tmp); WREG32(mmCP_RB_DOORBELL_RANGE_UPPER, @@ -4644,8 +4644,8 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring) static void gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev) { if (adev->asic_type > CHIP_TONGA) { - WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2); - WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2); + WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2); + WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, adev->doorbell_index.mec_ring7 << 2); } /* enable doorbells */ WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1); diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index e409fbf..af8ccb0 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -1566,7 +1566,7 @@ static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, ring->ring_obj = NULL; ring->use_doorbell = true; - ring->doorbell_index = (AMDGPU_DOORBELL64_MEC_RING0 + ring_id) << 1; + ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1; ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + (ring_id * GFX9_MEC_HPD_SIZE); sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); @@ -1655,7 +1655,7 @@ static int gfx_v9_0_sw_init(void *handle) else sprintf(ring->name, "gfx_%d", i); ring->use_doorbell = true; - ring->doorbell_index = AMDGPU_DOORBELL64_GFX_RING0 << 1; + ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1; r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP); if (r) @@ -2981,9 +2981,9 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring) /* enable the doorbell if requested */ if (ring->use_doorbell) { WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER, - (AMDGPU_DOORBELL64_KIQ *2) << 2); + (adev->doorbell_index.kiq * 2) << 2); WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER, - (AMDGPU_DOORBELL64_USERQUEUE_END * 2) << 2); + (adev->doorbell_index.userqueue_end * 2) << 2); } WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index b6a25f9..1bccc5f 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -1146,7 +1146,7 @@ static int sdma_v3_0_sw_init(void *handle) if (!amdgpu_sriov_vf(adev)) { ring->use_doorbell = true; ring->doorbell_index = (i == 0) ? - AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1; + adev->doorbell_index.sdma_engine0 : adev->doorbell_index.sdma_engine1; } else { ring->use_pollmem = true; } diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index e6cb2c3..61507ad 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -1517,15 +1517,13 @@ static int sdma_v4_0_sw_init(void *handle) ring->ring_obj = NULL; ring->use_doorbell = true; + DRM_INFO("use_doorbell being set to: [%s]\n", + ring->use_doorbell?"true":"false"); + /* doorbell size is 2 dwords, get DWORD offset */ - if (adev->asic_type == CHIP_VEGA10) - ring->doorbell_index = (i == 0) ? - (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1); - else - ring->doorbell_index = (i == 0) ? - (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); + ring->doorbell_index = (i == 0) ? + (adev->doorbell_index.sdma_engine0 << 1) + : (adev->doorbell_index.sdma_engine1 << 1); sprintf(ring->name, "sdma%d", i); r = amdgpu_ring_init(adev, ring, 1024, @@ -1544,14 +1542,9 @@ static int sdma_v4_0_sw_init(void *handle) /* paging queue use same doorbell index/routing as gfx queue * with 0x400 (4096 dwords) offset on second doorbell page */ - if (adev->asic_type == CHIP_VEGA10) - ring->doorbell_index = (i == 0) ? - (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1); - else - ring->doorbell_index = (i == 0) ? - (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) - : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); + ring->doorbell_index = (i == 0) ? + (adev->doorbell_index.sdma_engine0 << 1) + : (adev->doorbell_index.sdma_engine1 << 1); ring->doorbell_index += 0x400; sprintf(ring->name, "page%d", i); diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c index 3abffd0..dcdbb4d 100644 --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c @@ -322,7 +322,7 @@ static int tonga_ih_sw_init(void *handle) return r; adev->irq.ih.use_doorbell = true; - adev->irq.ih.doorbell_index = AMDGPU_DOORBELL_IH; + adev->irq.ih.doorbell_index = adev->doorbell_index.ih; r = amdgpu_irq_init(adev); diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c index 8a45959..3680a01 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c @@ -455,9 +455,9 @@ static int uvd_v7_0_sw_init(void *handle) * sriov, so set unused location for other unused rings. */ if (i == 0) - ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING0_1 * 2; + ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2; else - ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING2_3 * 2 + 1; + ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1; } r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c index 0054ba1..9fb34b7 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c @@ -466,9 +466,9 @@ static int vce_v4_0_sw_init(void *handle) * so set unused location for other unused rings. */ if (i == 0) - ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING0_1 * 2; + ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2; else - ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING2_3 * 2 + 1; + ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1; } r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c index a0fda6f..d84b687 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c @@ -385,7 +385,7 @@ static int vega10_ih_sw_init(void *handle) return r; adev->irq.ih.use_doorbell = true; - adev->irq.ih.doorbell_index = AMDGPU_DOORBELL64_IH << 1; + adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1; r = amdgpu_irq_init(adev); -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 18+ messages in thread
end of thread, other threads:[~2018-11-26 18:05 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-11-21 22:00 [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index Oak Zeng
[not found] ` <1542837620-13571-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:00 ` [PATCH 2/7] drm/amdgpu: Vega10 doorbell index initialization Oak Zeng
[not found] ` <1542837620-13571-2-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:29 ` Alex Deucher
2018-11-21 22:00 ` [PATCH 3/7] drm/amdgpu: Vega12 " Oak Zeng
[not found] ` <1542837620-13571-3-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:30 ` Alex Deucher
2018-11-21 22:00 ` [PATCH 4/7] drm/amdgpu: Doorbell index initialization for ASICs before vega10 Oak Zeng
[not found] ` <1542837620-13571-4-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:40 ` Alex Deucher
[not found] ` <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg@mail.gmail.com>
[not found] ` <CADnq5_OUGOecJAvQiCEcdBsk9DmjZkd-yd6aEyGvPMc1+4MsXg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-11-26 17:20 ` Zeng, Oak
[not found] ` <BN6PR12MB165126A9513105183F63194880D70-/b2+HYfkarRSqX7PDniLCgdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-11-26 18:05 ` Deucher, Alexander
2018-11-21 22:00 ` [PATCH 5/7] drm/amdgpu: Call doorbell index init on device initialization Oak Zeng
[not found] ` <1542837620-13571-5-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:38 ` Alex Deucher
2018-11-21 22:00 ` [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition Oak Zeng
[not found] ` <1542837620-13571-6-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:35 ` Alex Deucher
2018-11-21 22:00 ` [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic Oak Zeng
[not found] ` <1542837620-13571-7-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 22:34 ` Alex Deucher
2018-11-22 19:19 ` Zeng, Oak
2018-11-21 22:28 ` [PATCH 1/7] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index Alex Deucher
-- strict thread matches above, loose matches on Subject: below --
2018-11-21 15:52 Oak Zeng
[not found] ` <1542815518-8124-1-git-send-email-ozeng-5C7GfCeVMHo@public.gmane.org>
2018-11-21 15:52 ` [PATCH 6/7] drm/amdgpu: Use asic specific doorbell index instead of macro definition Oak Zeng
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.