From: Dongchun Zhu <dongchun.zhu@mediatek.com>
To: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
srv_heupstream <srv_heupstream@mediatek.com>,
devicetree@vger.kernel.org,
"Linus Walleij" <linus.walleij@linaro.org>,
"Shengnan Wang (王圣男)" <shengnan.wang@mediatek.com>,
"Tomasz Figa" <tfiga@chromium.org>,
"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
"Sj Huang" <sj.huang@mediatek.com>,
"Nicolas Boichat" <drinkcat@chromium.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
dongchun.zhu@mediatek.com, "Louis Kuo" <louis.kuo@mediatek.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Cao Bing Bu" <bingbu.cao@intel.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"Linux Media Mailing List" <linux-media@vger.kernel.org>
Subject: Re: [V9, 1/2] media: dt-bindings: media: i2c: Document OV02A10 bindings
Date: Thu, 28 May 2020 11:34:42 +0800 [thread overview]
Message-ID: <1590636882.8804.474.camel@mhfsdcap03> (raw)
In-Reply-To: <20200527211628.GT7618@paasikivi.fi.intel.com>
Hi Sakari, Rob,
On Thu, 2020-05-28 at 00:16 +0300, Sakari Ailus wrote:
> Hi Rob, Dongchun,
>
> On Wed, May 27, 2020 at 09:27:22AM -0600, Rob Herring wrote:
> > > > > + properties:
> > > > > + endpoint:
> > > > > + type: object
> > > > > + additionalProperties: false
> > > > > +
> > > > > + properties:
> > >
> > > Actually I wonder whether we need to declare 'clock-lanes' here?
> >
> > Yes, if you are using it.
>
> Dongchun, can you confirm the chip has a single data and a single clock
> lane and that it does not support lane reordering?
>
From the datasheet, 'MIPI inside the OV02A10 provides one single
uni-directional clock lane and one bi-directional data lane solution for
communication links between components inside a mobile device.
The data lane has full support for HS(uni-directional) and
LP(bi-directional) data transfer mode.'
The sensor doesn't support lane reordering, so 'clock-lanes' property
would not be added in next release.
> So if there's nothing to convey to the driver, also the data-lanes should
> be removed IMO.
>
However, 'data-lanes' property may still be required.
It is known that either data-lanes or clock-lanes is an array of
physical data lane indexes. Position of an entry determines the logical
lane number, while the value of an entry indicates physical lane, e.g.,
for 1-lane MIPI CSI-2 bus we could have "data-lanes = <1>;", assuming
the clock lane is on hardware lane 0.
As mentioned earlier, the OV02A10 sensor supports only 1C1D and does not
support lane reordering, so here we shall use 'data-lanes = <1>' as
there is only a clock lane for OV02A10.
Reminder:
If 'data-lanes' property is not present, the driver would assume
four-lane operation. This means for one-lane or two-lane operation, this
property must be present and set to the right physical lane indexes.
If the hardware does not support lane reordering, monotonically
incremented values shall be used from 0 or 1 onwards, depending on
whether or not there is also a clock lane.
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Dongchun Zhu <dongchun.zhu@mediatek.com>
To: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
srv_heupstream <srv_heupstream@mediatek.com>,
devicetree@vger.kernel.org,
"Linus Walleij" <linus.walleij@linaro.org>,
"Shengnan Wang (王圣男)" <shengnan.wang@mediatek.com>,
"Tomasz Figa" <tfiga@chromium.org>,
"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
"Sj Huang" <sj.huang@mediatek.com>,
"Nicolas Boichat" <drinkcat@chromium.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
dongchun.zhu@mediatek.com, "Louis Kuo" <louis.kuo@mediatek.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Cao Bing Bu" <bingbu.cao@intel.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"Linux Media Mailing List" <linux-media@vger.kernel.org>
Subject: Re: [V9, 1/2] media: dt-bindings: media: i2c: Document OV02A10 bindings
Date: Thu, 28 May 2020 11:34:42 +0800 [thread overview]
Message-ID: <1590636882.8804.474.camel@mhfsdcap03> (raw)
In-Reply-To: <20200527211628.GT7618@paasikivi.fi.intel.com>
Hi Sakari, Rob,
On Thu, 2020-05-28 at 00:16 +0300, Sakari Ailus wrote:
> Hi Rob, Dongchun,
>
> On Wed, May 27, 2020 at 09:27:22AM -0600, Rob Herring wrote:
> > > > > + properties:
> > > > > + endpoint:
> > > > > + type: object
> > > > > + additionalProperties: false
> > > > > +
> > > > > + properties:
> > >
> > > Actually I wonder whether we need to declare 'clock-lanes' here?
> >
> > Yes, if you are using it.
>
> Dongchun, can you confirm the chip has a single data and a single clock
> lane and that it does not support lane reordering?
>
From the datasheet, 'MIPI inside the OV02A10 provides one single
uni-directional clock lane and one bi-directional data lane solution for
communication links between components inside a mobile device.
The data lane has full support for HS(uni-directional) and
LP(bi-directional) data transfer mode.'
The sensor doesn't support lane reordering, so 'clock-lanes' property
would not be added in next release.
> So if there's nothing to convey to the driver, also the data-lanes should
> be removed IMO.
>
However, 'data-lanes' property may still be required.
It is known that either data-lanes or clock-lanes is an array of
physical data lane indexes. Position of an entry determines the logical
lane number, while the value of an entry indicates physical lane, e.g.,
for 1-lane MIPI CSI-2 bus we could have "data-lanes = <1>;", assuming
the clock lane is on hardware lane 0.
As mentioned earlier, the OV02A10 sensor supports only 1C1D and does not
support lane reordering, so here we shall use 'data-lanes = <1>' as
there is only a clock lane for OV02A10.
Reminder:
If 'data-lanes' property is not present, the driver would assume
four-lane operation. This means for one-lane or two-lane operation, this
property must be present and set to the right physical lane indexes.
If the hardware does not support lane reordering, monotonically
incremented values shall be used from 0 or 1 onwards, depending on
whether or not there is also a clock lane.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Dongchun Zhu <dongchun.zhu@mediatek.com>
To: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: "Rob Herring" <robh@kernel.org>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Mark Rutland" <mark.rutland@arm.com>,
"Nicolas Boichat" <drinkcat@chromium.org>,
"Tomasz Figa" <tfiga@chromium.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Cao Bing Bu" <bingbu.cao@intel.com>,
srv_heupstream <srv_heupstream@mediatek.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"Sj Huang" <sj.huang@mediatek.com>,
"Linux Media Mailing List" <linux-media@vger.kernel.org>,
devicetree@vger.kernel.org, "Louis Kuo" <louis.kuo@mediatek.com>,
"Shengnan Wang (王圣男)" <shengnan.wang@mediatek.com>,
dongchun.zhu@mediatek.com
Subject: Re: [V9, 1/2] media: dt-bindings: media: i2c: Document OV02A10 bindings
Date: Thu, 28 May 2020 11:34:42 +0800 [thread overview]
Message-ID: <1590636882.8804.474.camel@mhfsdcap03> (raw)
In-Reply-To: <20200527211628.GT7618@paasikivi.fi.intel.com>
Hi Sakari, Rob,
On Thu, 2020-05-28 at 00:16 +0300, Sakari Ailus wrote:
> Hi Rob, Dongchun,
>
> On Wed, May 27, 2020 at 09:27:22AM -0600, Rob Herring wrote:
> > > > > + properties:
> > > > > + endpoint:
> > > > > + type: object
> > > > > + additionalProperties: false
> > > > > +
> > > > > + properties:
> > >
> > > Actually I wonder whether we need to declare 'clock-lanes' here?
> >
> > Yes, if you are using it.
>
> Dongchun, can you confirm the chip has a single data and a single clock
> lane and that it does not support lane reordering?
>
From the datasheet, 'MIPI inside the OV02A10 provides one single
uni-directional clock lane and one bi-directional data lane solution for
communication links between components inside a mobile device.
The data lane has full support for HS(uni-directional) and
LP(bi-directional) data transfer mode.'
The sensor doesn't support lane reordering, so 'clock-lanes' property
would not be added in next release.
> So if there's nothing to convey to the driver, also the data-lanes should
> be removed IMO.
>
However, 'data-lanes' property may still be required.
It is known that either data-lanes or clock-lanes is an array of
physical data lane indexes. Position of an entry determines the logical
lane number, while the value of an entry indicates physical lane, e.g.,
for 1-lane MIPI CSI-2 bus we could have "data-lanes = <1>;", assuming
the clock lane is on hardware lane 0.
As mentioned earlier, the OV02A10 sensor supports only 1C1D and does not
support lane reordering, so here we shall use 'data-lanes = <1>' as
there is only a clock lane for OV02A10.
Reminder:
If 'data-lanes' property is not present, the driver would assume
four-lane operation. This means for one-lane or two-lane operation, this
property must be present and set to the right physical lane indexes.
If the hardware does not support lane reordering, monotonically
incremented values shall be used from 0 or 1 onwards, depending on
whether or not there is also a clock lane.
next prev parent reply other threads:[~2020-05-28 3:36 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-23 8:41 [V9, 0/2] media: i2c: Add support for OV02A10 sensor Dongchun Zhu
2020-05-23 8:41 ` Dongchun Zhu
2020-05-23 8:41 ` Dongchun Zhu
2020-05-23 8:41 ` [V9, 1/2] media: dt-bindings: media: i2c: Document OV02A10 bindings Dongchun Zhu
2020-05-23 8:41 ` Dongchun Zhu
2020-05-23 8:41 ` Dongchun Zhu
2020-05-26 18:28 ` Rob Herring
2020-05-26 18:28 ` Rob Herring
2020-05-26 18:28 ` Rob Herring
2020-05-27 8:49 ` Dongchun Zhu
2020-05-27 8:49 ` Dongchun Zhu
2020-05-27 8:49 ` Dongchun Zhu
2020-05-27 15:27 ` Rob Herring
2020-05-27 15:27 ` Rob Herring
2020-05-27 15:27 ` Rob Herring
2020-05-27 21:16 ` Sakari Ailus
2020-05-27 21:16 ` Sakari Ailus
2020-05-27 21:16 ` Sakari Ailus
2020-05-28 3:34 ` Dongchun Zhu [this message]
2020-05-28 3:34 ` Dongchun Zhu
2020-05-28 3:34 ` Dongchun Zhu
2020-05-28 7:23 ` Sakari Ailus
2020-05-28 7:23 ` Sakari Ailus
2020-05-28 7:23 ` Sakari Ailus
2020-05-28 8:04 ` Dongchun Zhu
2020-05-28 8:04 ` Dongchun Zhu
2020-05-28 8:04 ` Dongchun Zhu
2020-05-29 13:43 ` Tomasz Figa
2020-05-29 13:43 ` Tomasz Figa
2020-05-29 13:43 ` Tomasz Figa
2020-06-01 2:33 ` Dongchun Zhu
2020-06-01 2:33 ` Dongchun Zhu
2020-06-01 2:33 ` Dongchun Zhu
2020-06-01 18:18 ` Tomasz Figa
2020-06-01 18:18 ` Tomasz Figa
2020-06-01 18:18 ` Tomasz Figa
2020-06-02 6:15 ` Dongchun Zhu
2020-06-02 6:15 ` Dongchun Zhu
2020-06-02 6:15 ` Dongchun Zhu
2020-06-02 9:56 ` Sakari Ailus
2020-06-02 9:56 ` Sakari Ailus
2020-06-02 9:56 ` Sakari Ailus
2020-06-04 2:20 ` Dongchun Zhu
2020-06-04 2:20 ` Dongchun Zhu
2020-06-04 2:20 ` Dongchun Zhu
2020-06-02 9:53 ` Sakari Ailus
2020-06-02 9:53 ` Sakari Ailus
2020-06-02 9:53 ` Sakari Ailus
2020-05-28 5:53 ` Dongchun Zhu
2020-05-28 5:53 ` Dongchun Zhu
2020-05-28 5:53 ` Dongchun Zhu
2020-05-23 8:41 ` [V9, 2/2] media: i2c: ov02a10: Add OV02A10 image sensor driver Dongchun Zhu
2020-05-23 8:41 ` Dongchun Zhu
2020-05-23 8:41 ` Dongchun Zhu
2020-06-04 2:14 ` Dongchun Zhu
2020-06-04 2:14 ` Dongchun Zhu
2020-06-04 2:14 ` Dongchun Zhu
2020-06-04 9:26 ` Sakari Ailus
2020-06-04 9:26 ` Sakari Ailus
2020-06-04 9:26 ` Sakari Ailus
2020-06-04 18:05 ` Tomasz Figa
2020-06-04 18:05 ` Tomasz Figa
2020-06-04 18:05 ` Tomasz Figa
2020-06-05 3:19 ` Dongchun Zhu
2020-06-05 3:19 ` Dongchun Zhu
2020-06-05 3:19 ` Dongchun Zhu
2020-06-10 19:44 ` Tomasz Figa
2020-06-10 19:44 ` Tomasz Figa
2020-06-10 19:44 ` Tomasz Figa
2020-06-11 9:53 ` Sakari Ailus
2020-06-11 9:53 ` Sakari Ailus
2020-06-11 9:53 ` Sakari Ailus
2020-06-11 9:57 ` Tomasz Figa
2020-06-11 9:57 ` Tomasz Figa
2020-06-11 9:57 ` Tomasz Figa
2020-06-11 10:03 ` Sakari Ailus
2020-06-11 10:03 ` Sakari Ailus
2020-06-11 10:03 ` Sakari Ailus
2020-06-12 11:01 ` Dongchun Zhu
2020-06-12 11:01 ` Dongchun Zhu
2020-06-12 11:01 ` Dongchun Zhu
2020-06-12 10:46 ` Dongchun Zhu
2020-06-12 10:46 ` Dongchun Zhu
2020-06-12 10:46 ` Dongchun Zhu
2020-06-12 18:39 ` Tomasz Figa
2020-06-12 18:39 ` Tomasz Figa
2020-06-12 18:39 ` Tomasz Figa
2020-06-15 5:54 ` Dongchun Zhu
2020-06-15 5:54 ` Dongchun Zhu
2020-06-15 5:54 ` Dongchun Zhu
2020-06-15 12:44 ` Tomasz Figa
2020-06-15 12:44 ` Tomasz Figa
2020-06-15 12:44 ` Tomasz Figa
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