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From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: iommu@lists.linux-foundation.org,
	LKML <linux-kernel@vger.kernel.org>,
	"Lu Baolu" <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	David Woodhouse <dwmw2@infradead.org>
Cc: "Tian, Kevin" <kevin.tian@intel.com>, Raj Ashok <ashok.raj@intel.com>
Subject: [PATCH v4 3/7] iommu/vt-d: Fix PASID devTLB invalidation
Date: Mon,  6 Jul 2020 17:12:50 -0700	[thread overview]
Message-ID: <1594080774-33413-4-git-send-email-jacob.jun.pan@linux.intel.com> (raw)
In-Reply-To: <1594080774-33413-1-git-send-email-jacob.jun.pan@linux.intel.com>

DevTLB flush can be used for both DMA request with and without PASIDs.
The former uses PASID#0 (RID2PASID), latter uses non-zero PASID for SVA
usage.

This patch adds a check for PASID value such that devTLB flush with
PASID is used for SVA case. This is more efficient in that multiple
PASIDs can be used by a single device, when tearing down a PASID entry
we shall flush only the devTLB specific to a PASID.

Fixes: 6f7db75e1c46 ("iommu/vt-d: Add second level page table")
Acked-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
---
 drivers/iommu/intel/pasid.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index c81f0f17c6ba..fa0154cce537 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -486,7 +486,16 @@ devtlb_invalidation_with_pasid(struct intel_iommu *iommu,
 	qdep = info->ats_qdep;
 	pfsid = info->pfsid;
 
-	qi_flush_dev_iotlb(iommu, sid, pfsid, qdep, 0, 64 - VTD_PAGE_SHIFT);
+	/*
+	 * When PASID 0 is used, it indicates RID2PASID(DMA request w/o PASID),
+	 * devTLB flush w/o PASID should be used. For non-zero PASID under
+	 * SVA usage, device could do DMA with multiple PASIDs. It is more
+	 * efficient to flush devTLB specific to the PASID.
+	 */
+	if (pasid == PASID_RID2PASID)
+		qi_flush_dev_iotlb(iommu, sid, pfsid, qdep, 0, 64 - VTD_PAGE_SHIFT);
+	else
+		qi_flush_dev_iotlb_pasid(iommu, sid, pfsid, pasid, qdep, 0, 64 - VTD_PAGE_SHIFT);
 }
 
 void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
-- 
2.7.4

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: iommu@lists.linux-foundation.org,
	LKML <linux-kernel@vger.kernel.org>,
	"Lu Baolu" <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	David Woodhouse <dwmw2@infradead.org>
Cc: Yi Liu <yi.l.liu@intel.com>, "Tian, Kevin" <kevin.tian@intel.com>,
	Raj Ashok <ashok.raj@intel.com>,
	Eric Auger <eric.auger@redhat.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: [PATCH v4 3/7] iommu/vt-d: Fix PASID devTLB invalidation
Date: Mon,  6 Jul 2020 17:12:50 -0700	[thread overview]
Message-ID: <1594080774-33413-4-git-send-email-jacob.jun.pan@linux.intel.com> (raw)
In-Reply-To: <1594080774-33413-1-git-send-email-jacob.jun.pan@linux.intel.com>

DevTLB flush can be used for both DMA request with and without PASIDs.
The former uses PASID#0 (RID2PASID), latter uses non-zero PASID for SVA
usage.

This patch adds a check for PASID value such that devTLB flush with
PASID is used for SVA case. This is more efficient in that multiple
PASIDs can be used by a single device, when tearing down a PASID entry
we shall flush only the devTLB specific to a PASID.

Fixes: 6f7db75e1c46 ("iommu/vt-d: Add second level page table")
Acked-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
---
 drivers/iommu/intel/pasid.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index c81f0f17c6ba..fa0154cce537 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -486,7 +486,16 @@ devtlb_invalidation_with_pasid(struct intel_iommu *iommu,
 	qdep = info->ats_qdep;
 	pfsid = info->pfsid;
 
-	qi_flush_dev_iotlb(iommu, sid, pfsid, qdep, 0, 64 - VTD_PAGE_SHIFT);
+	/*
+	 * When PASID 0 is used, it indicates RID2PASID(DMA request w/o PASID),
+	 * devTLB flush w/o PASID should be used. For non-zero PASID under
+	 * SVA usage, device could do DMA with multiple PASIDs. It is more
+	 * efficient to flush devTLB specific to the PASID.
+	 */
+	if (pasid == PASID_RID2PASID)
+		qi_flush_dev_iotlb(iommu, sid, pfsid, qdep, 0, 64 - VTD_PAGE_SHIFT);
+	else
+		qi_flush_dev_iotlb_pasid(iommu, sid, pfsid, pasid, qdep, 0, 64 - VTD_PAGE_SHIFT);
 }
 
 void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
-- 
2.7.4


  parent reply	other threads:[~2020-07-07  0:06 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-07  0:12 [PATCH v4 0/7] iommu/vt-d: Misc tweaks and fixes for vSVA Jacob Pan
2020-07-07  0:12 ` Jacob Pan
2020-07-07  0:12 ` [PATCH v4 1/7] iommu/vt-d: Enforce PASID devTLB field mask Jacob Pan
2020-07-07  0:12   ` Jacob Pan
2020-07-07  0:12 ` [PATCH v4 2/7] iommu/vt-d: Remove global page support in devTLB flush Jacob Pan
2020-07-07  0:12   ` Jacob Pan
2020-07-07  0:12 ` Jacob Pan [this message]
2020-07-07  0:12   ` [PATCH v4 3/7] iommu/vt-d: Fix PASID devTLB invalidation Jacob Pan
2020-07-16  7:52   ` Auger Eric
2020-07-16  7:52     ` Auger Eric
2020-07-07  0:12 ` [PATCH v4 4/7] iommu/vt-d: Handle non-page aligned address Jacob Pan
2020-07-07  0:12   ` Jacob Pan
2020-07-07 13:32   ` kernel test robot
2020-07-07 13:32     ` kernel test robot
2020-07-07 13:32     ` kernel test robot
2020-07-09  1:10     ` [kbuild-all] " Li, Philip
2020-07-09  1:10       ` Li, Philip
2020-07-09  1:10       ` Li, Philip
2020-07-16  7:51   ` Auger Eric
2020-07-16  7:51     ` Auger Eric
2020-07-21 16:50   ` Jacob Pan
2020-07-21 16:50     ` Jacob Pan
2020-07-22  1:01     ` Lu Baolu
2020-07-22  1:01       ` Lu Baolu
2020-07-22 18:20       ` Jacob Pan
2020-07-22 18:20         ` Jacob Pan
2020-07-07  0:12 ` [PATCH v4 5/7] iommu/vt-d: Fix devTLB flush for vSVA Jacob Pan
2020-07-07  0:12   ` Jacob Pan
2020-07-07  0:12 ` [PATCH v4 6/7] iommu/vt-d: Warn on out-of-range invalidation address Jacob Pan
2020-07-07  0:12   ` Jacob Pan
2020-07-16  8:40   ` Auger Eric
2020-07-16  8:40     ` Auger Eric
2020-07-07  0:12 ` [PATCH v4 7/7] iommu/vt-d: Disable multiple GPASID-dev bind Jacob Pan
2020-07-07  0:12   ` Jacob Pan

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