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From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Jonathan Marek <jonathan@marek.ca>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	freedreno@lists.freedesktop.org, linux-clk@vger.kernel.org
Subject: Re: [Freedreno] [PATCH v2 03/28] clk: divider: add devm_clk_hw_register_divider
Date: Fri, 26 Mar 2021 10:45:13 -0700	[thread overview]
Message-ID: <17513743b70339aacf6bc86b9ea795f5@codeaurora.org> (raw)
In-Reply-To: <20210324151846.2774204-4-dmitry.baryshkov@linaro.org>

On 2021-03-24 08:18, Dmitry Baryshkov wrote:
> Add devm_clk_hw_register_divider() - devres version of
> clk_hw_register_divider().
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
>  include/linux/clk-provider.h | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/include/linux/clk-provider.h 
> b/include/linux/clk-provider.h
> index 3eb15e0262f5..162a2e5546a3 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -785,6 +785,23 @@ struct clk *clk_register_divider_table(struct
> device *dev, const char *name,
>  				  (parent_data), (flags), (reg), (shift),     \
>  				  (width), (clk_divider_flags), (table),      \
>  				  (lock))
> +/**
> + * devm_clk_hw_register_divider - register a divider clock with the
> clock framework
> + * @dev: device registering this clock
> + * @name: name of this clock
> + * @parent_name: name of clock's parent
> + * @flags: framework-specific flags
> + * @reg: register address to adjust divider
> + * @shift: number of bits to shift the bitfield
> + * @width: width of the bitfield
> + * @clk_divider_flags: divider-specific flags for this clock
> + * @lock: shared register lock for this clock
> + */
> +#define devm_clk_hw_register_divider(dev, name, parent_name, flags,
> reg, shift,    \
> +				width, clk_divider_flags, lock)		      \
> +	__devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), 
> NULL,   \
> +				  NULL, (flags), (reg), (shift), (width),     \
> +				  (clk_divider_flags), NULL, (lock))
>  /**
>   * devm_clk_hw_register_divider_table - register a table based divider 
> clock
>   * with the clock framework (devres variant)

WARNING: multiple messages have this Message-ID (diff)
From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: freedreno@lists.freedesktop.org,
	Jonathan Marek <jonathan@marek.ca>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-msm@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	dri-devel@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
	Sean Paul <sean@poorly.run>,
	linux-clk@vger.kernel.org
Subject: Re: [Freedreno] [PATCH v2 03/28] clk: divider: add devm_clk_hw_register_divider
Date: Fri, 26 Mar 2021 10:45:13 -0700	[thread overview]
Message-ID: <17513743b70339aacf6bc86b9ea795f5@codeaurora.org> (raw)
In-Reply-To: <20210324151846.2774204-4-dmitry.baryshkov@linaro.org>

On 2021-03-24 08:18, Dmitry Baryshkov wrote:
> Add devm_clk_hw_register_divider() - devres version of
> clk_hw_register_divider().
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
>  include/linux/clk-provider.h | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/include/linux/clk-provider.h 
> b/include/linux/clk-provider.h
> index 3eb15e0262f5..162a2e5546a3 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -785,6 +785,23 @@ struct clk *clk_register_divider_table(struct
> device *dev, const char *name,
>  				  (parent_data), (flags), (reg), (shift),     \
>  				  (width), (clk_divider_flags), (table),      \
>  				  (lock))
> +/**
> + * devm_clk_hw_register_divider - register a divider clock with the
> clock framework
> + * @dev: device registering this clock
> + * @name: name of this clock
> + * @parent_name: name of clock's parent
> + * @flags: framework-specific flags
> + * @reg: register address to adjust divider
> + * @shift: number of bits to shift the bitfield
> + * @width: width of the bitfield
> + * @clk_divider_flags: divider-specific flags for this clock
> + * @lock: shared register lock for this clock
> + */
> +#define devm_clk_hw_register_divider(dev, name, parent_name, flags,
> reg, shift,    \
> +				width, clk_divider_flags, lock)		      \
> +	__devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), 
> NULL,   \
> +				  NULL, (flags), (reg), (shift), (width),     \
> +				  (clk_divider_flags), NULL, (lock))
>  /**
>   * devm_clk_hw_register_divider_table - register a table based divider 
> clock
>   * with the clock framework (devres variant)
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  reply	other threads:[~2021-03-26 17:46 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-24 15:18 [PATCH v2 00/28] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers Dmitry Baryshkov
2021-03-24 15:18 ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 01/28] clk: fixed: add devm helper for clk_hw_register_fixed_factor() Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:43   ` [Freedreno] " abhinavk
2021-03-26 17:43     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 02/28] clk: mux: provide devm_clk_hw_register_mux() Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:44   ` [Freedreno] " abhinavk
2021-03-26 17:44     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 03/28] clk: divider: add devm_clk_hw_register_divider Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:45   ` abhinavk [this message]
2021-03-26 17:45     ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 04/28] drm/msm/dsi: replace PHY's init callback with configurable data Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:46   ` [Freedreno] " abhinavk
2021-03-26 17:46     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 05/28] drm/msm/dsi: fuse dsi_pll_* code into dsi_phy_* code Dmitry Baryshkov
2021-03-26 17:48   ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 06/28] drm/msm/dsi: drop multiple pll enable_seq support Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:49   ` [Freedreno] " abhinavk
2021-03-26 17:49     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 07/28] drm/msm/dsi: move all PLL callbacks into PHY config struct Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:51   ` [Freedreno] " abhinavk
2021-03-26 17:51     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 08/28] drm/msm/dsi: drop global msm_dsi_phy_type enumaration Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:52   ` [Freedreno] " abhinavk
2021-03-26 17:52     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 09/28] drm/msm/dsi: move min/max PLL rate to phy config Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:53   ` [Freedreno] " abhinavk
2021-03-26 17:53     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 10/28] drm/msm/dsi: remove msm_dsi_pll_set_usecase Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:54   ` [Freedreno] " abhinavk
2021-03-26 17:54     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 11/28] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 18:05   ` [Freedreno] " abhinavk
2021-03-26 18:05     ` abhinavk
2021-03-26 20:36     ` Dmitry Baryshkov
2021-03-26 20:36       ` Dmitry Baryshkov
2021-03-26 20:48       ` abhinavk
2021-03-26 20:48         ` abhinavk
2021-03-27  0:58         ` Dmitry Baryshkov
2021-03-27  0:58           ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 12/28] arm64: dts: qcom: sdm845: assign DSI clock source parents Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 13/28] arm64: dts: qcom: sc7180: " Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 14/28] drm/msm/dsi: push provided clocks handling into a generic code Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 15/28] drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocks Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 16/28] drm/msm/dsi: use devm_of_clk_add_hw_provider Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 17/28] drm/msm/dsi: make save/restore_state phy-level functions Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 18/28] drm/msm/dsi: drop vco_delay setting from 7nm, 10nm, 14nm drivers Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 19/28] drm/msm/dpu: simplify vco_delay handling in dsi_phy_28nm driver Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 20/28] drm/msi/dsi: inline msm_dsi_pll_helper_clk_prepare/unprepare Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 21/28] drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phy Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 22/28] drm/msm/dsi: drop msm_dsi_pll abstracton Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 23/28] drm/msm/dsi: drop PLL accessor functions Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 24/28] drm/msm/dsi: move ioremaps to dsi_phy_driver_probe Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 25/28] drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instances Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 26/28] drm/msm/dsi: remove temp data from global pll structure Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 27/28] drm/msm/dsi: inline msm_dsi_phy_set_src_pll Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 28/28] drm/msm/dsi: stop passing src_pll_id to the phy_enable call Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov

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