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From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Jonathan Marek <jonathan@marek.ca>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	freedreno@lists.freedesktop.org, linux-clk@vger.kernel.org
Subject: Re: [Freedreno] [PATCH v2 10/28] drm/msm/dsi: remove msm_dsi_pll_set_usecase
Date: Fri, 26 Mar 2021 10:54:25 -0700	[thread overview]
Message-ID: <9e94fbc46e367b61634a0917162ab928@codeaurora.org> (raw)
In-Reply-To: <20210324151846.2774204-11-dmitry.baryshkov@linaro.org>

On 2021-03-24 08:18, Dmitry Baryshkov wrote:
> msm_dsi_pll_set_usecase() function is not used outside of individual 
> DSI
> PHY drivers, so drop it in favour of calling the the respective
> set_usecase functions directly.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/dsi/dsi.h              | 7 -------
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy.h      | 2 --
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 4 +---
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 4 +---
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c  | 4 +---
>  drivers/gpu/drm/msm/dsi/phy/dsi_pll.c      | 9 ---------
>  6 files changed, 3 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/dsi/dsi.h 
> b/drivers/gpu/drm/msm/dsi/dsi.h
> index 98a4b296fa30..b310cf344ed4 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi.h
> @@ -100,8 +100,6 @@ int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll 
> *pll,
>  	struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
>  void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
>  int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
> -int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
> -			    enum msm_dsi_phy_usecase uc);
>  #else
>  static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
>  {
> @@ -118,11 +116,6 @@ static inline int
> msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
>  {
>  	return 0;
>  }
> -static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
> -					  enum msm_dsi_phy_usecase uc)
> -{
> -	return -ENODEV;
> -}
>  #endif
> 
>  /* dsi host */
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> index 000e4207dabc..f737bef74b91 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> @@ -29,8 +29,6 @@ struct msm_dsi_pll_ops {
>  	void (*destroy)(struct msm_dsi_pll *pll);
>  	void (*save_state)(struct msm_dsi_pll *pll);
>  	int (*restore_state)(struct msm_dsi_pll *pll);
> -	int (*set_usecase)(struct msm_dsi_pll *pll,
> -			   enum msm_dsi_phy_usecase uc);
>  };
> 
>  struct msm_dsi_phy_cfg {
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> index 5f9d0cfc4e03..7a98e420414f 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> @@ -1049,7 +1049,7 @@ static int dsi_10nm_phy_enable(struct
> msm_dsi_phy *phy, int src_pll_id,
>  	/* Select full-rate mode */
>  	dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_2, 0x40);
> 
> -	ret = msm_dsi_pll_set_usecase(phy->pll, phy->usecase);
> +	ret = dsi_pll_10nm_set_usecase(phy->pll, phy->usecase);
>  	if (ret) {
>  		DRM_DEV_ERROR(&phy->pdev->dev, "%s: set pll usecase failed, %d\n",
>  			__func__, ret);
> @@ -1109,7 +1109,6 @@ const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs = 
> {
>  		.destroy = dsi_pll_10nm_destroy,
>  		.save_state = dsi_pll_10nm_save_state,
>  		.restore_state = dsi_pll_10nm_restore_state,
> -		.set_usecase = dsi_pll_10nm_set_usecase,
>  	},
>  	.min_pll_rate = 1000000000UL,
>  	.max_pll_rate = 3500000000UL,
> @@ -1136,7 +1135,6 @@ const struct msm_dsi_phy_cfg 
> dsi_phy_10nm_8998_cfgs = {
>  		.destroy = dsi_pll_10nm_destroy,
>  		.save_state = dsi_pll_10nm_save_state,
>  		.restore_state = dsi_pll_10nm_restore_state,
> -		.set_usecase = dsi_pll_10nm_set_usecase,
>  	},
>  	.min_pll_rate = 1000000000UL,
>  	.max_pll_rate = 3500000000UL,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> index 8e4528301e5d..bab86fa6dc4b 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> @@ -1190,7 +1190,7 @@ static int dsi_14nm_phy_enable(struct
> msm_dsi_phy *phy, int src_pll_id,
>  				REG_DSI_14nm_PHY_CMN_GLBL_TEST_CTRL,
>  				DSI_14nm_PHY_CMN_GLBL_TEST_CTRL_BITCLK_HS_SEL);
> 
> -	ret = msm_dsi_pll_set_usecase(phy->pll, phy->usecase);
> +	ret = dsi_pll_14nm_set_usecase(phy->pll, phy->usecase);
>  	if (ret) {
>  		DRM_DEV_ERROR(&phy->pdev->dev, "%s: set pll usecase failed, %d\n",
>  			__func__, ret);
> @@ -1231,7 +1231,6 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs = 
> {
>  		.destroy = dsi_pll_14nm_destroy,
>  		.save_state = dsi_pll_14nm_save_state,
>  		.restore_state = dsi_pll_14nm_restore_state,
> -		.set_usecase = dsi_pll_14nm_set_usecase,
>  		.disable_seq = dsi_pll_14nm_disable_seq,
>  		.enable_seq = dsi_pll_14nm_enable_seq,
>  	},
> @@ -1260,7 +1259,6 @@ const struct msm_dsi_phy_cfg 
> dsi_phy_14nm_660_cfgs = {
>  		.destroy = dsi_pll_14nm_destroy,
>  		.save_state = dsi_pll_14nm_save_state,
>  		.restore_state = dsi_pll_14nm_restore_state,
> -		.set_usecase = dsi_pll_14nm_set_usecase,
>  		.disable_seq = dsi_pll_14nm_disable_seq,
>  		.enable_seq = dsi_pll_14nm_enable_seq,
>  	},
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> index 4831d6769da7..5acdfe1f63be 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> @@ -1064,7 +1064,7 @@ static int dsi_7nm_phy_enable(struct msm_dsi_phy
> *phy, int src_pll_id,
>  	/* Select full-rate mode */
>  	dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_2, 0x40);
> 
> -	ret = msm_dsi_pll_set_usecase(phy->pll, phy->usecase);
> +	ret = dsi_pll_7nm_set_usecase(phy->pll, phy->usecase);
>  	if (ret) {
>  		DRM_DEV_ERROR(&phy->pdev->dev, "%s: set pll usecase failed, %d\n",
>  			__func__, ret);
> @@ -1142,7 +1142,6 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = {
>  		.destroy = dsi_pll_7nm_destroy,
>  		.save_state = dsi_pll_7nm_save_state,
>  		.restore_state = dsi_pll_7nm_restore_state,
> -		.set_usecase = dsi_pll_7nm_set_usecase,
>  	},
>  	.min_pll_rate = 600000000UL,
>  	.max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000ULL : 
> ULONG_MAX,
> @@ -1170,7 +1169,6 @@ const struct msm_dsi_phy_cfg 
> dsi_phy_7nm_8150_cfgs = {
>  		.destroy = dsi_pll_7nm_destroy,
>  		.save_state = dsi_pll_7nm_save_state,
>  		.restore_state = dsi_pll_7nm_restore_state,
> -		.set_usecase = dsi_pll_7nm_set_usecase,
>  	},
>  	.min_pll_rate = 1000000000UL,
>  	.max_pll_rate = 3500000000UL,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> index e607adffe001..98ee4560581a 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> @@ -113,12 +113,3 @@ int msm_dsi_pll_restore_state(struct msm_dsi_pll 
> *pll)
> 
>  	return 0;
>  }
> -
> -int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
> -			    enum msm_dsi_phy_usecase uc)
> -{
> -	if (pll->cfg->pll_ops.set_usecase)
> -		return pll->cfg->pll_ops.set_usecase(pll, uc);
> -
> -	return 0;
> -}

WARNING: multiple messages have this Message-ID (diff)
From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: freedreno@lists.freedesktop.org,
	Jonathan Marek <jonathan@marek.ca>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-msm@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	dri-devel@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
	Sean Paul <sean@poorly.run>,
	linux-clk@vger.kernel.org
Subject: Re: [Freedreno] [PATCH v2 10/28] drm/msm/dsi: remove msm_dsi_pll_set_usecase
Date: Fri, 26 Mar 2021 10:54:25 -0700	[thread overview]
Message-ID: <9e94fbc46e367b61634a0917162ab928@codeaurora.org> (raw)
In-Reply-To: <20210324151846.2774204-11-dmitry.baryshkov@linaro.org>

On 2021-03-24 08:18, Dmitry Baryshkov wrote:
> msm_dsi_pll_set_usecase() function is not used outside of individual 
> DSI
> PHY drivers, so drop it in favour of calling the the respective
> set_usecase functions directly.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/dsi/dsi.h              | 7 -------
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy.h      | 2 --
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 4 +---
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 4 +---
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c  | 4 +---
>  drivers/gpu/drm/msm/dsi/phy/dsi_pll.c      | 9 ---------
>  6 files changed, 3 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/dsi/dsi.h 
> b/drivers/gpu/drm/msm/dsi/dsi.h
> index 98a4b296fa30..b310cf344ed4 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi.h
> @@ -100,8 +100,6 @@ int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll 
> *pll,
>  	struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
>  void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
>  int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
> -int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
> -			    enum msm_dsi_phy_usecase uc);
>  #else
>  static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
>  {
> @@ -118,11 +116,6 @@ static inline int
> msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
>  {
>  	return 0;
>  }
> -static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
> -					  enum msm_dsi_phy_usecase uc)
> -{
> -	return -ENODEV;
> -}
>  #endif
> 
>  /* dsi host */
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> index 000e4207dabc..f737bef74b91 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> @@ -29,8 +29,6 @@ struct msm_dsi_pll_ops {
>  	void (*destroy)(struct msm_dsi_pll *pll);
>  	void (*save_state)(struct msm_dsi_pll *pll);
>  	int (*restore_state)(struct msm_dsi_pll *pll);
> -	int (*set_usecase)(struct msm_dsi_pll *pll,
> -			   enum msm_dsi_phy_usecase uc);
>  };
> 
>  struct msm_dsi_phy_cfg {
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> index 5f9d0cfc4e03..7a98e420414f 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> @@ -1049,7 +1049,7 @@ static int dsi_10nm_phy_enable(struct
> msm_dsi_phy *phy, int src_pll_id,
>  	/* Select full-rate mode */
>  	dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_2, 0x40);
> 
> -	ret = msm_dsi_pll_set_usecase(phy->pll, phy->usecase);
> +	ret = dsi_pll_10nm_set_usecase(phy->pll, phy->usecase);
>  	if (ret) {
>  		DRM_DEV_ERROR(&phy->pdev->dev, "%s: set pll usecase failed, %d\n",
>  			__func__, ret);
> @@ -1109,7 +1109,6 @@ const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs = 
> {
>  		.destroy = dsi_pll_10nm_destroy,
>  		.save_state = dsi_pll_10nm_save_state,
>  		.restore_state = dsi_pll_10nm_restore_state,
> -		.set_usecase = dsi_pll_10nm_set_usecase,
>  	},
>  	.min_pll_rate = 1000000000UL,
>  	.max_pll_rate = 3500000000UL,
> @@ -1136,7 +1135,6 @@ const struct msm_dsi_phy_cfg 
> dsi_phy_10nm_8998_cfgs = {
>  		.destroy = dsi_pll_10nm_destroy,
>  		.save_state = dsi_pll_10nm_save_state,
>  		.restore_state = dsi_pll_10nm_restore_state,
> -		.set_usecase = dsi_pll_10nm_set_usecase,
>  	},
>  	.min_pll_rate = 1000000000UL,
>  	.max_pll_rate = 3500000000UL,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> index 8e4528301e5d..bab86fa6dc4b 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> @@ -1190,7 +1190,7 @@ static int dsi_14nm_phy_enable(struct
> msm_dsi_phy *phy, int src_pll_id,
>  				REG_DSI_14nm_PHY_CMN_GLBL_TEST_CTRL,
>  				DSI_14nm_PHY_CMN_GLBL_TEST_CTRL_BITCLK_HS_SEL);
> 
> -	ret = msm_dsi_pll_set_usecase(phy->pll, phy->usecase);
> +	ret = dsi_pll_14nm_set_usecase(phy->pll, phy->usecase);
>  	if (ret) {
>  		DRM_DEV_ERROR(&phy->pdev->dev, "%s: set pll usecase failed, %d\n",
>  			__func__, ret);
> @@ -1231,7 +1231,6 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs = 
> {
>  		.destroy = dsi_pll_14nm_destroy,
>  		.save_state = dsi_pll_14nm_save_state,
>  		.restore_state = dsi_pll_14nm_restore_state,
> -		.set_usecase = dsi_pll_14nm_set_usecase,
>  		.disable_seq = dsi_pll_14nm_disable_seq,
>  		.enable_seq = dsi_pll_14nm_enable_seq,
>  	},
> @@ -1260,7 +1259,6 @@ const struct msm_dsi_phy_cfg 
> dsi_phy_14nm_660_cfgs = {
>  		.destroy = dsi_pll_14nm_destroy,
>  		.save_state = dsi_pll_14nm_save_state,
>  		.restore_state = dsi_pll_14nm_restore_state,
> -		.set_usecase = dsi_pll_14nm_set_usecase,
>  		.disable_seq = dsi_pll_14nm_disable_seq,
>  		.enable_seq = dsi_pll_14nm_enable_seq,
>  	},
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> index 4831d6769da7..5acdfe1f63be 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> @@ -1064,7 +1064,7 @@ static int dsi_7nm_phy_enable(struct msm_dsi_phy
> *phy, int src_pll_id,
>  	/* Select full-rate mode */
>  	dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_2, 0x40);
> 
> -	ret = msm_dsi_pll_set_usecase(phy->pll, phy->usecase);
> +	ret = dsi_pll_7nm_set_usecase(phy->pll, phy->usecase);
>  	if (ret) {
>  		DRM_DEV_ERROR(&phy->pdev->dev, "%s: set pll usecase failed, %d\n",
>  			__func__, ret);
> @@ -1142,7 +1142,6 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = {
>  		.destroy = dsi_pll_7nm_destroy,
>  		.save_state = dsi_pll_7nm_save_state,
>  		.restore_state = dsi_pll_7nm_restore_state,
> -		.set_usecase = dsi_pll_7nm_set_usecase,
>  	},
>  	.min_pll_rate = 600000000UL,
>  	.max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000ULL : 
> ULONG_MAX,
> @@ -1170,7 +1169,6 @@ const struct msm_dsi_phy_cfg 
> dsi_phy_7nm_8150_cfgs = {
>  		.destroy = dsi_pll_7nm_destroy,
>  		.save_state = dsi_pll_7nm_save_state,
>  		.restore_state = dsi_pll_7nm_restore_state,
> -		.set_usecase = dsi_pll_7nm_set_usecase,
>  	},
>  	.min_pll_rate = 1000000000UL,
>  	.max_pll_rate = 3500000000UL,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> index e607adffe001..98ee4560581a 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> @@ -113,12 +113,3 @@ int msm_dsi_pll_restore_state(struct msm_dsi_pll 
> *pll)
> 
>  	return 0;
>  }
> -
> -int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
> -			    enum msm_dsi_phy_usecase uc)
> -{
> -	if (pll->cfg->pll_ops.set_usecase)
> -		return pll->cfg->pll_ops.set_usecase(pll, uc);
> -
> -	return 0;
> -}
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  reply	other threads:[~2021-03-26 17:55 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-24 15:18 [PATCH v2 00/28] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers Dmitry Baryshkov
2021-03-24 15:18 ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 01/28] clk: fixed: add devm helper for clk_hw_register_fixed_factor() Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:43   ` [Freedreno] " abhinavk
2021-03-26 17:43     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 02/28] clk: mux: provide devm_clk_hw_register_mux() Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:44   ` [Freedreno] " abhinavk
2021-03-26 17:44     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 03/28] clk: divider: add devm_clk_hw_register_divider Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:45   ` [Freedreno] " abhinavk
2021-03-26 17:45     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 04/28] drm/msm/dsi: replace PHY's init callback with configurable data Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:46   ` [Freedreno] " abhinavk
2021-03-26 17:46     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 05/28] drm/msm/dsi: fuse dsi_pll_* code into dsi_phy_* code Dmitry Baryshkov
2021-03-26 17:48   ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 06/28] drm/msm/dsi: drop multiple pll enable_seq support Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:49   ` [Freedreno] " abhinavk
2021-03-26 17:49     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 07/28] drm/msm/dsi: move all PLL callbacks into PHY config struct Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:51   ` [Freedreno] " abhinavk
2021-03-26 17:51     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 08/28] drm/msm/dsi: drop global msm_dsi_phy_type enumaration Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:52   ` [Freedreno] " abhinavk
2021-03-26 17:52     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 09/28] drm/msm/dsi: move min/max PLL rate to phy config Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:53   ` [Freedreno] " abhinavk
2021-03-26 17:53     ` abhinavk
2021-03-24 15:18 ` [PATCH v2 10/28] drm/msm/dsi: remove msm_dsi_pll_set_usecase Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 17:54   ` abhinavk [this message]
2021-03-26 17:54     ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 11/28] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-26 18:05   ` [Freedreno] " abhinavk
2021-03-26 18:05     ` abhinavk
2021-03-26 20:36     ` Dmitry Baryshkov
2021-03-26 20:36       ` Dmitry Baryshkov
2021-03-26 20:48       ` abhinavk
2021-03-26 20:48         ` abhinavk
2021-03-27  0:58         ` Dmitry Baryshkov
2021-03-27  0:58           ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 12/28] arm64: dts: qcom: sdm845: assign DSI clock source parents Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 13/28] arm64: dts: qcom: sc7180: " Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 14/28] drm/msm/dsi: push provided clocks handling into a generic code Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 15/28] drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocks Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 16/28] drm/msm/dsi: use devm_of_clk_add_hw_provider Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 17/28] drm/msm/dsi: make save/restore_state phy-level functions Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 18/28] drm/msm/dsi: drop vco_delay setting from 7nm, 10nm, 14nm drivers Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 19/28] drm/msm/dpu: simplify vco_delay handling in dsi_phy_28nm driver Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 20/28] drm/msi/dsi: inline msm_dsi_pll_helper_clk_prepare/unprepare Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 21/28] drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phy Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 22/28] drm/msm/dsi: drop msm_dsi_pll abstracton Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 23/28] drm/msm/dsi: drop PLL accessor functions Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 24/28] drm/msm/dsi: move ioremaps to dsi_phy_driver_probe Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 25/28] drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instances Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 26/28] drm/msm/dsi: remove temp data from global pll structure Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 27/28] drm/msm/dsi: inline msm_dsi_phy_set_src_pll Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 28/28] drm/msm/dsi: stop passing src_pll_id to the phy_enable call Dmitry Baryshkov
2021-03-24 15:18   ` Dmitry Baryshkov

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