[PATCH] dmaengine: sun6i: Set the maximum segment size

[PATCH] dmaengine: sun6i: Set the maximum segment size

[Samuel Holland]

The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
explicitly stated in newer SoC documentation (H6, D1), and it is implied
in older documentation by the 25-bit width of the "bytes left in the
current segment" register field.

Exposing the real segment size limit (instead of the 64k default)
reduces the number of SG list segments needed for a transaction.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Tested on A64, verified that the maximum ALSA PCM period increased, and
that audio playback still worked.

 drivers/dma/sun6i-dma.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index b7557f437936..1425f87d97b7 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -9,6 +9,7 @@
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/dma-mapping.h>
 #include <linux/dmaengine.h>
 #include <linux/dmapool.h>
 #include <linux/interrupt.h>
@@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device *pdev)
 	INIT_LIST_HEAD(&sdc->pending);
 	spin_lock_init(&sdc->lock);
 
+	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
+
 	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
 	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
 	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
-- 
2.35.1

[PATCH] dmaengine: sun6i: Set the maximum segment size

[Samuel Holland]

The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
explicitly stated in newer SoC documentation (H6, D1), and it is implied
in older documentation by the 25-bit width of the "bytes left in the
current segment" register field.

Exposing the real segment size limit (instead of the 64k default)
reduces the number of SG list segments needed for a transaction.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Tested on A64, verified that the maximum ALSA PCM period increased, and
that audio playback still worked.

 drivers/dma/sun6i-dma.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index b7557f437936..1425f87d97b7 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -9,6 +9,7 @@
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/dma-mapping.h>
 #include <linux/dmaengine.h>
 #include <linux/dmapool.h>
 #include <linux/interrupt.h>
@@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device *pdev)
 	INIT_LIST_HEAD(&sdc->pending);
 	spin_lock_init(&sdc->lock);
 
+	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
+
 	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
 	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
 	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
-- 
2.35.1


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Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Jernej Škrabec]

Dne petek, 17. junij 2022 ob 05:42:09 CEST je Samuel Holland napisal(a):
> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
> explicitly stated in newer SoC documentation (H6, D1), and it is implied
> in older documentation by the 25-bit width of the "bytes left in the
> current segment" register field.

At least A10 user manual says 128k max in description for Byte Counter 
register (0x100+N*0x20+0xC), although field size is defined as 23:0, but that's 
still less than 2^25-1. A20 supports only 128k too according to manual. New 
quirk should be introduced for this.

Best regards,
Jernej

> 
> Exposing the real segment size limit (instead of the 64k default)
> reduces the number of SG list segments needed for a transaction.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> Tested on A64, verified that the maximum ALSA PCM period increased, and
> that audio playback still worked.
> 
>  drivers/dma/sun6i-dma.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index b7557f437936..1425f87d97b7 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -9,6 +9,7 @@
>  
>  #include <linux/clk.h>
>  #include <linux/delay.h>
> +#include <linux/dma-mapping.h>
>  #include <linux/dmaengine.h>
>  #include <linux/dmapool.h>
>  #include <linux/interrupt.h>
> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device 
*pdev)
>  	INIT_LIST_HEAD(&sdc->pending);
>  	spin_lock_init(&sdc->lock);
>  
> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
> +
>  	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
>  	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
>  	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
> -- 
> 2.35.1
> 
> 

Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Jernej Škrabec]

Dne petek, 17. junij 2022 ob 05:42:09 CEST je Samuel Holland napisal(a):
> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
> explicitly stated in newer SoC documentation (H6, D1), and it is implied
> in older documentation by the 25-bit width of the "bytes left in the
> current segment" register field.

At least A10 user manual says 128k max in description for Byte Counter 
register (0x100+N*0x20+0xC), although field size is defined as 23:0, but that's 
still less than 2^25-1. A20 supports only 128k too according to manual. New 
quirk should be introduced for this.

Best regards,
Jernej

> 
> Exposing the real segment size limit (instead of the 64k default)
> reduces the number of SG list segments needed for a transaction.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> Tested on A64, verified that the maximum ALSA PCM period increased, and
> that audio playback still worked.
> 
>  drivers/dma/sun6i-dma.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index b7557f437936..1425f87d97b7 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -9,6 +9,7 @@
>  
>  #include <linux/clk.h>
>  #include <linux/delay.h>
> +#include <linux/dma-mapping.h>
>  #include <linux/dmaengine.h>
>  #include <linux/dmapool.h>
>  #include <linux/interrupt.h>
> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device 
*pdev)
>  	INIT_LIST_HEAD(&sdc->pending);
>  	spin_lock_init(&sdc->lock);
>  
> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
> +
>  	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
>  	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
>  	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
> -- 
> 2.35.1
> 
> 



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Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Samuel Holland]

Hi Jernej,

On 6/20/22 1:28 PM, Jernej Škrabec wrote:
> Dne petek, 17. junij 2022 ob 05:42:09 CEST je Samuel Holland napisal(a):
>> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
>> explicitly stated in newer SoC documentation (H6, D1), and it is implied
>> in older documentation by the 25-bit width of the "bytes left in the
>> current segment" register field.
> 
> At least A10 user manual says 128k max in description for Byte Counter 
> register (0x100+N*0x20+0xC), although field size is defined as 23:0, but that's 
> still less than 2^25-1. A20 supports only 128k too according to manual. New 
> quirk should be introduced for this.

Thanks for checking this. A10 and A20 use a separate driver (sun4i-dma). That
driver will also benefit from setting the max segment size, so I will send a
patch for it.

I think all of the variants supported by sun6i-dma have the same segment size
capability, so no quirk is needed here.

Regards,
Samuel

>>
>> Exposing the real segment size limit (instead of the 64k default)
>> reduces the number of SG list segments needed for a transaction.
>>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>> Tested on A64, verified that the maximum ALSA PCM period increased, and
>> that audio playback still worked.
>>
>>  drivers/dma/sun6i-dma.c | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
>> index b7557f437936..1425f87d97b7 100644
>> --- a/drivers/dma/sun6i-dma.c
>> +++ b/drivers/dma/sun6i-dma.c
>> @@ -9,6 +9,7 @@
>>  
>>  #include <linux/clk.h>
>>  #include <linux/delay.h>
>> +#include <linux/dma-mapping.h>
>>  #include <linux/dmaengine.h>
>>  #include <linux/dmapool.h>
>>  #include <linux/interrupt.h>
>> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device 
> *pdev)
>>  	INIT_LIST_HEAD(&sdc->pending);
>>  	spin_lock_init(&sdc->lock);
>>  
>> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
>> +
>>  	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
>>  	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
>>  	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
>> -- 
>> 2.35.1
>>
>>
> 
> 

Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Samuel Holland]

Hi Jernej,

On 6/20/22 1:28 PM, Jernej Škrabec wrote:
> Dne petek, 17. junij 2022 ob 05:42:09 CEST je Samuel Holland napisal(a):
>> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
>> explicitly stated in newer SoC documentation (H6, D1), and it is implied
>> in older documentation by the 25-bit width of the "bytes left in the
>> current segment" register field.
> 
> At least A10 user manual says 128k max in description for Byte Counter 
> register (0x100+N*0x20+0xC), although field size is defined as 23:0, but that's 
> still less than 2^25-1. A20 supports only 128k too according to manual. New 
> quirk should be introduced for this.

Thanks for checking this. A10 and A20 use a separate driver (sun4i-dma). That
driver will also benefit from setting the max segment size, so I will send a
patch for it.

I think all of the variants supported by sun6i-dma have the same segment size
capability, so no quirk is needed here.

Regards,
Samuel

>>
>> Exposing the real segment size limit (instead of the 64k default)
>> reduces the number of SG list segments needed for a transaction.
>>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>> Tested on A64, verified that the maximum ALSA PCM period increased, and
>> that audio playback still worked.
>>
>>  drivers/dma/sun6i-dma.c | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
>> index b7557f437936..1425f87d97b7 100644
>> --- a/drivers/dma/sun6i-dma.c
>> +++ b/drivers/dma/sun6i-dma.c
>> @@ -9,6 +9,7 @@
>>  
>>  #include <linux/clk.h>
>>  #include <linux/delay.h>
>> +#include <linux/dma-mapping.h>
>>  #include <linux/dmaengine.h>
>>  #include <linux/dmapool.h>
>>  #include <linux/interrupt.h>
>> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device 
> *pdev)
>>  	INIT_LIST_HEAD(&sdc->pending);
>>  	spin_lock_init(&sdc->lock);
>>  
>> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
>> +
>>  	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
>>  	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
>>  	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
>> -- 
>> 2.35.1
>>
>>
> 
> 


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Re: Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Jernej Škrabec]

Dne torek, 21. junij 2022 ob 02:20:11 CEST je Samuel Holland napisal(a):
> Hi Jernej,
> 
> On 6/20/22 1:28 PM, Jernej Škrabec wrote:
> > Dne petek, 17. junij 2022 ob 05:42:09 CEST je Samuel Holland napisal(a):
> >> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
> >> explicitly stated in newer SoC documentation (H6, D1), and it is implied
> >> in older documentation by the 25-bit width of the "bytes left in the
> >> current segment" register field.
> > 
> > At least A10 user manual says 128k max in description for Byte Counter 
> > register (0x100+N*0x20+0xC), although field size is defined as 23:0, but 
that's 
> > still less than 2^25-1. A20 supports only 128k too according to manual. 
New 
> > quirk should be introduced for this.
> 
> Thanks for checking this. A10 and A20 use a separate driver (sun4i-dma). 
That
> driver will also benefit from setting the max segment size, so I will send a
> patch for it.
> 
> I think all of the variants supported by sun6i-dma have the same segment 
size
> capability, so no quirk is needed here.

Ah, yes. Then this patch is:
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

> 
> Regards,
> Samuel
> 
> >>
> >> Exposing the real segment size limit (instead of the 64k default)
> >> reduces the number of SG list segments needed for a transaction.
> >>
> >> Signed-off-by: Samuel Holland <samuel@sholland.org>
> >> ---
> >> Tested on A64, verified that the maximum ALSA PCM period increased, and
> >> that audio playback still worked.
> >>
> >>  drivers/dma/sun6i-dma.c | 3 +++
> >>  1 file changed, 3 insertions(+)
> >>
> >> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> >> index b7557f437936..1425f87d97b7 100644
> >> --- a/drivers/dma/sun6i-dma.c
> >> +++ b/drivers/dma/sun6i-dma.c
> >> @@ -9,6 +9,7 @@
> >>  
> >>  #include <linux/clk.h>
> >>  #include <linux/delay.h>
> >> +#include <linux/dma-mapping.h>
> >>  #include <linux/dmaengine.h>
> >>  #include <linux/dmapool.h>
> >>  #include <linux/interrupt.h>
> >> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device 
> > *pdev)
> >>  	INIT_LIST_HEAD(&sdc->pending);
> >>  	spin_lock_init(&sdc->lock);
> >>  
> >> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
> >> +
> >>  	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
> >>  	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
> >>  	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
> >> -- 
> >> 2.35.1
> >>
> >>
> > 
> > 
> 
> 

Re: Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Jernej Škrabec]

Dne torek, 21. junij 2022 ob 02:20:11 CEST je Samuel Holland napisal(a):
> Hi Jernej,
> 
> On 6/20/22 1:28 PM, Jernej Škrabec wrote:
> > Dne petek, 17. junij 2022 ob 05:42:09 CEST je Samuel Holland napisal(a):
> >> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
> >> explicitly stated in newer SoC documentation (H6, D1), and it is implied
> >> in older documentation by the 25-bit width of the "bytes left in the
> >> current segment" register field.
> > 
> > At least A10 user manual says 128k max in description for Byte Counter 
> > register (0x100+N*0x20+0xC), although field size is defined as 23:0, but 
that's 
> > still less than 2^25-1. A20 supports only 128k too according to manual. 
New 
> > quirk should be introduced for this.
> 
> Thanks for checking this. A10 and A20 use a separate driver (sun4i-dma). 
That
> driver will also benefit from setting the max segment size, so I will send a
> patch for it.
> 
> I think all of the variants supported by sun6i-dma have the same segment 
size
> capability, so no quirk is needed here.

Ah, yes. Then this patch is:
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

> 
> Regards,
> Samuel
> 
> >>
> >> Exposing the real segment size limit (instead of the 64k default)
> >> reduces the number of SG list segments needed for a transaction.
> >>
> >> Signed-off-by: Samuel Holland <samuel@sholland.org>
> >> ---
> >> Tested on A64, verified that the maximum ALSA PCM period increased, and
> >> that audio playback still worked.
> >>
> >>  drivers/dma/sun6i-dma.c | 3 +++
> >>  1 file changed, 3 insertions(+)
> >>
> >> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> >> index b7557f437936..1425f87d97b7 100644
> >> --- a/drivers/dma/sun6i-dma.c
> >> +++ b/drivers/dma/sun6i-dma.c
> >> @@ -9,6 +9,7 @@
> >>  
> >>  #include <linux/clk.h>
> >>  #include <linux/delay.h>
> >> +#include <linux/dma-mapping.h>
> >>  #include <linux/dmaengine.h>
> >>  #include <linux/dmapool.h>
> >>  #include <linux/interrupt.h>
> >> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device 
> > *pdev)
> >>  	INIT_LIST_HEAD(&sdc->pending);
> >>  	spin_lock_init(&sdc->lock);
> >>  
> >> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));
> >> +
> >>  	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
> >>  	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
> >>  	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);
> >> -- 
> >> 2.35.1
> >>
> >>
> > 
> > 
> 
> 



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Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Robin Murphy]

On 2022-06-17 04:42, Samuel Holland wrote:
> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
> explicitly stated in newer SoC documentation (H6, D1), and it is implied
> in older documentation by the 25-bit width of the "bytes left in the
> current segment" register field.
> 
> Exposing the real segment size limit (instead of the 64k default)
> reduces the number of SG list segments needed for a transaction.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> Tested on A64, verified that the maximum ALSA PCM period increased, and
> that audio playback still worked.
> 
>   drivers/dma/sun6i-dma.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index b7557f437936..1425f87d97b7 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -9,6 +9,7 @@
>   
>   #include <linux/clk.h>
>   #include <linux/delay.h>
> +#include <linux/dma-mapping.h>
>   #include <linux/dmaengine.h>
>   #include <linux/dmapool.h>
>   #include <linux/interrupt.h>
> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device *pdev)
>   	INIT_LIST_HEAD(&sdc->pending);
>   	spin_lock_init(&sdc->lock);
>   
> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));

Similarly to my comment on the DRM patch, "SZ_32M - 1" might be clearer 
here.

Thanks,
Robin.

> +
>   	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
>   	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
>   	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);

Re: [PATCH] dmaengine: sun6i: Set the maximum segment size

[Robin Murphy]

On 2022-06-17 04:42, Samuel Holland wrote:
> The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is
> explicitly stated in newer SoC documentation (H6, D1), and it is implied
> in older documentation by the 25-bit width of the "bytes left in the
> current segment" register field.
> 
> Exposing the real segment size limit (instead of the 64k default)
> reduces the number of SG list segments needed for a transaction.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> Tested on A64, verified that the maximum ALSA PCM period increased, and
> that audio playback still worked.
> 
>   drivers/dma/sun6i-dma.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index b7557f437936..1425f87d97b7 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -9,6 +9,7 @@
>   
>   #include <linux/clk.h>
>   #include <linux/delay.h>
> +#include <linux/dma-mapping.h>
>   #include <linux/dmaengine.h>
>   #include <linux/dmapool.h>
>   #include <linux/interrupt.h>
> @@ -1334,6 +1335,8 @@ static int sun6i_dma_probe(struct platform_device *pdev)
>   	INIT_LIST_HEAD(&sdc->pending);
>   	spin_lock_init(&sdc->lock);
>   
> +	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(25));

Similarly to my comment on the DRM patch, "SZ_32M - 1" might be clearer 
here.

Thanks,
Robin.

> +
>   	dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask);
>   	dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask);
>   	dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask);

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