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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Daniel Palmer <daniel@0x0f.com>
Cc: Romain Perier <romain.perier@gmail.com>,
	Alessandro Zummo <a.zummo@towertech.it>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>,
	linux-rtc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] dt-bindings: rtc: Add Mstar SSD20xD RTC devicetree bindings documentation
Date: Wed, 31 May 2023 08:49:07 +0200	[thread overview]
Message-ID: <1a267380-c39d-d3a7-9287-61ba632480c3@kernel.org> (raw)
In-Reply-To: <CAFr9PXmkvunO8mu+n7_YFSixe3k0vzowJzrmEWKcs9W677=WNQ@mail.gmail.com>

On 31/05/2023 01:12, Daniel Palmer wrote:
> Hi Krzysztof,
> 
> On Tue, 30 May 2023 at 17:01, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>> This is
>>> exactly the case for rtc-msc313e and it was not an issue.
>>
>> So that was my question - can it be anything else? There is literally no
>> description of the hardware... Neither in commit msg nor in description:
>> field in bindings.
> 
> This RTC block is a block inside of the SSD201/SSD202D (they are the

But what is SSD201?

> same die with different memory attached) and is only found there.
> The documentation we have for this is literally one page in a PDF that
> says "RTC registers".
> It could be an IP block licensed from somewhere and technically have a
> better name but right now all we know is this RTC block is the one in
> that chip and that chip is the first known instance of it.
> 
> Say we manage to get the ethernet mainlined at some point: That's a
> lot easier as we know already it's a hacked up version of the cadence
> macb so the compatible can be "macb something".
> 
>>>> What about interrupt line?
>>>
>>> There is currently no interrupt right now, we have not yet the irqchip
>>> code for handling the alarm irq of this rtc block.
>>
>> So you are going to change the hardware and add the interrupt line? We
>> do not talk about drivers, but hardware. Whether your driver handles it
>> or not, matters less.
>>
>> Describe the hardware, not the current implementation of one driver.
> 
> We don't really know how the interrupt is wired up in the hardware properly yet.

OK

Best regards,
Krzysztof


WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Daniel Palmer <daniel@0x0f.com>
Cc: Romain Perier <romain.perier@gmail.com>,
	Alessandro Zummo <a.zummo@towertech.it>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>,
	linux-rtc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] dt-bindings: rtc: Add Mstar SSD20xD RTC devicetree bindings documentation
Date: Wed, 31 May 2023 08:49:07 +0200	[thread overview]
Message-ID: <1a267380-c39d-d3a7-9287-61ba632480c3@kernel.org> (raw)
In-Reply-To: <CAFr9PXmkvunO8mu+n7_YFSixe3k0vzowJzrmEWKcs9W677=WNQ@mail.gmail.com>

On 31/05/2023 01:12, Daniel Palmer wrote:
> Hi Krzysztof,
> 
> On Tue, 30 May 2023 at 17:01, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>> This is
>>> exactly the case for rtc-msc313e and it was not an issue.
>>
>> So that was my question - can it be anything else? There is literally no
>> description of the hardware... Neither in commit msg nor in description:
>> field in bindings.
> 
> This RTC block is a block inside of the SSD201/SSD202D (they are the

But what is SSD201?

> same die with different memory attached) and is only found there.
> The documentation we have for this is literally one page in a PDF that
> says "RTC registers".
> It could be an IP block licensed from somewhere and technically have a
> better name but right now all we know is this RTC block is the one in
> that chip and that chip is the first known instance of it.
> 
> Say we manage to get the ethernet mainlined at some point: That's a
> lot easier as we know already it's a hacked up version of the cadence
> macb so the compatible can be "macb something".
> 
>>>> What about interrupt line?
>>>
>>> There is currently no interrupt right now, we have not yet the irqchip
>>> code for handling the alarm irq of this rtc block.
>>
>> So you are going to change the hardware and add the interrupt line? We
>> do not talk about drivers, but hardware. Whether your driver handles it
>> or not, matters less.
>>
>> Describe the hardware, not the current implementation of one driver.
> 
> We don't really know how the interrupt is wired up in the hardware properly yet.

OK

Best regards,
Krzysztof


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  reply	other threads:[~2023-05-31  6:49 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-17 14:41 [PATCH 0/3] Add RTC for MStar SSD20xD SoCs Romain Perier
2023-05-17 14:41 ` Romain Perier
2023-05-17 14:41 ` [PATCH 1/3] rtc: Add support for the SSD20xD RTC Romain Perier
2023-05-17 14:41   ` Romain Perier
2023-05-29 22:40   ` Alexandre Belloni
2023-05-29 22:40     ` Alexandre Belloni
2023-05-29 23:06     ` Daniel Palmer
2023-05-29 23:06       ` Daniel Palmer
2023-05-17 14:41 ` [PATCH 2/3] dt-bindings: rtc: Add Mstar SSD20xD RTC devicetree bindings documentation Romain Perier
2023-05-17 14:41   ` Romain Perier
2023-05-17 17:44   ` Conor Dooley
2023-05-17 17:44     ` Conor Dooley
2023-05-22  6:47     ` Romain Perier
2023-05-22  6:47       ` Romain Perier
2023-05-22  7:16       ` Conor Dooley
2023-05-22  7:16         ` Conor Dooley
2023-05-18  8:24   ` Krzysztof Kozlowski
2023-05-18  8:24     ` Krzysztof Kozlowski
2023-05-22 11:27     ` Romain Perier
2023-05-22 11:27       ` Romain Perier
2023-05-30  8:01       ` Krzysztof Kozlowski
2023-05-30  8:01         ` Krzysztof Kozlowski
2023-05-30 23:12         ` Daniel Palmer
2023-05-30 23:12           ` Daniel Palmer
2023-05-31  6:49           ` Krzysztof Kozlowski [this message]
2023-05-31  6:49             ` Krzysztof Kozlowski
2023-05-31 22:26             ` Daniel Palmer
2023-05-31 22:26               ` Daniel Palmer
2023-05-17 14:41 ` [PATCH 3/3] ARM: dts: mstar: Enable rtc for SSD20xD Romain Perier
2023-05-17 14:41   ` Romain Perier

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