From: Dave Jones <davej@codemonkey.org.uk>
To: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: David Brownell <david-b@pacbell.net>,
Jeff Garzik <jgarzik@pobox.com>, Greg KH <greg@kroah.com>,
Russell King <rmk@arm.linux.org.uk>,
Linus Torvalds <torvalds@transmeta.com>,
linux-kernel@vger.kernel.org
Subject: Re: [patch 2.5] PCI MWI cacheline size fix
Date: Thu, 20 Mar 2003 11:55:20 +0000 [thread overview]
Message-ID: <20030320115520.GB6995@suse.de> (raw)
In-Reply-To: <20030320135950.A2333@jurassic.park.msu.ru>
On Thu, Mar 20, 2003 at 01:59:50PM +0300, Ivan Kokshaysky wrote:
> +
> + pci_cache_line_size = 32 >> 2;
> + if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
> + pci_cache_line_size = 64 >> 2; /* K7 & K8 */
> + else if (c->x86 > 6)
> + pci_cache_line_size = 128 >> 2; /* P4 */
>
I'd feel more comfortable with this with a c->x86_vendor == X86_VENDOR_INTEL
on the else if clause. The above code will silently break if for eg,
VIA, Transmeta or any other clone manufacturer make a model 7 or higher CPU.
Dave
next prev parent reply other threads:[~2003-03-20 11:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-03-20 10:59 [patch 2.5] PCI MWI cacheline size fix Ivan Kokshaysky
2003-03-20 11:55 ` Dave Jones [this message]
2003-03-20 12:29 ` Ivan Kokshaysky
2003-03-20 12:54 ` Dave Jones
2003-03-20 14:33 ` Jeff Garzik
2003-03-20 15:29 ` David Brownell
2003-03-20 22:26 ` Greg KH
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