[PATCH] Comments in the titan ethernet driver for IP header alignment

[PATCH] Comments in the titan ethernet driver for IP header alignment

[Manish Lachwani]

[-- Attachment #1: Type: text/plain, Size: 156 bytes --]

Hi Ralf,

Attached patch puts comments around the section that programs register 0x103C
for IP header alignment. Please review ...

Thanks
Manish Lachwani


[-- Attachment #2: patch-titan-comments --]
[-- Type: text/plain, Size: 916 bytes --]

--- drivers/net/titan_ge.c.orig	2004-11-23 09:00:29.000000000 -0800
+++ drivers/net/titan_ge.c	2004-11-23 09:12:07.000000000 -0800
@@ -1000,6 +1000,17 @@
 	 * driver. This performance drawback existed in the previous
 	 * versions of the silicon
 	 */
+	/*
+	 * The register (0x103c) below has been used to program the 
+	 * chip to do the IP header alignment. The idea was to fix the
+	 * IP header alignment by using existing unused registers,
+	 * so that this feature can be implemented quickly. If these 
+	 * registers are not programmed, then the chip will not align the 
+	 * IP headers and an extra copy would have to be implemented
+	 * in the driver on the Rx side. I am not sure if this 
+	 * has been documented.  
+	 *			- Manish Lachwani (11/23/2004)
+	 */
 	reg_data_1 = TITAN_GE_READ(0x103c + (port_num << 12));
 	reg_data_1 |= 0x40000000;
 	TITAN_GE_WRITE((0x103c + (port_num << 12)), reg_data_1);

Re: [PATCH] Comments in the titan ethernet driver for IP header alignment

[Thomas Koeller]

Hi Manish,

register 0x103c is not documented in any but the newest version of
the processor's user manual, and the function documented there has
_nothing_ to do with header alignment. So either the docs are wrong,
or the register implements both the documented and undocumented
functions. In this case, however, the code would be wrong because it
permanently modifies the register's contents, which could screw up
packet priority processing.

Thomas

On Tuesday 23 November 2004 18:14, Manish Lachwani wrote:
> Hi Ralf,
>
> Attached patch puts comments around the section that programs register
> 0x103C for IP header alignment. Please review ...
>
> Thanks
> Manish Lachwani

-- 
--------------------------------------------------

Thomas Koeller, Software Development
Basler Vision Technologies

thomas dot koeller at baslerweb dot com
http://www.baslerweb.com

==============================

Re: [PATCH] Comments in the titan ethernet driver for IP header alignment

[Manish Lachwani]

Hi Thomas,

Thomas Koeller wrote:
> Hi Manish,
> 
> register 0x103c is not documented in any but the newest version of
> the processor's user manual, and the function documented there has
> _nothing_ to do with header alignment. 

I agree. The document says nothing about IP header alignment. And like I 
said before, this code has been written based on feedback from the chip 
designers. I have no idea why there is not document describing this, as 
yet.

> So either the docs are wrong,
> or the register implements both the documented and undocumented
> functions. In this case, however, the code would be wrong because it
> permanently modifies the register's contents, which could screw up
> packet priority processing.

The code implements sequence of operations that are needed for the chip 
to align IP headers. Thats all. Now, if you think that this can screw up 
packet priority processing in any way, then you should point PMC about 
this potential bug. AFAIK, there are other OS's that use this register 
to fix the IP header alignment issue on the Titan.

Thanks
Manish Lachwani


> 
> Thomas
> 
> On Tuesday 23 November 2004 18:14, Manish Lachwani wrote:
> 
>>Hi Ralf,
>>
>>Attached patch puts comments around the section that programs register
>>0x103C for IP header alignment. Please review ...
>>
>>Thanks
>>Manish Lachwani
> 
> 

Re: [PATCH] Comments in the titan ethernet driver for IP header alignment

[Manish Lachwani]

Hi Thomas,

Thomas Koeller wrote:
> Hi Manish,
> 
> register 0x103c is not documented in any but the newest version of
> the processor's user manual, and the function documented there has
> _nothing_ to do with header alignment. 

I agree. The document says nothing about IP header alignment. And like I 
said before, this code has been written based on feedback from the chip 
designers. I have no idea why there is not document describing this, as 
yet.

> So either the docs are wrong,
> or the register implements both the documented and undocumented
> functions. In this case, however, the code would be wrong because it
> permanently modifies the register's contents, which could screw up
> packet priority processing.

The code implements sequence of operations that are needed for the chip 
to align IP headers. Thats all. Now, if you think that this can screw up 
packet priority processing in any way, then you should point PMC about 
this potential bug. AFAIK, there are other OS's that use this register 
to fix the IP header alignment issue on the Titan.

Thanks
Manish Lachwani


> 
> Thomas
> 
> On Tuesday 23 November 2004 18:14, Manish Lachwani wrote:
> 
>>Hi Ralf,
>>
>>Attached patch puts comments around the section that programs register
>>0x103C for IP header alignment. Please review ...
>>
>>Thanks
>>Manish Lachwani
> 
>