From: Andi Kleen <ak@suse.de>
To: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
Cc: discuss@x86-64.org, linux-kernel@vger.kernel.org, akpm@osdl.org
Subject: Re: [discuss] [Patch 1/2] x86, x86_64: Intel HT, Multi core detection fixes
Date: Thu, 13 Oct 2005 02:10:22 +0200 [thread overview]
Message-ID: <200510130210.23311.ak@suse.de> (raw)
In-Reply-To: <20051012151926.E29292@unix-os.sc.intel.com>
On Thursday 13 October 2005 00:19, Siddha, Suresh B wrote:
> x86_num_cores (cpuid returned value) is required while right shifting the
> apicid to get the core-id and the package-id. booted_cores will indicate
> how many cores actually cameup. x86_num_cores can differ from "booted cores"
> in these scenarios
The original idea was to round it up to the next power of two
before shifting. But I can see that it will break when the number
of online cores differs from the max number by more than a single power
of two (e.g. quadcore with only a single CPU booted)
Ok, if you rename the variable to make it clear
x86_num_cores -> x86_max_cores
-Andi
next prev parent reply other threads:[~2005-10-13 0:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-10-05 23:17 [Patch] x86, x86_64: Intel HT, Multi core detection code cleanup Siddha, Suresh B
2005-10-06 10:42 ` Andi Kleen
2005-10-07 2:20 ` Siddha, Suresh B
2005-10-07 9:52 ` [discuss] " Andi Kleen
2005-10-08 0:52 ` Siddha, Suresh B
2005-10-08 10:28 ` Andi Kleen
2005-10-12 21:30 ` Siddha, Suresh B
2005-10-12 21:36 ` [Patch 1/2] x86, x86_64: Intel HT, Multi core detection fixes Siddha, Suresh B
2005-10-12 21:49 ` [discuss] " Andi Kleen
2005-10-12 22:19 ` Siddha, Suresh B
2005-10-13 0:10 ` Andi Kleen [this message]
2005-10-13 21:55 ` Siddha, Suresh B
2005-10-13 21:59 ` [Patch 2/2] x86, x86_64: fix Intel cache detection code assumption about threads sharing Siddha, Suresh B
2005-10-12 21:41 ` Siddha, Suresh B
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